DE1616374C - Arrangement for measuring range switching with a digital voltmeter - Google Patents

Description

1 2

The invention relates to an arrangement for and that a device for optional. modification

Measuring range switchover with a digital span-

voltage meter with an integrating device, which is introduced in 'the dividing arrangement under sequence

the control of a control circuit at the beginning, the divisor changes.

Measuring process during a due to the occurrence 5 To switch over the measuring range, the dividing unit can be used predetermined number of clock pulses of an arrangement influenced by the control circuit in this way Clock pulse generator predetermined sampling interval which will be that die.Impulssequenzfrequenz when applied analog input voltage is supplied, whereupon input voltage, i.e. when the voltage rises on the output voltage of the integrating device out- output of the integrating device and when applied starting from a reference value increases, and the an- io comparison voltage, i.e. with decreasing output, finally during a measuring interval one of a voltage is different. So if you look at the comparison voltage source originating comparison voltage of the pulse repetition frequency with the rise and voltage is supplied in such a way that the output voltage changes when it falls, then the measuring range voltage of the integrator drops, and changed with one.

Pulse counter, which with the beginning of the voltage 15 Preferably, the pulse repetition frequency is during

decrease at the integrating device which is reduced by the clock pulse of the increase interval. ~ '

pulse generator counts as long as the change in the pulse supplied to the counter

until the voltage drops to the reference value repetition frequency does not need in that moment

a reference to be made downstream of the integrating device, in which the increase in

value detector via the control circuit to the pulse so the drop passes. A pulse repetition rate change

counter stops at the end of the 'measuring interval. Rather, one or more pre-

The ratio of an input voltage V to a given clock pulse counts during the fall _; jx

Comparison voltage U behaves like the event. In this case the result is a nonlinear ^v "

ratio of the during the voltage drop at the dependency between V and JV, so that one on

output of the integrator counted number of 35 linearize a non-linear measurement in this way

Clock pulses JV to the during the voltage can. For example, if V is a nonlinear function

increases at the output of the integrator to a variable, then you can use the voltmeter

occurring predetermined number of clock pulses M. linearize and a linear dependence between

Since all quantities except the input voltage known produce JV and the variable,

it can be measured. The advantages of a 3 ° The invention is to be described with reference to figures

such voltmeter with a rise and will be.

Waste functions can be seen in the fact that the dual F i g. 1 shows the block diagram of an execution function, that is to say the rise and fall function, of the form according to the invention; the same amplifier is generated, so that by F i g. 2 is a timing diagram; Compensate for errors caused by non-linearities 35 F i g. 3 is a more detailed block diagram of one and only one counter is necessary. '. Embodiment according to the invention;

The terms "rise function" and "fall- F i g. 4 is the block diagram of a linearized

function «can be used both on a positive-going digital voltmeter.

as well as a negative-going voltage. In the case of the one shown in FIG. 1 is a block diagram

will. In the case of a negative-going voltage, an input terminal 10 would be connected to 40 via an input

the drop or drop function in positive Rieh- stronger 12 and a semiconductor switch 14 as well as a

increase. Input resistance 16 to an integrating amplifier 18

The invention is concerned with the range switching with a feedback capacitor 20 connected, a digital voltmeter. One of the integrating amplifiers is a zero detector 22 In general, the voltmeter must be followed by a Schmitt trigger, for example. The have more than one voltage measuring range. The output signal of the zero detector is one of the

In the known voltmeters, which are fed to a control circuit 24, which use the dual function, the range changeover switch 14 is actuated. The control circuit 24 is also connected by switching on different sizes to a counter 26, at the input of which input resistances are made. Thereby a 50 28 clock pulses are applied. The meter reading is the only calibrated area available. The accuracy in a display device 30 is decoded and displayed, the other measuring ranges depend on the accuracy, although the circuit part described up to now depends on the input resistances used. If the resistance of the voltmeter is known, the operating status values of these resistors can, however, be described briefly. As shown in FIG. 2, for example as a function of which 55 is going on, a reset pulse 32 sets the counter 26 temperature or with age, so that the accuracy is reset to zero _{at time J 0.} The trailing edge speed of the measuring device is impaired. Furthermore, this pulse occurs actuated at time I ₁ via the control on the relay contacts, which switch on the switch 14 to switch on the circuit 24. This means that the input resistances are used, voltage V is supplied to the integrating amplifier 18 and thermally generated voltages are applied. . 60 the rise function 34 with one of the input voltage

The object of the invention is to eliminate the slope proportional to voltage V at the output of the aforementioned difficulties and to produce equal integrating amplifier 18. During this intermittent there is a non-linear dependency between valls, the counter 26 continues to overflow the input voltage V and the number of clocks, for example up to 19,999. The following pulses to reach JV. 65 clock pulse starts the counter at time t _t

This object is returned to zero according to the invention and causes the control circuit

solved that a dividing arrangement is operated between the switch 14 to replace the input

Clock pulse generator and the pulse counter is switched voltage is the comparison voltage U of a comparison

supply voltage source 38 to the integrating amplifier 18. The counter begins to count again, and the comparison voltage CA generates a drop function 36, the slope of which is proportional to the comparison voltage U. At time t ₃ , the output voltage of the integrating amplifier has returned to zero and the measurement is ended. The zero detector 22 reports this to the control circuit, whereupon the latter stops the counter 26. The number stored in the counter 26, which is displayed by the display device 30, represents a measure of the input voltage V. The relationship N = MV \ U applies, where M is the predetermined number of pulses that occur in the time from I ₁ to t _{2 were} counted. It is also assumed that the amplifier 12 has a gain of one. The comparison voltage U can be directed in the opposite direction to the input voltage V. However, both voltages can also have the same sign, the voltage U being fed to the integrating amplifier in such a way that it is directed in the opposite direction to the input voltage V. For example, the two rectified voltages can be fed to the two inputs of a differential amplifier.

In order to ensure a jitter-free display, the pulse 32 is synchronized with the mains frequency and the time span f ₂ -Z _{1 is} dimensioned in such a way that it is an integer multiple of the mains alternating current period. It is preferably chosen to be the same as the mains alternating current period, that is to say 20 milliseconds at a mains alternating current frequency of 50 Hz. This measure is known per se.

In known voltmeters, the various measuring ranges are achieved by changing the gain factor of the operational amplifier 12. For this purpose, a range switch is used which switches on various resistors in order to change the ratio of feedback resistance to input resistance of operational amplifier 12. With a limited input voltage range given by the dynamic range of the amplifier, it is possible according to the invention to eliminate the errors caused by this type of measuring range switching. In contrast to the known arrangements, the pulses fed to the input 28 of the counter 26 are not taken directly from the clock pulse generator 40, but are fed to the counter 26 via an arrangement of dividing circuits 42 and 44 and switches S ₁ , S ₂ and S ₃ . The divider circuits are decade dividers, since the decade ranges are generally made switchable. The following table shows the pulse frequencies at terminal 28 for three different switch positions I, II and III:

55

60

The frequency of the pulse oscillator 40 is ten times higher than that of a conventional voltmeter. Switch setting II, see above, is used to measure the voltage in the calibrated area of the voltmeter that the pulses occurring at terminal 28 have a conventional frequency of, for example, 20,000 pulses in 20 milliseconds have what a frequency

frequency -S ₁ 1
,;. 2 '■■■ S ₃ -Switch position 1: 1
1:10
1: 100 1
2
2 1
2
3 ■ ..: ■ r ...
II
III

of 1 HMz ^. This results in the above-described measuring range N = MVjU. "-" - ■; ^

To measure in a range that is one tenth of this base range, the IT setting is used up to the point in time </ _a and then the I setting. For this purpose, the switches S ₁ SS ₂ and S _{3 are} also actuated by the control circuit 24, as is indicated by the dashed lines 46. For the sake of simplicity, mechanical switches are shown in FIG. 1, although in reality they are Semiconductor switches act, which have a "significantly higher switching speed than mechanical switches.

Therefore, in the t ₂ reaching to t ₃ period, as many pulses are ten times counted as in Grundmeßbereich, and the voltage meter sensitivity is tenfold erhöht.-then applies ■ the relationship N = 10 MVjU: Similarly, one achieves a section enlargement 100 by using setting III up to time t ₂ and then setting I - this gives you iV-100MF / ^.

The calibrated accuracy of the basic range can. are maintained in all measurement ranges, since the divider circuits 42 and 44 are digital devices, preferably semiconductor circuits. , .... I ..... '.

A considerable advantage is seen in using a higher pulse repetition frequency during the actual measuring interval / ₂ to t ₃ than during the sampling interval J ₁ to t ₂ , regardless of whether or not dividing circuits are used to switch the measuring range. This advantage is to be found in the higher operating speed of the voltmeter. As already mentioned, the sampling interval should correspond to the line frequency period of, for example, 20 milliseconds or a multiple of the line frequency period, in order to obtain maximum series interference suppression. In the case of a known voltmeter, the measuring interval for the full display value is equal to the sampling interval, so that a total analog-digital conversion time of at least 40 milliseconds results. In practical measurements, a sampling cycle can only be initiated approximately every 60 milliseconds, ie approximately 70 readings per second are obtained. According to the invention, the measuring interval is reduced without impairing the numerical resolution of the voltmeter. The reason for this is to be seen in the fact that the clock pulse frequency is increased during the measurement interval. The voltage U must be increased by the same factor in order to bring the fall function 36 within the counting capacity of the counter to zero . '. · ■ .. \ _;; .V ;. -V ^ vSyv.- ■ ■. "" ■ ■ "'■ .:. ■; --'- \.

For example, if you use a divisor that divides by 4, the total repositioning time is [20+ (20/4)] = 25 milliseconds. In this way you can very easily trigger a sampling cycle every 40 milliseconds, d. H. 25 readings per second. ·

In Fig. 3 are the details of the in F i g. 1 shown voltmeter shown. The control circuit 24 essentially contains a clock generator 50 which supplies the pulses 32, for example, at a frequency of 25 Hz, furthermore with a bistable multivibrator 52 and with AND gates Gl, Gla, Gib and (73, which together with measuring range switches S4a to SAd Take over the function of switches S ₁ , S ₃ and S ₃ .

The pulses 32 from the clock 50 lead the zero

reset at the counter 26 and at the integrating amplifier 18 by bringing a field effect transistor 54 connected in parallel to the capacitor 20 and a transistor 56 connected to ground and the input of the integrating amplifier 18 into the conductive state. ..; -.- ■? ' VJ, -.-. .-- ι £: ■ "',: - ^ -., ^ G-, Jl''■ λ -.- ζ ^ Ι ^

Whenever the counter 26 returns to the zero state Pulse occurs which switches on the field effect transistor 14a, so that the input voltage V reaches the integrating amplifier 18. If the counter 26 _{overflows at time Z 8} , that is, switches back to zero, the bistable multivibrator switches to such a state that a pulse occurs on the line 81 and the field effect transistor IAb is switched to the conductive state. The voltage U now reaches the amplifier 18. The field effect transistors 14a and IAb together form the switch 14 shown in FIG . The pulses on dsr line 60 come either directly via the AND gate Gl from the oscillator 49 (10 MHz) or via the AND gates GIa or Gib from the dividing circuit 42 (1 MHz) or via the AND gate (73 via both dividing circuits 42 and 44 (100 kHz). Which of these AND gates is open depends on the signals on lines 80 and 81 and on the position of the range switch SAa to 0 '' ' V; i; ^: /

The area switch has four mechanically coupled contact arms S4a, SAb, SAc and SAd. This 4-pole switch can take three positions Rl, Rl and jR3. These positions correspond to the Grundmeßbereich, one tenth of the Grundmeßbereichs and one hundredth of Gründmeß- / range. The contact arms S4a and SAb serve to distribute the pulses on the lines 81 and 80. The contact arms S4c and S4a ″ serve to apply overlapping, positive blocking signals to the AND gates.

For the individual measuring ranges, the control circuit takes make the following settings I, II and III:

S4a locked
open minded SAb S4c S4d G3
G3 locked
locked attitude Gfuhdbereich Rl '. '■ I / rise (J ₁ -Z ₈ ) ...'
2. Waste (J ₂ -Z ₃ ) ... GIa
GIa locked
open minded Give openly
Give locked Gl locked
Gl locked G3
G3 locked
locked II
II Vio area Rl 1st rise Gl
Gl locked
open minded Give openly
Give locked G2a blocked
G2a blocked Give
Give locked
locked II
I. 2. Waste Vioo area R3 Gl
Gl (? 3 open
G3 blocked G2a blocked
G2a blocked III
■■ -. ι ■ 1 kick-off ■ 2. Waste ...:

The switching of the pulse repetition frequency on line 60 does not have to take place at time Z ₈ . If the switchover takes place at one or more points in time after the point in time Z ₂ and these points in time are determined by the count of the counter 26, a predetermined, non-linear relationship between N and V is obtained . 4 shows an embodiment of the invention in which the switchover takes place at a time other than time Z ₈ .

In the case of the in FIG. 4, the bistable multivibrator 52 does not change the pulse repetition frequency on line 60 _{at time Z 8.} In addition to the bistable flip-flop 52, a further bistable flip-flop 62 is provided. The bistable multivibrator 62 is brought into such a state by a pulse 32 that an AND circuit 64 opens and allows pulses to pass directly from the pulse generator 40 to the line 60. When the bistable multivibrator 62 is set to its other state, the AND circuit 64 blocks and an AND circuit 66 opens, so that pulses pass to the line 60 via a dividing circuit 68, which can have a predetermined divisor. This setting of the bistable multivibrator 62 takes place when the counter 26 has reached a predetermined count. So that this only takes place when the voltage at the integrating amplifier 18 drops, an AND element 70 with several inputs is connected to one input of the bistable multivibrator 62, one of which is connected to the line 81 from the bistable multivibrator 52.

At the other inputs of the AND element 70, a signal occurs only when the counter 26 has reached the predetermined count. So that this counter reading can be set optionally, the counter is connected to a binary-to-decimal converter 72, the output signals of which can be set for each of three Dskades by means of adjustable individual switches S ₅ , S _e and S ₇ , which control the other input signals for AND - Link 70 form. In the practical case, the converter or decoder 72 and the decoder and display device 30 can be combined into a single structural unit.

The rise and fall functions 34 and 36 are generated in the same manner as in connection with FIG. 2 has been described. At the time Z ₈ , the counter 26 begins to count, namely 10 MHz clock pulses until it has reached the number set by the switches S ₆ , S ₈ and S ₇ . Thereafter, the counter 26 continues to count up to the time Z ₃ with a reduced pulse repetition frequency, which is determined by the adjustable dividing circuit 68. For this, however, it is not necessary for the clock pulse frequency on line 60 to be reduced. The control circuit can be modified in such a way that a frequency increase takes place when the predetermined count has been reached. The rise and fall functions 34 and 36 remain linear. Only the relationship between N and V becomes non-linear.

The selected count determines the breakpoint in the nonlinear function of N and V. In addition to this one breakpoint, several breakpoints can be selected in accordance with those in connection with the circuit according to FIG. 4th provide for the measures indicated. Adjustable individual switches S ₅ , S ₆ 'and S ₇ and an associated AND element 70 and a bistable flip-flop 62 are to be provided for each breakpoint. Furthermore, the dividing circuit 68 and the AND gates 64 and 66 must be replaced by a more intricate arrangement which selects the various necessary divisors when the bistable flip-flops 62 are on. be set otherwise. . ^; ■.

In the circuit according to FIG. 3, the pulse repetition frequency on line 60 is only switched at time? 2, and in the case of the in JF i g. 4 shown, the circuit shown, the pulse repetition frequency is only switched at a break point that follows _{the point in time / 2.} The in connection with the ao F i g. 3 and 4 can be combined so that a switchover occurs at time t ₂ , for example to change the measuring range, and one or more switchover points occur after time t _z , namely at one or more breakpoints, for example around a non-linear relationship between N and V.

In principle, one could also generate a non-linear relationship between N and V by switching the pulse repetition frequency on line 60 at one or more breakpoints during the increase interval Z ₁ to / _s .

Claims (6)

Claims: 35 1. Arrangement for switching the measuring range in a digital voltmeter with an integrating device which, under the control of a control circuit, is supplied with the analog input voltage at the beginning of the measuring process during a predetermined number of clock pulses from a clock pulse generator, whereupon the output voltage of the integrating device starting from a reference value rises, and to which a comparison voltage originating from a comparison voltage source is then supplied during a measuring interval in such a way that the output voltage of the integrating device drops, and with a pulse counter that counts the clock pulses from the clock pulse generator at the beginning of the voltage drop at the integrating device for so long, .to when the voltage drops to the reference value, a reference value detector connected downstream of the integrating device via the control circuit, the pulse counter to terminate the measuring interval stops, characterized in that a dividing arrangement "(42, 44 or 68) is connected between the clock pulse generator (40) and the pulse counter (26) and that a device (5Ί, S ₂ , S ₃ or S ₄ or 62) to optionally change the pulse repetition frequency fed to the pulse counter (26) changes the divisor introduced into the dividing arrangement (42, 44 or 68). / \: '- ^ ::: ^; .-''γ:·; ^ - _: 2. Arrangement according to claim 1, characterized in that the control circuit (24) _{controls the divisor changing device (S 1} , ^ S ₂ , S ₃ ) and causes the change of the divisor at the moment at which the output voltage of the integrating device goes from rise to fall. ', 3. Arrangement according to claim 2, characterized in that the device changing the divisor contains a multi-position range setting device (S ₄ ) which is used to provide different divisors for different positions in the rise interval and / or in the fall interval of the output voltage of the integrator Divisor changing device (C? 1, Gl, G3) influenced, so that in the different positions of the range _{setting device (S 4} ) during the rise and fall interval clock pulses with different pulse repetition frequency ratios are fed to the counter (26). · \ 4. Arrangement according to claim 1, characterized in that that the device (68) changing the divisor responds to the pulse counter (26), in order to change the divisor at least at the time of a breakpoint, which is a special one Corresponds to the counter reading of the counter (26). 5. Arrangement according to claim 4, characterized in that a device (52, 70) the Changes in the divisor to the rise interval or, preferably, to the fall interval of the output voltage the integrator limited. 6. Arrangement according to claim 4 or 5, characterized in that a device (72, S ₅ , S ", S ₇ ) optionally determines the particular counter reading. For this purpose 3 sheets of drawings 109 616/207