DE1591848C3 - Analog-to-digital converter - Google Patents

Description

3 4

Amount can be easily recorded * and no intermediate are coupled with each other and are due to the parallel

storage is required. circuit of a comparator amplifier 37 with a

The disadvantage of the Nachlaufschlüßlers, however, is the resistor Rg. From the node 38 branches off that with an output signal of, for example three, both a resistor R _e , at the other decimal point, ie when the measuring end is quantized, the analog input signal also a value in 999 steps, 999 steps are required to switch step 39. The switch step 39 consists of three counts from 0 to 999. If the counter frequency is required decimal places corresponding switching z. B. 10 kHz, this means a conversion time of groups, of which each switching group in turn from a maximum of 100 ms. A shorter transfer time can be, for. B. Parallel connection of four from a conductance value and for measuring point detection may be necessary, since series connections existing in a switch can be built for a large number of measured values within a short space of time. The master values of the vector groups have to be queried for each time and the time for the acquisition of a variable measured value, which varies according to the assignment to a counter, essentially depends on the conversion time of the orders. The one-lead analog-to-digital converter is determined for the units counter. values, the tens counter the tens master values and

The invention is based on the task of adding the hundreds of conductance values to the hundreds counter of the analog-to-digital converter according to the. The control and tracking systems are within the vector groups to be improved so that the conversion time is based on the code used the time approaches that is laid with the weighing process. Because in the present case the Aiken code was achieved can be. has been selected, the guide values have no consideration

According to the invention, this object is achieved by using the powers of ten the values 2, 4, 2, 1. The solves that each decimal place of the numerical value of a switch of the individual switching groups are connected to the analog value to be displayed, a binary counter pulls outputs of the counters assigned to them, and that switching devices are provided the counter of the highest monostable flip-flop 2, so that the AND decimal place pulses are entered until 25 gate 8 is blocked and gate 5 is released, the measured value corresponding to this decimal place Value by ± 1 digit different on the input of the counter 10 the hundred-deciist, whereupon the counter of the next lower time and count depending on the preparation signals decimal place is switched over, where the counting process of the signal range indicator and thus depending on the status repeated in the same way. 3 ° of the counter and the size of the measuring voltage before or

An exemplary embodiment is shown in the drawing. As soon as the counter 10 has set the value of the hundreds and is described in more detail below. Reaches decimals of the digital signal, he will

The start line 1 of the analog-digital converter is between this and the next higher or lower

the input of a monostable multivibrator 2 is switched back and forth, since the compensation

leads. From the inverted output 3 this breakover current is smaller once and after another

Stage 2 connects to input 4 of a counting pulse greater than the measuring current. Since the measuring

AND gate5, while the non-inverted output 6 value is reached after a maximum of nine counting pulses,

the flip-flop 2 with the input 7 of the AND gate 8, the monostable flip-flop 2 is connected so that

connected is. The outputs of the two AND gates 5 he then flips back and the blocking of the and

and 8 at the same time represent the inputs of the OR gate 9 4 ° gate 5 and via the control of the flip-flop 29

The output of this OR gate 9 is also effected with the blocking of the AND gate 26. the

Input of a counter 10 of hundreds-decimal AND gates 8 and 25, however, are enabled. Of the

tied together. The second input 11 of the AND gate 8 counter 10 of the hundreds decimals is now from

is at the counter 12 for tens-decimals, whose counter 12 controls the tens-decimals, the

Inputs 13 and 14 both with inputs 15, 16 45 in turn from the counter pulses of the clock.

of the counter 10 for the hundreds decimals as well as or counting down. As the result of the counter

with the inputs 17,18 of the counter 19 for the units 10 can be one digit too large or too small,

Decimals and outputs 20, 21 of two signal - a maximum of ten counting pulses must be waited for,

Area indicators 22, 23 are connected. until this result is corrected and the monostable

Can tilt back the input of the counter 12 for the tens deci- 5 ° flip-flop. So the reading becomes times the output of an OR gate 24 is supplied, with a maximum of 19 steps apart from one counter position Inputs at the same time the outputs of the and approximated. The converter now works as a post-gate again 25, 26 represent, the input 27 of the Laufverschlüßler, so that the measurement after a maximum AND gate 26 has ended with the output of the counter 19 for ten more steps. For the whole which is connected to ones-decimals. The other input 55 implementation is therefore required a total of a time 28 of the AND gate 26 is ent output with the non-inverted pulse duration of 29 pulses from the clock another monostable flip-flop 29 speaks. With three decimals and one counting frequency connected, the inverted output of which is also that of 10 kHz, this means a conversion time of maximum Input 30 of the AND gate 25 represents. The entrance 2.9 m / sec.

31 of the AND gate 5 and the input 32 of the AND 60 changes the analog measurement voltage example gate 25 are both with the output of the and-wise at a time that corresponds to the pulse duration of the clock gate 33 as well as the input 34 of the counter 19 corresponds to the encoder, the digital signal appears without tied together. The non-inverted output 6 of the mono time delay. The arrangement described can stable flip-flop 2 is at the same time the input of the mono also be understood as a control loop, in which the stable flip-flop 29. The AND gate 33 has two 65 digital controlled variables "counter reading" in that they Inputs, one of which with a pulse generator 35 causes the actuation of switches, for the manipulated variable and the other is connected to a stop line 36. will. After pressing the switch, a The inputs of the two signal range indicators 22, 23 convert the digital meter reading signal into a

analog signal instead. The controlled variable, which is now available in analog form, forms together with the analog Measured value that represents a reference variable, the control deviation, which is fed to a controller arrangement which consists of an amplifier and a signal range indicator.

The advantages achieved with the .Erfindung are in particular that the previously with Nachlaufverschlüßlern achievable transfer times are significantly reduced. In addition, interference pulses falsify the duration of which is not greater than the pulse duration of the converter clock, the measurement result at most by a digit. This falsification is already repeated with the next pulse of the clock generator corrected. There is no intermediate storage when the measurement results are displayed.

1 sheet of drawings

Claims (1)

1 2 This frequency is measured by the number of Claims: pulses per unit of time are added in a counter (Elektro-Anzeigeri JSTr. 15, 1966, p. 335). 1. Analog-to-digital converter with one clock cycle - However, these two methods have the disadvantage that encoder that enters counting pulses in binary counters, whose 5 that they with a relatively large error of 2% o to dual outputs weighted currents are assigned 0.5% o are afflicted. To avoid this disadvantage, and where the sum of all weighted flows were converters according to the compensation method is compared with the upcoming analog quantity. A distinction is made here depending on the type of characterized in that each compensation circuit between voltage (BBC decimal place of the numerical value of a display io messages, 1965, p. 524) and current compensation a binary counter assigned to the analog size (Electronics, Nov. 1966, p. 143) and depending on the type of and that switching devices are provided, · the sequence in which the comparison takes place between via soft first the counter of the highest weighing and tracking method. Decimal place (10) as long as pulses are entered. The analog-digital converter after the weighing until the 15 drive corresponding to this "decimal place" works like a compensator with automatic Measured value reached or by ± 1 adjustment from this value. The measured variable is with a in steps Digit is different, on which the counters the subdivided compensation current or a compensation in each case the next lower decimal place is switched sationvoltage in a comparator amplifier yer- is where the counting process was equal in each case. The compensation for a certain measurement Way repeated. 20 value required current or voltage levels 2. Analog-to-digital converter according to claim 1, then a direct measure of the digital signal. The abdomen through it characterized in that the switching device is carried out in the weighing process by the same process tungenausje a monostable multivibrator (2.29), gradual limitation of the measuring current by the two AND gates (5, 8 or 25, 26) and one with compensation current. This is done in the way the preparation input of a counter (10, 12) 25 that first the current or voltage level with the connected OR gates (9, 24) exist and that largest current or the largest voltage, then after the Switching by tilting back each other the levels with the next lower monostable multivibrators (2, 29) and thus currents or voltages are switched on. Before connected blocking of the one AND gate (5, the next level is activated, must be 25) and the opening of the other AND gate (8, 3 °, whether the measuring current has not yet been reached 26) is effected. or has already been exceeded. In the first case remains the switch is closed, but if the compensation current is greater than the measuring current, the Stage switched off again. 35 With the weighing method, significantly shorter repositioning times can be achieved than with the others up to now known specified procedures. The disadvantages of the The invention relates to an analog-digital conversion weighing method as well as to the sawtooth setter with a clock that counts impulses in binary so that interference impulses often a wrong narrator whose dual outputs deliver weighted 40 results. Current pulses that correspond to the measuring voltage Currents are assigned and in which the sum of all are superimposed and during the conversion process weighted currents occur with the applied analog value, can lead to incorrect results. That is compared. digital signal is used in the sawtooth method The task of the analog-digital converter is to make that of a superimposed current pulse smaller than that of the to quantize the analog value of a measured variable, d. That is, 45 corresponds to the measuring voltage, since the two are prematurely equal analog measuring range in a variety of mostly see measuring and sawtooth voltage is registered to subdivide the same steps and add up the measured value in and thus too few pulses in the meter to classify one of these levels. To meet this will be. A glitch can therefore cause a Requirements have already been set up for several processes or several current stages have been switched incorrectly, what they all have in common is that they measure the 50 so that the displayed result is too big or too small Compare the size with a known size that has been found. The digital signal proportional to the measuring voltage is neither already available in digital form nor is it easily output at intervals of the conversion time, because can be quantized. . an entered program must run until For example, in the case of converters, the measured value is encrypted after the saw. In order to achieve a smooth display of the measuring voltage with a saw tooth principle, an intermediate storage of the voltage is therefore compared, with the respective result being required during the time.
Sawtooth needs to go from 0 to the value of the measurement. During the tracking process, the compensation voltage will rise, and pulses of current will be added up in a counter in steps of the smallest digital unit at the fixed frequency. The measurement current is approximated (BBC-Nachrichten, 1965, p. Counter reading, ^i.e. the number of pulses, is proportional to 6o 524). Interference pulses, the duration of which is not greater than that at this time and therefore with a constant pulse duration of the pulse generator of the converter, the sawtooth rose proportionally to the measurement voltage falsify the measurement result in the tracking process (BBC-Nachrichten, H. 4/5 1963, p. 209 to 212; for a short time by a maximum of one digit. According to Elektro-Anzeiger, No. 15, 1966, p. 336). another impulse from the pulse generator will do this Another well-known method of converting ^{6 to} 5 result corrected immediately. A major advantage of analog to digital signals is the voltage of the follow-up encoder is that it is frequency conversion. Here, pulses are generated, the frequency of which is proportional to the measurement voltage, which is particularly suitable for forming sums and differences. and change of the measuring voltage by a certain one