DE1537049C3 - Digital-to-analog converter circuit for supplying analog voltages which are functions of an angle represented by digital input signals - Google Patents

Description

Us ₁ TsT

Ue ₁ S ₁ (1 - + / Jo ₂ )

Ue ₂ O ₂ (1 + β O ₁ ) '

wherein Q ₂ the complement angle of the angle Θι and β are a parameter, characterized in that two circuit branches are provided, each of which contains a digitally controlled linear decoder with constant impedance (Z ₀ ) , which has an analog voltage input, an analog voltage output and digital control inputs for the control of its transfer factor has that each circuit branch also contains an arithmetic amplifier, the output of which is connected to the analog voltage input of the decoder located in the same circuit branch, that the digital control inputs of the two linear decoders are supplied with digital input signals which represent the angle θι and the angle Θ2 represent that the digital decoders are designed so that they assume the transfer factor kQ \ or kQ ₂ under the control of the digital input signals, where k is a constant that the input of one computing amplifier via a resistor to the first input the converter circuit is connected to its own output and to the output of one of the two decoders, that the output of the other computing amplifier is connected to the second input of the converter circuit, to its own output and to the output of the other decoder, and that the analog voltage outputs of the both decoders are the outputs of the converter circuit.

2. converter circuit according to claim 1, characterized in that the input of each computing amplifier is connected to the output of the decoder located in the same circuit branch.

3. converter circuit according to claim 1, characterized in that the input of each computing amplifier is connected to the output of the decoder located in the other circuit branch.

4. Converter circuit according to one of the preceding claims, characterized in that the digital control inputs of at least one of the decoders (n-2) have terminals, where η is an integer greater than 2, that these terminals the (n-2 ) Binary digits of the coded digital signal representing an angle α, are fed, and that the decoder has an additional input to which an additional binary digit is fed so that the decoder has the gain factor kix for one value of this additional binary digit and the die for the other value The invention relates to a digital-to-analog converter circuit for supplying analog voltages which are functions of an angle represented by digital input signals, with two voltage inputs to which input voltages Ue \ and Ue _{2 are} fed, voltage outputs to which output voltages Us \ and Us ₂ , and with two decoders whose transmission factors are determined by the one between Chen 0 ° and 90 ° lying angles θι representing digital input signals are controlled in such a way that the following relationship applies to the output voltages:

Us,

Ue ₁ Ue,

Θ ₂

where Θ2 is the complement angle of the angle Θι and β are a parameter.

If β is chosen appropriately in the equation given above (namely equal to 6.165 / 10 ³ , if Θι and Θ2 are expressed in degrees), the ratio is:

(~ \ l + ß Q ₂

tsQi + ε.

same as the expression

Here ε is a term which changes with the value of θ], but whose absolute value remains less than 1.8 arc minutes. The accuracy can be improved if β is made variable with θι.

If one neglects the term ε, the voltages Us \ and Us ₂ can be written as follows:

Us ₁ = Ue ₁ K [O ₁ ) sin O ₁ ,
Us ₂ = Ue ₂ K (O ₁ ) cos Q ₁ ,

where K (Q ₁ ) depends on Θι.

A converter circuit of the type specified at the outset therefore supplies output voltages that are approximately are proportional to the sine or cosine of an angle represented by digital signals. the The circuit works in a similar way to a function resolver, but with the difference that with a resolver the angle is given by the angular position of a shaft, while he is at the Converter circuit is represented by digital signals.

Such a digital-to-analog converter circuit can therefore advantageously be used as a transmitter in resolver systems are always used when the angle to be transmitted is represented by digital signals that for example from a memory or recording medium.

In such resolver systems, the angle dependence of the factor K (Q \) appears only as a change in the stiffness of the coupling; it does not affect

on the accuracy of the system, since the resolver information is given by the tangent function, i.e. by the quotient of the sine function and the cosine function, from which the factor K (Q \) is eliminated.

A digital-to-analog converter circuit of the type specified above with two decoders, in the form of Networks of weighted resistors, which are controlled by the digital input signals with the help of Switches are connected in parallel, is proposed in the earlier patent application P 13 02 155.1-31 been. In this converter circuit, the connected terminals of the network resistors are their Switches are closed, connected to ground, while the switched terminals of the network resistors, whose switches are open, hanging in the air. Every network therefore has a changeable one Impedance and therefore forms a non-linear decoder. Further are the ones hanging in the air Clamps of the network resistances coupled to ground by unavoidable stray capacitances, whereby the maximum operating frequency of the networks for a given degree of accuracy.

The object of the invention is to create a digital-to-analog converter circuit of the type specified at the beginning Kind with increased accuracy and extended frequency range.

According to the invention, this object is achieved in that two circuit branches are provided, each of which contains a digitally controlled linear decoder with constant impedance, which has an analog voltage input, an analog voltage output and digital control inputs for controlling its transfer factor, that each circuit branch also has an arithmetic logic amplifier contains, the output of which is connected to the analog voltage input of the decoder located in the same circuit branch that the digital control inputs of the two linear decoders are supplied with digital input signals which represent the angle Θι or the angle Q ₂ , that the digital decoders are designed so that under the control of the digital input signals, they assume the transfer factor kQ \ or k Q ₂ , where k is a constant that the input of one arithmetic amplifier is connected via a resistor to the first input of the converter circuit, with its own output g and is connected to the output of one of the two decoders, that the output of the other computing amplifier is connected to the second input of the converter circuit, to its own output and to the output of the other decoder, and that the analog voltage outputs of the two decoders are the outputs of the converter circuit are.

Digital linear decoders with constant impedance are known per se in various designs; at they are the network resistances between two terminals at different potentials is switched so that the switching is performed with a constant impedance of a low value Can- This avoids the difficulties caused by the high impedance of the interrupted Resistance branches occur in the aforementioned older converter circuit. The invention makes it through the specified special feedbacks possible the necessary relationships between the Obtain input voltages and output voltages with such linear decoders.

The invention is described below by way of example with reference to the drawing. In it shows

F i g. 1 shows the block diagram of part of the digital-to-analog converter circuit according to the invention,

F i g. 2 different embodiments of linear decoders that are used in the converter circuit according to the invention can be used

F i g. 3 shows an embodiment of a resolver encoder with a converter circuit according to the invention and

4 shows the block diagram of a digitally controlled system for controlling the position of a shaft a cross-coupled embodiment of the converter circuit according to the invention.

The complete digital-to-analog converter circuit contains two circuit branches, one of which receives the voltage Ue \ and outputs the voltage Us \ , while the second circuit branch receives the voltage Ue ₂ and outputs the voltage Us2.

F i g. 1 shows the first of these two circuit branches with the first input of the converter circuit, the has terminals 3 and 4, as well as with the first output of the converter circuit, which is terminals 5 and 6, the terminals 4 and 6 being connected to ground.

The input 10 of a computing amplifier 1 is connected to the terminal 3 via a resistor Ri , while its output is connected to the voltage input of a linear decoder 2, the output of which is connected to the terminal 5. The input 10 of the amplifier 1 is connected to its output via a resistor R3 and to the terminal 5 via a resistor R ₂ .

The linear decoder 2 has a constant ohmic output impedance Z _c ; it has a digital input for receiving a coded binary signal P \, which consists of bits b $ to b " , which represent any angle Θι between 0 ° and 90 °, so:

B _x = 360 'ff 6.2''

i = 3

or the same angle reduced by 360 ° 12 ".

The linear decoder is constructed in such a way that the encoded binary signal P \ gives it in each case the transfer factor kQ \ , where k is a constant. In any case, the decoder emits an output voltage Us \ which is equal to the input voltage U \ supplied to it, multiplied by the transfer factor k Q ι determined by the coded binary signal Pi:

Usi = £ Θΐ U _x .

The whole arrangement works in the following way:

An AC input voltage Ue \ is applied to terminals 3 and 4, which causes a voltage U \ at the input of decoder 2, so that the decoder emits the following output voltage:

Usi = k ■ O ₁ · CZe ₁

Z _c + R ₂

Since the amplifier 1 is an arithmetic amplifier, its gain factor and the product of the gain factor are with its input impedance very large,

so that the voltage and the current flowing to ground at the input 10 are practically zero. It follows:

= 0.

(2)

R ₁ R ₃ R ₂

Taking equation (1) into account, this results in: Us ₁ _ R ₂ β G ₁

Ue ₁

\ + βΘ ₁

Z _c + R ₂ ■

The second circuit branch, which is intended for operation with an input voltage Ue ₂ and a digital input signal P ₂ , the digital input signal consisting of bits t & to d " , and either the angle 0 ₂ or the angle 0 ₂ -36O ° / 2 "is the same as the first circuit branch, with the exception that the linear decoder can be slightly different from the linear decoder of the first circuit branch if Pi represents the angle 0i and P _{2 represents} the angle 0 ₂ -36O ° / 2 ⁿ , or if, conversely, P _{1 represents} the angle 0i -360 ° / 2 "and P _{2 represents} the angle 0 ₂ . These two cases are particularly interesting because dz to d _{n are} then identical to bits bz to b ", which are complementary to bits bz to b".

The second circuit branch thus emits an output voltage Lis ₂ , for which the following applies:

Us ₇

ß & 2

Ue ₂ R ₁ 1 + βΘ ₂ '

where β corresponds to the same expression as before, so that:

LTs ₁ _ Ue ₁ & i_ ί + βθ ₂

Us ₇

Ue ₇

FIG. 2 shows three possible types of linear decoders with constant output impedances Z ₀ , which can be used in each of the two circuit branches of the circuit described above. In the embodiment of FIG. 2a, switches / 3 to I _{n are} each controlled by one of the binary digits bi to b _n or di to d _n.

Depending on whether the controlling digit bi or d- has the value 0 or the value 1, the switch J ₁ (/ between 3 and n) connects the rated resistor ^{d 2 "-3} A either to the input 7, the is kept at a constant DC voltage potential Uq and is connected to ground for the operating frequency of the decoder, or with the input 8, which receives the input voltage U \ with respect to the potential i / o.

The other end of each resistor 2'- ⁵ R is connected to the output 9, which supplies the output voltage U _s.

The switch I ₂ connects an additional resistor 2 "- ³ R either with the input 7 or with the input 8, depending on whether the digital input signal is the angle 0y (J = 1 or 2) or the angle 0, -360 ° / 2 "because this additional resistor composes the missing part of the digital input signal. Mechanical switches are shown in Figure 2 for the sake of clarity, but electromechanical or electronic switches can of course be used to advantage.

F i g. 2b shows a so-called branch decoder (ladder network decoder).

The switch / 3 to I _n and V ₂ are operated in the same manner as before. However, all with the aid of the switch / 3 to _n I switched resistors have the same value 2R, and they are connected via resistors of value R. The additional resistor switched with the help of switch I ₂ has the value 2R.

F i g. 2c shows a compound decoder. In the example shown, the switched resistors are combined into groups of 3 binary digits each. So that each group contains the same resistances R, 2R and AR , the coupling resistances between the groups must, as can be calculated, have the value 7i? / 2. The additional resistance switched by the switch I ₂ has the value 4 R.

The decoder of FIG. 2a is the simplest, but it has the disadvantage that high resistance ^{values 2 "-3} R are required, which are difficult to achieve.

Therefore the decoders of Fig. 2b and 2c preferred, in particular the combined decoder of FIG. 2c a compromise between the Number of required resistors and the largest required resistance value results.

If, for example, P \ always represents the angle 0i, the switch I ₂ and the additional circuit element switched over by it can be omitted, and if Pi always represents the angle 0i -360 ° / 2 " , the additional circuit element is retained, but needs it no switch to be assigned.

F i g. 3 shows the circuit diagram of a first application example of the converter circuit for the construction of a completely static resolver.

In general, a resolver encoder must have a

Two-wire connections deliver voltages that are proportional to the values sin 0 and cos 0, with 0 being the is the angle to be transmitted and can be between 0 ° and 360 °.

In digital form, such an angle is expressed as follows:

Θ = 360 Σ

Here, 0 _{3 is} an angle that is smaller than 90 ° and is given by the binary digits az to a _n , while a \ and a _{2 are} the binary digits that identify the quadrant in which the angle 0 is contained.

The following table shows how the values of sin 0 and cos 0 are derived from the values of sin Θ3 and cos 03 and the values of the binary digits a \ and a ₂ .

sin θ

cos Θ

0 0 03 sin 03 COS 03 0 1 90 + 03 COS 03 —Sin 03 1 0 180 + 03 - sin 03 - COS 03 1 1 270 + 03 - COS 03 sin 03

The resolver encoder from FIG. 3 contains two circuit branches 24 and 25 which, in the same way as the circuit branch of FIG. 1, each of the decoders containing an additional resistor switched by a switch I ₂ , as in the description of FIG. 2 was explained.

The reference voltage Ur is applied between the terminals 210 and 211 of the primary winding of a transformer 21. The secondary winding of the transformer 21 has a center tap connected to ground, and the voltages tapped between terminals 212 or 213 and ground are in phase or out of phase with the voltage Ur.

The input of the circuit branch 24 becomes one with a control input 221 through the contact arm 220 provided switch 22 is connected either to terminal 212 or to terminal 213. The circuit branch 24 has digital control inputs 240 and 241 for controlling the linear decoder of the network 24 contained therein.

The input of the circuit branch 25 becomes one with a control input 231 through the contact arm 230 provided switch 23 is connected either to terminal 213 or to terminal 212. The circuit branch 25 has digital control inputs 250 and 251 for controlling the linear decoder contained therein.

A sin Θ voltage or a cos Θ voltage should be taken from outputs 242 and 252 will.

The various binary control digits are derived with the aid of a logic circuit from the binary digits a \ to a " , which represent the angle Θ to be transmitted.

With reference to the table previously given, this circuit works in the following way:

Each of the circuit branches 24 and 25 has to supply voltages whose amplitudes are proportional to the value sin Θ3 or the value cos Θ3, depending on the value of the binary digit ai; that is, the angle 0i controlling the transmission factor of the decoder of the circuit branch 24 must be equal to either the angle 03 or the angle 90 ° -03, depending on whether a2 has the value 0 or the value 1. For this purpose the switch / 3 to _n in the decoder I are of the branch circuit 24 in each case by one of the binary digits

45

controlled, and the switch I _{2 of} this decoder is controlled by the binary digit a2.

In the same way, the decoder of circuit branch_25 and its switch I ₂ are controlled by the binary digits b- or a _2.

The correct + or - sign for the voltages at the outputs 242 and 252 in accordance with the table above is obtained by supplying the inputs of the circuit branches 24 and 25 with voltages which are either in phase or in phase opposition to the voltage Ur . To this end, switch 22 is controlled by the binary digit a \ and switch 23 is controlled by the binary digit c , where c is equal to the expression a \ · a ₂ + a \ ■ a ₂ .

In the illustration of FIG. 3, the two switches 22 and 23 are shown in the position for the "positive sign", ie that it is assumed that the angle 0 lies in the first quadrant (fai = 0, a2 = 0). The voltages taken at the outputs 242 and 252 have the values Κ (Θή Ur sin 0 or ΛΓ (Θ,) Ur cos 0, where K {® \) is a function of Θ \ .

If a three-wire resolver connection is required, it is only necessary to connect outputs 242 and 252 to be connected to a so-called Scott transformer, which converts two-phase voltages in three-phase voltages and vice versa.

F i g. 4 shows an embodiment of a digitally controlled arrangement for adjusting a shaft at which is a modification of the digital-to-analog converter circuit is used according to the invention, the output of the first linear decoder having the input of the second processing amplifier and the output of the second linear decoder with the Input of the first computing amplifier are connected.

Two antiphase voltages of the same amplitude are tapped at the terminals of the secondary winding of a transformer 40, which is provided with a center tap connected to ground. These terminals are connected to a selection circuit 41 which is controlled by the binary digits a 1 and a _{2 fed to its control input 410.} These binary digits a \ and a ₂ are the digits of the greatest place value in a digit sequence a \ to a ", which represents an angle Θ which is supplied, for example, from a storage register. Again, 0 = 00 + 03, where 0 _{3 is represented} by the digits a ₃ to a " . The outputs of the selection circuit 41 are connected to the stator windings 420 and 421 of a resolver 42. The rotor windings 422 and 423 of the resolver 42 are connected to the input resistors 43 and 44, respectively, of a digital-to-analog converter circuit of the type described above.

The resistor 43 is connected to an arithmetic amplifier 45, which with its negative feedback resistor 47 is shown.

The output of the computing amplifier 45 is connected to a linear decoder 51 which is _{controlled by the binary digits a 3} to a _n fed to its input 510 so that it has the gain Jt Θ3. This decoder does not require any additional circuit element operated by a switch I ₂ (FIG. 2), since it is always controlled by the digital input signal P \ _{representing the angle O 3.}

In the same way, the resistor 44 is connected to an arithmetic amplifier 45 which is provided with a negative feedback resistor 48. The output of the arithmetic amplifier 46 is connected to a linear decoder 52 which is controlled by the binary digits u to Y _n so that it has a gain factor k (90 — Θ3) has. Since this digital input signal P ₂ always represents the angle 90 ° -0 ₃ - 360 ° / 2 ", the decoder 52 contains the additional circuit element which compensates for the missing link 360 ° / 2", but of course there is no switch I ₂ (F i g. 2) required.

The negative feedback circuits between the outputs 51 and 52 of the arrangement of FIG The converter circuit used and the inputs of this circuit are crossed because the resistor 49 is connected between the output of the decoder 52 and the input of the processing amplifier 45, while the resistor 50 between the output of the decoder 51 and the input of the processing amplifier 46 is connected.

The outputs of the decoders 51 and 52 are connected to the terminals of the primary winding of a transformer 53, the secondary winding of which supplies an amplifier 54 with a voltage which is proportional to the difference between the voltages i / sj and Us2 applied to the primary winding.

609 586/327

The output voltage of the amplifier 54 controls a motor 55 which _{sets the shaft 424 of the resolver 42 in an angular position 0 e} with respect to a fixed reference axis. A generator 56, the shaft of which is firmly connected to the shaft of the motor 55, results in constant damping of the control loop formed.
This arrangement works in the following way:
The binary numbers a \ and a ₂ determine the quadrant in which the angle of the resolver is to be set by changing the reference axis formed by the stator by a multiple of 90 °. The windings 422 and 423 thus supply the voltages

t / ea = V cos Θ ^ or. Ue ₂ = VArs. Θ e $,

where the angle Θ it less 90 ° the same The relation to the angle Θ e has, as the angle Θ3 to the angle β.

If the control loop was active, ie the error element ε between the output voltages Us \ and Us _{2 of} the decoders 51 and 52 is negligible, the condition Us \ = Us _{2 is} fulfilled.

If the value of the coupling resistances is chosen correctly, the same relationships between Us \ and Ue ₁ on the one hand and between Us ₂ and {/ (Si on the other hand can be obtained, as in the first embodiment of the converter circuit according to FIG

ίο

Invention; d. This means that if the error term ε is neglected in the approximation

Q ₁ l + ßQ ₂
~ ΘΓ 1 + / S01
the following is obtained:

TTx. TTo.

IgQ ₁ =

= tg G ₁ + ε

cos Qe ₁ sin Q ₁

sin Qe ₁ cos Q ₁

Us ₂ Ue ₂

Since Usi = Us _{2 also} applies:

sin Q ₁ cos Qe ₁ = sin Qe ₁ cos Q ₁ ,
ie

sin (Q ₁ - Qe ₁ ) = 0

O ₁ = Qe ₁ .

The angular position Be of the shaft 424 thus reproduces the angle Θ with great accuracy.

However, this embodiment of the circuit with cross coupling is not suitable for all cases.

By calculating it can be shown that this circuit, except in the case in which it forms part of a control system in which the control deviation corresponds to the expression Us-Us2 , is also suitable, for example, when Ue \ equals Ue ₂ and phase reversal circuits in Series can be switched with the two cross-coupling resistors.

For this purpose 2 sheets of drawings

Claims (1)

Patent claims: 1. Digital-to-analog converter circuit for supplying analog voltages which are functions of an angle represented by digital input signals, with two voltage inputs to which input voltages Ue \ and Ue _{2 are} fed, voltage outputs at which output voltages Us \ or Us _{2 are} output , and with two decoders whose transmission factors are controlled by the digital input signals representing an angle Θι between 0 ° and 90 ° in such a way that the following relationship applies to the output voltages: additional binary digit the gain factor k (a + x _a f2 ") is given, depending on whether the angle α corresponds to the angle Θ assigned to the decoder or the angle Θ - αο / 2", where λ, Θ and «ο are the same Units are expressed and a ₀ corresponds to four right angles.