DE1414326A1 - Semiconductor arrangement for rectification and / or amplification - Google Patents
Semiconductor arrangement for rectification and / or amplificationInfo
- Publication number
- DE1414326A1 DE1414326A1 DE19551414326 DE1414326A DE1414326A1 DE 1414326 A1 DE1414326 A1 DE 1414326A1 DE 19551414326 DE19551414326 DE 19551414326 DE 1414326 A DE1414326 A DE 1414326A DE 1414326 A1 DE1414326 A1 DE 1414326A1
- Authority
- DE
- Germany
- Prior art keywords
- rectification
- amplification
- semiconductor arrangement
- semiconductor
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 title 1
- 238000003199 nucleic acid amplification method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4918—Disposition being disposed on at least two different sides of the body, e.g. dual array
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
- Bipolar Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
Claims (1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES0045286 | 1955-08-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1414326A1 true DE1414326A1 (en) | 1968-12-12 |
Family
ID=7485489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19551414326 Pending DE1414326A1 (en) | 1955-08-25 | 1955-08-25 | Semiconductor arrangement for rectification and / or amplification |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE1414326A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0058336A2 (en) * | 1981-02-13 | 1982-08-25 | General Electric Company | Zinc oxide varistor with reduced fringe current effects |
-
1955
- 1955-08-25 DE DE19551414326 patent/DE1414326A1/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0058336A2 (en) * | 1981-02-13 | 1982-08-25 | General Electric Company | Zinc oxide varistor with reduced fringe current effects |
EP0058336A3 (en) * | 1981-02-13 | 1983-05-11 | General Electric Company | Zinc oxide varistor with reduced fringe current effects |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
SH | Request for examination between 03.10.1968 and 22.04.1971 |