DE112016007538T5 - TECHNOLOGY FOR REALIZING A BINARY DISCONTINUED NON-VOLATILE MEMORY EXPRESS DRIVER - Google Patents

Abstract

Systems, devices, and methods may provide a binary-branched driver for managing nonvolatile memory (NVM) express (NVMe) devices and / or file system storage. In particular, systems, devices, and methods may provide a way to ensure high input / output performance using a binary-branched NVMe driver that includes a userspace driver and a kernelspace driver. The systems, apparatus, and methods may provide that the binary-branched driver directs access requests to the user-space driver and / or kernel-space driver based on one or more of the read intensity or write intensity of an application and / or files accessed by the user Application to provide high performance in terms of transactions per second (TPS).

Description

TECHNICAL AREA

Embodiments generally relate to nonvolatile memory technology. In particular, embodiments relate to a manner of providing high input-output performance using a non-volatile-memory (NVM) -express (NVMe) binarized driver for managing file system storage and / or NVMe device storage.

BACKGROUND

Non-Volatile Memory (NVM) Express (NVMe) technology enables compliance levels found in modern solid state drives (SSDs) to be used by host hardware and software. NVMe technology can be used to store data in a data center, reduce input / output overhead, and provide various performance improvements over previous logical device interfaces, which can include multiple long instruction queues and reduced latency. However, software stacks for existing NVMe solutions may face the challenge of meeting ever-increasing performance demands (eg, power consumption and processing capacities) due to resource-demanding applications (eg, read-intensive applications and / or write-intensive applications).

list of figures

• 1 eine Veranschaulichung eines Beispiels einer binärverzweigten Non-Volatile-Memory(NVM)-express(NVMe)-Treiberarchitektur gemäß einer Ausführungsform ist;
• 2 ein Ablaufplan eines Beispiels eines Verfahrens zum Initialisieren eines Kernelspace-Treibers gemäß einer Ausführungsform ist;
• 3 ein Ablaufplan eines Beispiels eines Verfahrens zum Initialisieren eines binärverzweigten Treibers gemäß einer Ausführungsform ist;
• 4 ein Blockschaubild eines Beispiels einer hohen Rate an Lesetransaktionen je Sekunde (Transaction Per Second, TPS) für eine Datenbankanwendung gemäß einer Ausführungsform ist;
• 5 ein Blockschaubild eines Beispiels einer Anwendung mit hoher Dateizugriffsnutzung gemäß einer Ausführungsform ist;
• 6 ein Blockschaubild eines Beispiels zweier unabhängiger Anwendungen, welche eine NVMe-Vorrichtung gemeinsam benutzen, gemäß einer Ausführungsform ist;
• 7 ein Blockschaubild eines Beispiels eines Prozessors gemäß einer Ausführungsform ist; und
• 8 ein Blockschaubild eines Beispiels eines Computersystems gemäß einer Ausführungsform ist.

The various advantages of the embodiments will become apparent to those skilled in the art upon reading the following specification and appended claims, and referring to the following drawings in which:

• 1 Figure 4 is an illustration of an example of a non-volatile-memory (NVM) non-volatile-memory (NVMe) driver architecture according to one embodiment;
• 2 Fig. 10 is a flowchart of an example of a method for initializing a kernel space driver according to an embodiment;
• 3 Fig. 10 is a flowchart of an example of a method for initializing a binary-branched driver according to an embodiment;
• 4 Figure 12 is a block diagram of one example of a high rate of Transaction Per Second (TPS) for a database application according to one embodiment;
• 5 Figure 12 is a block diagram of an example of a high file access usage application according to one embodiment;
• 6 a block diagram of an example of two independent applications sharing an NVMe device according to one embodiment;
• 7 Figure 12 is a block diagram of an example of a processor according to an embodiment; and
• 8th Figure 12 is a block diagram of an example of a computer system according to one embodiment.

DESCRIPTION OF EMBODIMENTS

1 FIG. 11 illustrates an example of a non-volatile memory (NVM) non-volatile memory (NVMe) driver architecture 100 according to one embodiment. Unlike a traditional kernel driver that can operate in an interrupt mode, a user-space NVMe invocation mode driver (such as the INTEL Storage Performance Development Kit) can be used to address bottlenecks in the use of the central processing unit (CPU). due to NVMe solid-state drive (SSD) performance and to provide breakthrough performance improvements provided by a fast storage backend (eg, an NVMe storage device and / or NVMe over fabric NVMF).

The binary branched NVMe driver architecture 100 may be a host memory 102 comprising one or more of a volatile memory and a nonvolatile memory. The nonvolatile memory may be a file system device storage 104 and a block device storage 106 (eg, one or more NVMe devices). The binary branched NVMe driver architecture 100 may further include a memory controller 108 (eg, an NVMe controller) communicatively connected to the nonvolatile memory, including the file system device storage 104 and the block device storage 106 , In one implementation, the host memory includes 102 at least part of the file system device storage 104 and / or the block device storage 106 while another part of file system device storage 104 and / or the block device storage 106 one or more applications 110 . 112 can be used.

The memory controller 108 (eg NVMe control) can be a binary-branched driver 114 use one or more memory access requests to access the non-volatile Memory comprising the file system device storage 104 and / or the block device storage 106 , to process. The binary-branched driver 114 can be a kernelspace driver 116 communicatively using a kernel file system 118 connected, and a userspace driver 120 (For example, an INTEL Storage Performance Development Kit (SPDK) NVMe driver) that uses a block service daemon 122 communicative with the block device storage 106 (eg, one or more NVMe devices) and configuration tools 124 (eg, an out-of-band configuration tool or an NVMe configuration tool for using a dedicated channel to manage network devices). The binary branched NVMe driver architecture 100 Out-of-band management can separate data from commands and events so that data can flow through a host-to-controller interface, while commands and events can flow through management-port Ethernet cables.

The binary branched NVMe driver architecture 100 may include a driver binarder (eg, configurable logic and / or fixed functionality hardware logic) to the binary-branched driver 114 to create. The driver binarizer may be executed in the driver (eg, operating system), managed, and / or arranged. The driver bin can retrieve user configuration information that is used by the binary-branched driver 114 , the kernelspace driver 116 and the userspace driver 120 to configure. The user configuration information may include metadata that pairs a number of management queues 126 (for example, admission queues and completion queues), input-output queues 128 . 130 . 132 . 134 and a number of binary branch name space pairs comprising a kernel namespace 136 and a user namespace 138 , for use with the kernelspace driver 116 and / or the userspace driver 120 identify. Of one or more applications 110 . 112 that are modified for this, the binary-branched driver 114 One or more memory access requests may be received. The one or more applications 110 . 112 may include a read-intensive application and / or a write-intensive application.

The driver bin can use the kernelspace driver 116 initialize. The kernelspace driver 116 may be a use of the kernel file system 118 support to access a file system storage device, such as The block device storage 106 , The driver binarizer may have a data structure (eg, a binarized data structure) in a shared memory space 140 of the host memory 102 produce. The host memory 102 may include a driver where the driver manages the kernelspace driver through the binary-branched driver. On the shared storage space 140 may be accessed by a binary branch name pair, wherein the binary branch name pair includes a kernel namespace and a user namespace. The data structure may include data structure metadata including one or more of admission queue physical addresses, completion queue physical addresses, and queue address or queue ororbell physical address physical addresses. On the shared storage space 140 can be accessed by the binary branch name pair, which is the kernel namespace 136 and the user namespace 138 includes.

The driver bin splitter may be in the host memory 102 the kernel namespace 136 , one or more kernel queue pairs 126 . 128 . 130 , the user namespace 138 and one or more user-space queue pairs 132 . 134 produce. The driver bin can use the kernel namespace 136 and the one or more kernel queue pairs 126 . 128 . 130 the kernelspace driver 116 to update the data structure with kernel queue pair metadata, which is the kernel namespace 136 and the one or more kernel queue pairs 126 . 128 . 130 and register the device with the driver, the device being the NVMe block device storage.

The one or more kernel queue pairs 126 . 128 . 130 can one or more of a management queue pair 126 comprising a management admission queue and a management completion queue, and one or more of driver input-output queue pairs 128 . 130 include, which may include a driver admission queue and a driver completion queue. The one or more user space queue pairs 132 . 134 can include a userspace admission queue and a userspace completion queue. On the block device storage 106 can over the block service daemon 114 be accessed.

The driver bin can, using the data structure metadata, the userspace driver 120 initialize. The userspace driver 120 can be a call mode driver. The driver binarizer can retrieve the user configuration information and the data structure metadata, the device based on the Create user configuration information and the data structure metadata, update the data structure with the user-space queue-pair metadata, and a block device interface (for example, the block service daemon 114 ) to the device in the userspace driver 120 to register.

After initializing are the kernelspace drivers 116 and the userspace driver 120 to appropriate devices, the file system device storage and / or the NVMe block device storage bound. The binary-branched driver 114 and / or drivers (eg, the operating system) can read requests and write requests to the kernelspace driver 116 and / or the userspace driver 120 to perform appropriate reads and / or writes. The userspace driver 120 Can be communicative with the memory controller 108 (eg NVMe control).

The binary-branched driver 114 may determine the one or more memory access requests from the one or more applications 110 . 112 to access the file system device storage and / or the NVMe block device storage, which process one or more memory access requests, using the kernel namespace 136 and / or the user namespace 138 based on the one or more memory access requests, the one or more kernel queue pairs 126 . 128 . 130 or the one or more user space queue pairs 132 . 134 update and using the memory controller 108 (eg the NVMe controller) the data structure in the shared memory space 140 synchronize.

If one or more memory access requests is a read request, the binary branch driver may be 114 , the driver and / or the kernelspace driver 116 the one or more memory access requests to the userspace driver 120 conduct. In one embodiment, the kernelspace driver may be 116 a control of the userspace driver 120 operate. If the one or more memory access requests is a write request, the binary branch driver may be 114 , the driver and / or the kernelspace driver 116 the one or more memory access requests to the kernelspace driver 116 conduct.

Disk read / write commands may be based on user configuration information (e.g., one or more applications and types of applications including read-intensive or write-intensive type applications) by kernel file systems 110 to the kernelspace driver 116 and / or by the binary-branched driver 114 to the userspace driver 120 (for example, a SPDK disk driver). Since conventionally implemented NVMe drivers can only control (e.g., allocate) an NVMe device, memory control can 108 (eg, NVMe controller), for example, are not shared (eg, shared) by another driver (eg, a kernel driver) without the binary-branched driver 114 to realize.

An application 110 (eg, a conventional storage application) may be the kernelspace driver 116 to use file system storage while another application 112 (eg a high performance application) the userspace driver 120 can use for block storage. Traditional storage applications like the application 110 can use compatible system calls with a portable operating system interface (POSIX), while high performance applications like the application 112 can realize a higher value of input / output operations per second (IOPS) with limited CPU usage.

The driver, the binary-branched driver 114 or the kernelspace driver 116 may initialize one or more storage devices, including a PCI device probe, generating one or more namespaces and queue pairs and memory allocations for associated data structures. The kernelspace driver 116 can through user configuration information the binarizer namespaces 136 . 138 and the input-output queue pairs 128 . 130 . 132 . 134 claim. For example, users can use the kernel namespace 136 and the kernel queue pairs 126 . 128 . 130 assign to the kernel driver so that the kernel driver is the kernel namespace 136 and then an assigned interrupt handler function for the kernel queue pairs 126 . 128 . 130 can probe. The kernelspace driver 116 may include the PCI device information including the information about the binarist namespaces 136 . 138 and the kernel queue pairs 126 . 128 . 130 , as well as the user configuration information in the shared memory 140 To update.

If the userspace driver 120 It may be that the userspace driver is started (for example, initialized) 120 performs no PCI device initialization work (e.g., tasks), but the PCI device information from the shared memory space 140 and generates a logical NVMe device. The userspace driver 120 can be specified Use namespace information and input-output queues belonging to the userspace driver 120 assigned. The input-output queues 128 . 130 . 132 . 134 can be used for input-output admission and completion calls. The runtime overhead of the binary-branched driver 114 may be low or absent, and thereby the disk input-output performance of an application using a file system can be improved.

In an example, a kernelspace driver 116 and a userspace driver 120 (eg an NVMe driver) trying to share an NVMe device, such as The block device storage 106 So work that they have an application 110 support which a file system 118 use (for example, a legacy storage, a file system intensive storage application). The read performance of the NVMe device can be a key factor in application performance, based on whether an application is read-intensive or write-intensive. In general, writes to an NVMe device are more dependent on the file system than reads of an NVMe device. An application, such as the block device storage 106 which uses more reads and fewer writes may be from the binary-branched driver 114 To benefit.

In another example, an application such as B. the application 112 more read-intensive than write-intensive (for example, a high-performance storage application, such as a database application). The application 112 can use local and / or distributed storage for a hash table in a data deduplication system. A hash key can be written once if there is no duplication, but it is read each time the hash table is accessed. Accordingly, the performance of the hash table access can be a key factor in the performance of the data deduplication system. Local and / or distributed storage for a database can be used for metadata and / or database raw data. The metadata can be saved once but read multiple times. And reading performance in metadata storage can be the key to database performance. The application 112 can be the binary-branched driver 114 configure to send read requests to the userspace driver (for example, SPDK NVMe drivers). The binary-branched driver 114 can send write requests to the kernelspace file system. When using the binary-branched driver 114 NVMe write requests may be passed through the file system to the kernelspace driver, and NVMe read requests may be passed through the block interface to the userspace driver, and the shared memory may be used to synchronize the mapping of the NVMe read / write addresses. The NVMe read performance can be guaranteed by the userspace driver. The runtime overhead for keeping the map in the shared memory can be small, unlike a traditional kernel space driver that handles NVMe reads. Development effort / development costs for NVMe read / write synchronization can be offset by the cost and time to develop a userspace file system.

In yet another example, two applications, such as For example, the applications 110 . 112 , an NVMe device, such. The block device storage 106 to share, taking the application 110 the file system support from the kernel file system 118 used and the application 112 no file system support needed. The binary-branched driver 114 can NVMe read / write commands from the application 110 to the kernelspace driver 116 direct to the kernel file system 118 and NVMe read / write commands from the application 112 to the user namespace 138 direct to the userspace driver 120 to use.

The use of the binary-branched driver 114 can result in no or limited runtime overhead for initializing the configuration without development overhead / cost. Without the benefits of using a binary-branched driver, such as. B. the binary-branched driver 114 For example, two or more applications may not be able to provide one or more NVMe drivers (e.g., NVMe drivers) due to hardware register conflicts between a conventional kernel driver and a userspace driver (eg, the NVMe driver) Hardware) when using multiple namespaces.

In another example, a userspace file system may be developed and implemented to use an NVMe driver (eg, an INTEL SPDK NVMe driver) in the user namespace to attempt NVMe reads or read and write Accelerate write operations. However, development to realize a userspace file system can take a significant amount of time and costs, and can create instability and quality risks to the file system. As another example, using a conventional kernelspace driver to perform NVMe writes and NVMe reads using an old kernelspace file system may increase the performance of NVMe read and / or NVMe reads. Read and write operations are not guaranteed. Moreover, relatively expensive corresponding components (eg, a faster CPU, a 9-10x CPU) may be required to overcome disadvantages and to achieve the maximum NVMe hardware performance otherwise achieved using a binary-branched driver, e.g. B. the binary-branched driver 114 , is achieved. Developing a user-space file system and / or using higher-performance components (eg, a faster CPU, a 9-10x CPU) can also increase the cost associated with each approach due to an inefficient software stack.

In yet another example, the userspace driver may be 120 (e.g., NVMe drivers) of one or more virtual machines, and may provide an NVMe device with a block service, e.g. The block device storage 106 to deploy in a storage network. The widespread use of an NVMe driver may limit storage to block interface type devices while the kernelspace driver 116 can be used for items provided by a driver (such as file system support) and applications such as the application 110 are usable. Applications designed for high-performance reads with low CPU usage and no or limited file system requirements, such as the application 112 but can use the userspace driver 120 while neither the kernelspace driver nor the userspace driver 120 can meet the requirements for applications that require relatively similar file system support (e.g., write-intensive operations) as well as block-level device support.

2 FIG. 10 is a flowchart of an example of a method for initializing a kernel space driver according to one embodiment. The procedure 200 may be implemented as a module or corresponding component in a set of logic instructions used in a non-volatile, machine or computer readable storage medium, such as a memory device. Random access memory (RAM), read only memory (ROM), programmable ROM (PROM), firmware, flash memory, etc., in configurable logic, such as programmable logic arrays (PLAs). Field Programmable Gate Arrays (FPGAs), Complex Programmable Logic Devices (CPLDs), in fixed-functionality hardware logic using circuit technology, such as an Application Specific Integrated Circuit (ASIC), Complementary Metal Oxide Semiconductor (CMOS) ) or a transistor-transistor-logic (TTL) technology, or any combination thereof. For example, computer program code may be used to perform operations described in the method 200 are written in any combination of one or more programming languages, including an object-oriented programming language such as JAVA, SMALLTALK, C ++ or the like and conventional procedural programming languages such as the "C" programming language or similar programming languages.

In the illustrated processing block 202 will initialize the kernel driver connected to a kernel file system. In the illustrated processing block 204 loading user configuration information including queue and namespace partitioning information is provided. In the illustrated processing block 206 generating a plurality of NVMe hardware queue pairs, and if there are no namespaces, creating one or more namespaces (eg, one or more binary branch name pairs) in a data structure in a shared memory space of a host memory. The host memory may include a volatile memory and / or a nonvolatile memory, wherein the host memory includes a driver, wherein the driver manages the kernel space driver via the binary branched driver. The nonvolatile memory may include file system device storage and NVMe block storage. The shared memory space may be accessed by a binary branch name pair, which includes a kernel namespace and a user namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs. In the illustrated processing block 206 it also provides for generating the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host memory. In the illustrated processing block 208 An assignment of the kernel namespace and the one or more kernel queue pairs to the kernelspace driver is provided. In the illustrated processing block 210 an allocation of an input-output queuing interrupt routine for a command completion process is provided. In the illustrated processing block 212 An assignment of queue pairs to the user space driver is provided. In the illustrated processing block 214 for an export of a storage control identity structure (eg, NVMe Control Identity Structure), an input-output queue structure, and a namespace identity data structure to a shared memory Updating the data structure (s) with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs. In the illustrated processing block 216 a registration of the device in the driver is provided, the device being the NVMe block device storage.

Now over to 3 , there is an example of a schedule of a procedure 300 for initializing a binary-branched driver according to an embodiment. The binary-branched driver may be one as above with respect to the binary-branched driver 114 described as in 1 shown. The procedure 300 can be implemented as a module or corresponding component in a set of logic instructions used in a non-volatile, machine or computer readable storage medium, such as RAM, ROM, PROM, firmware, flash memory, etc., in a configurable Logic, such as PLAs, FPGAs, CPLDs, are stored in fixed-functionality hardware logic using circuit technology, such as ASIC, CMOS, or TTL technology, or any combination thereof.

In the illustrated processing block 302 Initialization of the userspace driver is accomplished using the data structure metadata from the shared memory space. In the illustrated processing block 304 is for loading / retrieving user configuration information and storage control identity information (e.g., NVMe control identity information) including, for example, the data structure metadata comprising the storage control identity structure (e.g., NVMe control identity structure) from shared storage taken care of. In the illustrated processing block 306 loading of the input-output queue data structure, the input-output queue structure and the namespace identity data structure and the kernel queue pair metadata is provided. In the illustrated processing block 308 A device (e.g., NVMe block device) is created based on the user configuration information and data structure metadata (eg, namespace information). The user space driver may be a call mode driver. In the illustrated processing block 310 will be invoked to invoke the thread for input-output and completion updates, and to update the data structure with the user-space queue-pair metadata. In the illustrated processing block 312 For example, a registration of a block device interface (eg, a block service daemon) to the device in the userspace driver is provided, which device is the NVMe block device storage.

4 is a block diagram 400 an example of a high rate of read transactions per second (TPS) for a database application according to one embodiment. The binary-branched driver 402 can the userspace driver 404 and the kernelspace driver 406 concurrently grant access to an NVMe device as described above with respect to the block device storage 106 described as in 1 shown for a high TPS rate for a database application 408 to care. The userspace driver 404 and the kernelspace driver 406 can have a namespace 410 Share the device so that the userspace driver 404 and the kernelspace driver 406 can read / write a logical block addressing (LBA) (e.g., a shift in disk capacity specifying the location of data blocks stored in a storage device). The kernelspace driver 406 can provide read / write support using a kernel file system 412 for small dedicated database application files (eg, average file capacity <1GB), such as: B. Write-ahead log files 414 and redo log files 416 , For very large database application files (eg medium file capacity> = 1 GB), such as: A database-sorted-string-table (SST) file 418, the database application can 408 the kernelspace driver 406 to use for writes and the database application 408 can the userspace driver 404 for read operations. Deciding if the userspace driver 404 or the kernelspace driver 406 may be based on the read intensity and / or write intensity of an application and / or files used by the application to increase (eg, for read-intensive workloads) the read TPS.

5 is a block diagram 500 an example of an application 502 high file access usage according to one embodiment. A binary-branched driver 504 can be a userspace driver 506 and a kernelspace driver 508 include. The application 502 may require high file access to store (e.g., write) and access (eg, read) metadata in a key-value machine 510 which can be local instead of remote. When using the binary-branched driver 504 For example, an NVMe device having multiple namespaces may be configured, including, for example, a kernel namespace 512 which is for a key value machine backend storage (eg, low capacity files, average file capacity <1 GB) using a kernel file system 514 can be used, and the user namespace 516 , which one can be used for data storage using block storage (eg for large files, average file capacity> = 1 GB). The block device storage may be one, as above with respect to the block device storage 106 described as in 1 shown.

6 is a block diagram 600 an example of two independent applications 602 . 604 which share an NVMe device, according to one embodiment. The NVMe device may be one as above with respect to the block device storage 106 described as in 1 shown. The binary-branched driver 606 can be a kernelspace driver 608 with the support of the kernel file system 610 and a userspace driver 612 and provide and / or generate a plurality of logical partitions comprising a kernel namespace 614 and a user namespace 616 , the appropriate applications 602 . 604 are assigned by the kernelspace driver 608 and the userspace driver 612 to be served.

7 is a block diagram 700 an example of a processor core 701 according to one embodiment. The processor core 701 may be the core for any type of processor, eg. A microprocessor, an embedded processor, a digital signal processor (DSP), a network processor or other device for executing code. Although in 7 just a processor core 701 Alternatively, a processing element may alternatively comprise more than one of the ones shown in FIG 7 represented processor core 701 include. The processor core 701 can be a single core, or the processor core 701 may be multi-threaded for at least one embodiment in that it may include more than one hardware thread context (or "logical processor") per core.

7 also illustrates a memory 707 that with the processor core 701 connected is. The memory 707 may be one of a wide variety of memories (including various memory hierarchy layers) as known to those skilled in the art or otherwise available. The memory 771 can be one or more commands of the code 713 include that from the processor core 701 are to execute, the code 713 the procedure 200 ( 2 ) and / or the method 300 ( 3 ), which have already been described. The processor core 701 follows a program sequence of commands issued by the code 713 are displayed. Each command can be in a front-end section 711 occur and by one or more decoders 721 are processed. The decoder 721 can generate as its output a micro-operation such. A fixed-width micro-operation in a predetermined format, or may generate other instructions, micro-instructions or control signals reflecting the original code instruction. The illustrated front-end section 711 also includes register renaming logic 725 and scheduling logic 731 which generally allocates resources and queues the operation corresponding to the converted instruction for execution.

The processor core 701 is shown as having an execution logic 751 includes a set of execution units 755 - 1 to 755-N having. Some embodiments may include a number of execution units dedicated to particular functions or groups of functions. Other embodiments may include only one execution unit, or an execution unit that may perform a particular function. The illustrated execution logic 751 performs the operations specified by the code instructions.

Upon completion of the execution of the operations specified by the code instructions, the back-end logic sets 761 the commands of the code 713 quiet. In one embodiment, the processor core allows 701 an out-of-order execution, but requires a quiesce of commands in that order. A decommissioning logic 765 may take a variety of forms, as known to those of skill in the art (eg, reorder buffers or the like). That way, the processor core can 701 while executing the code 713 be converted, at least in the form of the output generated by the decoder, the hardware registers and tables generated by the register renaming logic 725 and all registers (not shown) used by the execution logic 751 be modified.

Although in 7 not shown, a processing element may have other elements on a chip with the processor core 701 include. For example, a processing element may include memory control logic along with the processor core 701 include. The processing element may include I / O control logic and / or may include I / O control logic integrated with the memory control logic. The processing element may also include one or more caches.

The memory may be external to the processor (eg, external memory) and / or may be connected to the processor, for example, a memory bus. In addition, the memory may be realized as main memory. The memory may, for example, be volatile memory, nonvolatile memory, etc., or combinations thereof. For example, the memory may be dynamic random access memory (DRAM) configured as one or more memory modules, such as dual inline memory modules (DIMMs), small outline DIMMs (SODIMMs), etc., read only memory (ROM). (e.g., programmable read only memory (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), etc.), phase change memory (PCM), etc., or combinations thereof. The memory may comprise a matrix array of memory cells arranged in rows and columns and partitioned into independently addressable memory locations. The processor and / or the operating system may use secondary memory storage with the memory to improve performance, capacity, and flexibility.

Non-limiting examples of nonvolatile memory may include any or a combination of the following: semiconductor memory (eg, planar or 3-dimensional (3D) NAND flash memory or NOR flash memory), 3D crosspoint memory, memory devices using a chalcogenide phase change material (eg, chalcogenide glass), byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide-nitride-oxide-silicon (SONOS) memory, polymer memory (e.g., ferroelectric polymer memory), ferroelectric Transistor Random Access Memory (Fe-TRAM), Ovonik Memory, Nanowire Memory, Electrically Erasable Programmable Read Only Memory, Various Other Non-Volatile Random Access Memory (RAM) Types, and Magnetic Storage Memory. In some embodiments, a 3-D crosspoint memory may include a transistorless stackable crosspoint architecture in which the memory cells are located at the intersection of word lines and bit lines and individually addressable, and where bit storage is based on a change in track resistance. In certain embodiments, a nonvolatile memory module may include one or more standards issued by the Joint Electron Device Engineering Council (JEDEC), such as: JESD218, JESD219, JESD220-1, JESD223B, JESD223-1, or any other suitable standard (the JEDEC standards cited herein are available at jedec.org).

Volatile memory is a storage medium that requires power to maintain the state of data stored by the medium. Examples of volatile memory may include various types of random access memory (RAM), such as: Dynamic random access memory (DRAM) or static random access memory (SRAM). One particular type of DRAM that may be used in a memory module is Synchronous Dynamic Random Access Memory (SDRAM). In particular embodiments, the DRAM of the memory modules complies with a standard issued by the JEDEC, such as, for example, US Pat. Eg JESD79F for Double Data Rate (DDR) SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3 SDRAM or JESD79-4A for DDR4 SDRAM (these standards are available at www.jedec.org) , Such standards (and similar standards) may be referred to as DDR-based standards, and communication interfaces of the memory devices that implement such standards may be referred to as DDR-based interfaces.

Now referring to 8th Figure 4 is a block diagram of one embodiment of a computer system 800 represented according to an embodiment. Is shown in 8th a multiprocessor system 800 which is a first processing element 870 and a second processing element 880 includes. Although two processing elements 870 and 880 It should be understood that one embodiment of the system 800 may also comprise only such a processing element.

The system 800 is shown as a point-to-point connection system, wherein the first processing element 870 and the second processing element 880 over a point-to-point connection 850 are connected. It is understood that any or all of the compounds described in U.S. Pat 8th instead of being realized as point-to-point connections as a multiple drop-out bus.

As in 8th As shown, each of the processing elements may be 870 and 880 polynuclear processors, which are first and second processor cores (ie, processor cores 874a and 874b and processor cores 884a and 884b ). Such cores 874a . 874b . 884a . 884b can be configured to execute command code in a similar manner to that described above 7 described. The cores can execute one or more commands, such as: A read command, a write command, a clear command, a move command, an arithmetic command, a control command, etc., or combinations thereof. For example, the cores may read one or more instructions to move data (eg, program data, opcodes, operands, etc.) between a cache memory or a register (not shown) and the memory and / or secondary memory storage the data from the memory, writing the data to the memory, performing an arithmetic operation using the data (e.g., adding, subtracting, bitwise operation, comparing, etc.) to perform a Perform control operation in conjunction with the data (eg, branching, etc.), etc., or combinations thereof. The instructions may include any code representation, such as binary code, octal code and / or hexadecimal code (e.g., machine language), symbolic code (eg, assembly language), decimal code, alphanumeric code, higher-level language code, etc., or Combinations of it. For example, hexadecimal code may be used to represent an opcode (eg, opcode) of an x86 instruction set, including a byte value "00" for an add operation, a byte value "8B" for a move operation, a byte Value "FF" for a count-up / count-down operation, etc.

Each processing element 870 . 880 can have at least one shared cache 899a . 899b include. The shared cache 899a . 899b may store data (eg, instructions) used by one or more components of the processor, e.g. From the cores 874a . 874b respectively. 884a . 884b , For example, the shared cache 899a . 899b Data stored in a memory 832 . 834 cache locally for faster access by components of the processor. In one or more embodiments, the shared cache memory may 899a . 899b one or more middle level caches, e.g. Level 2 (L2), Level 3 (L3), Level 4 (L4) or other cache levels, Last Level Cache (LLC), and / or combinations thereof.

Although with only two processing elements 870 . 880 As illustrated, it should be understood that the scope of the embodiments is not limited thereto. In other embodiments, one or more additional processing elements may be present in a given processor. Alternatively, one or more processing elements 870 . 880 be an element other than a processor, e.g. An accelerator or a field programmable gate array. For example, an additional processing element (s) may include an additional processor or processors that are the same as a first processor 870 , an additional processor or processors that are heterogeneous or asymmetric to a first processor 870 , accelerators (eg, graphics accelerators or digital signal processing (DSP) units), field programmable gate arrays, or any other processing element. There can be a variety of differences between the processing elements 870 . 880 in terms of a spectrum of performance metrics, including architectural, microarchitectural, thermal, power consumption, and the like. These differences may result in asymmetry and heterogeneity among the processing elements 870 . 880 manifest. For at least one embodiment, the processing elements 870 . 880 be arranged in the same die package.

The first processing element 870 furthermore, a memory control logic (MC) may be provided 872 and point-to-point (PP) interfaces 876 and 878 include. Similarly, the second processing element 880 an MC 882 and PP interfaces 886 and 888 include. As in 8th shown, connect the MCs 872 and 882 the processors with corresponding memories, namely a memory 832 and a memory 834 which may be parts of the main memory which are locally attached to the respective processors. Although the MC 872 and 882 as in the processing elements 870 . 880 is integrated, the MC logic for alternative embodiments may have discrete logic outside of the processing elements 870 . 880 instead of being integrated into it.

The first processing element 870 and the second processing element 880 can via PP connections 876 respectively. 886 with an I / O subsystem 890 be connected. As in 8th shown includes the I / O subsystem 890 PP interfaces 894 and 898 , It also includes the I / O subsystem 890 an interface 892 to connect the I / O subsystem 890 with a high performance graphics engine 838 , In one embodiment, a bus 849 used to be the graphics engine 838 with the I / O subsystem 890 connect to. Alternatively, these components may be connected by a point-to-point connection.

In turn, the I / O subsystem 890 via an interface 896 with a first bus 816 be connected. In an embodiment, the first bus 816 a Peripheral Component Interconnect (PCI) bus or a bus such. A PCI Express bus or other third generation I / O connection bus, although the scope of the embodiments is not so limited.

As in 8th As shown, different I / O devices may be used 814 (eg speakers, cameras, sensors) with the first bus 816 be connected, next to a bus bridge 818 , which is the first bus 816 with a second bus 820 can connect. In one embodiment, the second bus 820 a low pin count (LPC) bus. With the second bus 820 For example, various devices may be connected, for example a keyboard / mouse 812 , a communication device (s) 826 and a data storage unit 819 , such as As a disk drive or other mass storage device, which in a Embodiment code 830 may include. The code shown 830 can the procedure 200 ( 2 ) and / or the method 300 ( 3 ), which have already been described, and can be the code 713 ( 7 ), which has already been described, be similar. Furthermore, an audio I / O 824 with the second bus 820 be connected and a battery 810 can the computer system 800 supply electricity.

It should be noted that other embodiments are contemplated. For example, instead of the point-to-point architecture of the system, a system can 8th realize a multi-drop bus or other such communication topology. In addition, the elements of the 8th alternatively be partitioned with more or less integrated chips than in 8th shown.

Further comments and examples:

Example 1 may include a system comprising a host memory including a volatile memory and / or a non-volatile memory, and a memory controller communicatively coupled to the host memory, the memory controller comprising a binary-branched driver for processing one or more of the memory Memory access requests for accessing the memory, wherein the binary-branched driver comprises a kernel space driver communicatively connected to a kernel file system and a userspace driver communicatively connected to a device.

Example 2 may include the system of Example 1, further comprising a driver binarizer for generating the binary-branched driver, wherein the driver binarizer retrieves user configuration information used to configure the binary-branched driver, the user configuration information comprising a number of input-output Queues and a number of namespaces for use with the kernelspace driver and the userspace driver, wherein the one or more memory access requests are received from one or more applications modified to utilize the binary-branched driver, and wherein the one or more applications comprise a read-intensive application and / or a write-intensive application.

Example 3 may include the system of Example 2 wherein the driver binarizer initializes the kernelspace driver, wherein the driver binarizer generates a data structure in a shared memory space of the host memory, the host memory including a driver Driver manages the kernel space driver via the binarized driver, wherein the shared memory space is accessed via a namespace pair, the binarizer name space pair comprising a kernel namespace and a user namespace, the nonvolatile memory comprising a file system device storage and a non-volatile memory -Volatile Memory (NVM) Express (NVMe) Block Device Storage. The driver binarizer also generates in the host memory the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs, associates the kernel namespace and the one or more kernel queue pairs Kernelspace driver, updates the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs, and registers the device in the driver, the device being NVMe block storage.

Example 4 may include the system of Example 3, where the data structure comprises data structure metadata that includes one or more of admission queue physical addresses, completion queue physical addresses, and queue address or queue orphan queue physical addresses.

Example 5 may include the system of Example 3, wherein the one or more kernel queue pairs comprise one or more of a management queue pair comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair comprising a driver admission queue and a driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue.

Example 6 may include the system of Example 3, where the driver bin is initializing the user space driver using the data structure metadata, where the userspace driver is a call mode driver, wherein the driver bin is the user configuration information and the data structure metadata generates the device based on the user configuration information and the data structure metadata, updates the data structure with the user-space queue-pair metadata, and registers a block device interface with the device to the user-space driver.

Example 7 may include the system of Example 3 wherein the binary-branched driver is communicatively coupled to the memory controller and wherein the binary-branched driver receives the one or more memory access requests from the one or more applications to the file system device storage and / or the NVMe Block memory storage, which processes one or more memory access requests using the binary-branched driver, using one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user space queue pairs updated based on the one or more memory access requests, and synchronizes the data structure using the memory controller.

Example 8 may include the system of Example 3, wherein the volatile memory comprises Random Access Memory (RAM), e.g. One or more of Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), and Synchronous Dynamic Random Access Memory (SDRAM), and wherein nonvolatile memory includes nonvolatile random access memory, e.g. Semiconductor memory, 3D crosspoint memory, one or more memory devices using a chalcogenide phase change material, byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide nitride oxide silicon (SONOS) memory, polymer memory, e.g. B. ferroelectric polymer memory, ferroelectric transistor random access memory (Fe-TRAM), Ovonikspeicher, nanowire memory and / or electrically erasable programmable read-only memory (EEPROM), wherein the semiconductor memory planar or 3-dimensional (3D) NAND flash memory and wherein the 3D crosspoint memory comprises at least one of a non-transistor stackable crosspoint architecture, wherein the memory cells are located at an intersection of word lines and bit lines and the memory cells are individually addressable, and the bit storage is based on a change in the track resistance ,

Example 9 may include the system of Example 8, where, if the one or more memory access requests is a read request, the binary-branched driver directs the one or more memory access requests to the userspace driver.

Example 10 may include the system of any of Examples 2 through 8, wherein if the one or more memory access requests is a write request, the binary branch driver directs the one or more memory access requests to the kernelspace driver.

Example 11 may include a method of sharing a Non-Volatile Memory (NVM) Express (NVMe) device, comprising generating a binary-branched driver using a processor connected to a host memory, wherein the host memory a volatile memory and / or a non-volatile memory, the binary-branched driver comprising a kernel space driver communicatively connected to a kernel file system and a userspace driver communicatively connected to a device and processing one or more Memory access requests for accessing the non-volatile memory using the binary-branched driver.

Example 12 may include the method of Example 11, further comprising receiving the one or more memory access requests from one or more applications modified to use the binary-branched driver, wherein generating the binary-branched driver retrieves user configuration information that is used to configure the binary-branched driver using a driver binarizer, the user configuration information comprising a number of input-output queues and a number of namespaces for use with the kernelspace driver and the userspace driver, one or more of multiple applications comprise a read-intensive application and / or a write-intensive application, and wherein the one or more memory access requests comprise a read request and / or a write request.

Example 13 may include the method of Example 12, further comprising initializing the kernel space driver, comprising generating a data structure in a shared memory space of the host memory, wherein the host memory comprises a driver, wherein the driver drives the kernel space driver via the kernel space driver a shared-name random access memory, comprising a kernel namespace and a user namespace, the nonvolatile memory comprising file system device storage and NVMe block storage. Initializing the kernel space driver further includes generating the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host memory, associating the kernel name space Kernel namespace and the one or more kernel queue pairs to the kernelspace driver, updating the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs, and registering the device in the kernel Driver, where the device is the NVMe block device storage.

Example 14 may include the method of Example 13, wherein the data structure comprises data structure metadata comprising one or more of admission queue physical addresses, completion queue physical addresses, and queue queue or queue address physical address queuing physical addresses.

Example 15 may include the method of Example 13, wherein the one or more kernel queue pairs comprises one or more of a management queue pair comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair comprising a driver admission queue and a driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue.

Example 16 may include the method of Example 13, further comprising initializing the userspace driver using the data structure metadata, the user space driver being a call mode driver, wherein initializing the userspace driver retrieving the user configuration information and the data structure metadata , Generating the device based on the user configuration information and the data structure metadata, updating the data structure with the user space queue pair metadata, and registering a block device interface with the device at the user space driver.

Example 17 may include the method of Example 13, further comprising receiving the one or more memory access requests using the binary-branched driver from the one or more applications to access the file system device storage and / or the NVMe block device storage or the plurality of memory access requests using the binary-branched driver, updating one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user-space queue pairs based on the one or more Memory access requests using a memory controller communicatively connected to the binary-branched driver, and synchronizing the data structure using the memory controller.

Example 18 may include the method of Example 13, wherein the volatile memory comprises Random Access Memory (RAM), e.g. Dynamic random access memory (DRAM), static random access memory (SRAM) and / or synchronous dynamic random access memory (SDRAM), and wherein the nonvolatile memory comprises nonvolatile random access memory, e.g. Semiconductor memory, 3D crosspoint memory, one or more memory devices using a chalcogenide phase change material, byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide nitride oxide silicon (SONOS) memory, polymer memory, e.g. B. ferroelectric polymer memory, ferroelectric transistor random access memory (Fe-TRAM), Ovonikspeicher, nanowire memory and / or electrically erasable programmable read-only memory (EEPROM), wherein the semiconductor memory planar or 3-dimensional (3D) NAND flash memory and wherein the 3D crosspoint memory comprises at least one of a non-transistor stackable crosspoint architecture, wherein the memory cells are located at an intersection of word lines and bit lines and the memory cells are individually addressable, and the bit storage is based on a change in the track resistance ,

Example 19 may include any of Examples 12-18, wherein if the one or more memory access requests is a read request, the one or more memory access requests are directed to the userspace driver using the binary-branched driver, and wherein if the one or more memory access requests is a write request, routing the one or more memory access requests to the kernelspace driver using the binary-branched driver.

Example 20 may include at least one computer-readable storage medium comprising a set of instructions that, when executed by a computing device, causes the computing device to generate a binary-branched driver using a processor coupled to a host memory the host memory comprises a volatile memory and / or a nonvolatile memory, wherein the binary-branched driver comprises a kernelspace driver communicatively coupled to a kernel file system and a userspace driver communicatively coupled to a device, and using the binary-branched driver, one or more memory access requests to access the nonvolatile memory processed.

Example 21 may include the at least one computer-readable storage medium of Example 20, wherein the instructions, when executed, cause a computing device to receive the one or more memory access requests from one or more applications modified to utilize the binary-branched driver , generates the binary-branched driver using a driver binarizer, comprising retrieving user configuration information used to configure the binary-branched driver, the user configuration information comprising a number of input-output queues and a number of namespaces to be used for the kernelspace Driver and the userspace driver, wherein the one or more applications comprise a read-intensive application and / or a write-intensive application, and wherein the one or more memory access requests are a read request and / or or include a write request.

Example 22 may include the at least one computer-readable storage medium of example 21, wherein the instructions, when executed, further cause the computing device to initialize the kernelspace driver, wherein initializing the kernelspace driver further causes the computing device to construct a data structure in a shared memory space of the host memory, wherein the host memory comprises a driver, wherein the driver manages the kernel space driver via the binary branched driver, the shared memory space being accessible via a name space pair comprising a kernel namespace and a user namespace, wherein the nonvolatile memory includes file system device storage and Non-Volatile Memory (NVM) Express (NVMe) block device storage. Initializing the kernelspace driver may cause the instructions, when executed, to further cause the computing device to specify the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host Generates memory, maps the kernel namespace and the one or more kernel queue pairs to the kernelspace driver, updates the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs, and registers the device in the driver, the device being the NVMe block device storage.

Example 23 may include the at least one computer-readable storage medium of Example 22, the data structure comprising data structure metadata comprising one or more of admission queue physical addresses, completion queue physical addresses, and queue address or queue-size physical queue addresses.

Example 24 may include the at least one computer readable storage medium of example 22, wherein the one or more kernel queue pairs comprise one or more of a management queue pair comprising a management admission queue and a management completion queue, and one or more of a driver input device. An output queue pair, comprising a driver admission queue and a driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue.

Example 25 may include the at least one computer-readable storage medium of Example 22, wherein the instructions, when executed, cause a computing device to initialize the userspace driver using the data structure metadata, where the userspace driver is a call-mode driver, wherein initializing the userspace driver further causes the computing device to retrieve the user configuration information and the data structure metadata, generate the device based on the user configuration information and the data structure metadata, update the data structure with the user-space queue-pair metadata, and update a block device Interface to the device registered with the userspace driver.

Example 26 may include the at least one computer-readable storage medium of Example 22, wherein the volatile storage comprises Random Access Memory (RAM), e.g. Dynamic random access memory (DRAM), static random access memory (SRAM) and / or synchronous dynamic random access memory (SDRAM), and wherein the nonvolatile memory comprises nonvolatile random access memory, e.g. Semiconductor memory, 3D crosspoint memory, one or more Memory devices using a chalcogenide phase change material, byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide-nitride-oxide-silicon (SONOS) memory, polymer memory, e.g. B. ferroelectric polymer memory, ferroelectric transistor random access memory (Fe-TRAM), Ovonikspeicher, nanowire memory and / or electrically erasable programmable read-only memory (EEPROM), wherein the semiconductor memory planar or 3-dimensional (3D) NAND flash memory and wherein the 3D crosspoint memory comprises at least one of a non-transistor stackable crosspoint architecture, wherein the memory cells are located at an intersection of word lines and bit lines and the memory cells are individually addressable, and the bit storage is based on a change in the track resistance ,

Example 27 may include the at least one computer-readable storage medium of any of Examples 22 to 26, wherein the instructions, when executed, cause a computing device to receive the one or more memory access requests from the one or more applications through the binary-branched driver accessing the file system device storage and / or the NVMe block device storage processing the one or more memory access requests using the binary-branched driver using the memory controller communicatively coupled to the binary-branched driver based on the one or more memory access requests of the one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user space queue pairs and updates the data structure using the store synchronization, wherein if the one or more memory access requests is a read request, the one or more memory access requests are routed to the user space driver using the binary-branched driver, and wherein if one or more of the memory access requests multiple memory access requests is a write request that one or more memory access requests are routed to the kernelspace driver using the binary-branched driver.

Example 28 may include a system comprising means for generating a binary-branched driver using a processor connected to a host memory, wherein the host memory comprises a volatile memory and / or a nonvolatile memory, the binary-branched driver having a A kernel space driver communicatively connected to a kernel file system and comprising a userspace driver communicatively coupled to a device, and processing one or more memory access requests to access the nonvolatile memory using the binary branched driver.

Example 29 may include the system of Example 28, further comprising means for receiving the one or more memory access requests from one or more applications modified to use the binary-branched driver, wherein the means for generating the binary-branched driver retrieves user configuration information used to configure the binary-branched driver using a driver binarizer, the user configuration information comprising a number of input-output queues and a number of namespaces for use with the kernelspace driver and the userspace driver, wherein the one or more applications comprise a read-intensive application and / or a write-intensive application, and wherein the one or more memory access requests comprise a read request and / or a write request.

Example 30 may include the system of Example 28, further comprising means for initializing the kernelspace driver, comprising means for generating a data structure in a shared memory space of the host memory, the host memory comprising a driver, the driver manages the kernel space driver via the binarized driver, wherein the shared memory space is accessible via a binarizer name space pair comprising a kernel namespace and a user namespace, the nonvolatile storage comprising file system device storage and NVMe block storage. Initializing the kernelspace driver may further include means for generating the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host memory, means for mapping the kernel namespace, and the one or more kernel queue pairs to the kernel space driver, means for updating the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs, and means for registering the file system Device storage in the driver, the device being the NVMe block device storage.

Example 31 may include the system of Example 30, wherein the data structure comprises data structure metadata that includes one or more of admission queue physical addresses, completion queue physical addresses, and queue queue or queue address physical queue addresses.

Example 32 may include the system of Example 30, wherein the one or more kernel queue pairs comprise one or more of a management queue pair comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair comprising a driver admission queue and a driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue.

Example 33 may include the system of Example 30, wherein the volatile memory includes Random Access Memory (RAM), e.g. Dynamic random access memory (DRAM), static random access memory (SRAM) and / or synchronous dynamic random access memory (SDRAM), and wherein the nonvolatile memory comprises nonvolatile random access memory, e.g. Semiconductor memory, 3D crosspoint memory, one or more memory devices using a chalcogenide phase change material, byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide nitride oxide silicon (SONOS) memory, polymer memory, e.g. B. ferroelectric polymer memory, ferroelectric transistor random access memory (Fe-TRAM), Ovonikspeicher, nanowire memory and / or electrically erasable programmable read-only memory (EEPROM), wherein the semiconductor memory planar or 3-dimensional (3D) NAND flash memory and wherein the 3D crosspoint memory comprises at least one of a non-transistor stackable crosspoint architecture, wherein the memory cells are located at an intersection of word lines and bit lines and the memory cells are individually addressable, and the bit storage is based on a change in the track resistance ,

Example 34 may include the system of any of Examples 30 to 33, further comprising means for initializing the user space driver using the data structure metadata, wherein the user space driver is a call mode driver, wherein initializing the userspace driver is a means for retrieving the user configuration information and the data structure metadata, means for generating the device based on the user configuration information and the data structure metadata, means for updating the data structure with the user space queue pair metadata, and means for registering a block device interface the device in the Userspace driver includes. Initializing the user space driver further includes means for receiving the one or more memory access requests from the one or more applications through the binary branch driver to access the file system device storage and / or the NVMe block device storage, means for processing the one or more memory access requests using the binary-branched driver, means for updating one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user-space queue pairs based on the one or more memory access requests using the memory controller communicatively connected to the binary-branched driver, and means for synchronizing the data structure using the memory controller, wherein, if one or more of the memory controllers multiple memory access requests being a read request, passing the one or more memory access requests to the userspace driver using the binary-branched driver, and wherein, if the one or more memory access requests is a write request, the one or more memory access requests be routed to the kernelspace driver using the binary-branched driver.

The embodiments are applicable to use with all types of integrated circuit semiconductor chips ("IC chips"). Examples of these IC chips include, but are not limited to, processors, controllers, chipset components, programmable logic arrays (PLAs), memory chips, network chips, systems on chip (SoCs), SSD / NAND controller chipsets. ASICs and the like. In addition, in some of the drawings, signal lines are represented by lines. Some may be represented differently to display a plurality of individual signal paths, have a numerical identifier to indicate a number of individual signal paths, and / or have arrows at one or more ends to indicate a major direction of the information flow. However, this should not be construed restrictively. Instead, such additional details may be used in conjunction with one or more exemplary embodiments to facilitate easier understanding of a circuit. All illustrated signal lines, with or without additional information, may actually comprise one or more signals which may be multi-directional and may be implemented with any suitable type of signal scheme, e.g. As digital or analog lines, which are realized with differential pairs, optical fibers and / or asymmetric lines.

Exemplary sizes / models / values / ranges may have been given, although the embodiments are not limited to these. Because manufacturing techniques (eg, photolithography) have become obsolete after some time, it is believed that devices of smaller sizes could be manufactured in the future. In addition, in the figures, well-known voltage / ground connections to IC chips and other components are or may not be shown to simplify the illustration and discussion, and not to obscure certain aspects of the embodiments. Furthermore, arrangements may be shown in block diagram form to avoid embodiments becoming obscure, and also in view of the fact that specific details relating to the realization of such block diagram arrangements are highly dependent on the computer system within which the embodiment is to be implemented ie such specific details should be readily available to those skilled in the art. Although specific details (eg, circuits) are set forth to describe example embodiments, it should be understood by those skilled in the art that the embodiments may be practiced without these specific details or variations thereof. The description is therefore to be considered as illustrative and not restrictive.

The term "connected" may be used herein to refer to any type of relationship, directly or indirectly, between the components concerned and may be applied to electrical, mechanical, fluid, optical, electromagnetic, electromechanical or other connections become. In addition, the terms "first," "second," etc., may be used herein to merely simplify the discussion and have no particular temporal or chronological relevance, unless otherwise specified.

As used in the present application and claims, a list of elements associated with the term "one or more of" may mean any combination of the listed terms. For example, the terms "one or more of A, B and C" may be A; B; C; A and B; A and C; B and C or A, B and C mean.

Those skilled in the art will recognize from the foregoing description that the broad techniques of the embodiments can be implemented in a variety of forms. Therefore, while the embodiments have been described in connection with particular examples thereof, the true scope of the embodiments should not be so limited since other modifications will become apparent to those skilled in the art upon consideration of the drawings, the specification, and the following claims.

Claims (26)

System comprising: a host memory comprising a volatile memory and / or a nonvolatile memory; and a memory controller communicatively coupled to the host memory, the memory controller comprising a binary-branched driver for processing one or more memory access requests to access the non-volatile memory, the binary-branched driver a kernel space driver communicatively coupled to a kernel file system and includes a userspace driver communicatively connected to a device. System after Claim 1 and further comprising a driver binarizer for generating the binarized driver, wherein the driver binarizer retrieves user configuration information used to configure the binarized driver, wherein the user configuration information comprises a number of input-output queues and a number of namespaces for use for the kernelspace driver and the userspace driver, wherein the one or more memory access requests are received from one or more applications modified to utilize the binary-branched driver, and wherein the one or more applications are a read-intensive application or include a write-intensive application. System after Claim 2 wherein the driver binarizer initializes the kernelspace driver, wherein the driver binarizer: generates a data structure in a shared memory space of the host memory, the host memory including a driver, wherein the driver routes the kernelspace driver over the binarized one Driver, wherein shared memory space is accessible through a binarizer name space pair, the binarizer name space pair comprising a kernel namespace and a user namespace, wherein the nonvolatile memory includes file system device storage and Non-Volatile Memory (NVM) Express (NVMe) block device storage; in the host memory, generating the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more userspace queue pairs; assigns the kernel namespace and the one or more kernel queue pairs to the kernelspace driver; update the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs; and register the device in the driver, the device being the NVMe block device storage. System after Claim 3 wherein the data structure comprises data structure metadata that includes one or more of admission queue physical addresses, completion queue physical addresses, and queue address or queue orphan queue physical addresses. System after Claim 3 wherein the one or more kernel queue pairs comprise one or more of a management queue pair, comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair, comprising a driver admission queue and a Driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue. System after Claim 3 wherein the driver binarizer: using the data structure metadata, initializes the userspace driver, the user space driver being a call mode driver, the driver binarizer: retrieving the user configuration information and the data structure metadata; generate the device based on the user configuration information and the data structure metadata; updated the data structure with the userspace queue pair metadata; and registering a block device interface with the device to the user space driver. System after Claim 3 wherein the binary-branched driver is communicatively coupled to the memory controller, and wherein the binary-branched driver: receives from the one or more applications the one or more memory access requests to access the file system device storage and / or the NVMe block device storage; processing the one or more memory access requests; using one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user space queue pairs, based on the one or more memory access requests; and synchronizes the data structure using the memory controller. System after Claim 3 wherein the volatile memory comprises Random Access Memory (RAM), e.g. One or more of Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), and Synchronous Dynamic Random Access Memory (SDRAM), and wherein nonvolatile memory includes nonvolatile random access memory, e.g. Semiconductor memory, 3D crosspoint memory, one or more memory devices using a chalcogenide phase change material, byte addressable nonvolatile memory devices, ferroelectric memory, silicon oxide nitride oxide silicon (SONOS) memory, polymer memory, e.g. B. ferroelectric polymer memory, ferroelectric transistor random access memory (Fe-TRAM), Ovonikspeicher, nanowire memory and / or electrically erasable programmable read-only memory (EEPROM), wherein the semiconductor memory planar or 3-dimensional (3D) NAND flash memory and wherein the 3D crosspoint memory comprises at least one of a non-transistor stackable crosspoint architecture, wherein the memory cells are located at an intersection of word lines and bit lines and the memory cells are individually addressable, and the bit storage is based on a change in the track resistance , System after Claim 8 wherein, if the one or more memory access requests is a read request, the binary branch driver directs the one or more memory access requests to the userspace driver. System according to one of Claims 2 to 8th wherein, if the one or more memory access requests is a write request, the binary branch driver directs the one or more memory access requests to the kernelspace driver. A method of sharing a Non-Volatile Memory (NVM) Express (NVMe) device, comprising: generating a binary-branched driver using a processor connected to a host memory, wherein the host memory is a volatile memory and or a non-volatile memory, the binary-branched driver comprising: a kernel space driver communicatively connected to a kernel file system and a userspace driver communicatively connected to a device; and processing one or more memory access requests to access the nonvolatile memory using the binary-branched driver. Method according to Claim 11 further comprising receiving the one or more memory access requests from one or more applications modified to use the binary-branched driver, wherein generating the binarized driver retrieves user configuration information used to configure the binary-branched driver using a driver binarizer, wherein the user configuration information comprises a number of input-output queues and a number of namespaces for use with the kernelspace driver and the userspace driver, the one or more applications having a read-intensive application and / or application write-intensive application, and wherein the one or more memory access requests comprise a read request and / or a write request. Method according to Claim 12 , further comprising: initializing the kernel space driver, comprising: generating a data structure in a shared memory space of the host memory, the host memory including a driver, wherein the driver manages the kernel space driver through the binary branched driver, wherein the shared memory space via a binary branch name space pair accessibility, wherein the binary branch name space pair comprises a kernel namespace and a user namespace, the nonvolatile memory comprising file system device storage and NVMe block storage; Generating the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host memory; Associating the kernel namespace and the one or more kernel queue pairs with the kernelspace driver; Updating the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs; and registering the device in the driver, the device being the NVMe block device storage. Method according to Claim 13 wherein the data structure comprises data structure metadata that includes one or more of admission queue physical addresses, completion queue physical addresses, and queue address or queue orphan queue physical addresses. Method according to Claim 13 wherein the one or more kernel queue pairs comprise one or more of a management queue pair, comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair, comprising a driver admission queue and a Driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue. Method according to Claim 13 further comprising: initializing the userspace driver using the data structure metadata, the user space driver being a call mode driver, wherein initializing the userspace driver comprises: retrieving the user configuration information and the data structure metadata; Generating the device based on the user configuration information and the data structure metadata; Updating the data structure with the userspace queue pair metadata; and registering a block device interface with the device at the userspace driver. Method according to Claim 13 further comprising: receiving the one or more memory access requests by the binary-branched driver from the one or more applications to access the file system device storage and / or the NVMe block device storage, Processing the one or more memory access requests using the binary branched driver, updating one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more user space queue pairs based on the one or the plurality of memory access requests using a memory controller communicatively connected to the binary-branched driver; and synchronizing the data structure using the memory controller. Method according to one of Claims 12 to 17 wherein if the one or more memory access requests is a read request, the one or more memory access requests are routed to the userspace driver using the binary-branched driver, and wherein if the one or more memory access requests is a write request that one or more memory access requests are routed to the kernelspace driver using the binary-branched driver. A computer-readable storage medium or a plurality of computer-readable storage media, comprising a set of instructions which, when executed by a computing device, causes the computing device to: using a processor connected to a host memory, generates a binary-branched driver, the host memory comprising a volatile memory and / or a nonvolatile memory, wherein the binary-branched driver comprises: a kernel space driver communicatively connected to a kernel file system, and a userspace driver communicatively connected to a device; and using the binary-branched driver processes one or more memory access requests to access the nonvolatile memory. Computer readable storage medium or multiple computer readable storage media Claim 19 wherein the instructions, when executed, further cause the computing device: to receive the one or more memory access requests from one or more applications modified to utilize the binary-branched driver using a driver binary arbiter the binary-branched driver comprising, retrieving user configuration information used to configure the binary-branched driver, wherein the user configuration information comprises a number of input-output queues and a number of namespaces for use with the kernel space driver and the userspace driver, the one or more applications comprise a read-intensive application and / or a write-intensive application, and wherein the one or more memory access requests comprise a read request and / or a write request. Computer readable storage medium or multiple computer readable storage media Claim 19 wherein the instructions, when executed, further cause the computing device to: initialize the kernelspace driver, wherein initializing the kernelspace driver further causes the computing device to: generate a data structure in a shared memory space of the host memory; wherein the host memory comprises a driver, wherein the driver manages the kernel space driver via the binary branched driver, wherein the shared memory space is accessible via a binarizer name space pair, the binarizer name space pair comprising a kernel namespace and a user namespace wherein the nonvolatile memory comprises file system device storage and Non-Volatile Memory (NVM) Express (NVMe) block device storage; the kernel namespace, one or more kernel queue pairs, the user namespace, and one or more user space queue pairs in the host memory; assigns the kernel namespace and the one or more kernel queue pairs to the kernelspace driver; update the data structure with kernel queue pair metadata identifying the kernel namespace and the one or more kernel queue pairs; and register the device in the driver, the device being the NVMe block device storage. Computer readable storage medium or multiple computer readable storage media Claim 21 wherein the data structure comprises data structure metadata comprising one or more of admission queue physical addresses, completion queue physical addresses, and physical addresses of Queue size or queue Doorbell registers. Computer readable storage medium or multiple computer readable storage media Claim 21 wherein the one or more kernel queue pairs comprise one or more of a management queue pair, comprising a management admission queue and a management completion queue, and one or more of a driver input-output queue pair, comprising a driver admission queue and a driver completion queue, and wherein the one or more user space queue pairs comprise a userspace admission queue and a userspace completion queue. Computer readable storage medium or multiple computer readable storage media Claim 21 wherein, when executed, the instructions further cause the computing device to: initialize the user space driver using the data structure metadata, the user space driver being a call mode driver, wherein initializing the userspace driver further causes that the computing device: retrieves the user configuration information and the data structure metadata; generates the device based on the user configuration information and the data structure metadata; updated the data structure with the userspace queue pair metadata; and register a block device interface to the device at the userspace driver. Computer-readable storage medium or a plurality of computer-readable storage media according to one of Claims 21 to 24 wherein the instructions, when executed, further cause the computer device: to receive, by the binary-branched driver, the one or more memory access requests from the one or more applications to access the file system device storage and / or the NVMe block device storage; processing the one or more memory access requests using the binary-branched driver; using the memory controller communicatively coupled to the binary-branched driver, one or more of the kernel namespace, the user namespace, the one or more kernel queue pairs, and the one or more of the one or more memory access requests Updated user space queue pairs; synchronizing the data structure using the memory controller, wherein if the one or more memory access requests is a read request, the one or more memory access requests are directed to the userspace driver using the binary-branched driver, and wherein if it is the one or more memory access requests is a write request, the one or more memory access requests are routed to the kernelspace driver using the binary-branched driver. A system comprising means for carrying out the method according to any one of Claims 11 to 17 ,

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