DE1067131B - Method for producing a semiconductor arrangement with an edge layer produced between a metal layer and the surface of the semiconductor crystal - Google Patents
Method for producing a semiconductor arrangement with an edge layer produced between a metal layer and the surface of the semiconductor crystalInfo
- Publication number
- DE1067131B DE1067131B DENDAT1067131D DE1067131DA DE1067131B DE 1067131 B DE1067131 B DE 1067131B DE NDAT1067131 D DENDAT1067131 D DE NDAT1067131D DE 1067131D A DE1067131D A DE 1067131DA DE 1067131 B DE1067131 B DE 1067131B
- Authority
- DE
- Germany
- Prior art keywords
- layer
- semiconductor
- foreign
- oxide
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 35
- 229910052751 metal Inorganic materials 0.000 title claims description 13
- 239000002184 metal Substances 0.000 title claims description 13
- 239000013078 crystal Substances 0.000 title claims description 9
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000034 method Methods 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 230000007547 defect Effects 0.000 claims description 3
- 230000001427 coherent effect Effects 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 238000004381 surface treatment Methods 0.000 claims description 2
- 150000003609 titanium compounds Chemical class 0.000 claims description 2
- 239000004408 titanium dioxide Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims 5
- 239000010703 silicon Substances 0.000 claims 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 150000004770 chalcogenides Chemical class 0.000 claims 2
- 239000002800 charge carrier Substances 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims 2
- 239000000126 substance Substances 0.000 claims 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 150000001875 compounds Chemical class 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 claims 1
- 239000010949 copper Substances 0.000 claims 1
- 229910052732 germanium Inorganic materials 0.000 claims 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-N hydrofluoric acid Substances F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims 1
- 239000007788 liquid Substances 0.000 claims 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 claims 1
- 239000003921 oil Substances 0.000 claims 1
- SOQBVABWOPYFQZ-UHFFFAOYSA-N oxygen(2-);titanium(4+) Chemical class [O-2].[O-2].[Ti+4] SOQBVABWOPYFQZ-UHFFFAOYSA-N 0.000 claims 1
- 230000000737 periodic effect Effects 0.000 claims 1
- 230000000704 physical effect Effects 0.000 claims 1
- 238000005498 polishing Methods 0.000 claims 1
- 229910052709 silver Inorganic materials 0.000 claims 1
- 239000004332 silver Substances 0.000 claims 1
- 238000010025 steaming Methods 0.000 claims 1
- 150000004763 sulfides Chemical class 0.000 claims 1
- 229910052717 sulfur Inorganic materials 0.000 claims 1
- 239000011593 sulfur Substances 0.000 claims 1
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 claims 1
- 150000004772 tellurides Chemical class 0.000 claims 1
- 229910052714 tellurium Inorganic materials 0.000 claims 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims 1
- 230000002277 temperature effect Effects 0.000 claims 1
- 238000005496 tempering Methods 0.000 claims 1
- 238000007740 vapor deposition Methods 0.000 claims 1
- 238000005019 vapor deposition process Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 18
- 239000002344 surface layer Substances 0.000 description 2
- 229910052798 chalcogen Inorganic materials 0.000 description 1
- 150000001787 chalcogens Chemical class 0.000 description 1
- 239000003610 charcoal Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Electrodes Of Semiconductors (AREA)
- Electroplating Methods And Accessories (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
.■r.t-iritf-«-inirmr-rr. ■ r.t-iritf - «- inirmr-rr
ix. 21g 11/02ix. 21g 11/02
ÜTSCHES PATENTAMTÜTSCHES PATENT OFFICE
S41996VIIIc/2IgS41996VIIIc / 2Ig
βCKANNTM4CHONC
OrRASMtLDONG
CND ACSCABE OCS
At)SLECESCUHtFr: IS. O KTO B E R 1959βCKANNTM4CHONC
OrRASMtLDONG
CND ACSCABE OCS
At) SLECESCUHtFr: IS. O KTO BER 1959
Die Erfindung bezieht sich .auf ein Verfahren zum Herstellen einer Halbleiteranordnung, beispielsweise Richtleiter oder Transistor, mit einer' zwischen einer ^ίctallschicht und der Oberfläche des Halbleiterkristalls erzeugten RandschichtThe invention relates .auf a method for Manufacture of a semiconductor device, for example Directional conductor or transistor, with a 'between one ^ ίctallschicht and the surface of the semiconductor crystal generated surface layer
Bei · Transistormikrophonen. also einer auf dem Transistorprinzip, beruhenden Anordnung zur Umwandlung mechanischer in elektrische Schwingungen, ist es bereits bekanntgeworden, eine sehr dünne Schicht von etwa 10-4Cm Stärke auf der Oberfläche 10-des verwendeten, n-leitcnden Halbleiters zur Erzeugung der gewünschten Transistorwirkung in eine p-lcitende Schicht umzuformen, auf der Kohleköroer. einen Kontakt bilden, wie es vom Emitter oder Kotlcktor eines Spitzentransistors her bekannt ist.With transistor microphones. Thus, one on the transistor principle arrangement based for converting mechanical into electric vibrations, it has already become known, a very thin layer of about 10- 4 cm thick on the surface 10 of the used n-leitcnden semiconductor to produce the desired transistor action in a Form p-lite layer on the charcoal. form a contact, as it is known from the emitter or kotlcktor of a tip transistor.
In der Hauptpatentanmeldung ist ein Verfahren zum .■ Herstellen einer Halbleiteranordnung, beispielsweise Richtleiter oder Transistor, beschrieben, mit einer zwischen einer Metallschicht und der Oberfläche des Halbleiterkristalis erzeugten Randschicht, bei dem ao die zwischen dem Halbleiterkristall und der Metallschicht befindliche Halbleiteroberfläche extrem gereinigt und auf der von jeder Fremdschicht befreiten Halbleiteroberfläche durch entsprechende weitere Oberflächenbehandlung eine in sich reine, homogene. zusammenhängende, im Vergleich zur Randschicht sehr dünne, beispielsweise '/ιο»μ Dicke aufweisende. Oxydschicht erzeugt wird, auf tier dann die Metallschicht aufgebracht wird. Es"isfin der HauptpatentajtmddunjJ^witterhirT ausgeführt, daß diese Fremdschicht aus einem oder mehreren Oxyden besteht, und es sind Verfahren zur Herstellung dieser Schicht angegeben. Zweckjjer Fremdschicht ist eine Vergrößerung der R"ärnl*perrwirkung.~d. h. eine Erhöhung der Sperrspannung i)ei gleichzeitiger Erniedrigung des Sperrstromes. · 'The main patent application describes a method for. ■ Manufacturing a semiconductor arrangement, for example a directional conductor or transistor, with an edge layer produced between a metal layer and the surface of the semiconductor crystal, in which the semiconductor surface located between the semiconductor crystal and the metal layer is extremely cleaned and on the The semiconductor surface freed from every foreign layer is inherently pure and homogeneous by appropriate further surface treatment. coherent, compared to the edge layer very thin, for example '/ ιο »μ thickness. Oxide layer is generated, a uf t i he then the M etallschicht brought to wi rd. It "is executed isfin the HauptpatentajtmddunjJ ^ witterhirT that these foreign layer consists of one or more oxides, and are given process for the production of this layer. Zweckjjer Fremdsc hicht e is an Enlarge ung the R "* ärnl perrwirkung. ~ ie, an increase in the reverse voltage i) ei simultaneously reducing the reverse current. · '
Erfindungsgemäß wird eine Weiterbildung <tes Verfahrens gemäß der Hauptpatentanmeldung. weicht auf Grund weiterer experimenteller Untersuchungen und theoretischer Überlegungen über mögliche Deutungen »o der durch die technischen Maßnahmen erziehen Wirkung ermöglicht worden ist. dadurch erreicht, daß an Stelle der Oxydschicht eine Fremdschicht verwendet wird, die aus einem oder mehreren Chalkogentden. ausgenommen den Oxyden, verzugsweisc des Halbleitermaterial und/oder einer Titanverbindung, beispielsweise Titandioxid, besteht oder solche enthält.According to the invention, there is a further development of the method according to the main patent application. gives way on the basis of further experimental investigations and theoretical considerations about possible interpretations, or the effect made possible by the technical measures. achieved in that instead of the oxide layer, a foreign layer is used which consists of one or more chalcogens. with the exception of the oxides, including the semiconductor material and / or a titanium compound, for example titanium dioxide, consists or contains such.
Die Erfindung geht von der Überlegung aus, daß die Beschaffenheit der zwischen Halbleiteroberfläche und Metalikoatakt befindlichen Fremdschicht infolge ihrer geringen Dicke von weniger als 1 μ. im allgemeinen sogar weniger als Vf u. besondere Eigenschaften hat, welche teilweise als Isolatoreigenschaften, teilweise als HalbfcrtgreigffnscfiäTten zu deuten sind.The invention is based on the consideration that the nature of the between semiconductor surface and metal coatacts due to their small thickness of less than 1 μ. generally even less than Vf and special properties has, which are to be interpreted partly as isolator properties, partly as semi-protective properties.
Verfahren zum HerstellenMethod of manufacture
einer Halbleiteranordnunga semiconductor device
mit einer zwischen einer Metallschichtwith one between a metal layer
und der Oberfläche des HalbleiterkristaUsand the surface of the semiconductor crystal
erzeugten Randschichtgenerated surface layer
Zusatz zur Patentanmeldung S 40844 VHIc/21 j (Auslegwduiil 1044 286}Addition to patent application S 40844 VHIc / 21 j (Auslegwduiil 1044 286}
g kr Sauerstoff unter Umständeng kr oxygen under certain circumstances
durch eine auf dem Halbleiter befindliche OxydMrhicht gebunden werden kann..Durch die Anwesenheit des Sauerstoffes auf der Oberfläche eines n-leitcndea Halbleiters.— nur tür einen solchen gilt die Betrachtung von Mott — werden an der Oberfläche des Halb; Idters Defektelektronen erzeugt, welche eineAnhet» des verbotenen Bandes am Rande des Halbleiterby an oxide layer on the semiconductor can be bound..By the presence of oxygen on the surface of an n-conductive cndea Semiconductor.— Mott's consideration is only valid for such a thing — become on the surface of the half; Idters creates defect electrons which of the forbidden tape on the edge of the semiconductor
Anmelder: Siemens & Halske Aktiengesellschaft,Applicant: Siemens & Halske Aktiengesellschaft,
Berlin und München, München 2, Wittelsbadierplatz 2Berlin and Munich, Munich 2, Wittelsbadierplatz 2
und Dr. Heinrich Kniepkamp, München-Solln,and Dr. Heinrich Kniepkamp, Munich-Solln,
sind als Erfinder genannt wordenhave been named as inventors
'. An Hand der Zeichnung seien' zwei mögliche Deutungen der durch die Erfindung herbeigeführten Wirkung diskutiert. ; '. Using the drawing, two possible interpretations of the effect brought about by the invention will be discussed. ;
In Fig. 1 bedeutet .1 den Halbleiter, beispielsweise. dm-n_Siliziun)kri>taU. und 2 die darauf angeordnete MetaÜscliicht, iHiispielsweise eine Goldschicht. Zwischen beiden Schichten- bildet sich an der Trennfläche bekanntlieh cine S'»genannte Schottky sehe Randaperr-.schicht mit "entsprechender Bandaufbäumung (dicke Linien) aus. Xach Untersuchungen von Mot t wird die Sperrwirkung wesentlich erhöht bzw. ermögliclit da- ■ durch, daß'sich freier Sauerstciffjn düiinster Sc.hicljt auf der Oberfläche des Halbleiters t>eimdetTTlott gibt an. daßIn Fig. 1, .1 means the semiconductor, for example. dm-n _Siliziun) kri > taU. and 2 the metal layer arranged thereon, for example a gold layer. Between the two layers, a Schottky, known as a Schottky, see Randaperr layer with corresponding banding (thick lines) is formed at the interface ' free sour tciffjn darkest look on the surface of the semiconductor t> eimdetTTlott indicates that
Claims (3)
Fremdschicht bis zu etwa 1Zj μ stark sein kann und daß
sie zweckmäßig dicker als '/»μ, mindestens jedoch
Vim> μ sein soll.the foreign layer provided according to the invention, ao rtalbleite? gfufi3suBstanz ^ * S te consists for example in particular oxide layer, thicker than that according to Mott of oxides or other chalcogenides, which presupposed oxide layer. The foreign layer, if necessary due to the disturbance of the stoichiometric of the invention, should namely be pure and homogeneous and should be connected as far as possible in equilibrium according to the principle of controlled Vain. These requirements are p- or η-conductive in the desired manner, according to MOtt's considerations, it should not be considered sulfides or tellurides or titanium oxides, for example because the oxide layer itself in the theoretical ΤΠΧ. KonTm ^^ eispicTs "weiseTiierfuT" in "question * see consideration is disregarded and the application of the Freradschicht goes only as a carrier for the effective oxygen serves. Retail Space of the semiconductor crystal ahead, with the layer after Erfindjung unless they a pure, single 30 treatment of silicon particularly an already vorfache oxide layer is to be applied as an insulating beaten mixture of 40> / "hydrofluoric acid and see what is so thick that it is formed hanging and homogeneous in well-fuming nitric acid, and that has been found to Temperature effect can be penetrated by the charge carriers 35 an oxygen or oxygen-containing atmosphere annex with the ex- posed. If necessary, instead of the treatment, attempts made has been shown that the
Foreign layer up to about 1 Zj μ can be strong and that
it is expediently thicker than '/ »μ, but at least
Vim should be> μ.
Zwischenschicht4 erheblich dickeren Schichten auch
THKh andere physikalische Wirkungen auftreten können, sei an Hand der Fig. 2 eine andere'Überlegung
durchgeführt, welche bei der Schichtbildung'nach der 45 werden kann. Erfindung ebenfalls Platz greifen kann und möglicher- Die Erfindung bezieht sich hauptsächlich auf Halbweise zusätzlich zur ersten Deutungsart in Betracht leiter, wie Germanium, Silicium. Verbindungen von kommt. Hiernach besteht die dünne Fremdschicht, Elementen der III. und, V., IL und VI., I. und welche mit 3 bezeichnet ist., aus einer halblgjtendcn VII. Gruppe des Periodischen Systems sowie deren Substanz, die beispielsweise" oluTch ein Gemisch so Mehtfachverbindungen. . . . mehrerer Oxyde zustande kommen kann. Dabei ist es
wichtig, daß diese Schicht den entgegengesetzten Lci-As with such in relation to the Mottschen
Intermediate layer 4 considerably thicker layers too
THKh other physical effects can occur, consider a different consideration with reference to FIG
carried out, which can be carried out during the layer formation after 45. Invention can also take place and possible- The invention relates mainly to semi-conductor in addition to the first type of interpretation into consideration, such as germanium, silicon. Connections come from. After that, the thin foreign layer, elements of III. and, V., IL and VI., I. and which is denoted by 3., from a semi-sequential VII group of the Periodic Table and their substances, which, for example, are a mixture of multiple compounds... of several oxides can. It is
important that this layer the e ent gegengeset zth LCI
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES40844A DE1044286B (en) | 1954-09-15 | 1954-09-15 | Method for producing a semiconductor arrangement, for example a directional conductor or transistor |
DES0041996 | 1954-12-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1067131B true DE1067131B (en) | 1959-10-15 |
Family
ID=25995175
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DENDAT1067131D Pending DE1067131B (en) | 1954-09-15 | Method for producing a semiconductor arrangement with an edge layer produced between a metal layer and the surface of the semiconductor crystal | |
DES40844A Pending DE1044286B (en) | 1954-09-15 | 1954-09-15 | Method for producing a semiconductor arrangement, for example a directional conductor or transistor |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DES40844A Pending DE1044286B (en) | 1954-09-15 | 1954-09-15 | Method for producing a semiconductor arrangement, for example a directional conductor or transistor |
Country Status (3)
Country | Link |
---|---|
DE (2) | DE1044286B (en) |
FR (1) | FR1126109A (en) |
GB (1) | GB814527A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL210216A (en) * | 1955-12-02 | |||
US3099576A (en) * | 1960-06-24 | 1963-07-30 | Clevite Corp | Selective gold plating of semiconductor contacts |
NL128768C (en) * | 1960-12-09 | |||
DE1194986B (en) * | 1961-07-15 | 1965-06-16 | Siemens Ag | Tunnel diode with partially falling current-voltage characteristic |
US3666913A (en) * | 1966-09-14 | 1972-05-30 | Texas Instruments Inc | Method of bonding a component lead to a copper etched circuit board lead |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2402839A (en) * | 1941-03-27 | 1946-06-25 | Bell Telephone Labor Inc | Electrical translating device utilizing silicon |
US2497770A (en) * | 1948-12-29 | 1950-02-14 | Bell Telephone Labor Inc | Transistor-microphone |
-
0
- DE DENDAT1067131D patent/DE1067131B/en active Pending
-
1954
- 1954-09-15 DE DES40844A patent/DE1044286B/en active Pending
-
1955
- 1955-06-13 FR FR1126109D patent/FR1126109A/en not_active Expired
- 1955-06-23 GB GB1819655A patent/GB814527A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR1126109A (en) | 1956-11-15 |
DE1044286B (en) | 1958-11-20 |
GB814527A (en) | 1959-06-10 |
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