DE10340030A1 - Clock regenerator for high data rate optical signal has frequency multiplier that produces modulation signal from clock signal with multiple of clock signal frequency and its fundamental frequency - Google Patents

Abstract

The device has an optical modulator (2) receiving the optical signal and a modulation signal, a series circuit with an optoelectronic converter (3), a filter (5) and possibly an electrical amplifier (4,6) for obtaining a comparison signal and a phase comparator (6) receiving the comparison signal and a clock signal from a controllable oscillator (9). A frequency multiplier (10) produces the modulation signal from the clock signal with a multiple of the clock signal frequency and its fundamental frequency.

Description

The The invention relates to a data regenerator according to the preamble of Claim 1.

One important aspect in the realization of optical transmission systems is the Recovery of Clock signals from the received signal. At very high bit rate Optical Time Domain Multiplexing (OTDM) with transfer rates of 80 GBit / s, 160 GBit / s and higher is at the current state of technology only with assistance of optical components a recovery possible from clock signals, have the sub-frequencies of the multiplexed signal. Preferably Clock signals regenerates, the basic data rate of the individual signals correspond.

Out Proceeding LEOS '99, 1999, Paper TuZ5, pp. 349-350 is a clock regenerator known at the multiplex signal in an electro-absorption modulator with modulated in a phase locked loop (PLL) generated clock signal is, the modulated signal is implemented opto-electrically, then a Frequency comparison performed with the clock signal and the resulting signal filtered and fed to an oscillator as a control signal, which generates the clock signal. This procedure is for data rates up to about 40 GBit / s.

For higher data rates is in Electronic Letters, 9th November 2000, Vol. 23, pp. 1951, 1952 described a clock regenerator, the two connected in series Electroabsorption modulators, of which the first with the doubled frequency of the clock fundamental works, and the second as the modulation frequency, the output signal of the controlled oscillator uses. The result of this "concatenated" EA modulation is a Output signal in which the data rate multiplied by both Frequency of the clock signal as well as the clock signal itself modulated is. The multiplied clock signal ensures the necessary Short switching sections.

task The invention is to further simplify this circuit.

These The object is achieved by a clock regenerator according to claim 1.

advantage This clock regenerator is one of the more expensive EA modulators can be saved. This is possible by the frequency multiplier generates a modulation signal with the multiple clock signal frequency, which at the same time also includes a portion of the fundamental frequency of the clock signal. Both modulation steps are in contrast to the known method performed in a single modulator.

The Use of an EA modulator has in addition to its stability and its compact dimensions due to the non-linear modulation characteristic the advantage that the amplitude of the clock signal component in the modulated Signal MB is increased.

Advantageous is also a quadrupling of the clock signal to generate the modulation signal. ever higher the Modulation frequency, the shorter are the switching windows and thus the quality of the clock regenerator. The options for multiplying the clock signal frequency, however, are due limited component properties. A quadruple is at one duty cycle of the binary signal at least required for the regenerated clock signal of 16 to 1, otherwise too many pulses of the binary signal due to a too long Switching windows come and the operation of the phase discriminator affect.

Preferably becomes a clock signal at the data rate of one of the TDM single signals generated. The remaining Clock signals can use this be derived to perform a demultiplexing.

One embodiment The invention will be explained in more detail with reference to figures.

It demonstrate

1 a schematic diagram of the clock regenerator,

2 a modulation signal,

3 a modulated data signal,

4 a clock signal and

5 a schematic diagram of a frequency multiplier.

The schematic diagram 1 shows a clock regenerator with a phase-locked loop of optical and electrical components. A high data rate optical signal of, for example, 160 Gbit / s, which contains a plurality of individual signals, for example as a time-division multiplexed signal (TDM signal), is input 1 of an Electroabsorption Modulator (EAM) 2 fed. The optical signal is preferably a binary signal or, for example, by limiting in a fiber amplifier converted into a binary signal multistage amplitude or Phase-modulated signal (in principle, the circuit also works with statistically distributed data eg in multi-level amplitude modulation). The optical signal is modulated with an (electrical) modulation signal MOS. The modulation signal includes both the frequency of a clock signal TS whose frequency preferably corresponds to the basic data rate of one of the TDM individual signals of, for example, 10 Gbit / s, as well as a higher frequency signal S _f4 (see 5 ) with multiple frequency of the clock signal TS. In general, a DC voltage component is added to the modulation signal MOS in order to obtain a suitable operating point.

2 shows the modulation signal MOS as a result of the modulated with the clock signal TS multiplied clock signal S _f4 . The time axis is divided into picoseconds ps. The modulation index is chosen only so large that the switching characteristics of the higher frequency are maintained, but large enough that the lower frequency component "f" of the clock signal TS is clearly distinguished from the "modulated binary signal" MB. Thus, a sufficiently large signal component of the clock signal can be easily recovered by filtering. The non-linear characteristic of an EA modulator supports this effect, as even slightly higher modulation voltage is converted into a considerably larger output signal.

At the output of the modulator is an opto-electrical converter (photodiode) 3 turned on, their output signal in an electrical amplifier 4 amplified, then in a filter 5 filtered and optionally again amplified as a comparison signal SV a phase comparator 7 is supplied, the output signal as a control signal ST via a loop filter 8th optionally including a ripple filter, a controlled oscillator 9 is supplied. This generates the clock signal TS, which is the phase comparator 7 as well as the frequency multiplier 10 is supplied and via a clock signal output 11 is delivered. The further TDM individual signals associated clock signals can be generated by phase shifting of this clock signal TS.

5 shows a schematic diagram of the frequency multiplier. It contains a frequency squarer on essential elements 10.1 , an electrical modulator 10.2 and an adder 10.3 , The frequency "f" of the clock signal TS becomes in the frequency squarer 10.1 quadrupled. This is regarded here as an ideal element and therefore provides a higher-frequency output signal S _f4 , which no longer contains the frequency of the clock signal. Therefore, the higher-frequency signal S _{f4 is} modulated with the clock signal TS to the in 2 shown modulation signal for driving the EA modulator 2 to create. In realized frequency multipliers, however, this component is usually already included in the output signal. About the adder 10.3 only a DC voltage DC is inserted to the desired operating point of the EA modulator 2 adjust.

Claims (6)

Clock regenerator for a high-speed optical signal (BS) with an optical modulator ( 2 ), to which the optical signal (BS) and a modulation signal (MOS) is supplied, with a modulator ( 2 ) downstream series connection of an optoelectronic transducer ( 3 ), a filter ( 5 ) and optionally an electrical amplifier ( 4 . 6 ) for obtaining a comparison signal (SV), with a phase comparator ( 6 ), the comparison signal (VS) and one of a controllable oscillator ( 9 ) delivered clock signal (TS), characterized in that the frequency multiplier ( 10 ) from the clock signal (TS) generates the modulation signal (MOS), which contains both a multiple frequency (f ⁴ ) of the clock signal (TS) and its fundamental frequency (f). Clock regenerator according to claim 1, characterized in that as an optical modulator ( 2 ) An electroabsorption modulator is used. Clock regenerator according to claim 1 or 2, characterized in that the frequency multiplier ( 10 ) is generated as an output signal with the clock signal (TS) modulated modulation signal (MOS). Clock regenerator according to claim 3, characterized in that the frequency multiplier ( 10 ) is designed as a frequency squarer. Clock regenerator according to claim 1 or 2, characterized in that the optical modulator ( 2 ) is supplied as an optical signal (BS), an optical binary signal or an optical signal converted into an optical binary signal. Clock regenerator according to claim 1 or 2, characterized in that the frequency multiplier ( 10 ) is designed as a frequency quadrature and that the optical modulator ( 2 ) is supplied as an optical signal (BS), an optical binary signal or an optical signal converted into an optical binary signal.