DE10334014A1 - Peripheral chipset for implementing hardware functions of engine control device, comprises two units, one with power supplies, interfaces, relay controller etc, and one with eighteen-way power output stage etc. - Google Patents

Abstract

The chipset comprises two units. The first unit (1) has a power supply with different output voltages, three sensor supplies, a monitoring module (1g), a driver (1e) for bidirectional serial interfaces, a CAN-driver with wake-up function, a main relay controller (1c, a main relay output stage, a serial peripheral interface (SPI), and a stop/wakeup counter (1d). The second unit (2) includes an eighteen-way power output stage (2a) rated at 0.6 to 3 A, two low-level output stages (2b), and a five-volt monitor (2d). An independent claim is included for an engine control device.

Description

The present invention relates to a peripheral chip set for realizing hardware functions a control unit as well as an engine control unit with a peripheral chipset according to the invention.

Modern control devices, especially for engine control consist of a computer core (microcontroller) and a peripheral chipset to realize the required Hardware features. This peripheral chip set typically consists of various application-specific integrated circuits (ASICs) and other electronic assemblies. The division of the required functions on the various ASICs and modules of the peripheral chipset is called partitioning.

A peripheral chip set of the engine control unit generation according to the prior art typically has a partitioning comprising two ASICs. A first ASIC is provided, which has the following components: a voltage supply with three different output voltages; three sensor supplies, each providing a voltage of 5 volts, a monitoring module, two drivers for bidirectional serial interfaces, a CAN driver, four open-drain small signal output stages, a main relay control, a main relay output stage, an evaluation circuit for inductive sensors. A second ASIC (ASIC 2 ), has an eighteen-fold power output stage with nominal currents from 0.6 to 3 amps as well as 5 volt monitoring. It should be noted that the abbreviation CAN stands for "controller area network". This is understood to mean a standardized serial bus system for motor vehicles for realizing a mutual exchange of information and data between a large number of electronic control units.

The aim of the invention is to create an innovative To provide partitioning of a peripheral chipset, which can be used flexibly and therefore meets future requirements can be. This particularly affects the partitioning of the Peripheral chipset for the next ECUs generation for petrol and / or diesel engines. In particular, the aim is to use a basic functionality as possible provide few components, this basic functionality if necessary should be expandable in a simple manner.

This goal is achieved with a Peripheral chipset with the features of claim 1 and an engine control unit with the features of claim 8.

Advantage of invention

An inventive peripheral chipset for Realization of hardware functions of a control unit points at least two electronic units that have a partitioning allow to provide at least one basic functionality for a control unit. These first and / or second electronic units can typically designed as an application-specific electronic circuit (ASIC) his.

The first ASIC for deployment a basic functionality of the control unit can preferably have the following components: a power supply with in particular four different output voltages, at least one, in particular three sensor supplies, a monitoring module, a driver for bidirectional serial interfaces, a CAN driver, especially with wake-up function (Wake-up function), a main relay control, a main relay output stage, an SPI interface (abbreviation for serial Periphal Interface), a stop / wake-up counter.

A second ASIC for deployment a basic functionality of the control unit can have the following components: in particular as an eighteen-fold power output stage trained power amplifier with different nominal currents. According to the invention, such Nominal currents sizes between 0.6 and 3 amps. Furthermore, the second ASIC preferably has one, in particular two small signal output stages and 5 volt monitoring on.

These two first and second electronic Units or ASICs are used to provide basic functionality Controller, especially an engine control unit required.

This basic functionality is from those hardware components Fulfills, the independent from the formation of an injection system or customer requirements for the Presentation of an engine management system for certain market segments always needed become.

With this configuration according to the invention, the partitioning of the peripheral chip set is adapted to future requirements. An additional advantage of the new partitioning is its great flexibility. The basic functionality of a control unit can thus already be represented with two electronic units or ASICs. This enables cost-effective coverage of the low-price segment. In particular, individual basic functionalities can be provided modularly with a few, in particular two, electronic units or ASICs. It is therefore not necessary that complex basic ASICs are used for these basic functionalities have to.

The peripheral chipset according to the invention can optionally at least one additional Have electronic unit, which also expediently as an application-specific integrated circuit (ASIC) can be formed and a partitioning to provide at least one that goes beyond the at least one basic functionality of the control device functionality allowed. This aspect of the invention is particularly advantageous if if such additional Requirements are of different types, but not everyone control unit Fulfills Need to become. Such concrete requirements can be due to the modular Construction of the peripheral chipset through specific use trained electronic units can be realized.

Thus, in particular, special functionalities of the control unit be partitioned flexibly, individually or rationally.

An optional additional electronic Unit, which can also be designed as an ASIC, can do the following Components include: an eight-channel analog to digital converter; a, in particular two small signal output stages; a driver for bidirectional serial interfaces. Another additional electronic Unit, in particular in the form of an ASIC, can in particular be a Evaluation circuit for have an inductive transmitter.

Such electronic units are to provide a basic functionality of a control unit, in particular Engine control unit, not absolutely necessary, they are preferably used for expansion the functions of the peripheral chipset.

According to the invention, the structure of an electronic Unity of new requirements, what basic functionalities as well as going beyond basic functionalities Functional requirements concerns vary. Individual electronic units can do this Components that have the components specifically mentioned according to the invention replace or supplement. In particular when building the further electronic units, different ones can Components in different variations are used, so that concrete tasks can be carried out.

Furthermore, an inventive peripheral chip set has preferably at least one microcontroller or computer core. The function of this computer core is control, regulation and diagnosis of an entire engine management system. The peripheral chip set can optionally be in separate modules, for example with integrated circuits, have the following components: at least one evaluation device for at least one lambda probe, at least An additional CAN driver, at least one additional one Power output stage, and / or at least one injection system specific Final stage. Partitioning can be carried out by means of such separate assemblies a control unit, especially engine control unit, can be modularly adapted to the respective requirements.

In a further embodiment of the invention the first sensor supply provides a first voltage and the second Sensor supply a second voltage ready, the third sensor supply can be switched between the first voltage and the second voltage and represents either the first tension or the second tension ready. In a concrete embodiment In the invention, the first voltage can be 5 volts and the second voltage 3.3 volts, so the third sensor supply is between 5 volts and 3.3 volts switchable.

According to the invention, the peripheral chip set is for a control device, in particular for a Engine control unit a future Generation, especially for Suitable for petrol and diesel engines. The engine control unit can as a control device for a fuel injection system can be formed.

The peripheral chip set according to the invention serves the provision of hardware functions for a control unit, in particular for a Engine control unit of a motor vehicle, in particular for a fuel injection system. The peripheral chipset is modular and consists of integrated application-specific Elementary circuits to provide a basic functionality of the control unit and optionally with application-specific integrated supplementary circuits to provide over the basic functionality additional requirements for the control unit. Due to the flexible and modular design of the peripheral chipset, which is built according to the requirements is an individual resizing to specific functionalities a control unit realizable.

The present invention will now based on the attached Drawing explained further. In this shows

1 a schematic block diagram of a preferred embodiment of the peripheral chipset according to the invention.

In the 1 is, according to a preferred embodiment of the invention, a specific partitioning of a peripheral chip set 100 shown schematically. The peripheral chip set according to the invention 100 has a first ASIC as the first electronic unit 1 (Power Supply), a second ASIC as a second electronic unit 2 (Universal Power Drivers), as a third, supplementary electronic unit, a third ASIC 3 ("ADC" chip), an injection control device 4 (Injection power stage) and a computer core 5 (Microcontroller) on. It is provided that in addition to the computer core 5 as the central facility the first ASIC 1 as well as the second ASIC 2 to provide the basic functionality of a control unit 200 serve. Everyone else in Components of the peripheral chip set shown in the figure 100 are only for the provision of the basic functionality of the control unit 200 additional requirements are provided.

The first ASIC 1 has a reset device 1a (Reset), an ignition input 1b (Ignition-Input), a main relay control device 1c (Main-Relay-Controll), a wake-up device 1d (Wake-up), a serial peripheral interface 1e , a driver 1f for bidirectional serial interfaces (ISO driver), a monitoring device 1g (Supervisor), a stop / wakeup counter 1h , a power supply and a CAN driver 1i (CAN driver) on. In other preferred embodiments of the invention, individual components of the first ASIC can 1 be supplemented by other components. In addition, the peripheral chipset 100 two CAN drivers in separate modules 11 . 12 (CAN driver) and an inductive sensor 13 (Inductive Sensor) as an optional extension.

The second ASIC 2 has an eighteen-fold power amplifier 2a , which can alternatively be designed as a sixteen-fold power amplifier (low-side driver), two small signal amplifiers 2 B (Small Signal Driver), a uS bus 2c , as a serial interface between the computer core 5 (Microcontroller) and the ASIC 2 , as well as a 5 volt monitoring 2d (5V monitor). In the second ASIC 2 is optionally at least one additional power driver in a separate module 21 (Additional Power Driver) assigned, this can have multiple power output stages.

The supplementary ASIC 3 has a 5V analog / digital converter 3a with eight channels (ADC channels) an SPI interface 3b , two small signal output stages 3c with a diagnostic device 3d as well as a driver 3e for bidirectional serial interfaces (ISO Driver). The peripheral chipset can also optionally have two lambda sensors 31 (Lambda evaluation) as an optional extension.

The microcontroller used for the function of the peripheral chipset 5 or computer core has an integrated flash 5a , an integrated SRAM 5b as well as intelligent peripherals 5c on. The microcontroller 5 are optional an external flash 51 and an external SRAM 52 assigned. Should be by means of the peripheral chipset 100 A control device for a fuel injection system is provided, an injection system-specific output stage 4 required.

Depending on the requirements placed on the functionality of a control unit, a peripheral chipset can be used 100 according to the 1 be trained. Because of the possibility according to the invention, a peripheral chip set 100 The controller's hardware functions can be individually partitioned to create a flexible and modular structure. Individual components of the peripheral chipset 100 , like in the 1 shown, other components can be added to the respective requirements.

Claims (9)

Peripheral chipset for realizing hardware functions of a control device that has at least two electronic units that ensure partitioning to provide a basic functionality of the control device, in which the first electronic unit ( 1 ) - a power supply with different output voltages, - at least one, especially three sensor supplies, - a monitoring module ( 1g ), - a driver ( 1e ) for bidirectional serial interfaces, - a CAN driver ( 1i ), especially with wake-up or wake-up function, - a main relay control ( 1c ), - a main relay output stage, - a serial peripheral interface (SPI), and - a stop / wake-up counter ( 1d ), and / or the second electronic unit ( 1 . 2 ) - a power amplifier, especially an eighteen-fold power amplifier ( 2a ), in particular with nominal currents between 0.6 A and 3 A, - at least one, especially two small signal output stages ( 2 B ), and - voltage monitoring, in particular five-volt monitoring ( 2d ), having. Peripheral chipset ( 100 ) according to claim 1, optionally at least one additional electronic unit ( 3 ) which has a partitioning to provide a basic functionality of the control unit ( 200 ) allows additional functionality and has the following components: - an analog / digital converter ( 3a ) with in particular eight channels, - one, in particular two small signal output stages ( 3c ), - a driver ( 3b ) for bidirectional serial interfaces. Peripheral chipset ( 100 ) according to one of claims 1 or 2, optionally at least one additional electronic unit ( 4 ), which allows partitioning to provide functionality that goes beyond the basic functionality of the control unit and has an evaluation circuit for inductive sensors. Peripheral chipset ( 100 ) according to one of Claims 1 to 3, in which at least one electronic unit ( 1 . 2 . 3 . 4 ) is designed as an application-specific electronic circuit. Peripheral chip set according to one of the preceding claims, comprising a computing core ( 5 ) or mic rocontroller. Peripheral chip set according to one of the preceding claims, optionally with - at least one evaluation device for at least one lambda probe ( 31 . 32 ), - at least one additional CAN driver ( 11 . 12 ), - at least one additional power stage ( 21 ), - at least one injection system-specific output stage ( 4 ), whereby these components are housed in particular in separate assemblies. A peripheral chip set according to claim 1, wherein one first sensor supply provides a first voltage of in particular 5 V, a second sensor supply a second voltage of in particular 3.3 V provides and a third donor supply to provide a voltage between the first voltage of in particular 5 V and the second voltage of 3.3 V in particular is switchable. Engine control unit, in particular for a motor vehicle with at least one peripheral chip set ( 100 ) according to one of claims 1 to 7. Engine control unit according to claim 8, which as a control device for an engine management system, in particular fuel injection system is formed.