DE10294299D2 - Method for recognizing memory errors in electronic brake systems, computer system and its use - Google Patents
Method for recognizing memory errors in electronic brake systems, computer system and its useInfo
- Publication number
- DE10294299D2 DE10294299D2 DE10294299T DE10294299T DE10294299D2 DE 10294299 D2 DE10294299 D2 DE 10294299D2 DE 10294299 T DE10294299 T DE 10294299T DE 10294299 T DE10294299 T DE 10294299T DE 10294299 D2 DE10294299 D2 DE 10294299D2
- Authority
- DE
- Germany
- Prior art keywords
- computer system
- brake systems
- electronic brake
- memory errors
- recognizing memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/1208—Error catch memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C2029/5606—Error catch memory
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
- Valves And Accessory Devices For Braking Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10294299T DE10294299D2 (en) | 2001-09-13 | 2002-09-04 | Method for recognizing memory errors in electronic brake systems, computer system and its use |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10145227 | 2001-09-13 | ||
DE10162345 | 2001-12-18 | ||
DE10294299T DE10294299D2 (en) | 2001-09-13 | 2002-09-04 | Method for recognizing memory errors in electronic brake systems, computer system and its use |
PCT/EP2002/009891 WO2003025936A2 (en) | 2001-09-13 | 2002-09-04 | Method for identifying memory errors in electronic braking systems, computer system and the use thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
DE10294299D2 true DE10294299D2 (en) | 2004-07-22 |
Family
ID=26010128
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10294299T Expired - Lifetime DE10294299D2 (en) | 2001-09-13 | 2002-09-04 | Method for recognizing memory errors in electronic brake systems, computer system and its use |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1428218A2 (en) |
JP (1) | JP2005503624A (en) |
DE (1) | DE10294299D2 (en) |
WO (1) | WO2003025936A2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006038428A1 (en) * | 2006-08-17 | 2008-02-21 | Bayerische Motoren Werke Ag | Method for programming a control unit of a motor vehicle |
DE102016211124A1 (en) * | 2016-06-22 | 2017-12-28 | Robert Bosch Gmbh | Method and device for processing binary code data |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4433388A (en) * | 1980-10-06 | 1984-02-21 | Ncr Corporation | Longitudinal parity |
US5146459A (en) * | 1986-11-28 | 1992-09-08 | Canon Kabushiki Kaisha | Electronic equipment with check-sum function |
DE10018722A1 (en) * | 1999-09-22 | 2001-03-29 | Continental Teves Ag & Co Ohg | Data words storage method for RAM module, by generating error message if readout check bit word does not conform with new check bit word generated from data word |
DE10029141A1 (en) * | 2000-06-14 | 2001-07-12 | Daimler Chrysler Ag | Fault monitoring of memory contents using check sums involves deriving desired new check sum from difference between old and new contents and old check sum before writing new contents |
-
2002
- 2002-09-04 WO PCT/EP2002/009891 patent/WO2003025936A2/en not_active Application Discontinuation
- 2002-09-04 EP EP02762470A patent/EP1428218A2/en not_active Withdrawn
- 2002-09-04 JP JP2003529468A patent/JP2005503624A/en active Pending
- 2002-09-04 DE DE10294299T patent/DE10294299D2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1428218A2 (en) | 2004-06-16 |
WO2003025936A2 (en) | 2003-03-27 |
JP2005503624A (en) | 2005-02-03 |
WO2003025936A3 (en) | 2004-03-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
8130 | Withdrawal | ||
R120 | Application withdrawn or ip right abandoned |
Effective date: 20110226 |