DE10251317B4 - Semiconductor chip - Google Patents

Abstract

Semiconductor chip comprising:
a first main side (1) of a substrate (6) or semiconductor body having an integrated circuit (IC),
at least one electrical conductor (2) on or above this first main side connected to the circuit,
at least one further electrical conductor (3) on or above one of the first main side opposite the second main side (4) and
an electrically conductive connection (5) between said conductors, wherein
the integrated circuit is designed to detect a change in said conductors or their electrical properties,
in which
the electrically conductive connection (5) is provided laterally on the substrate (6) or semiconductor body and is a single conductor strip or a coating surrounding the lateral edge of the substrate (6) or semiconductor body with an electrically conductive material.

Description

The The present invention relates to a semiconductor chip having a protective structure, prevents spying on the integrated circuit shall be. In particular, this invention relates to the extension the sealing of smart card processors.

at the use of semiconductor chips in safety-related areas, especially for smart cards, It is required that the chip against a spying on the circuit protected is. There are there are a number of suggestions which consist of a circuited top of the Somehow cover semiconductor chips and possibly removing to detect this cover through the circuit. So that can be recognized whether the circuit as such is intact but not, whether a housing surrounding the semiconductor chip has been damaged or removed.

protective coatings on the semiconductor chip can be reproduced in a relatively simple manner or their presence be faked with electronic means. After the housing of the semiconductor chip was removed, in particular a semiconductor chip enclosing potting removed The integrated circuit is also from the back accessible to the semiconductor chip, through the semiconductor body or the substrate. Protects against it no protective coating applied to the front of the chip.

In the DE 100 03 112 C1 a semiconductor chip with a shielding arrangement is described in which an electrical shielding arrangement is present on each main side and these shielding arrangements are electrically conductively connected to one another via through-contacts through the substrate.

In WP 98/18102 A1 is an arrangement for the protection of chip modules described in which a sheath is present, the physical Properties controlled by suitable signal transmitters and measuring points so as to be able to check the integrity of the component. Between signalers and measuring points can be electrical Ladder be arranged in the sheath.

In the DE 199 40 759 A1 a vertically integrated circuit arrangement is described in which metal layers are present, which prevent the radiation of electromagnetic fields of the circuit arrangement to the outside.

In the DE 196 39 033 C1 an analysis protection for a semiconductor chip is described, which is formed by a cover with a resonant oscillating circuit of a conductor coil.

In the DE 199 37 262 A1 a transistor-type device is described, in which a gate electrode arranged on a substrate is provided on the upper side with a gate dielectric and an organic semiconductor layer as the channel region, which has source and drain electrodes of conductive polymer.

The DE 696 06 942 T2 describes the use of preceramic polymers as an adhesive for electronic components.

task The present invention is a semiconductor chip with a To provide effective protection against spying on the circuit.

These Task is with the semiconductor chip with the features of the claim 1 solved. Embodiments emerge from the dependent claims.

at the semiconductor chip is on a first main page, which is the integrated Circuit has, the upper side mounted an electrical conductor, which is connected to this circuit. Another electrical Head is on the back available, d. H. on the first main page opposite second main side of the semiconductor chip. On one side of the semiconductor chip there is at least one electrically conductive connection, the the conductor on the top with the other conductor on the back electrically conductively connects. The integrated circuit is designed to a change or to detect interruption of the associated electrical conductors.

In order to Is it possible, determine whether the semiconductor chip manipulated from the back, in particular damaged, becomes. When the semiconductor chip is processed from the back side or when the semiconductor chip is removed from its housing, they change the properties of the connected to the electronic circuit Ladder on the two main pages. This change can be integrated with the Circuit are detected, allowing for improper manipulation the semiconductor chip inferred can be. It can then appropriate countermeasures may be provided.

The further electrical conductors may be components of the housing of the semiconductor chip; therefore they do not need already in the production of the semiconductor chip to be installed. The electrical conductors on top of the first main side of the semiconductor chip may belong to the wiring levels of the integrated circuit. Instead, these conductors may also be separately applied further electrical conductors, for. An organic semiconductor comprising, for example, a polymer. It is essential only that these external conductors are so electrically connected to the integrated circuit, that the circuit is able to determine a change in these conductors. It is within the scope of the invention to connect these conductors with other conductors of the housing; The overall ladder structure checked by the integrated circuit can therefore be very general and very comprehensive.

The following is a more detailed description of examples of the semiconductor chip based on the 1 to 10 ,

The 1 shows a cross section of an embodiment of the semiconductor chip.

The 2 shows a cross section of an embodiment of a packaged semiconductor chip.

The 3 shows a side view of a further embodiment of the semiconductor chip.

In the 4 to 10 Further transistor structures are shown in the diagram.

In the 1 a semiconductor chip is shown in cross-section. On its first main page 1 comprising an integrated circuit IC is an electrical conductor 2 arranged on the upper side. This electrical conductor 2 can z. B. an uppermost level of metallization of the wiring of the integrated circuit. The leader 2 can be structured in a manner which is in itself arbitrary to strip conductors, connection contacts and the like. On the opposite second main page 4 is another electrical conductor 3 attached, in a preferred embodiment for the sake of simplicity, no closer structuring. The other leader 3 For example, a further layer already applied to the wafer from which the semiconductor chips are produced can be applied. or it is in this further conductor to a subsequently applied conductive layer, for. Example, to a component of a semiconductor chip package or an electrically conductive adhesive layer, with which the semiconductor chip is mounted on a support.

In the case of the semiconductor chip, these are on the side of the semiconductor body or substrate 6 arranged electrically conductive connections 5 provided with which the ladder 2 and the other leaders 3 connected to each other. These conductive connections 5 may be individual conductor strips or a surrounding the lateral edge of the semiconductor chip surrounding coating with an electrically conductive material. The embodiment shown thus results in an electrically conductive connection between the integrated circuit IC and a conductor structure extending to the rear side of the semiconductor chip. It is therefore no longer possible to attack the semiconductor chip from any side in order to investigate the integrated circuit therein, without the surrounding conductor structure being changed or interrupted in such a way that this can easily be detected by the integrated circuit. This detection is done in a conventional manner by determining whether the resistors, capacitances or inductances formed by the conductors are changed. The conductor structure can also additionally comprise electrical conductors of the housing, which are likewise connected to the integrated circuit via the external conductors.

In the 2 is a Gehäusehalbleiterchip shown in which the in the 1 illustrated semiconductor chip on a support 10 attached and encapsulated in a direction indicated by the dashed line potting compound. The components of the semiconductor chip according to 2 correspond to those of 1 and are provided with the same reference numerals. The further electrical conductor 3 is in the embodiment according to 2 an electrically conductive adhesive, with which the semiconductor chip on the carrier 10 is appropriate. If the carrier 10 is also electrically conductive, for. As a lead frame (lead frame), this carrier is included in the conductor structure, the change of which can be detected by the integrated circuit. In the embodiment according to 2 Therefore, it can already be determined when the semiconductor chip is removed from this housing. It is not possible in principle here, the carrier 10 without significantly changing the electrical characteristics of the external conductors connected to the electronic circuit.

A preferred embodiment of the semiconductor chip is obtained when the electrical conductor 2 on top of the first main page 1 an intended anyway to protect the semiconductor chip against spying layer of an organic semiconductor, in particular of a polymer is. Hereinafter, such a layer will be referred to as a polymer layer for the sake of simplicity. Organic semiconductors are normally insulators. Power conduction occurs only when the organic material is doped or when it is mounted in an environment where a field effect is generated. It can therefore be with such a material structures according to a field effect realize transistor. In contrast, pn junctions are hardly feasible since the dopants diffuse. However, non-linearities can also be generated by Schottky barriers, which form in a metal-semiconductor transition.

In the case of the semiconductor chip, a conductive doped polymer layer is preferably connected to electrically conductive parts of the housing, and thus specific electrical measured values of the polymer layer are set. An expansion of the semiconductor chip from the housing can be detected by checking the measured values. When the electrical conductor 2 on the top of the semiconductor chip is a polymer layer, the other conductor 3 on the back and the laterally applied to the semiconductor chip connections 5 preferably also polymer layers, which are electrically conductively connected to the first polymer layer. Additional, expensive vertical interconnections through the body of the semiconductor chip can be dispensed with. The backside polymer layer is, for example, doped in an electrically conductive manner.

In the in the 3 in a side view illustrated embodiment is the backside polymer layer 8th a component of a transistor structure. The gate acts as the substrate 6 on the back second main page 4 with an oxide layer as a gate dielectric 7 is provided and so on the applied polymer layer 8th is electrically isolated. The boundary layer between the gate dielectric 7 and the polymer layer 8th forms the channel. It is also a source contact 3a and a drain contact 3b present, with respective electrical connection points to the chip, by shares 2a respectively. 2 B a conductor provided on the first main side are formed via the laterally arranged electrically conductive connections 5 are connected. Lateral Isolations 7a can provide sufficient electrical insulation of the substrate 6 from the leading links 5 be provided. The conductive connections 5 may be formed by conductive doped polymer layers, but also by metal layers, metal pastes or the like.

In the 4 . 5 and 6 are further transistor structures shown in the diagram, the transistor structure of the 3 can replace and thus provide further embodiments. The gate electrode 9 can through the substrate 6 be formed or separately applied and structured. The layer of the gate dielectric 7 separates the gate electrode 9 each from the polymer layer 8th , Laterally to the gate electrode or acting as a gate electrode portion of the substrate are provided for source and drain contacts 3a and 3b in contact with the polymer layer 8th applied.

In the examples of 4 and 6 is the polymer layer as in the example of 3 the outer layer of the component. Such a layer can also be formed by an organic adhesive which is used to glue the chip onto a carrier, for example into a chip card housing. In the example of 5 First, the organic material is deposited and then the material of the source and drain contacts 3a . 3b which here too can be metal or conductive doped organic material.

In the embodiment of 7 is the conductor applied on top of the first main page in three parts 2a . 2 B and 2c structured. The electrically conductive connections 5 . 51 connect these portions of the conductor provided on the first main page 2a . 2 B . 2c each with the gate electrode 9 , the source contact 3a or the drain contact 3b on the second main page. The electrically conductive connections 5 . 51 are strip-shaped in this example as at the gate electrode 9 guided connection 51 is recognizable. At this second main side of the semiconductor chip is the polymer layer 8th applied by the gate electrode 9 by a gate dielectric applied as a further layer 7 is disconnected and on the sides of the source contact 3a and the drain contact 3b wearing. The gate electrode, the source contact and the drain contact may here also preferably be formed by a further doped polymer layer doped in a conductive manner.

In the 8th . 9 and 10 are further transistor structures shown in the diagram, the transistor structure of the 7 can replace and thus provide further embodiments. The reference numerals correspond to the components of the preceding examples; the gate electrode 9 is here each applied as an outer electrode, after the polymer layer 8th and the gate dielectric 7 are made on the second main side of the semiconductor chip.

at The use of organic semiconductors on the semiconductor chip can also the transitional layers between the semiconductor material of the semiconductor chip and this organic Semiconductor material to be evaluated. Depending on the level of Fermi levels a Schottky barrier forms, regardless of whether the substrate of the semiconductor chip or the applied organic semiconductor material n-type, p-type or not doped at all. A characteristic current-voltage characteristic for the Schottky Barrier is material specific and can be used as a security feature be evaluated in the circuit. A removal of the organic Semiconductor material is detected in the circuit.

If the other leader 3 is an organic semiconductor material, may also be formed therein a separate integrated circuit. This results in further control options that further improve the protective function. The organic semiconductor material may also be added to a polymer which is part of the housing as potting compound. For example, PDOT / PSS may be added to the potting compound in a concentration just sufficient to detect removal of potting compound with the integrated circuit.

This Material is in a preferred embodiment in a thin layer applied on the first main side of the semiconductor chip. there a layer thickness below 100 nm is sufficient. It will be applied the actual potting compound in a thick layer (typically 500 microns). A potential attacker may choose the two layers that make up the enclosure do not differentiate and destroyed when peeling off the potting compound also the thin one Semiconductive layer of the same material. This is the security feature removes what is detected by the integrated circuit can.

Lots organic semiconductor materials (in particular n-type doped Semiconductor materials) in the air (exposure to oxygen or water vapor). A Polymer layer is therefore preferably in an inert atmosphere (eg nitrogen) applied and then encapsulated immediately. Such an arrangement is destroyed When opening in the air by itself or changed at least the above mentioned Characteristic curve in a clearly recognizable by the integrated circuit Wise. There are also semiconductors, which are only during the operation of the circuit change into air, but show no noticeable changes before. Especially advantageous in this sense is an n-type doped polymer layer in conjunction with a p-type silicon substrate as the semiconductor body of the chip.

Some the p-n interfaces show electroluminescence. As silicon for radiation in the infrared range permeable is, the occurrence of luminescence in the circuit can be evaluated be provided without waveguides that would be recognizable, must be provided.

When Examples of suitable organic semiconductors are: polyacetylene, Polyaniline, polyenes (such as anthracene, tetracene or pentacene), polythiophene or oligothiophenes and their substituted derivatives, Polypyrroles, poly-p-phenylenes, poly-p-phenylvinylidene, naphthalenedicarboxylic dianhydrides, Naphthalene bisimides, polynaphthalenes, phthalocycanines, copper phthalocycanines or zinc phthalocycanines and their substituted, in particular fluorinated derivatives. These semiconductor materials can also be doped electrically conductive.

1

first Home

2

electrical ladder

2a

proportion of this leader

2 B

proportion of this leader

2c

proportion of this leader

3

Another electrical conductor

3a

Source contact

3b

Drain contact

4

second Home

5

connection

6

substratum

7

Gate dielectric

7a

isolation

8th

polymer layer

9

Gate electrode

10

carrier

51

connection

IC

integrated circuit

Claims (8)

Semiconductor chip comprising: a first main page ( 1 ) of a substrate ( 6 ) or semiconductor body having an integrated circuit (IC), at least one electrical conductor ( 2 ) on or above this first main side, which is connected to the circuit, at least one further electrical conductor ( 3 ) on or above a second main page opposite the first main page ( 4 ) and an electrically conductive connection ( 5 ) between said conductors, the integrated circuit being arranged to detect a change in said conductors or their electrical properties, the electrically conductive connection ( 5 ) laterally on the substrate ( 6 ) or semiconductor body and a single conductor strip or the lateral edge of the substrate ( 6 ) or semiconductor body around surrounding coating with an electrically conductive material. Semiconductor chip according to claim 1, wherein the at least one electrical conductor ( 2 ) on or above the first main page and / or the at least one further electrical conductor ( 3 ) is an organic material on or above the second main side of the semiconductor chip. Semiconductor chip according to Claim 1 or 2, in which the electrically conductive connection ( 5 ) between the conductors is an organic material. Semiconductor chip according to one of Claims 1 to 3, in which the at least one further electrical conductor ( 3 ) comprises an electrically conductive adhesive present on or above the second main side of the semiconductor chip. Semiconductor chip according to one of claims 1 to 4, wherein the at least one further electrical conductor ( 3 ) is a part of a housing of the semiconductor chip. Semiconductor chip according to one of Claims 1 to 5, in which a further electrical conductor ( 3 ) a source contact ( 3a ), a drain contact ( 3b ) and / or a gate electrode ( 9 ) is a transistor structure provided on or above the second main side. Semiconductor chip according to claim 6, wherein on or above the second main side a layer ( 8th ) is made of an organic material that is separated from the gate electrode by a gate dielectric ( 7 ) and on which a source contact ( 3a ) and a drain contact ( 3b ) are arranged via electrically conductive connections ( 5 ) are connected to the integrated circuit. Semiconductor chip according to Claim 7, in which the substrate ( 6 ) is provided as a gate electrode.