DE10247819A1 - Production of a sensor arrangement for digital cameras comprises forming sensor chips having sensor fields on and/or in a substrate, forming a trench around each chip, separating the chips, and joining to form the sensor arrangement - Google Patents

Abstract

Production of a sensor arrangement comprises forming a number of sensor chips having sensor fields on and/or in a substrate, forming a trench around each chip deeper than the depth of the sensor fields in the substrate, separating the chips, and joining the chips to form the sensor arrangement. Independent claims are also included for the following: (1) Sensor arrangement produced by the above process; and (2) Digital camera comprising the above sensor arrangement as image sensor arrangement, and a lens for projecting an image onto the image sensor arrangement.

Description

The invention relates to a method for producing a sensor arrangement, a sensor arrangement and a digital camera.

The technology of the digital camera is becoming increasingly important.

However, it is difficult to find one Image sensor arrangement for a digital camera with a dimension like in the case of a 35mm camera (e.g. 24mm × 36mm) or like in the case of an even bigger camera to realize. For a digital camera with a sensor surface of 24mm x 36mm the advantage of a standard 35mm camera and its optical Lens system also for to be able to use the digital camera. In such a scenario, you should have a system change from an analog camera to a digital one Camera essentially just the back wall the camera can be modified so that a conventional Film replaced by an image sensor arrangement of a suitable dimension becomes.

A problem with the semiconductor technology Manufacture of an image sensor arrangement integrated in a semiconductor substrate is therein to see that when using a photo stepper like that at Many lithography processes use the maximum image field is limited (for example to 19.6mm × 26.Omm with a maximum Diagonal of 31.1mm). Thus, it is only an image field of a limited dimension realizable. Therefore, forming an image sensor arrangement with a size of 24mm x 36mm with only one exposure during lithography possible.

Furthermore, an image sensor with a Image field of 24mm × 36mm so big that due to an inevitable defect density during the Semiconductor processing an achievable yield of functional image sensor arrangements is low and therefore high costs are incurred. In other words with a large-area, one-story image sensor arrangement not expected to yield sufficient yield, so manufacturing such an image sensor arrangement is expensive.

To deal with this problem, according to the status different paths in technology.

On the one hand, the image optics are tried a conventional one Camera on a small sensor arrangement with highly integrated sensor fields adapt. However, leads this generally leads to a deterioration in the image quality. Further it is necessary and complex, the image optics of the camera on the semiconductor technology adapt small sensor arrangement.

A sensor arrangement is also attempted to make with a size which is just below the image field size of the photo stepper. In this case, the standard optics of a camera can be used however, they are expensive and can only be produced with great effort Corrective lenses required. Furthermore, by means of an extension factor to set the exposure parameters of the camera. For example a 36mm × 24mm 35mm film through a digital film measuring 28.7mm × 19.1mm replaced, so falls (due to the effect of the correction optics or a changed Distance between lens and film) on the smaller digital film approximately the same amount of light as usual on the larger 35mm film. Therefore it is often necessary to use complex correction lenses exposure of the digital film. Speaks in this context one from an extension factor.

Another way of generating a sufficient huge Sensor arrangement consists of using a large sensor arrangement multiple exposure of multiple areas of a wafer during processing of the semiconductor substrate. This manufacturing process is however due to the elaborate Multiple exposure and the large chip size of a one-tier sensor arrangement and the associated yield problems are expensive. A complete wafer exposure is due to the required structural fineness for an individual Unsuitable sensor cell.

The invention is based on the problem, a big enough To produce a sensor arrangement with a large number of sensor fields, which is an improved quality and has reduced manufacturing costs.

The problem is solved by a process for producing a sensor arrangement, by means of a sensor arrangement and solved by a digital camera with the features according to the independent claims.

In the method according to the invention A plurality of sensor chips is used to produce a sensor arrangement formed on and / or in a substrate, each one Has a plurality of sensor fields. Furthermore, each of the sensor chips a trench is formed around it which is greater than the depth of the sensor fields in the substrate. A respective sensor chip is separated by from the back of the substrate material of a depth that is at least equal to the difference between the thickness of the substrate and the depth of the trench is. Finally the sensor chips are assembled to form the sensor arrangement.

In addition, a sensor arrangement is according to the invention provided with a plurality of sensor chips, each of which has a plurality of sensor fields. The sensor chips are for formation composed of the sensor arrangement. Each of the sensor chips is produced by forming a sensor chip on and / or in a substrate and a trench of depth around each of the sensor chips is formed, which is greater than the depth of the sensor fields in the substrate. On respective sensor chip is isolated by the back of the substrate material of a depth that is at least equal to the difference between the thickness of the substrate and the depth of the trench is.

In addition, according to the invention is a digital camera with a sensor arrangement with the features described above created as an image sensor arrangement. The digital camera also has a Lens optics for projecting an image onto the image sensor arrangement on.

A basic idea of the invention is to see that a sensor arrangement of a plurality of Sensor chips is composed, the dimensioning of a Sensor chips under Use of a trench surrounding it and thus by means of a lithographic process is defined. This has the advantage that the distance of a sensor field from an edge of its assigned Sensor chips kept very small (on the order of μm) can be. About that in addition, this distance can be set with very high accuracy become. The latter is in turn a consequence of the usability of one lithographically definable limitation of a sensor chip instead of one mechanically defined limitation (e.g. separation by sawing the Wafer).

The depth of the trenches is chosen such that on the back Removal of material from the substrate to separate the sensor chips e.g. integrated circuit components of the sensor chip (sensor fields, Control circuit components, etc.) are protected against destruction. This avoids that when removing material from the substrate such material is removed, the functional components of the Contains sensor chips. For the Case that further integrated below the sensor fields in the substrate Circuit components are formed, the depth of the trenches is such selected that when removing material from the back of the substrate additional Circuit components are protected from damage. So the depth of the trenches preferably chosen at least as large as the thickness of the sensor fields in the substrate plus the thickness more optional additional Circuit components. In other words, the trench is preferred formed with a depth that is greater than the depth of the sensor chip in the substrate, i.e. of the functionally or technically active Area in the substrate. In this area the sensor chip can also Control or readout lines for the individual sensor fields etc. as well as preprocessing electronics (e.g. amplifiers), etc.

Because of the spatially sharply defined boundary The sensor fields on each of the sensor chips can have multiple sensor chips like this that are put together at a boundary between two neighboring sensor chips a (e.g. optically) perceptible disturbance in the regular sequence the sensor chips is avoided. With an image sensor arrangement (e.g. for a camera) configured sensor arrangement are thus disruptive lines at interfaces avoided between adjacent sensor chips that would otherwise be due to a Interruption of the regular sequence of sensor fields can occur in border areas between adjacent sensor chips.

Furthermore, by introducing Trenches to Define a sensor chip with a geometrically ideal edge at the edge of the sensor chip, so that adjacent sensor chips are fitted together precisely can.

The sensor arrangement according to the invention becomes clear not from a one-story component (for example, a large one Piece of silicon) manufactured, but from several small sensor chips (e.g. image sensors), each of which can have the same functionality. this will achieved by processing the sensor chips (i.e. the Formation of the sensor fields, etc.) a sufficiently deep trench etched around the sensor chip becomes. This trench is preferably slightly deeper than the final thickness later of the isolated sensor chips. Due to the adjustment accuracy of a semiconductor technology lithography process can be done on one Edge of a sensor chip arranged sensor field very narrow, typically 1μm and less, around a sensor chip. Inside the etched trench does the wafer still have sufficient stability that process control monitoring (PCM) and a functionality test carried out can be. After a related one Evaluation of the wafer, the wafer is back on its target thickness thinned adding material from the back removed from the wafer (e.g. mechanically ground) becomes. As a result, the sensor chips are separated, whereby each sensor chip has a dimension down to 1 μm and less has a defined size.

Can also be easily implemented, the sensor fields on the sensor chip a precisely defined distance assign to an edge of a sensor chip (again up to one Accuracy of 1μm and less). This accuracy enables a sensor arrangement (a big Image sensor) from a plurality of composite sensor chips (for example small image sensors) by means of assembly.

For the use case of a digital camera occur in a typical Image pixel size from 5μm to 10μm disruptive lines at border areas between adjacent sensor chips usually not on.

According to the invention, several small components are put together in order to achieve a higher yield in sensor production. This makes it possible for a digital camera (for example with the dimensions of a 35 mm camera) to produce an image Produce sor component in which the above-described problems known from the prior art are avoided. By reducing the tolerances due to the definition of sensor chips by means of a trench etching, it is achieved that the composite sensor fields have approximately the same resolution as a one-component sensor arrangement.

By means of sensor chips cut to the same size preferably all have the same size Preserve edges of ideal geometry and therefore very good fitting surfaces. If a uniform mask is used, the tolerance increases reduced. Then the only limiting criterion is the mask resolution is much better than a conventional tolerance when separating sawing a substrate.

When sawing wafers for dicing the wafer chips, the manufacturing tolerance is in the range of 50μm and more. Would one under these circumstances Arranging sensor chips next to each other would have the consequence that the contact points of the individual small image sensors would be resolved in the digital image. With in other words one with regard to the optical perception of a viewer Image does not achieve the same functionality as a large-area image sensor. In particular, would disturbing in border areas Lines occur.

By means of the method according to the invention and of the devices according to the invention the manufacturing tolerance is reduced so much that several Sensor chips can be strung together and the same together optical functionality like a one-story Reach sensor arrangement. Thus, larger and individual due to the modularity small components also cheaper image sensors than according to the state of technology.

Preferred developments of the inventions result from the dependent Claims.

Preferably the sensor chips essentially positive composed. Due to the significantly improved accuracy of fit The sensor arrangement according to the invention is therefore in sensor chips applicable in all areas where a spatially defined composition different components with high spatial accuracy required is.

The trench can be formed in such a way that a distance of one arranged on an edge of a sensor chip Sensor field from an edge is not significantly larger than an extent of the sensor field. In this case it is ensured that in border areas lines between adjacent sensor chips due to a disturbance of the symmetrical arrangement of sensor fields are avoided.

The trench is preferably under Trained using a lithography process. With a Lithography process is a resolution in Range of micrometers (for example 2μm to 3μm) and above. Since the sensor fields often have a Pixel dimension of 5μm up to 10μm can be ensured that interference, distortion or lines at interfaces neighboring sensor chips are avoided.

The trench is preferably under Trained using an etching process. It is particularly preferred to use an anisotropic etching method as the etching method to use a sufficiently steep edge drop at the edge to achieve a sensor chip, which ensures the accuracy of fit Composing adjacent chips is further increased. The etching process can be a Dry etching method his. Alternatively, a wet etching process can be used be used. In general, with the etching process, care must be taken that the undercut, i.e. the isotropic etching component, is kept sufficiently low to form a positive sequence of adjacent ones Ensure sensor chips. Particularly preferred as an etching process is sputter etching or reactive ion etching (RIE, "reactive ion etching ").

The material of the substrate can be under Use of a chemical mechanical polishing process (CMP process) or an etching process become. Alternatively, material can be removed using a laser become.

Different sensor chips can essentially equally sized become. In particular, it is possible different sensor chips using a common Lithography process, that is, a uniform wafer, train. However, it is also possible to use the different ones Sensor chips of the sensor arrangement according to the invention to manufacture from different wafers.

The trench can be formed in such a way that a distance of one arranged on an edge of a sensor chip Sensor field from the edge preferably at most 3 μm, more preferably at most Is 1μm.

Furthermore, the sensor arrangement according to the invention described in more detail. Refinements of the method for producing the sensor arrangement also apply to the sensor arrangement and vice versa.

At least one of the sensor fields can a CCD sensor field, a biosensor field, a capacitance sensor field, a pressure sensor field or an infrared sensor field.

A CCD sensor field ("charge coupled device") is clearly an arrangement of CCD elements, ie integrated components, for converting an optical image into an image of electrical charges by means of photogenerating electrical charges and then converting the charge image into a sequential electrical signal Use of CCD slides gistern.

It can do the same in biosensors be advantageous, the sensor fields of adjacent sensor chips precisely to put together to a high spatial resolution of the To reach the biosensor field. For example, using of a suitable biosensor field growth and a time-dependent functionality of on nerve cells grown in the biosensor field can be detected.

A semiconductor pressure sensor can based on the piezoresistive effect.

It is also possible to use a capacitance sensor field to be used where clearly in the presence of a mechanical Pressure an air gap between two (integrated) capacitor plates and thus the electrical properties of the capacitor are changed. One area of application of the invention is thus a fingertip sensor with a sufficiently large one Dimensioning.

The sensor field can also be an infrared sensor field be, for example for a thermal imaging camera. A thermal imaging camera is based on such infrared sensors that are for Are sensitive to infrared light. CCDs or are particularly suitable Diodes made of HgCdTe (mercury-cadmium telluride). In the Using a thermal imaging camera it may be advantageous to place the sensor below ambient temperature cool to that of the sensor arrangement to keep even emitted infrared radiation low.

Each of the sensor chips preferably has one Multiplexerbereich and a connection pad area, the Sensor chips are composed such that the multiplexer areas and the connection pad areas along at least part of the edge the sensor arrangement are arranged running. In this case the sensor arrangement is clearly formed from a central one Section in which the sensor fields of the sensor chips are arranged. This central area is surrounded by multiplexers for selective Addressing the sensor fields. The electrical Signals from the sensor fields of processing electronics arranged in the vicinity are provided become.

It should also be noted that a Edge seal ("seal ring ") like you is often formed along a border of a chip for protection purposes, can be saved in the sensor chips of the invention. Should one such edge seal are formed, its thickness is preferred so choose (less than 3μm), that the spatial Sequence of sensor fields in border areas between neighboring ones Sensor chips is not noticeably affected.

It should be noted that the substrate can be made of any material. In particular the substrate can be a silicon wafer. Alternatively, the substrate a glass substrate, a ceramic substrate, etc.

An embodiment of the invention is shown in the figures and is explained in more detail below.

Show it:

1A 3 shows a plan view of a sensor chip of a sensor arrangement according to a preferred exemplary embodiment of the invention,

1B an enlarged section of the in 1A sensor chips shown,

2A a wafer with a plurality of sensor chips formed thereon during a method for producing a sensor arrangement according to a preferred exemplary embodiment of the invention,

2 B a cross-sectional view along the in 2A shown section line I-I ',

3A 3 shows a top view of a wafer with a multiplicity of sensor chips at another point in time during the method for producing a sensor arrangement according to the preferred exemplary embodiment of the invention,

38 a cross-sectional view along the in 3A shown section line II-II ',

4A a wafer with a plurality of sensor chips at a further point in time during the method for producing a sensor arrangement according to the preferred exemplary embodiment of the invention,

4B a cross-sectional view along the in 4A shown section line III-III ',

5 a sensor arrangement according to the preferred embodiment of the invention,

6 a wafer with a plurality of sensor chips formed thereon during a method for producing a sensor arrangement according to another preferred exemplary embodiment of the invention.

Same or similar components in different Figures are given the same reference numerals.

The following will refer to 1A a sensor chip 100 a sensor arrangement according to the invention according to a preferred embodiment of the invention.

The sensor chip 100 has a sensor area 101 with a plurality of sensor fields (not shown in 1A ) on that in the sensor area 101 of the sensor chip 100 are arranged in a matrix. The sensor chip also contains 100 a multiplexer area 102 for selective control of the sensor fields of the sensor chip 100 , A connection pad area is located in an edge area of the sensor chip 103 provided on which electrical signals from the sensor fields can be provided for external further processing.

The following will refer to 1B an edge section 104 of the sensor chip 100 described in an enlarged view.

In 1B are a plurality of sensor felts countries 110 shown that on the sensor area 101 of the sensor chip 100 are arranged in a matrix. According to the 1B sensor fields arranged on the right 110 are provided at a distance of 1 μm from this right edge. Each of the sensor fields 110 is formed by means of semiconductor processing, so that the accuracy of the spatial localization of the sensor fields 110 is defined by means of a lithographic process.

In 2A is a silicon wafer 200 shown on the total of twelve sensor chips 100 are trained, each like the one in 1A shown sensor chip 100 is constructed.

In 2 B is a cross-sectional view of the wafer 200 shown along section line II '. Deviating from 2A is in 2 B in preparation of a trench etching process to be carried out later 210 on the surface of the wafer 200 deposited (not shown in 2A ) and structured by means of a photolithographic exposure. This makes the sensor chips 100 with photoresist 210 covered, whereas the entire intermediate areas (scribe frame areas) between adjacent sensor chips 100 of covering with photoresist 210 are free.

The following will refer to 3A the wafer 200 described in a state after the according 2 B with structured photoresist 210 covered arrangement has been subjected to a sputter etching process.

This is followed by the photoresist 210 freed from the arrangement, causing the wafer 200 in the in 3A shown state is obtained. As in 3A are shown between adjacent sensor chips 100 trenches 300 educated.

As in the in 3B shown cross-sectional view along the section line II-II ' 3A shown are different sensor chips due to the sufficiently deep trench etching 100 assigned chip areas 310 created by a spacer area 311 are separated from each other. The width of the trench 300 is 30 μm according to the exemplary embodiment described. The depth of the trench 300 is 300μm according to the described embodiment.

The following will refer to 4A . 4B described how the one with trenches 300 provided wafers 200 into a large number of separate sensor chips 100 is isolated.

This is done using a CMP ("chemical mechanical polishing") process on the back 401 of the silicon wafer 200 Material removed until the material of the spacers 311 is completely removed, so the different sensor chips 100 be mechanically separated from each other.

This is from the in 4B shown cross-sectional view along the section line III-III ' 4A seen. After removing material from the silicon wafer 300 from the back 401 thus become separate sensor chips 100 receive.

As in 4B shown, the adjoining interfaces of adjacent sensor chips are parallel to one another with sufficient accuracy so that the sensor chips 100 Let fit together. In particular, it should be noted that due to the use of a lithography method to define the trenches 300 these can be set with an accuracy of 1μm and less.

The following will refer to 5 a sensor arrangement 500 described according to a preferred embodiment of the invention.

To the in S shown sensor arrangement 500 to get six of the in 4A shown isolated sensor chips 100 fit together precisely and positively, which means that the sensor areas are located in a central area 101 a large total sensor range 501 form that according to 5 from above and below from a total multiplexer area 502 is surrounded. According to 5 on and below the total multiplexer range 502 is a total connection pad area 503 intended.

The size of the sensor areas 101 are selected so that in the assembled state according to 5 the total sensor range 501 has a dimension of 36mm × 24mm and can therefore be operated using standard optics of a conventional 35mm camera. Because the separation of the sensor chips 100 by means of trench etching and thus using a lithography method, it is ensured that also in border areas of adjacent sensor areas 101 the sensor arrangement 500 A sufficiently defined spatial sequence of the sensor fields adjacent there is realized, so that disturbing lines are avoided even in border areas.

The following will refer to 6 a silicon wafer 600 during another method for producing a sensor arrangement according to another preferred exemplary embodiment of the invention.

The processing of the wafer 600 differs in one essential point from the processing of the wafer 200 that referring to 2A to 4B is described. The silicon wafer 600 has a plurality of sensor chips formed thereon 100 on, each of which has a sensor area 101 , a multiplexer area 102 and a connection pad area 103 contains. Unlike the one referring to above 2A to 4B Processing described is the spatial definition of the exact size and the separation of the sensor chips 100 according to 6 not prepared in that in the whole intermediate Area 105 between adjacent sensor chips 100 a vividly common etching trench for all sensor chips 100 is trained. Instead, according to 6 around every sensor chip 100 a separate cavern around it 601 trained, whereas in intermediate wafer areas 602 , that is in areas between different etching trenches 601 , etching is avoided. This is realized by using a lithography and an etching process such as photoresist on the surface of the silicon wafer 600 is deposited and structured that the sensor chips 100 as well as the intermediate wafer areas 602 are covered with photoresist, whereas the surface areas of the silicon wafer 600 in which caustic trench 601 is to be introduced, are free of a covering with photoresist material. In a subsequent etching process, material of the silicon wafer 600 removed by etching such that etching trenches 601 to be generated. The photoresist is then removed from the sensor chips, which are protected from etching 100 and the intermediate wafer areas 602 removed, causing the silicon wafer 600 in the in 6 configuration shown is obtained. According to the exemplary embodiment described, it is thus possible to use the intermediate wafer regions 602 to be used functionally for any purpose, for example with test structures for testing the functionality of the sensor chips 100 to provide.

By etching the back of the silicon wafer 600 can the sensor chips 100 are subsequently separated. After that, the isolated sensor chips 100 for example in the in 5 shown are assembled to form a sensor arrangement according to the invention.

100

Sensor chip

101

sensor range

102

Multiplex heritage kingdom

103

Anschlusspadbereich

104

edge section

105

intermediate area

110

sensor field

200

Silicon wafer

210

photoresist

300

dig

310

Chip areas

311

Spacer region

400

arrangement

401

back

500

Sensor arrangement

501

Total sensor area

502

Total multiplex heritage kingdom

503

Total Anschlusspadbereich

600

Silicon wafer

601

etched trench

602

Wafer intermediate area

Claims (16)

Method for producing a sensor arrangement, in which - one A plurality of sensor chips are formed on and / or in a substrate each of which has a plurality of sensor fields; - for everyone a trench of a depth is formed around the sensor chips, which is bigger as the depth of the sensor fields in the substrate; - a respective one Sensor chip is separated by material from the back of the substrate a depth that is at least equal to the difference between the thickness of the substrate and the depth of the trench; - the sensor chips can be assembled to form the sensor arrangement. The method of claim 1, wherein the sensor chips essentially positive be put together. The method of claim 1 or 2, wherein the trench is formed such that a distance one at an edge of a Sensor chips arranged sensor field from the edge is not essential is bigger as an extension of the sensor field. Method according to one of claims 1 to 3, wherein the trench is formed using a lithography process. Method according to one of claims 1 to 4, wherein the trench using an etching process is trained. A method according to claim 5, in which as an etching process an anisotropic etching process is used. A method according to claim 5 or 6, in which as an etching method a dry etching process is used. Method according to one of claims 5 to 7, in which as an etching method - sputter etching; or - reactive ion etching is used. Method according to one of claims 1 to 8, in the material using the substrate - a chemical mechanical polishing process; or - an etching process worn becomes. Method according to one of claims 1 to 9, in which different Sensor chips are essentially the same size. Method according to one of claims 1 to 10, wherein the trench is formed such that a distance one at an edge of a Sensor chips arranged sensor field from the edge is at most 3μm. Method according to one of claims 1 to 11, wherein the trench is formed such that a distance one at an edge of a Sensor chips arranged sensor field from the edge is at most 1μm. Sensor arrangement With a plurality of sensor chips, each of which has a plurality of sensor fields; - in which the sensor chips for forming the sensor arrangement composite are; - in which each of the sensor chips is made by - on and / or a sensor chip is formed in a substrate; - to the Sensor chips around a trench of a depth that is formed is bigger as the depth of the sensor fields in the substrate; - the sensor chip is singled out by the back of the substrate material of a depth that is at least equal to the difference between the thickness of the substrate and the depth of the trench is. Sensor arrangement according to claim 13, in which at least one of the sensor fields - on CCD sensor field; - on Biosensorfeld; - on Capacity sensor field; - a pressure sensor field; or - on Infrared sensor field is. Sensor arrangement according to claim 13 or 14, wherein each sensor chip has a multiplexer area and a connection pad area has, wherein the sensor chips are composed such that the multiplexer areas and the connection pad areas at least along of a part of the edge of the sensor arrangement arranged running are. digital camera - With a sensor arrangement according to one of the claims 13 to 15 as an image sensor arrangement; - With a lens optic for Project an image onto the image sensor arrangement.