DE102023107454B3 - Control method for a modular multilevel converter with high output quality at high performance - Google Patents

Abstract

The present invention relates to a control method for a modular multilevel converter for generating an output voltage of high granularity, wherein a charge state of a respective at least one DC voltage source of a module is set according to a predetermined voltage value, the output voltage being a summation of all voltage values including the respective module switching state of the modules of a string is formed, and the high granularity of the output voltage is achieved by a predetermined control algorithm, which is based on the consideration of voltage differences between two modules with opposite polarity connection option and comparison with a reference voltage

Description

The present invention relates to a control method for a modular multilevel converter which provides high output quality at high performance. Furthermore, a modular multilevel converter on which the control method is carried out is claimed.

Conventional inverters, for example for traction machines in electric vehicles or for control drives, solar inverters, and the like, usually use simple two-point inverters or two-level inverters or two-level pulse inverters. Two-level inverters usually use a DC intermediate circuit with a capacitor that can be connected directly to a DC voltage source or receives this DC voltage via a mains rectifier, for example. The intermediate circuit contains a capacitor to filter ripples and stabilize voltages. The upper DC link rail is electrically positive, the lower one is negative. Vehicles use 400 V, for example, or more recently 800 V.

Each phase output, for example three for a lathe, is connected to the intermediate circuit via two transistors of a half bridge and can be alternately connected to the positive or negative intermediate circuit connection via these. To generate a voltage with a signal curve other than rectangular, for example with a sinusoidal signal curve, switching modulation is carried out accordingly, for example via pulse duration modulation. The times at the positive and negative DC link connection are selected and modified with a high rate, so-called switching rate or switching frequency or PWM rate, so that a sine wave is created on average over time. However, this output voltage also contains high-frequency deviations, so-called distortions, which lead to various problems.

In addition to the obvious fact that the generated signal does not correspond to a reference signal form and this results in disadvantages for connected consumers, insulation loads, additional heating of the traction machine, misjudgments in machine design, or undesirable current drive represent further problem areas. With regard to the insulation load, strong voltage peaks ( dV/dt) generate displacement currents and partial discharges across insulation materials and degrade the insulation to the point of destruction. The problem with additional heating in the traction machine, which occurs due to eddy currents in the sheets, eddy current and current displacement losses in windings, or magnetic loading, is that this is usually incorrectly attributed to the traction machine itself and not to the inverter. Regarding misjudgment in machine design, it should be said that the distortions obscure an actual limiting element (e.g. magnets, iron, winding). Furthermore, an undesirable current drive occurs because the distortions drive currents through bearings of the traction machine, which leads to corrugation and rapid failure of the bearings. Balls in the bearings are essentially spot welded and then torn away dozens of times (e.g. 20,000 times per second), which leads to degradation of the lubricant, destruction of rolling elements and raceways, and the formation of metal parts in the lubricant.

Since all inverters from the prior art have these disadvantageous effects, there is a need for a so-called test bench inverter of high quality in order to be able to isolate these effects and which allows the respective effects to be quantified. In general, the aim is to have an inverter that is improved in relation to the problem areas mentioned above.

The publication WO 2013/135277 A1 discloses a clamped modular power converter, wherein modules of the power converter are connected either in parallel (to increase the rated current) or in series (to increase the rated voltage). In a series connection, some modules, for example designed as a half-bridge module or as a full-bridge module, can be controlled individually, so that a finer granularity can be achieved during the conversion.

The publication EP 3008782 B1 discloses a multilevel converter with a plurality of modules that can be controlled individually, so that a finer granularity in the conversion can be achieved by minimizing the voltage differences. The modules are designed as half bridges and full bridges. Due to the small voltage differences, stray capacitances can be tolerated better, so that smaller, oil-filled reactance coils can be implemented.

The publication DE 202016102164 U1 discloses a converter with a surge arrester, with converter branches having a plurality of converter cells. By individually controlling each individual converter cell, each switching process only results in a relatively small voltage difference at the AC connection. The converter can be designed as a full or half bridge structure.

Z.Li; et.al: Asymmetrical Modular Multilevel Converter with Sensorless Voltage Control for High-Quality Output. In: IECON 2022 — 48th Annual Conference of the IEEE Industrial Electronics Society. Year: 2022; Conference Papers; Publisher: IEEE R. LIZANA; S. RIVERA; Z.Li; J.LUO; AV PETERCHEV; SM GOETZ: Modular Multilevel Series/Parallel Converter with Switched-Inductor Energy Transfer Between Modules. In: IEEE Transactions on Power Electronics. Year: 2019; Volume: 34, Issue: 5; Journal Articles; Publisher: IEEE, describes a modular multilevel converter with serial and parallel connectivity, in which energy transfer between modules with non-negligible voltage differences can take place via switched inductors.

The publication US 11,056,982 B2 relates to a modular power converter, with all modules connected in series. Each module includes an energy storage and switching devices via which bypass operation, ie bypassing the respective energy storage, can be switched. Depending on the loading of the respective module using series connection or bypass switching, charge equalization can be achieved among all energy storage devices.

The publication Z. Li; et.al: Asymmetrical Modular Multilevel Converter with Sensorless Voltage Control for High-Quality Output. In: IECON 2022 - 48th Annual Conference of the IEEE Industrial Electronics Society. Year: 2022; Conference Papers; Publisher: IEEE, proposes an asymmetrical modular multilevel converter, which functions as a DC/AC converter with high output quality up to a medium voltage range. No control measurements are necessary to control an intermediate circuit voltage.

Modular multilevel converters, for example described in “Goetz, SM; Peterchev, AV; Weyh, T., “Modular Multilevel Converter With Series and Parallel Module Connectivity: Topology and Control,” Power Electronics, IEEE Transactions on, vol. 30, no. 1, pp. 203-215 , 2015. doi: 10.1109/TPEL.2014.2310225, or reconfigurable batteries with cascaded module structures allow dynamic configuration of the serial - and sometimes even parallel - connection of the modules to generate an output voltage with many voltage levels. Conventional systems generate a voltage level with each module, whereby the respective module either connects its internal voltage source to the output voltage in series or does not provide any voltage contribution in the bypass switching state. In contrast to unipolar modules, bipolar modules can contribute with both a positive and a negative voltage level. This means that systems with N unipolar modules have N+1 voltage levels (N module voltages and 0 V), while bipolar systems have 2N+1 levels (N positive and N negative module voltages and 0 V).

Circuits with such modules have high efficiency, for example in contrast to normal power amplifiers, which use transistors as controllable resistors. In addition, the large number of voltage levels enables the generation of a comparatively precise output voltage, compared, for example, to conventional binary inverters with “high” and “low” voltage levels. The advantages are lower interference and higher output quality, which is crucial for professional audio applications, for example in theaters or stadiums. A further advantage is also a reduction in parasitic effects, which previously caused considerable difficulties due to leakage peaks during voltage level transitions, for example in the decomposition of cable and line insulation (examples are magnetic coils in loudspeakers or motor cabling), or because of the considerable high-frequency losses in adjacent areas electronic components, such as loudspeaker magnets or motors), not to mention interference with other electronics by feeding in capacitive and inductive interference. All of this can be an important quality factor, particularly in the audio sector, but can also play a role in the environment of safety-critical electronics. If such amplifier circuits are used particularly in battery-powered means of transport such as airplanes or cars, efficiency, safety and electromagnetic compatibility with neighboring critical units are of crucial importance here.

In order to achieve high output quality, the system would require an unrealistically high number of modules. For just 8 bits, which corresponds to the state of the art in the 1980s and is unacceptable for audio, 256 modules would be necessary. To achieve CompactDisc quality, you would need around 16,000 modules.

In principle, the respective modules could of course also contribute with voltage levels of different sizes, so that the precision of the output voltage increases as the voltage levels become smaller as the voltage levels become smaller. This would also be an analogue/digital conversion or generally correspond to a concept of binary-coded digital signals. An inverter with such modules, suitably designed, could - in contrast to digital small signal electronics - provide a substantial power of, for example, a few hundred watts or even in the kilowatt range to supply traction machines, for example.

The different voltage levels should advantageously decrease by a factor of ½ from module to module (i.e. 1, ½, ¼, 1/8, etc.). An eight-bit resolution with 256 levels would only require eight modules, and a 16-bit resolution or even higher resolutions can be implemented for the first time. However, the use of modules with increasingly fine granulation of voltage levels brings with it a number of serious problems if you want to provide sufficient power for traction machines in addition to precise signals. This is due to the fact that modules with smaller voltage levels can hardly provide any additional power contribution, as this quickly decreases with the voltage value provided. In a binary series, the power decays exponentially, which also happens to be the fastest usable decay rate. The “smaller” modules connected in series also have to handle the entire current flowing to the output, so that together with the voltage level they provide, the respective power share scales poorly. In addition, such an approach takes away the biggest advantage of cascaded modular converters to date, namely that the same module can be used everywhere and production costs can therefore be kept low. The disadvantage is that each module now has to be designed for a specific voltage value. If, on the other hand, the same modules were used, the stored energy in the modules with the lower voltage values would also decrease quickly, even faster than the power drop, since the stored energy in most storage elements (e.g. capacitors) is equal to the square of the voltage drops, which corresponds to a row of 1, ¼, 1/9, 1/16, etc. On the other hand, connecting the modules or their respective voltage elements in parallel would be pointless, since neighboring modules with, for example, half and a quarter of the voltage value would lead to a strong current surge and damage. Here too, previously exploitable technical advantages of parallel connection, such as simple charge equalization, the elimination of module monitoring in contrast to purely serial circuits, or an operating option with switched capacitors, would be lost.

Against this background, it is an object of the present invention to provide a control method for a modular multilevel converter, which, when executed on the modular multilevel converter, provides high output quality at high performance. This should be possible with just a few modules per phase. Furthermore, a modular multilevel converter on which the control method can be carried out should be provided.

To solve the above-mentioned task, a control method for a modular multilevel converter for generating an output voltage of high granularity is proposed, the modular multilevel converter having a controller and a plurality of modules. The modules are arranged via at least one line path to at least one strand, at one end of which a respective output connection for a respective phase of a load is formed. A respective module has at least one DC voltage source and a plurality of semiconductor switches. A respective module switching state is controlled in such a way that the respective at least one DC voltage source does not have a voltage value corresponding to a bypass module switching state, or, depending on the design of the respective module, a positive voltage value corresponding to a series-plus module switching state or a negative voltage value corresponding to a series-minus- Module switching state contributes to an output voltage. A charge state of the respective at least one DC voltage source is set according to a predetermined voltage value. The output voltage is formed from a summation of all voltage values including the respective module switching status of the modules in a string. The high granularity of the output voltage is achieved by a predetermined control algorithm, which is based on the consideration of voltage differences between two modules with opposite polarity connection options and comparison with a reference voltage.

The at least one DC voltage source is formed, for example, by a battery or an electrochemical accumulator or a capacitor or a power supply unit that generates a DC voltage or a DC-DC converter or a photovoltaic cell. This means any form of voltage-generating energy source that provides a direct voltage.

The principle underlying the method according to the invention can be found in abandoning the goal of greatly reducing the module voltage with each step. Instead, according to the invention, voltage differences between the modules are considered, these voltage differences being the essential ones form a legal manipulated variable in order to generate the desired precision. In order to achieve very fine output granularity, these voltage differences are made smaller and smaller. The voltage difference between two modules can be at most half as large as the larger voltage value of the two modules. The advantage of this limitation is that structurally identical modules can be used without incurring major losses in performance or energy storage.

If several modules are used for the same voltage values, it can be advantageous to further reduce a maximum permitted voltage difference between the module voltage, since larger steps can be generated by using the several modules with the same voltage values. An example would be a reduction to less than a quarter of the module voltage that two modules with the same voltage value each have. More generally, this can be formulated in such a way that the maximum permitted voltage difference can be reduced to 1/(2m) of the module voltage that m modules each have as the same voltage value.

If parallel mode is not implemented or applied, the modules do not need to be sorted according to their module voltages. However, if a parallel or quasi-parallel mode is available or can be implemented, sorting the modules according to their module voltages has advantages, since DC voltage sources of neighboring modules then have largely similar voltage values.

In principle, the control method according to the invention can also exploit irregular voltage differences between module voltages. Such irregular voltage differences can develop spontaneously because the modules' respective DC voltage sources are charged or discharged depending on the module switching status. While irregular voltage differences have the advantage that they do not require systematic maintenance, the disadvantage is that they do not guarantee a fixed resolution and a different resolution appears depending on the output amplitude. Irregular voltage differences, particularly spontaneously occurring irregular voltage differences, allow conventional modular multilevel converters and converters with cascaded H-bridges or double H-bridges to provide considerably higher output quality.

An example of regular voltage differences is a binary sequence, which has the same precision as binary sequences in ADCs, but without showing the disadvantages of ever smaller module voltages. For example, the module voltages could follow a voltage ratio, such as {1, 1-1/2, 1-1/4, 1-1/8. 1-1/16, etc.}, whereby the respective voltage values can be distributed arbitrarily across the modules. This means that the voltage differences decrease with the number of modules. Due to the opposite polarity connection according to the invention, for example two modules with module switching states serial-plus and serial-minus, the respective voltage values subtract each other and produce exactly the small voltage step desired at the output. In general, one can also write V _i =1-1/2 ^i-1 for the i-th voltage value V _i from the above sequence, whereby for N modules this results in a resolution of 1/2 ^N-1 and an assignment of the respective voltage value is independent of the order of the serially arranged modules.

In one embodiment of the method according to the invention, the predetermined voltage values are selected according to a power sequence. Any power sequence is formed over a value a, for example a=2, so that the i-th voltage value results in V _i =1-1/a ^i-1 . With larger values of a, there is a smaller energy loss in the modules because the voltage values of the respective DC voltage sources are more similar to one another. An energy content E of all modules then results in E = Σ _i ½ C _i V _i ² = ½ C Σ _i (1-1/a ^i-1 ) ² . Since the capacitance C should be the same for all of the capacitors considered as a DC voltage source, it can be taken in front of the sum. However, for a not equal to two, different resolutions result for all voltage values.

The control method according to the invention works via the difference between the voltages, such as the difference to a different module voltage according to a power sequence.

The control method according to the invention can use various methods to generate the different module voltages. Module voltages mean the respective voltages of the DC voltage sources arranged in the modules, such as capacitors or batteries. As is known from the prior art, the DC voltage source is charged during operation if its module is connected in series-plus and a current flowing through the module to the output connection, hereinafter referred to as module current, has a negative sign, or if the module is connected in series-plus. minus is connected and the module current has a positive sign, or the DC voltage source is discharged if whose module is connected in serial-plus and the module current has a positive sign, or if the module is connected in serial-minus and the module current has a negative sign. It is also known to keep module voltages approximately balanced, as achieved, for example, by charge equalization methods or scheduling with this aim. Furthermore, the parallel mode between modules, which connects the respective DC voltage sources in parallel, was originally developed to correct voltage differences. In contrast, the charge equalization via module currents, which amount to the load current, can also be used to set the different voltages of the direct current sources according to the method according to the invention.

Furthermore, the respective DC voltage source, for example designed as a capacitor, can be enlarged in order to advantageously keep the voltage more stable and slow down charging/discharging processes. Preferably, a module voltage change ΔV _i should be smaller than it corresponds to a smallest voltage difference caused by the load current I _L flowing through the system during two, better five, even better ten control cycles: ΔV _i = I _L /C ≤ m Δt _control , where m∈{2, 5, 10}. A reconfiguration of the module states is carried out for each control cycle.

Whereas a parallel mode tends to correct voltage differences, a quasi-parallel mode creates systematic voltage differences between modules. For this purpose, an inductance, for example a single inductance or a coupled inductance, is arranged in at least one pairwise connection between modules. As a result, a weak or quasi-parallel mode is formed between the two respective capacitors if there is a certain duty cycle between parallel and other switching states, for example serial plus/minus or bypass, whereby the duty cycle determines a degree of parallelization. The closer the duty cycle is to 1, the higher the degree of parallelization and the smaller the voltage difference. The further away the duty cycle is from 1, the smaller the degree of parallelization and the greater the voltage difference. Accordingly, quasi-parallel mode duty cycle control between two modules or open loop duty cycle adjustment allows precise control of the voltage differences.

While one would consider using a binary representation for module voltages that satisfy a simple binary sequence such as 1, ½, ¼, etc., a different approach is taken here to generate an accurate output voltage. The real challenge in finding the best module circuit state for each module to generate the desired output voltage is to connect as few modules in series as possible to keep losses low and avoid unwanted charge exchange between modules, and as many DC voltage sources as possible in modules to bypass (bypass).

mit einer beliebigen p-Norm (p=1 wäre die Betragsnorm) und s_i ∈ {-1, 0, 1} entsprechend seriell-minus, Bypass, und seriell-plus.In order to determine the best overall state, which includes the module circuit states of all modules, the best module circuit state for each individual module could be searched for at each time step with considerable numerical effort: $$\text{bad}\underset{s_i}{\text{min}}{\Vert v_{\text{ref}}-{\displaystyle {\sum }_{i=1}^N{s}_i{v}_i}\Vert }_p,$$

with an arbitrary p-norm (p=1 would be the magnitude norm) and s _i ∈ {-1, 0, 1} corresponding to serial-minus, bypass, and serial-plus.

gelöst wird. Vorzugsweise hat das Filter F einen Tiefpasscharakter, d. h. lässt Gleichspannung und Frequenzen bis zu einer gewissen Schwelle durch bzw. vermindert oberhalb der Schwelle die Ausgabespannung.This static control rule could be further improved by switching modulation, for example via a filter F, described by a convolution with an impulse response, its transfer function, or a differential equation, at each time step $\text{bad}\underset{s_i}{\text{min}}{\Vert F\left\{v_{\text{ref}}-{\displaystyle {\sum }_{i=1}^N{s}_i{v}_i}\right\}\Vert }_p$

is solved. The filter F preferably has a low-pass character, ie it allows direct voltage and frequencies to pass through up to a certain threshold or reduces the output voltage above the threshold.

Such an optimization procedure seems to be feasible at current computing speeds only for a system with extremely few modules, since the numerical effort increases non-linearly with the number N of modules. Fast heuristic control methods for regulating the output voltage are therefore proposed here, whereby in all control algorithms listed below, an output voltage V _out = Σ _i s _i V _i , with module switching state s _i and module voltage V _i , should generally be generated, which corresponds to a reference voltage V _ref comes as close as possible.

• • Zuordnung der von den Modulen bereitzustellenden Spannungswerte gemäß der Spannungsgröße, so dass der jeweilige Spannungswert V_i mit einem jeweiligen Reihenplatz i im Strang anwächst (dies erfolgt ohne Beschränkung der Allgemeinheit);
• • Ist die Referenzspannung V_ref positiv:
  • ▪ Vom höchsten Reihenplatz an abwärts werden solange Module mit positivem Spannungswert hinzugeschaltet, bis ihre durch Aufsummierung gebildete Gesamtspannung größer als die Referenzspannung V_ref ist;
  • ▪ Falls die Gesamtspannung abzüglich eines Spannungswertes des Moduls mit niedrigstem Reihenplatz unter der gewünschten Ausgabespannung V_out liegen würde, wird dieser Spannungswert negativ zur Gesamtspannung hinzugeschaltet: falls nicht, wird das Modul im Bypass verschaltet.
  • ▪ Im Folgenden werden iterativ solange die folgenden beiden Schritte durchgeführt, bis alle Module Verwendung gefunden haben oder ein verbliebener Spannungsunterschied zwischen Gesamtspannung und der Referenzspannung V_ref unterhalb einer vorgegebenen Abweichungsgrenze liegt, wobei dann verbliebene Module in Bypass geschaltet werden und die aktuelle Gesamtspannung die Ausgabespannung V_out bildet:
    • o falls die aktuelle Gesamtspannung unter der Referenzspannung V_ref liegt, wird ermittelt, ob ein kleinster noch verfügbarer Spannungswert positiv hinzugeschaltet die Gesamtspannung über die Referenzspannung V_ref bringen würde, und falls ja, wird das diesbezügliche Modul seriell-plus geschaltet, oder falls nein, wird das diesbezügliche Modul (also das mit dem kleinsten noch verfügbaren Spannungswert) in Bypass geschaltet;
    • o falls die aktuelle Gesamtspannung oberhalb der Referenzspannung V_ref liegt, wird ermittelt, ob der kleinste noch verfügbare Spannungswert negativ hinzugeschaltet die Gesamtspannung unter die Referenzspannung V_ref bringen würde, und falls ja, wird das diesbezügliche Modul seriell-minus geschaltet, oder falls nein, wird das diesbezügliche Modul in Bypass geschaltet;
  • • Ist die Referenzspannung V_ref negativ werden voranstehende Schritte mit umgekehrten Größenbegriffen durchlaufen (höchster Reihenplatz wird zu niedrigstem Reihenplatz, abwärts zu aufwärts, positiv zu negativ, seriell-plus zu seriell-minus).

In a further embodiment of the control method according to the invention, the predetermined control algorithm is formed by the following steps:

• • Assignment of the voltage values to be provided by the modules according to the voltage magnitude, so that the respective voltage value V _i increases with a respective row location i in the string (this is done without loss of generality);
• • If the reference voltage V _ref is positive:
  • ▪ From the highest row position downwards, modules with a positive voltage value are added until their total voltage, formed by summation, is greater than the reference voltage V _ref ;
  • ▪ If the total voltage minus a voltage value of the module with the lowest row location would be below the desired output voltage V _out , this voltage value is added negatively to the total voltage: if not, the module is connected in bypass.
  • ▪ The following two steps are then carried out iteratively until all modules have been used or a remaining voltage difference between the total voltage and the reference voltage V _ref is below a specified deviation limit, in which case remaining modules are switched to bypass and the current total voltage is the output voltage V _out forms:
    • o if the current total voltage is below the reference voltage V _ref , it is determined whether the smallest available voltage value, switched positive, would bring the total voltage above the reference voltage V _ref , and if so, the relevant module is connected in series-plus, or if no, the relevant module (i.e. the one with the lowest voltage value still available) is switched to bypass;
    • o if the current total voltage is above the reference voltage V _ref , it is determined whether the smallest available voltage value added negatively would bring the total voltage below the reference voltage V _ref , and if so, the relevant module is connected in series-minus, or if no, the relevant module is switched to bypass;
  • • If the reference voltage V _ref is negative, the previous steps are carried out with reversed size terms (highest row position becomes lowest row position, downward to upward, positive to negative, series-plus to series-minus).

• • Zuordnung der von den Modulen bereitzustellenden Spannungswerte gemäß der Spannungsgröße, so dass der jeweilige Spannungswert mit einem jeweiligen Reihenplatz im Strang anwächst;
• • Beliebig ausgesuchte Module werden solange in seriell-plus hinzugeschaltet, bis das jeweils als nächstes ausgesuchte Modul die Gesamtspannung über die Referenzspannung V_ref bringen würde (bspw. können die Module zufällig ausgesucht werden, oder es wird mit dem größten noch verfügbaren i begonnen oder es wird mit dem Modul mit kleinstem noch verfügbaren i begonnen)
• • Aus den verbliebenen Modulen werden immer mit zwei von ihnen ein Metamodul gebildet, wobei vorteilhaft jeweils benachbarte Module zur Bildung des Metamoduls herangezogen werden, da deren Spannungsunterschied auf einfache Weise vorausberechenbar ist. Es werden folgende Schritte ausgeführt:
  • ▪ Berechnung der Spannungsunterschiede zwischen Modulen jedes Metamoduls. Ist eine Suchtabelle berechnet, können die Werte auch dort ermittelt werden;
  • ▪ Sortierung der Metamodule nach diesen Spannungsunterschieden;
  • ▪ Beginnend mit dem Metamodul mit dem größten Spannungsunterschied wird überprüft, ob dieser hinzugeschaltet die Gesamtspannung über die Referenzspannung Vref bringen würde; falls nicht, wird dieses Metamodul hinzugeschaltet, wobei hierzu das eine Modul des Metamoduls, welches den größeren Spannungswert aufweist, in seriell-plus und das andere Modul in seriell-minus zur Gesamtspannung hinzugeschaltet wird;
  • ▪ Auf die gleiche Weise wird mit allen verbliebenen Metamodulen verfahren;

In yet another embodiment of the control method according to the invention, the predetermined control algorithm is formed by the following steps:

• • Assignment of the voltage values to be provided by the modules according to the voltage magnitude, so that the respective voltage value increases with each row position in the string;
• • Arbitrarily selected modules are connected in serial plus until the module selected next would bring the total voltage above the reference voltage V _ref (e.g. the modules can be selected randomly, or it starts with the largest i still available or it starts with the module with the smallest i still available)
• • Two of the remaining modules are always used to form a metamodule, whereby neighboring modules are advantageously used to form the metamodule, since their voltage difference can be easily calculated in advance. The following steps are carried out:
  • ▪ Calculation of voltage differences between modules of each metamodule. If a search table has been calculated, the values can also be determined there;
  • ▪ Sorting the metamodules according to these voltage differences;
  • ▪ Starting with the metamodule with the largest voltage difference, a check is made to see whether this would bring the total voltage above the reference voltage Vref; if not, this metamodule is switched on, whereby the one module of the metamodule which has the larger voltage value is switched into serial plus and the other module is switched into serial minus to the total voltage;
  • ▪ All remaining metamodules are handled in the same way;

Due to the slower dynamics, a search table with voltage differences can be operated either between neighboring modules or in pairs between all modules asynchronously to the main control loop or provided with new entries each time, since it is a process that is not critical in real time.

• • Generierung einer Suchtabelle bzw. Nachschlagetabelle, im Englischen „look-uptable“, abgekürzt LUT, welche alle Spannungswerte der N Module (N Einträge in Suchtabelle) und alle möglichen Spannungsunterschiede zwischen allen Modulen (N über 2 Einträge in Suchtabelle) enthält.;
• • Regelmäßige Aktualisierung der Suchtabelle:
  • ▪ entweder als Teil einer das Steuerungsverfahren ausführenden Hauptregelschleife (ist zwar synchron, verlängert aber die Zyklusdauer der Hauptregelschleife);
  • ▪ oder asynchron zur Hauptregelschleife mittels eines separierten Aktualisierungsprozesses mit niedrigerer Priorität als die Hauptregelschleife, so dass der Aktualisierungsprozess nur ausgeführt wird, wenn die Hauptregelschleife dadurch sich nicht verzögert, wobei gilt:
    • ◯ Aktualisierungsprozess für die Suchtabelle verfügt über eine alleinige Schreibberechtigung auf Suchtabelle;
    • ◯ Die Hauptregelschleife wie alle anderen Prozesse verfügen nur über eine Leseberechtigung;
    • ◯ Ein Ausführungstakt Δt des Aktualisierungsprozesses darf nicht kürzer sein (d. h. der Aktualisierungsprozess muss mindestens dann ausgeführt werden), als dass eine Spannungsdifferenz, welche bei Anschluss einer Last an den Ausgangsanschluss des mindestens eines Strangs durch den durch die Module fließenden Laststrom entsteht, größer wird als ein kleinster Spannungsunterschied (welcher von der Modulkapazität C abhängt: C*I_Last*Δt<min ΔV);
  • • Sortierung der Einträge in der Suchtabelle der Größe nach;
  • • Beginnend mit einem größten Eintrag wird dieser mit dem zugehörigen Modul umgesetzt (Modulzustand „aktiv“ in einer Reihe mit dem Spannungsvorzeichen der Referenzspannung V_ref bei Modulen und bei Metamodulen einmal seriell-plus und einmal seriell-minus), aber nur wenn dies nicht die Ausgabespannung V_out jenseits der Referenzspannung V_ref, welche ein Infimum bzw. eine größte untere Schranke bildet, treibt;
  • • Durch Hinzufügen eines kleinsten noch nicht eingebrachten Eintrags wird ein Supremum gebildet; also die kleinste obere Schranke
  • • Sowohl das Supremum wie auch das Infimum können für die Ausgabespannung V_out herangezogen werden. Um optional zusätzlich die Auflösung zu erhöhen, kann zwischen den beiden moduliert werden

In a further embodiment of the control method according to the invention, the predetermined control algorithm is formed by the following steps:

• • Generation of a look-up table, abbreviated LUT, which contains all voltage values of the N modules (N entries in lookup table) and all possible voltage differences between all modules (N over 2 entries in lookup table).
• • Regular updating of the search table:
  • ▪ either as part of a main control loop executing the control process (although synchronous, it increases the cycle time of the main control loop);
  • ▪ or asynchronously to the main control loop by means of a separate update process with a lower priority than the main control loop, so that the update process is only carried out if the main control loop is not delayed as a result, where:
    • ◯ Lookup table update process has sole write permission on lookup table;
    • ◯ The main control loop, like all other processes, only has read permission;
    • ◯ An execution cycle Δt of the update process must not be shorter (ie the update process must be carried out at least then) than a voltage difference which arises when a load is connected to the output connection of at least one string due to the load current flowing through the modules becomes greater than a smallest voltage difference (which depends on the module capacity C: C*I _load *Δt<min ΔV);
  • • Sorting the entries in the search table by size;
  • • Starting with a largest entry, this is implemented with the associated module (module state “active” in a row with the voltage sign of the reference voltage V _ref for modules and for metamodules once serial plus and once serial minus), but only if this is not the case Output voltage V _out drives beyond the reference voltage V _ref , which forms an infimum or a largest lower limit;
  • • A supremum is formed by adding the smallest entry that has not yet been introduced; i.e. the smallest upper bound
  • • Both the supremum and the infimum can be used for the output voltage V _out . In order to optionally increase the resolution, you can modulate between the two

After the control method according to the invention has generated the respective module states s _i so that V _out = Σ _i s _i V _i is provided at the output connection, it is advantageous to further increase the granularity of the output voltage by switching modulation.

According to the invention, for a switching modulation from a strand, a serial-minus connected first module k and a serial-plus connected second module I are selected and both modules are switched to a bypass module switching state. This creates a voltage difference V _{out -V ref between the output voltage V out and the reference voltage V ref , which} is set as a new deviation limit err. This new deviation limit err becomes a first duty cycle d _k = - err/|V _k -V _l | (is negative by definition to indicate a negative switching direction) and a second duty cycle d _l = err/|V _l -V _k | (is positive by definition to indicate a positive switching direction). The first module k is switched between serial minus and bypass with the first duty cycle d _k and the second module I is switched between serial plus and bypass with the second duty cycle d _l .

The switching modulation can preferably be carried out with the same switching times, i.e. H. Both modules switch together into bypass and the respective module switches serial-minus/serial-plus according to its respective duty cycle. Alternatively, the switching modulation can be carried out in a time-interleaved manner, i.e. H. For example, the second module is only switched after the first module has changed the respective module switching state.

In another embodiment of the control method according to the invention, in order to be able to carry out switching modulation, a filter is arranged in the circuit of the modular multilevel converter, the filter checking whether the voltage difference V _out -V _ref is positive or negative.

The generation according to the invention of an exact output voltage is described above, either quasi-statically or additionally with switching modulation. If the modules of the modular multilevel converter are designed to allow parallel or quasi-parallel operation (for which at least two-wire module connections are necessary between adjacent modules), only one of the two connecting wires is determined by the output voltage control method according to the invention.

In an even further embodiment of the control method according to the invention, an additional line path is arranged between the modules of the modular multilevel converter. The additional line path has a respective inductance between adjacent modules. Based on the control of the output voltage, a quasi-parallel connection is operated via the additional line path. As soon as the respective module switching state for two adjacent modules has been found by controlling the output voltage and thus the switching states of semiconductor switches facing one another from the neighboring modules are also known, a quasi-parallel duty cycle is calculated for switching states of the semiconductor switches connected to the additional line path. Using the quasi-parallel duty cycle, predetermined voltage values and/or required voltage differences are set for the respective DC voltage sources of the two adjacent modules.

The second connecting wire is therefore advantageously used to generate the required voltage differences.

On the one hand, this duty cycle and the respective functional switching states (sometimes parallel and sometimes zero) of the modules used for the quasi-parallel connection are completely independent for controlling the output voltage. On the other hand, the respective semiconductor switches, which implement these switching states via, for example, a second half bridge in the respective module, are dependent on the switching states of the semiconductor switches responsible for generating the output voltage in the first half bridge of the respective module. However, the required “common” switching states, i.e. in order to design both the output voltage and the setting of the voltage values, can be easily calculated, as shown in the 1 and 2 and the associated figure description can be seen.

The control method according to the invention thus advantageously enables high output quality with high performance with just a few modules. In addition, the output quality increases exponentially with the number of modules, which is advantageous compared to an otherwise only linear increase in cascaded circuits known from the prior art. Each module advantageously has a high and similar power contribution and energy content. The same design can also advantageously be used for all modules, and options for parallel or modified parallel interconnection are also advantageously provided.

Furthermore, a modular multilevel converter for generating an output voltage of high granularity is claimed, the modular multilevel converter having a controller and a plurality of modules. The modules are arranged via at least one line path to form at least one strand. A respective module has at least one DC voltage source and a plurality of semiconductor switches. The majority of semiconductor switches per module are designed to connect the at least one DC voltage source with a positive voltage contribution (serial-plus) or without a voltage contribution (bypass) to the output voltage. The controller is configured to carry out a control method according to the invention. The modular multilevel converter according to the invention thus comprises at least unidirectional modules.

On the modular multilevel converter according to the invention, the control method according to the invention can also use charge equalization methods known from the prior art, which were originally used to equalize a state of charge of the DC voltage sources of different modules. Known electronic topologies can also be used to increase the output quality, such as those formed, for example, with cascaded half and/or full bridges in module strings, Y configurations or other systems. In addition, parallel module switching states can be used (although this requires a two-wire connection cable between the modules). In addition, various embodiments according to the invention are suggested in the figures.

In one embodiment of the modular multilevel converter according to the invention, the DC voltage source is arranged between two half bridges in the respective module. Adjacent modules are connected to each other via center taps on the respective half bridges. The respective at least one DC voltage source can also be connected with a negative voltage contribution (serial-minus), which is designed, for example, by means of bidirectional modules.

According to the invention, a further line path runs between the modules. Between adjacent modules, the further line path has an inductance and can be referred to as an inductance path (in contrast to the line path providing the output voltage, which can also be referred to as a power path). The controller is configured to execute a control method according to the invention, which takes a quasi-parallel mode into account.

In yet another embodiment of the modular multilevel converter according to the invention, a first module and a second module are adjacent, with the respective module having a first half-bridge and a second half-bridge around its DC voltage source. The center tap on the second half bridge of the first module leads via the inductance to the high side of the second module, while the low side of the first module is connected to the center tap of the first half bridge of the second module. The second half bridge of the first module forms a buck-boost DC voltage converter between the respective DC voltage sources against the first half bridge of the second module.

In a further further embodiment of the modular multilevel converter according to the invention, the further line path per module is connected to the respective DC voltage source by an additionally arranged half bridge facing a respective adjacent module.

In a further embodiment of the modular multilevel converter according to the invention, direct voltage and/or alternating voltage is provided at a respective output connection. The modular multilevel converter according to the invention can be configured bidirectionally, i.e. H. The DC voltage connection or the DC voltage connections on one or more modules can be a source and/or a sink. This means that both direct voltage can be converted to alternating voltage and alternating voltage can be converted to direct voltage, thereby advantageously providing high-quality output on one or both sides.

Further advantages and refinements of the invention result from the description and the accompanying drawing.

• 1 zeigt schematisch Verschaltungsmöglichkeiten zweier benachbarter Module mit quasi-parallelem Modus in einer Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 2 zeigt eine Tabelle mit Verschaltungsmöglichkeiten zweier benachbarter Module mit quasi-parallelem Modus in der Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 3 zeigt schematisch einen Modulstrang ohne quasi-parallelem Modus und Verschaltungsmöglichkeiten in einer weiteren Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 4 zeigt schematisch einen Modulstrang mit quasi-parallelem Modus und Verschaltungsmöglichkeiten in einer noch weiteren Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 5 zeigt schematisch eine Dreiphasenschaltung in einer fortgesetzt weiteren Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 6 zeigt schematisch eine Dreiphasenschaltung in einer fortgesetzt noch weiteren Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 7 zeigt schematisch eine Dreiphasenschaltung in einer weiter fortgesetzten Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 8 zeigt schematisch eine Dreiphasenschaltung in einer noch weiter fortgesetzten Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 9 zeigt schematisch eine sog. Marquardt-MMC-Anordnung in einer anderen Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 10 zeigt schematisch eine mehrphasige Marquardt-MMC-Anordnung in einer noch anderen Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 11 zeigt schematisch eine Erzeugung und Aufrechterhaltung unterschiedlicher Spannungen bei der Marquardt-MMC-Anordnung in der anderen Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 12 zeigt schematisch einen Modulstrang mit Induktivitäten, aber ohne zusätzliche Halbbrücken in einer fortgesetzt anderen Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.
• 13 zeigt schematisch einen Modulstrang mit Induktivitäten, aber ohne zusätzliche Halbbrücken in einer fortgesetzt noch anderen Ausgestaltung des erfindungsgemäßen modularen Multilevelkonverters.

It is understood that the features mentioned above and those to be explained below can be used not only in the combination specified in each case, but also in other combinations or alone, without departing from the scope of the present invention.

• 1 shows schematically connection options for two adjacent modules with quasi-parallel mode in an embodiment of the modular multilevel converter according to the invention.
• 2 shows a table with connection options for two adjacent modules with quasi-parallel mode in the design of the modular multilevel converter according to the invention.
• 3 shows schematically a module string without quasi-parallel mode and interconnection options in a further embodiment of the modular multilevel converter according to the invention.
• 4 shows schematically a module string with quasi-parallel mode and interconnection options in a further embodiment of the modular multilevel converter according to the invention.
• 5 shows schematically a three-phase circuit in a continued further embodiment of the modular multilevel converter according to the invention.
• 6 shows schematically a three-phase circuit in a further embodiment of the modular multilevel converter according to the invention.
• 7 shows schematically a three-phase circuit in a further embodiment of the modular multilevel converter according to the invention.
• 8th shows schematically a three-phase circuit in an even further embodiment of the modular multilevel converter according to the invention.
• 9 shows schematically a so-called Marquardt MMC arrangement in another embodiment of the modular multilevel converter according to the invention.
• 10 shows schematically a multi-phase Marquardt MMC arrangement in yet another embodiment of the modular multilevel converter according to the invention.
• 11 shows schematically a generation and maintenance of different voltages in the Marquardt MMC arrangement in the other embodiment of the modular multilevel converter according to the invention.
• 12 shows schematically a module string with inductors, but without additional half bridges in a further different embodiment of the modular multilevel converter according to the invention.
• 13 shows schematically a module string with inductors, but without additional half bridges in a further embodiment of the modular multilevel converter according to the invention.

In 1 Switch connections 100 of two adjacent modules 101 with quasi-parallel mode are shown schematically in an embodiment of the modular multilevel converter according to the invention. In the left branch, switching connections are shown for a first connection path, referred to as power path 110, which form a load current with an output voltage: serial plus 111, serial minus 112, low-side bypass 113, high-side bypass 114. In the right Branch, switching connections are shown for a second connection path, which has an inductance and is therefore referred to as inductance path 120, which form a quasi-parallel mode for setting predetermined voltage values: inductance path-plus 121, inductance path-minus 122, low-side inductance path 123 , high-side inductance path 124. The respective switching connections 111, 112, 113, 114 of the power path 110 and the respective switching connections of the inductance path 121, 122, 123, 124 can be combined 130 to form a common switching state 131, with a total of 16 such switching states 131 possible are.

In 2 a table 200 is shown with connection options for two adjacent modules with quasi-parallel mode in the design of the modular multilevel converter according to the invention. The two functions 210, 220, i.e. generation of the output voltage via the first connection path and setting of voltage values or voltage ratios in quasi-parallel mode via the second connection path, are shown in table 200. The columns 210 represent the switching connections in the generation of the output voltage, ie high-side bypass 211, low-side bypass 212, serial-minus 213, serial-plus 214, while the rows 220 represent the setting of the voltage values or voltage ratios: themselves discharging inductance to the right 221, charging inductance to the left 222, constant energy content of the inductance 223, quasi-static parallel connection of the DC voltage sources (capacitors) 224. A duty cycle of the circuits shown between the two modules could, for example, be a regular change between charging at the DC voltage source on the respective Define the left side and the discharging process at the DC voltage source on the right side in order to control charge equalization processes.

in 3 A module strand 310 without quasi-parallel mode and module switching states 320 is shown schematically in a further embodiment of the modular multilevel converter according to the invention. The multilevel converter according to the invention essentially uses a cascaded H-bridge (abbreviated as CHB), which is implemented by a module string. In contrast to conventional CHBs, the DC voltage sources of the modules are intentionally kept at different voltage values. A first module 311 in the module string 310 is viewed as the main converter. It has a DC voltage source or sink 313 with a highest voltage value 314, V _main = 2 ^N * U with U as a smallest voltage value of a DC voltage source of a module of the remaining modules in the string considered as a filter 312. The filter modules 312 contribute a total of a voltage value V _filter 315 to the output voltage V _out 316. The module string 310 can be connected to an alternating current load 317. The module switching states s _k of a k-th module 321 with two half bridges with center tap are serial-plus (s _k = +1) 322, serial-minus (s _k = -1) 323, and bypass (s _k = 0) 324 schematically shown.

In 4 A module string 400 with quasi-parallel mode and interconnection options 410, 420 is shown schematically in a further embodiment of the modular multilevel converter according to the invention. In the module string 400, between an N+1th module 401 (as the main converter) with a highest voltage value V _N+1 and a first module 405 with a voltage value _V1 , there are a number of further modules, shown here as an example a kth module 404 with a voltage value V _k and a k+1th module 402 with voltage value V _k+1 . The second connection path (drawn in dotted lines) with inductance was arranged on the modules for a quasi-parallel mode. As an example, two connection options 410, 420 are shown schematically for an intermediate connection 403 of k-th module 404 and k+1-th module 402, namely the connection option 410 for a charging mode and connection option 420 for a discharging mode. Both modes are only possible in one case 407 when s _k ≠ +1 and s _k ≠ -1 applies to the module switching states.

In 5 A three-phase circuit 510, 520 is shown schematically in a further embodiment of the modular multilevel converter according to the invention. The three-phase circuit 510 is designed with three module strings, which are connected to a star point 511 at one end. The star point 511 is preferably designed twice, that is, a respective strand end connected to the star point 511 each has two lines, with a first line connecting the respective phase via a respective bridge directly to a first star point of the double star point 511, and a second Line is routed via a bridge with inductance to the second star point of the double star point 511. This means that the voltage of the modules can be advantageously set via DC-DC operation via the star point 511. Furthermore, only a single source can be used. The three-phase circuit 520 shows that the star point 525 is preferably designed twice, that is, has two lines: a first line, which forms a respective phase via a respective bridge to a respective first module 524 in the respective module string 521 and a second line, which is connected to the respective bridge is connected via a respective inductor. This allows the voltage of the modules 524 to be adjusted via the star point 525 using DC-DC operation. Furthermore, even just a single DC voltage source can be used. The modules have two-wire connecting lines 523. A respective phase connection 522, 526, 527 is arranged at the other end of the respective module strings 521.

In 6 A three-phase circuit 600 is shown schematically in a further embodiment of the modular multilevel converter according to the invention. The double star point is formed on the respective main converter modules in the respective string via their respective low-side and respective high-side. The second connection path with respective inductance is arranged “on-top” on the inter-module connections 601 shown (in all three strands). At the respective other end of the respective strand, a respective phase output connection, an output voltage V _out 616, 626, 636 is formed, to which a respective phase 617, 627, 637 of a load can be connected.

In 7 A three-phase circuit 700 is shown schematically in a further embodiment of the modular multilevel converter according to the invention. The star point 701 is formed on the respective main converter modules via a center tap on their respective first half bridge. In addition, the main inverter modules are connected to their respective low-side. An output voltage V _out 716, 726, 736 is formed at the respective phase output connection, to which a respective phase 717, 727, 737 of a load can be connected.

In 8th A three-phase circuit 800 is shown schematically in an even further embodiment of the modular multilevel converter according to the invention. Compared to the modular multilevel converter 7 Two resistors were added to the star point of the main converter modules 811. The voltage values of the main converter modules 811 are V _DC = 2 ^N * U, with the respective predetermined voltage values of the filter modules 812 from V _N = 2 ^N-1 * U for the Nth filter module according to a power sequence with base 2 up to V ₁ = U at Remove the first filter module from the phase output. An output voltage V _out 816, 826, 836 is formed at the respective phase output connection, to which a respective phase 817, 827, 837 of a load can be connected.

In 9 A so-called Marquardt MMC arrangement 900 is shown schematically in another embodiment of the modular multilevel converter according to the invention. The Marquardt MMC topology is, for example, in the publication US 2018/0109202 A1 described. Essentially, in the Marquardt MMC arrangement 900, the power path is formed via a first half bridge in the respective module, while the inductance path is formed via the second half bridge. With this topology, a lower strand or arm 910 and an upper arm 920 are formed, which together form a phase 901, with only an inductor and a further half bridge being arranged at their connection 904, and an AC voltage output being provided. Four modules are shown in both arms 910, 920 (U1, U2, U3, U4 in the upper arm and L1, L2, L3, L4 in the lower arm. The respective modules are supplied via respective DC voltage sources 911, 921. In addition, a DC voltage connection 902, 903 is provided by combining the two DC voltage sources 911, 921.

In 10 A multi-phase Marquardt MMC arrangement 1000 is shown schematically in yet another embodiment of the modular multilevel converter according to the invention. There are three AC voltage connections 1001,. 1002, 1003 and a DC voltage connection 1004, 1005 provided.

Bypass (1-m) mit Tastgrad (1-d)(1-m) 1122: $L_{xy}\frac{d{i}_{xy}}{dt}=-V_y$

Reihenschaltung m mit Tastgrad m 1123: $L_{xy}\frac{d{i}_{xy}}{dt}=0$

Zusammenfassung 1124: d(1 - m)(V_x- V_y) = (1 - d)(1 - m)V_y ⇒ V_y = dV_x In 11 A generation and maintenance of different voltages 1100 is shown schematically in the Marquardt MMC arrangement in the other embodiment of the modular multilevel converter according to the invention. Two adjacent modules x and y 1110 are considered, where the DC voltage source of the x module has a voltage value V _x and the DC voltage source of the y module has a voltage value V _y . The semiconductor bridge of each module, which is additionally formed compared to a conventional Marquardt MMC arrangement and which may have a lower current output, allows a buck-boost DC-DC converter to be generated between the respective DC voltage sources against the other semiconductor bridge. A ratio of the respective voltage values V _x and V _y can be regulated or set using a fixed duty cycle, for example for a voltage ratio of 2:1 corresponding to 50% duty cycle. Shown are connection options 1120 in the bypass (1-m) with duty cycle d(1-m) 1121 or duty cycle (1-d)(1-m) 1122 and in series connection m with duty cycle m 1123. The respective voltages are described as follows: Bypass (1- m ) with duty cycle d(1-m) 1121: $L_{xy}\frac{d{i}_{xy}}{dt}=v_x-v_y$

Bypass (1- m ) with duty cycle (1-d)(1-m) 1122: $L_{xy}\frac{d{i}_{xy}}{dt}=-v_y$

Series connection m with duty cycle m 1123: $L_{xy}\frac{d{i}_{xy}}{dt}=0$

Summary 1124: d(1 - m)(V _x - V _y ) = (1 - d)(1 - m)V _y ⇒ V _y = dV _x

In 12 A module string 1200 with inductors, but without additional half bridges, is shown schematically in a continued embodiment of the modular multilevel converter according to the invention. Between the main converter module 1211 and the filter modules 1212, or between adjacent filter modules 1212, a respective inductor 1201 is arranged, which connects the low-side of adjacent modules. An output voltage 1206 is provided.

In 13 A module string 1300 with inductors, but without additional half bridges, is shown schematically in a further embodiment of the modular multilevel converter according to the invention. Between the main converter module 1311 and the filter modules 1312, or between adjacent filter modules 1312, a respective inductance 1301, 1302 is arranged, the respective inductance 1301 alternately connecting the low-side and the respective inductance 1302 connecting the high-side of respective adjacent modules. An output voltage 1306 is provided.

Reference symbol list

100

Switch connections between two modules

101

Two-wire connection, one of which has an effective inductance

110

First branch: performance path

111

Serial-plus

112

Serial-minus

113

Low side bypass

114

High side bypass

120

Second branch: inductance path

121

Inductance path plus

122

Inductance path minus

123

Low-side inductance path

124

High-side inductance path

130

combination

131

16 possible switching connections

200

Functional options in the second branch

210

Functions in the first branch

211

High side bypass

212

Low side bypass

213

Serial-minus

214

Serial-plus

220

Functions in the second branch

221

Discharging inductance to the right

222

Loading inductance to the left

223

Constant energy content of the inductance

224

Quasi-static parallel connection of the DC voltage sources

310

Module string without quasi-parallel mode

311

Main inverter module

312

Filter modules

313

DC source/sink

314

Voltage value V _main

315

Voltage value V _filter

316

Output voltage V _out

317

AC load

320

Module switching states

321

module

322

Serial plus

323

Serial minus

324

bypass

400

Module string with quasi-parallel mode

401

N+1th module with V _N+1

402

k+1-th module with V _k+1

403

Interconnection

404

kth module with V _k

405

First module with V ₁

406

Output voltage V _out

407

Condition s _k+1 ≠+1 and s _k ≠-1

410

Charging mode

420

Discharge mode

510

Multiphase arrangement

511

star point

520

Multilevel converter with two-wire intermodule connection

521

poor

522

Phase connection

523

Two-wire connecting cable

524

module

525

Double star point

526

Phase connection

527

Phase connection

600

Three-phase circuit

601

Place for additional arrangement of transistors and inductors

616

First phase output voltage

617

to the burden

626

Second phase output voltage

627

to the burden

636

Third phase output voltage

637

to the burden

700

Three-phase circuit

701

star point

716

First phase output voltage

717

to the burden

726

Second phase output voltage

727

to the burden

736

Third phase output voltage

737

to the burden

800

Three-phase circuit

811

Main inverter modules

812

Filter modules

816

First phase output voltage

817

to the burden

826

Second phase output voltage

827

to the burden

836

Third phase output voltage

837

to the burden

900

Marquardt MMC arrangement

901

phase

902

DC voltage plus

903

DC voltage minus

904

AC voltage output

910

Lower arm

911

Half supply voltage

920

Upper arm

921

Half supply voltage

1000

Multiphase Marquardt MMC arrangement

1001

First phase

1002

Second phase

1003

Third phase

1004

Connection A

1005

Connection B

1110

Two adjacent modules

1120

Switching states

1121

First bypass

1122

Second bypass

1123

Serial

1124

Output voltage

1200

Module strand

1201

inductance

1206

Output voltage

1211

Main inverter

1212

Filter modules

1300

Module strand

1301

low-side inductance

1302

high-side inductance

1306

Output voltage

1311

Main inverter modules

1312

Filter modules

Claims (11)

Control method for a modular multilevel converter for generating an output voltage of high granularity, the modular multilevel converter (520) having a controller and a plurality of modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212 , 1311, 1312), wherein the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) via at least one line path to at least one strand (310, 400, 521, 910, 920, 1200, 1300), at one end of which there is a respective output connection (522, 526, 527) for a respective phase (317, 617, 627, 637, 717, 727, 737, 817, 827, 837,) of a load are arranged, wherein a respective module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) has at least one DC voltage source (313) and has a plurality of semiconductor switches, wherein a respective module switching state (111, 112, 113, 114, 211, 212, 213, 214, 322, 323, 324) is controlled such that the respective at least one DC voltage source (313) does not correspond to a voltage value a bypass module switching state (113, 114, 211, 212, 324), or, depending on the design of the respective module, a positive voltage value corresponding to a serial-plus module switching state (111, 214, 322) or a negative voltage value corresponding to a serial-plus minus module switching state (112, 213, 323) contributes to an output voltage (316, 406, 616, 626, 636, 716, 726, 737, 816, 826, 836, 902, 903, 904), with a charge state of the respective at least a DC voltage source (313) is set according to a predetermined voltage value, the output voltage (316, 406, 616, 626, 636, 716, 726, 737, 816, 826, 836, 902, 903, 904) being a summation over all voltage values including the respective module switching status (316, 406, 616, 626, 636, 716, 726, 737, 816, 826, 836, 902, 903, 904) of the modules (311, 312, 321, 401, 402, 404, 405, 524 , 811, 812, 1211, 1212, 1311, 1312) of a strand (310, 400, 521, 910, 920, 1200, 1300) is formed, and the high granularity of the output voltage (316, 406, 616, 626, 636 , 716, 726, 737, 816, 826, 836, 902, 903, 904) by a predetermined control algorithm, which is considered of voltage differences between two modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) with opposite polarity connection option and comparison with a reference voltage is achieved, whereby for a switching modulation from one strand (310, 400, 521, 910, 920, 1200, 1300) a serial-minus connected first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) and a serial-plus connected second module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are selected and both modules ( 311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are switched into a module switching state bypass (113, 114, 211, 212, 324), thereby switching between the output voltage and the reference voltage creates a voltage difference which is set as a new deviation limit, a first duty cycle and a second duty cycle being calculated from this new deviation limit, and wherein the first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) is switched with the first duty cycle between serial-minus (112, 213, 323) and bypass (113, 114, 211, 212, 324) and the second module (311 , 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) with the second duty cycle between serial-plus (111, 214, 322) and bypass (113, 114, 211 , 212, 324) is switched. control procedures Claim 1 , whereby the specified voltage values are selected according to a power sequence. Control method according to one of the preceding claims, wherein the predetermined control algorithm is formed by the following steps: • Assignment of the voltage values to be provided by the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) according to the voltage size, so that the respective voltage value with a respective row location in the strand (310, 400, 521, 910, 920, 1200, 1300); • If the reference voltage is positive: ▪ From the highest row position downwards, modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) with a positive voltage value are switched on until their total voltage, formed by summation, is greater is as the reference voltage; ▪ If the total voltage minus a voltage value of the module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) with the lowest row location would be below the desired output voltage, this will be Voltage value negative added to the total voltage: if not, the module is connected in the bypass (113, 114, 211, 212, 324). ▪ The following two steps are carried out iteratively until all modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) have been used or one remaining one Voltage difference between total voltage and the reference voltage is below a predetermined deviation limit, with remaining modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) in bypass (113, 114, 211, 212, 324) and the current total voltage forms the output voltage (316, 406, 616, 626, 636, 716, 726, 737, 816, 826, 836, 902, 903, 904): o if the current total voltage is below the reference voltage, it is determined whether the smallest available voltage value, if switched to positive, would bring the total voltage above the reference voltage, and if so, the relevant module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) serial-plus (111, 214, 322), or if not, the relevant module (311, 312, 321, 401, 402, 404, 405 , 524, 811, 812, 1211, 1212, 1311, 1312) (i.e. the one with the lowest voltage value still available) switched to bypass (113, 114, 211, 212, 324); o if the current total voltage is above the reference voltage, it is determined whether the smallest available voltage value, if switched negative, would bring the total voltage below the reference voltage, and if so, the relevant module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312). , 524, 811, 812, 1211, 1212, 1311, 1312) switched to bypass (113, 114, 211, 212, 324); • If the reference voltage is negative, the previous steps are carried out with reversed size terms. Control method according to one of the Claims 1 or 2 , whereby the specified control algorithm is formed by the following steps: • Assignment of the voltage values to be provided by the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) according to Voltage size, so that the respective voltage value increases with a respective row position in the strand (310, 400, 521, 910, 920, 1200, 1300); • Any selected modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are added in serial plus (111, 214, 322) until the each selected next module would bring the total voltage above the reference voltage; • From the remaining modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) a metamodule is always formed with two of them and the following steps are carried out: ▪ Calculation the voltage differences between modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) of each metamodule; ▪ Sorting the metamodules according to these voltage differences; ▪ Starting with the metamodule with the largest voltage difference, a check is made to see whether this would bring the total voltage above the reference voltage; if not, this metamodule is switched on, whereby the one module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) of the metamodule that has the larger voltage value is switched on , in serial-plus and the other module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) in serial-minus (112, 213, 323). Total voltage is added; ▪ All remaining metamodules are handled in the same way; Control method according to one of the preceding claims, wherein the predetermined control algorithm is formed by the following steps: • Generation of a lookup table containing all voltage values of the N modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) and all possible voltage differences between all modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312); • Regular updating of the search table: ▪ either as part of a main control loop executing the control process; ▪ or asynchronously to the main control loop by means of a separate update process with a lower priority than the main control loop, so that the update process is only carried out if the main control loop is not delayed as a result, where: ◯ Lookup table update process has sole write permission on lookup table; ◯ The main control loop, like all other processes, only has read permission; ◯ An execution cycle of the update process must not be shorter than a voltage difference that occurs when a load is connected to the output connection (522, 526, 527) of at least one strand (310, 400, 521, 910, 920, 1200, 1300). the load current flowing through the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) becomes greater than the smallest voltage difference; • Sorting the entries in the search table by size; • Starting with a largest entry, this is implemented with the associated module, but only if this does not drive the output voltage beyond the reference voltage, which forms an infimum; • A supremum is formed by adding the smallest entry that has not yet been introduced; • Both the supremum and the infimum can be used for the output voltage. Control method according to one of the preceding claims, wherein an additional line path is arranged between the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) of the modular multilevel converter, wherein between respective adjacent modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) the additional line path has a respective inductance (1201, 1301, 1302), whereby attached to control the output voltage via the additional line path, a quasi-parallel connection is operated, with a quasi-parallel duty cycle for switching states of the semiconductor switches connected to the additional line path being calculated as soon as the respective module switching state (111, 112, 113) is determined by controlling the output voltage , 114, 211, 212, 213, 214, 322, 323, 324) for two adjacent modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) was found and thus the switching states of semiconductor switches facing one another from the neighboring modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are also known, using the quasi-parallel duty cycle predetermined voltage values and / or required voltage differences for the respective DC voltage sources (313) of the two adjacent modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312 ) can be set. Modular multilevel converter for generating an output voltage of high granularity, the modular multilevel converter having a controller and a plurality of modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312). , wherein the modules (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are connected via at least one line path to at least one strand (310, 400, 521, 910, 920, 1200, 1300), each module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) having at least one DC voltage source (313) and a plurality of semiconductor switches, wherein per module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) the plurality of semiconductor switches is designed to have at least the respective at least to connect a DC voltage source (313) without a voltage contribution or, depending on the arrangement of the semiconductor switches, with a positive voltage contribution or with a negative voltage contribution to the output voltage, between the modules (311, 312, 321, 401, 402, 404, 405, 524 , 811, 812, 1211, 1212, 1311, 1312) another line path runs, with each adjacent module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) the further line path has an inductance (1201, 1301, 1302), and wherein the controller is configured to operate in a quasi-parallel mode (311, 312, 321, 401, 402, 404, 405, 524, 811, 812 , 1211, 1212, 1311, 1312) taking into account control method according to one of the Claims 1 until 5 to carry out. Modular multilevel converter Claim 7 , wherein in the respective module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) the DC voltage source (313) is arranged between two half bridges and adjacent modules (311 , 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) are connected to each other via center taps on the respective half bridges. Modular multilevel converter Claim 7 and 8th , where a first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) and a second module (311, 312, 321, 401, 402, 404 , 405, 524, 811, 812, 1211, 1212, 1311, 1312) are neighboring, whereby the respective module (311, 312, 321, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311 , 1312) has a first half bridge and a second half bridge around its DC voltage source (313) and the center tap on the second half bridge of the first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) via the inductance (1201, 1301, 1302) to the high side of the second module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312), while the low side of the first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) is connected to the center tap of the first half bridge of the second module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) is connected, and wherein through the second half bridge of the first module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) against the first half bridge of the second module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) a buck-boost DC voltage converter is formed between the respective DC voltage sources (313). Modular multilevel converter Claim 7 until 9 , whereby the further line path per module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) runs through a respective adjacent module (311, 312, 321, 401, 402, 404, 405, 524, 811, 812, 1211, 1212, 1311, 1312) facing additionally arranged half bridge is connected to the respective DC voltage source (313). Modular multilevel converter according to one of the Claims 7 until 10 , wherein direct voltage and/or alternating voltage (316, 406, 616, 626, 636, 716, 726, 737, 816, 826, 836, 902, 903, 904) is provided at a respective output connection (522, 526, 527).

Images