DE102023102922A1 - METHOD AND DEVICE FOR MEASUREMENT OF POWER SUPPLY INDUCED JITTERS - Google Patents

Abstract

A test and measurement instrument includes components and methods for measuring noise at the output of a power supply, measuring the jitter of a serial data signal produced by data generation circuitry connected to the power supply, and correlating the noise measured from the power supply with the jitter of the serial data signal. The correlation can be performed in the frequency domain. Spectral plots of the measured noise and jitter can be created and presented to the user.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority under 35 USC 9 119 to Indian Provisional Patent Application No. 202221006430 , filed February 7, 2022, entitled "METHOD AND APPARATUS FOR MEASURING POWER SUPPLY INDUCED JITTER," the disclosure of which is incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present disclosure relates generally to signal quality analysis and more particularly to identifying power supply induced jitter (PSIJ) that occurs in high speed serial data (HSS data).

BACKGROUND

In today's systems that generate high-speed serial data, operating frequencies can reach values in the tens of GHz, with multiple power rails driving the various high-speed loads. With the reduced supply voltages and increased switching speeds of modern circuits, one of the most challenging tasks for modern system designers is to maintain the integrity of high-speed data signals as they are generated and to minimize any carryover effects from imperfect power signals. This need for minimal carryover effects becomes even more important as circuitry gets smaller towards sub-meter technologies and as power supply signals get closer to the components that generate the high-speed data signals, thereby increasing the carryover effect.

Signal integrity (SI) analysis typically focuses on the performance of a transmitter, reference clock, channel, and receiver circuits in terms of bit error rate (BER). Conversely, power supply integrity (PI) analysis focuses on the ability of the power distribution network (PDN) to provide a constant power supply over a series of power rails without transients and low-impedance returns. Also, in high-speed systems, the PI and SI systems are somewhat interdependent, so changes in the PI can also affect the quality of the SI. Also, the PDN itself can introduce noise and jitter. The circuit design and the components used in such circuits such as Voltage Regulator Modules (VRM), on-chip packages, pins, traces, vias, connectors, etc. affect the impedance of the PDN and thus the quality of the power delivered. Therefore, it is important to analyze whether power supply integrity issues are causing signal quality degradation.

Identifying issues related to high-speed serial jitter also requires an understanding of both power supply and signal quality issues since power rails and serial data coexist on the same circuit boards. Therefore, it is best to address some power integrity issues, such as B. Power Supply Induced Jitter (PSIJ), to be recognized already in the design phase of new circuits, e.g. B. in the simulation phase, since the parasites on the circuit board affect the final result of the circuit. It is also important to evaluate PSIJ at the system level, otherwise such problems may not be properly identified as power related. PSIJ is best seen on the high speed side at the end of the validation cycle. However, making changes to the design only after PSIJ has been detected at the end of the validation cycle is inefficient, as such changes at such a late stage require significant effort and rework. As previously mentioned, the negative impact of PSIJ on circuits that generate high-speed serial data increases as component density increases as designs become more compact.

Current simulation models are complex, time-consuming, and provide no clue as to the source of noise in high-speed serial data (HSS). Therefore, there is currently no easy solution to measure and identify PSIJ (Power Supply Induced Jitter) in HSS data.

Embodiments in accordance with the disclosure address these and other shortcomings of the prior art.

BRIEF DESCRIPTION OF THE DRAWINGS

• 1 12 shows a diagram of a power distribution network (PDN) and a high speed serial board (HSS) upon which test apparatus and methods according to embodiments of the present disclosure may operate.
• 2 12 is a block diagram of a PDN illustrating various sources of noise components affecting high-speed serial data that can be identified by test apparatus and methods according to embodiments of the present disclosure.
• The 3A , 3B , 3C , 3D , 3E , 3F , 3G , 3H , 31 , 3y and 3K 12 are example screens presented to the user of a test device to implement a wizard-style workflow for measuring power supply induced jitter according to embodiments of the present disclosure.
• 4 12 is an example of a results screen that may be displayed on a display of a test and measurement instrument that illustrates ripple measurements according to embodiments of the present disclosure.
• 5 14 is an example of a results screen presented on the display of a test fixture showing spectral plots of the spectral content of the power rail and spectra for the time interval error (TIE) according to embodiments of the present disclosure.
• 6A 13 is an example screen on a display of a test device showing an eye diagram and a histogram of an HSS signal with PSIJ according to embodiments of the present disclosure.
• 6B 14 is an example screen on a display of a test device showing an eye diagram and histogram of an HSS signal after removal of PSIJ, in accordance with embodiments of the present disclosure.
• 7A 14 is an example screen on the display of a test device displaying eye diagrams and spectral diagrams both before and after PSIJ removal, in accordance with embodiments of the present disclosure.
• 7B 14 is another example screen on a display of a test device showing eye diagrams and spectral diagrams both before and after removal of PSIJ according to embodiments of the present disclosure.
• 8th FIG. 14 is an example of a data screen displaying to the user the results of measurements generated by a measurement device according to embodiments of the present disclosure.
• The 9A , 9B , 9C , 9D , 9E , 9F and 9G 10 are example screens presented to a user by a test device to implement a second, non-guided type of workflow for measuring power supply induced jitter, according to embodiments of the present disclosure.
• 10 FIG. 12 is an exemplary flow chart illustrating operations that may be used in measuring power supply induced jitter in accordance with embodiments of the present disclosure.
• 11 12 is a block diagram of an example test and measurement apparatus for measuring characteristics of a power supply and the effects on a resulting circuit powered by the power supply, according to embodiments of the disclosure.

Those skilled in the art should know that all block diagrams contained herein represent conceptual views of illustrative processes embodying the principles of the present disclosure. Likewise, it will be understood that all flowcharts, flow charts, and the like represent various processes embodied substantially on a computer readable medium and so executable by a computer or processor, whether or not such computer or processor is explicitly shown.

DESCRIPTION

Embodiments of the disclosure are directed to a method and apparatus for measuring power supply induced jitter (PSIJ) that occurs in high speed serial data (HSS) and further providing tools for a user to determine if such Jitter is related to the noise in a power supply.

1 13 is a block diagram depicting an example power distribution network (PDN) 100 and high-speed serial board (HSS) 130 upon which testing apparatus and methods according to embodiments of the present disclosure may operate. The power distribution network 100 may include various components, such as. B. an AC-DC adapter 112, which is powered by a supply voltage 110. The supply voltage can e.g. B. between 8 and 25 volts. The supplied voltage is forwarded from the adapter 112 to a power supply 114, which in turn can contain, for example, an AC-DC rectifier and a voltage regulation module (VRM). Other components of the power distribution grid 100 may include a step-down converter 116 for stepping down the voltage from the power supply 114 and a busbar probe port 120 for measuring characteristics of the power distribution grid. These components of the power distribution network 100 work together to generate power for the various power rails that are fed to a board, package, or chip. And any of the components described above or others of the power distribution grid 100 can be a source of noise that can degrade the data generated by the components powered by the power distribution grid.

In the illustrated embodiment, the power generated by the power distribution network 100 is provided to a circuit board 130 which contains circuitry for generating high speed serial data (HSS). Typically, a board, package, or chip is powered by more than one power rail for a variety of reasons. Some busbars carry different voltages and must therefore be separated from each other. Other power rails are separated to route power to the components with a minimum of interference. For example, instead of running a power rail past a particularly noisy component, the power supply could be split, with a first power rail powering the components before the noisy component and another power rail powering the components after the noisy component. In 1 there are multiple power rail outputs for the board 130, a first power rail 122, a second power rail 124, and an nth power rail 128. An ellipse 126 indicates that the board 130 can be powered by the PDN 100 with any number of separate power rails . Interference or noise may be present on any component of the power distribution network 100 and propagated to other circuits that share a common board, package, or chip. PDN 100 noise may manifest itself as ripple and/or voltage drift, which may be measured with a meter as described below. A spectral analysis of the power supply signal from the PDN 100 can be used to determine if noise from the PDN occurs at certain frequencies. Some embodiments of the disclosure also include a voltage generator 115 that can be used to inject a repetitive signal into the PDN 100 at a particular frequency to artificially load the PDN. The effects of the artificial loading on the PDN 100 can be measured with the measuring instrument to determine a causal relationship between the noise in the PDN 100 and the noise in the data-generating circuits fed by the PDN 100. Voltage generator 115 may include a function generator or other signal source to apply a repetitive waveform to PDN 100 . The waveform can be in the form of a ripple, e.g. a sine wave, or may include other waveforms, e.g. B. triangle, sawtooth or square waves. In some embodiments, the user can specify a frequency at which the repeating waveform is applied. Although voltage generator 115 is shown applying the ripple or other voltages to power supply 114 and power rails, voltage generator 115 may be connected to any component in PDN 100 to generate voltages. Voltage generator 115 is not necessarily used in all embodiments; instead, noise or ripple naturally present in PDN 100 can be measured and evaluated, as described below.

Shown on the circuit board 130 are three separate circuits 132, 134, 138 which may be affected by noise or interference originating either from the power supply 100 or even from the operation of an adjacent circuit. The noise in a given circuit can come from a variety of sources. A first type of noise can be inherently present in a given circuit, referred to as self-generated noise. A second type of noise is ver is caused when one circuit transmits noise to another circuit. Generally, the noise-producing element is called the aggressor, while the other circuit is called the victim circuit. A third type of noise occurs when two circuits affect each other, sometimes referred to as mutual aggression noise. Mutual aggression noise can be expressed as crosstalk noise between the two circuits. Another type of noise that often affects HSS circuits is noise coupled to packages and interconnects, e.g. B. Noise originating from a power distribution network. Embodiments of the disclosure provide tools and methods for identifying the source of power supply noise in HSS signals coupled to the power supply.

2 14 is a block diagram of another power distribution network illustrating various sources of noise components affecting high-speed serial data that can be identified by testing apparatus and methods according to embodiments of the present disclosure.

2 illustrates typical sources of power supply noise components affecting high-speed serial data (HSS). A power supply 210 generates power for a power distribution network (PDN) 220. In 2 For example, power grid 220 is connected to four different regulator modules (230, 232, 234, and 236) that can generate different voltages for different circuits powered by the power grid. As in 1 For example, in some embodiments, a voltage generator 225 may be used to inject ripple or other noise into the PDN 220 to aid in correlation analysis with jitter on data generating circuits, as described below. In 2 an aggressor circuit 240 is a noisy circuit that transmits noise from itself to a victim circuit 242 . The noise is shown as reference 252. The output of both the aggressor 240 and the victim 242 are high speed serial loads called the point of load (POL). Thus, the noise within the aggressor circuit 240 may have its source in the aggressor circuit itself or in the voltage regulation module 230 . In any event, in this example, the noise from the aggressor circuit 240 is transmitted to the victim circuit 242 where it may manifest itself as noise on the POL of the victim circuit 242 .

A related form of noise transmission is two-circuit interference, which is transmitted as noise 256 between two co-aggressor circuits 244,246. Sometimes this noise of mutual aggression is referred to as crosstalk, which can manifest itself on the POLs of the two co-aggressors 244, 246.

A third form of noise emanates from power rails 222, 223, which are additional power rails derived from the power grid 220. These power rails 222, 223 are noisy due to being coupled to other noisy rails in the power grid 220. The source of such coupled noise may be difficult to identify, as it can be detected by any of the in 2 components shown can be generated.

The present disclosure describes a test and measurement device that includes, among other features, various types of workflows that allow a user/designer to eliminate noise, such as noise. B. power supply induced jitter (PSIJ) can be seen in a high speed serial data circuit (HSS) coupled to the power supply. These workflows may involve a wizard-style workflow that guides the user through testing, or they may be a non-guided menu flow. Both types of workflows use a graphical user interface (GUI) on a measurement instrument to help the user measure jitter or other noise in high-speed data and determine if it is coming from power rail noise. Although the description below primarily relates to identifying jitter in the HSS data, embodiments of the disclosure may also identify other defects in the generated data, such as: B. vertical noise, phase noise or other defects that may be correlated with the noise of the power supply system.

In general, a measurement instrument for identifying PSIJ includes one or more inputs or channels for receiving signals under measurement or test from a device under test (DUT). An example of a measurement tool is given by 11 described. In the present example, the DUT is a device that generates high-speed serial data. An operator configures the measurement instrument to measure the parameters of the input signal under test. In this example, the operator configures the meter to determine if power supply noise is concern, e.g. B. the ripple, voltage drift or other noticeable artifacts, contributes to the noise on the high-speed serial data. In some embodiments, the operator can program the gauge using programming commands. In other embodiments, described below, the operator uses a graphical user interface (GUI) on the meter's screen to perform setup and direct testing of the DUT that generates the HSS data so that the user can easily determine whether the noise in the HSS data comes from the power supply.

3A 12 shows a first screen or menu 302 in a wizard-like process flow presented to a user or operator of a test and measurement device. In this example, the measurement device is connected to a DUT containing one or more power rails and one or more HSS data generators for testing. In a first window of menu 302, the operator selects a power integrity (PI) test configuration. In the PI configuration, the operator then selects a specific power rail source channel to be measured and enters the total number of power rails in the DUT. In the example shown, the busbar under test is on channel 1 and there are 4 busbars. The operator can identify the test in an identification window within menu 302. Once the configuration is complete via menu 302, the user can select the Start Wizard button to start the wizard-style process flow described below.

3B Figure 12 shows a PI Assistant 304 window that assists the user in power integrity analysis. After starting the PI assistant, the menu 306 follows for configuring the PI assistant power rail, as in 3C shown. In the PI wizard configuration menu 306 for the power rail, the user specifies the type of power supply, e.g. B. whether the power supply signal affects the HSS signal as an aggressor or as a victim. In the illustrated embodiment, the user has specified that the power supply signal affects the HSS signal as an aggressor.

This in 3D The power rail configuration menu 308, shown, allows the user to select the power rail source channel and to configure a ripple frequency for artificial periodic noise applied to the power rail. This applied noise can be identified in other components of the DUT by the measurement instrument, which helps determine a source of noisy components in the DUT that may affect overall performance. In particular, the HSS data generated by the circuit can also be analyzed to determine if the noise applied to the power supply is found in the HSS data. The application of periodic noise to the power rail creates anomalies in the power distribution system that can be tested by the user to determine if PJ in the HSS data is caused by the power distribution system. In some embodiments, no external noise or ripple is applied to the power supply during the test, and instead the noise naturally present in the power distribution network is sufficient for the analysis. In any case, the above workflows allow the user to test for a correlation between significant noise frequencies in the configured power rail and the HSS data. Back to menu 308 in 3D : The selected power rail channel is configured to analyze the PSIJ on the HSS data. The power rail ripple frequency can be configured automatically or manually. In manual mode, the user measures a frequency of the noise, such as the ripple, of the busbar source connected to the selected input channel of the meter. When the ripple in the measured DC voltage is significant, it appears to the meter as an AC component, as in 10 is shown showing an example measurement screen 400 on the measurement instrument. The user can measure this frequency manually, e.g. with oscilloscope cursors 410, 412. Another method to measure the ripple frequency is to turn on MATH FFT on the power rail source channel and find the dominant frequency after the fundamental, as in highlighted with the plot cursor 420. This measured value can be set in menu 308 ( 3D ) can be entered as the ripple frequency in manual mode. In one embodiment, the determination of the dominant frequency can be automated with MATH FFT. Alternatively, the user can enter the frequency value for the value in menu 308 in manual configuration by selecting a frequency value from a data sheet describing the DUT and containing the HSS data generator.

After configuring the power rail using menus 302-308, the user next configures the HSS data test parameters using menus 310, 312, 314, and 316, which are found in the 3E , 3F , 3G and 3H are shown. These menus 310-316 are still part of the wizard flow to help the user automate testing on a test and measurement device. In Menu 310 selects the source channel on which the serial data can be affected by noise on the power supply. In the illustrated embodiment, the HSS data is received on channel 2 of the gauge. This HSS data source test allows the user to determine if the noise on the power rail is caused by switching or if there is another source coming from the power supply. In addition, the serial data configuration menu 310 allows the user to enter a PJ threshold in the form of a period of time and a maximum frequency for periodic jitter. This PJ configuration allows the meter to consider all PJ components that are longer than the PJ threshold period and equal to or lower than the maximum PJ frequency value. In one embodiment, specifying the upper frequency limit for the power rail PJ frequencies and the time threshold of the PJ helps determine whether the power rail noise is from switching or from the power supply. Typically, the upper limit for the PJ frequency depends on knowing the switching frequencies of the controllers used in the design. In one embodiment, the PJ frequency upper limit may be less than 10 MHz.

Although menu 310 indicates only a single HSS data source, ie channel 2, embodiments of the disclosure may indicate two HSS data sources, as in menu 312 of FIG 3F shown. If the user configures a gauge to have only a single HSS data source, the user can set the second serial data source window to "none" in the menu, as shown in menu 310. In this measurement with only one source, the measuring instrument uses the full bandwidth (BW). When two sources are used for the measurement, as in menu 312, the instrument calculates a MATH difference waveform as the difference between the two specified sources.

Next, the user in the in the 3A - 3K described wizard-like flow in a menu 314 prompted to configure clock recovery information for the clock that drives the high-speed serial data, as in 3G shown. In particular, the user enters information about a signal type, pattern recognition, clock edge, and data rate, as in menu 314 of FIG 3G shown. The signal type can be data, clock, or auto. Pattern recognition can be automatic or manual. The user can choose to detect a rising edge, falling edge, or both rising and falling edges of the clock. A data rate, such as 5Gb/s, is also specified in menu 314 by the user. A CCR (Constant Clock Recovery) method is usually recommended so that a measured TIE (Time Interval Error), ie a measurement of the time difference between an observed clock edge and its expected edge, contains all the components for measuring periodic jitter.

After the clock recovery information has been entered in menu 314, the user can press the autoset button in a menu 316 ( 3H) Press to automatically set up the meter to measure voltage ripple on the selected power rail(s) (PS Ripple) and to measure TIE on the selected HSS data channels. In particular, pressing the autoset button in menu 316 sets the parameters of the gauge, e.g. an oscilloscope, based on user input for the power supply and HSS configurations. For example, the setup parameters include a voltage offset value for the power rail source with an optimal V scale so that the ripple is evident. It will also set a horizontal time base with a sample rate based on the HSS data rate entered in menu 314. In addition, triggers that are related to the HSS waveform are automatically set in the device.

5 12 shows an example of the gauge display 500 after it has been set up via the menu 316 and an initial set of measurements has been taken. The display 500 can be displayed on a main display of the meter or on a remote display. In general, the top portion of the display 500 displays a spectral plot 510 of the PS ripple measurements of the selected bus or rails, while the bottom portion of the display 500 displays a spectral plot 520 of the TIE measurement of the selected HSS data. The two measurements are correlated by mapping the measurements over the same frequency range. In other words, the TIE spectra 520 are overlaid with the power supply spectra 510 . This correlated display allows the user to visually correlate overlapping dominant power components that appear as jitter components in the serial data. In one embodiment, the spectral display provides the ability to zoom and adjust the range of the horizontal axis, resulting in a better display. This spectral plot includes all PJ components and harmonics and allows the user to analyze and capture the jitter present in the power supply. In the overlapping spectra, as in the 500 edition of 5 shown, all PS and TIE correlated components are recorded at the same frequencies and displayed to the user. Although While display 520 displays the TIE of the HSS data, other characteristics of the HSS data signal may also be measured and displayed, such as: B. other forms of jitter as well as vertical noise and / or phase noise.

Embodiments of the disclosure include the ability of the wizard-based process to automatically suggest methods and specific parameters to reduce or minimize the periodic jitter measured by the device in the previous steps. As in a menu 320 from 31 illustrated, the wizard-driven process allows the user to apply a filter or filtering technique to remove specific PJ components from the serial data and reconstruct the HSS data output after applying the filter. In a menu 322 of 3y the wizard-based process automatically determines the parameters of a notch filter to be applied to the HSS data, allowing the user to visualize what the data would look like if the power supplied by the power distribution grid had a low noise level. Or, as also shown in menu 322, by unchecking an "Auto" box, the user can enter specific start and stop frequencies so that an appropriate notch filter matching the entered frequencies can be applied to the HSS data by the instrument . This provides the user with a powerful tool for effective HSS data circuit design that effectively removes the PSIJ from the HSS data waveform and then reconstructs the HSS data waveform for the user to display. A final menu 324 of the wizard-based workflow is in 3K to see. Here the user can choose to display the results of the reconstructed HSS data after notch filter application in an eye diagram, a spectral overlap display, or a histogram.

Exemplary eye diagrams illustrating increased latitude are in 6A and 6B shown. In particular, a display screen 600 includes 6A , which may be an example output display of the measuring device described above for measuring PSIJ, is an eye diagram with an aperture 610. The eye diagram on display screen 600 is an eye diagram of the HSS data before a notch filter is applied. After applying the notch filter to the HSS data as described above, a new eye diagram is displayed on the display screen 601 of FIG 6B shown having an opening 611 . As can be seen from the observation, the eye opening is 611 in the eye diagram of FIG 6B larger than the eye opening 610 in the eye diagram of FIG 6A . The increase in aperture size between the eye diagrams of the 6A and 6B is due to the application of the notch filter in the HSS data as described above. The eye diagram in 6A is the diagram of the base HSS data without any filtering, while the eye diagram is in 6B is the plot of the baseline HSS data after the notch filter is applied. The application of the notch filter improves the quality of the HSS data signal by removing or reducing the PSIJ caused by the power supply. In addition to showing the changes in the eye diagrams between 6A and 6B For example, the jitter measurement data measured by the device can also be displayed in the measurement display blocks 620, 621 shown on the lower right side of the displays 600, 601.

The TIE histograms are also shown as windows in example screens 600 and 601 in Figs 6A and 6B shown. In particular, the window in the upper left corner of each example screen 600, 601 produces a histogram of TIE that is derived from the HSS data before ( 6A) and after ( 6B) the application of the notch filter was created. In particular, the TIE histogram 630 in 6A shows many different data spikes indicative of the harmonics of the ripple on the power rail. Note how the ripple shows up in the TIE of the HSS data, meaning that in this design power supply noise has a direct impact on the final HSS data. A TIE histogram 631 in 6A shows the TIE of the HSS data after applying the filter simulating the elimination of the PSIJ. Thus, using these tools as described above, a designer can easily determine the relationship between the noise on a power rail and the resulting effects on the generated HSS data. By performing this analysis on pre-production designs, the designer can determine that a particular design is susceptible to aggressor noise, crosstalk, or coupled noise. Then the developer can make adjustments to protect the design against such noise sources.

The 7A and 7B 7 show example screens 700, 701 that may also be presented on a display of a test device according to embodiments to show eye diagrams and spectral diagrams both before and after removal of PSIJ. The display screen 700 of 7A contains two eye diagrams in the leftmost display windows. References 710 and 711 illustrate how the eye width is opened up by applying the notch filter. Additionally, display 700 shows a PSIJ peak 730 in a spectral view of the HSS data, while reference 731 illustrates how application of the notch filter significantly reduces the peak. Similar to the 600, 601's ads 6A and 6B the display screen 700 includes a measurement display block 720 that displays measurement data before and after application of the notch filter. 7B contains similar ads as those in 7A , but also shows how the user can customize the display to visualize measurement data using embodiments of the disclosure.

$$\text{Verbesserung der Augenh}\ddot{\text{o}}\text{he}\left(\text{\%}\right)=\frac{\text{PJSuppressedEH}}{\text{OriginalEH}}\ast 100$$

In one embodiment, the gauge may calculate and display a percentage of improvement in eye opening referred to as margin improvement. This margin improvement analysis compares the eye opening sizes before and after applying the filter, simulating the removal of PSIJ. Margin improvement can be presented in a results panel that can be displayed on a screen. In particular, an improvement in eye width (EW) and eye height (EH) can be determined as shown in Equations 1 and 2. $$\text{improvement in eye width}\left(\text{\%}\right)=\frac{\text{PJSuppressedEW}}{\text{OriginalEW}}\ast 100$$

$$\text{improvement of eyes}\ddot{\text{O}}\text{hey}\left(\text{\%}\right)=\frac{\text{PJSuppressedEH}}{\text{OriginalEH}}\ast 100$$

One or both of the improvement percentages may be shown on the meter display, e.g. B. on a display screen 800, which in 8th is shown.

As can be seen from the above, a user can use the 3A until 3K described wizard will guide you through the process of measuring the PSIJ and determining its impact on the performance of an HSS data producing device. In addition, the wizard flow can automatically or manually set parameters for various notch filters that, when applied to the HSS data waveform, simulate what the HSS data would look like without PSIJ.

A new non-menu-driven workflow for measuring the PSIJ of an HSS data generating circuit is described in US Pat 9A until 9G 10 are shown showing various menus that may be displayed on a display of a meter. The user interacts with the non-guided menus to set up and configure the gauge to measure the PSIJ and to determine if the measured noise in the form of TIE on the HSS data correlates with the measured PSIJ. The non-guided workflow runs in parallel and obtains the same or similar information from the user as that referred to above 3A until 3K described in a wizard style workflow, but in the unguided workflow the setup process is guided by the user and not presented by the gauge.

A menu 902 in 9A shows a power supply for measuring PSIJ while menu 904 ( 9B) Displays a power rail configuration window that allows the user to configure the power supply type, designation, number of rails, ripple frequency, and power rail source. 9C Figure 9 shows a menu 906 that allows the user to configure high-speed serial data source channels and a PJ threshold and maximum PJ frequency. a in 9D Menu 908, shown, allows the user to configure clock recovery information such as B. Signal type configuration (data, clock, auto), clock edge (rising, falling, both), pattern recognition (auto or manual), and specifying a data rate of the HSS data. A menu 910 in 9E allows the user to specify a pattern type (repeating, random) as well as a pattern length. Next, a menu displays 912 in 9F the Jitter Suppression configuration, which applies a filter to the HSS data as described above. Menu 912 allows the user to manually configure the filter parameters by entering a center frequency and frequency range, or choose to configure automatically. 9G Figure 9 shows the automatic configuration in a menu 914 for setting up the meter, e.g. B. an oscilloscope, for each PS and HSS channel. Menu 916 also allows the user to choose an output of the analysis of the PSIJ and HSS data by selecting eye diagrams, overlapped (PS and TIE) spectra, or TIE histograms. Exemplary eye diagrams were referenced above 6A , 6B , 7A and 7B described. Overlapping PS and TIE spectra were referenced above 5 described.

In addition to the graphical representation of the measurements, as in the 5 until 7 shown, the unguided workflow can also produce a results window, such as window 800 in , to communicate improvements in the measurement data directly to the user.

The above processes, both in the wizard-based workflow of the 3A until 3K as well as in the non-guided workflow 9A until 9G are described can be implemented by methods such as those in 10 include the work steps shown.

In 10 An example process 1000 according to embodiments of the disclosure begins with the initialization and setup of a measurement device, such as a sensor. an oscilloscope, in an operation 1002. Exemplary initialization operations include establishing power supply values and configuring one or more source channels to measure and identify PSIJ for the circuit design under test. Another channel is set up to identify the source of the HSS data to be measured. Then, in an operation 1004, the voltage ripple or other noise on the power rail source at the specified/measured ripple frequency is measured by the instrument and recorded as PS ripple. In an operation 1006, the device generates an HSS waveform from the HSS data input channel and then generates TIE spectra from the HSS waveform. An example of such TIE spectra is shown in the lower part of 5 shown. Next, in step 1008, the device creates a spectral view from the input channel of the power supply source with the center frequency set to the specified ripple frequency (PS_Spectra[]), which may have been specified or measured in operation 1004. Next, operation 1010 correlates the power supply (PS) ripple measured in operation 1004 with the periodic jitter (PJ) determined from the HSS TIE measurement by comparing the HSS TIE spectrum values between the Pj thresholds (Pj_threshold ( Y)) and the maximum Pj frequency values (Pj_freq_max(X)) are checked. The process 1000 then proceeds to operation 1012, which compares whether the same noise frequencies in the power supply components are also detected in the HSS data. If this is the case, then the entire circuit is susceptible to power supply noise, which carries over to the final HSS data output. If the correlation between the detected power supply frequencies and the final HSS data output is low, then the overall circuit is less susceptible to power supply noise affecting the HSS data output. More specifically, the comparison in operation 1012 evaluates the TIE spectra for the user-specified maximum Pj threshold and PJ threshold frequency. Operation 1012 includes two separate criteria. The first criterion of act 1012 is met if all TIE spectra recorded by the measurement device in the present test are less than or equal to the maximum PJ frequency specified by the user in act 1004 . The second criterion of operation 1012 is met if each of the TIE spectra recorded by the measurement device is less than or equal to the user-specified Pj threshold. If both criteria of operation 1012 are met, the process 1000 proceeds to an operation 1014 where the process 1000 records all TIE spectrum components that meet the criteria set in operation 1012 . If instead one of the criteria of operation 1012 is not met, the process 1000 proceeds to an operation 1020, where the user is presented with an indication, such as a text message. B. "Error 'Not able to identify valid power supply noise'". In other words, when process 1000 reaches operation 1020, the process determined that no noise (or a sufficient amount of noise) detected in the HSS data could be traced back to noise originating from the power supply , by performing the test described in operation 1012.

Returning to operation 1014, in this operation all TIE spectral components of the present test that meet the criteria set in operation 1012 are recorded. Then, an operation 1016 compares the PS spectral frequency (PS_spectra[]) recorded in operation 1014 to the TIE spectral frequency (TIE_spectra[]) recorded in operation 1006. If these PS and TIE components match at the same frequencies, then in an operation 1022 all of the correlating components are recorded. If none of the PS and TIE components have frequencies in common, the process 1000 returns to operation 1020 where an error message or other explanatory message is displayed to the user. When process 1000 reaches operation 1020, ie, when there is no noise, such as noise, in the HSS data. B. jitter, is found on the power rail at common frequencies, the process 1000 ends at an operation 1030. If instead it is determined that noise, such as. B. jitter, on the power rail is correlated with the noise found in the HSS data, the process 1000 generates a new HSS data signal that shows what the HSS data would look like if the noise were removed. If noise on the power rail is found in the HSS data, the instrument applies a filter such as B. a notch filter, to the ripple frequency and reconstructs the waveform of the HSS data in an operation 1024. Then in an operation 1026 this reconstructed HSS data is Data waveform shown on a gauge home display or elsewhere to show the user how the HSS data is improved by applying the notch filter. As described above, these results can be presented to the user in the form of an eye display or a histogram (both referenced above 6A , 6B , 7A and 7B described) or in the form of overlapping spectra (above with reference to 5 described) are displayed. In addition, the results of such improvement can be presented to the user in a data display, as in 8th shown.

As described above, if the instrument finds that PS spectra generated by the instrument from the power supply and TIE spectra generated by the instrument from the HSS data occur at the same frequencies, this indicates that Jitter is due to power rail noise. Although the TIE spectrum values are described in the above examples for analyzing the HSS data, embodiments of the disclosure may use other types of jitter or noise values in the correlation analysis. Using embodiments of this disclosure, the designer can modify a circuit design to minimize correlation. Additionally, embodiments of the disclosure provide an opportunity to quantify circuit improvement by creating an eye diagram of the output data signal. This eye diagram shows what the clean simulation will look like when the jitter is removed from the designed circuit. The proposed solution thus leads to the development of an improved high-speed serial system.

One of the advantages of the proposed method and apparatus is that a design engineer can change the design of a power distribution network to reduce the power supply induced jitter of the circuit at a very early stage. Another advantage is that the development engineer has insight and thus confidence before making changes to the PI hardware in the early stages of his prototypes.

11 FIG. 1 is a block diagram of an example test and measurement instrument 1100, such as. B. an oscilloscope, to implement embodiments of the disclosure disclosed herein. The meter 1100 may be an example of the meter described above. Test and measurement instrument 1100 includes one or more test ports 1102, which may be any electrical signaling medium. Test ports 1102 may include receivers, transmitters, and/or transceivers. The test ports 1102 are used to receive signals from a connected device, e.g. a DUT 1101, a circuit, a discrete device or array of devices, or other object under test. In some embodiments, the DUT 1101 is an HSS data generating device whose power rails are connected to the test pins 1102 as well as HSS data. Each input port 1102 may represent a channel of the test and measurement instrument 1100 . As described above, one or more power rails of the DUT 1101 may be connected to the measurement instrument 1100 via one or more channels, and one or more HSS data outputs may be connected to the instrument 1100 via other channels. The device can receive these multiple channels in parallel, ie simultaneously, for testing. The input ports 1102 are coupled to one or more processors 1116 to process the signals and/or waveforms received at the ports 1102 from one or more devices under test 1101 . Although in 11 only one processor 1116 is shown for better illustration, those skilled in the art will understand that instead of a single processor 1116, a plurality of processors 1116 of different types can also be used in combination.

The input ports 1102 and one or more processors 1160 may also be connected to a measurement unit 1120 within the test instrument 1100 . The measurement unit 1120 can contain individual functions for performing the measurement and correlation processes described above. For example, measurement unit 1120 may include any component or process capable of measuring aspects of a signal received via input ports 1102 in the time or frequency domain, or both. For example, the measurement unit may include functions or processes for measuring ripple, generating TIE spectra from received HSS data, and generating spectra from PJ data, as described above. Once these measurement functions are completed, the one or more processors 1116 can coordinate and evaluate these measurement functions for the measurements performed by the DUT 1101 .

A visualization unit 1130 compiles various displays generated from the measurements and analyzes performed by the measuring unit 1120 and sends them to a display 1112 for display on the 1100 instrument. In some cases, the display may be remote from the 1100 instrument itself. Visualizations can include displays such as eye diagrams, one or more spectra, including spectra from two or more measurements aligned to the same frequency range, histograms, and data reports that can present measurement data in numeric form. Each of these visualization types is described and illustrated in detail above.

In addition, a filter function 1140 may operate as described above, where the filter function applies a filter to specific waveforms at specific frequencies. As described above, this filtering simulates the effects that certain components can have on each other, such as B. Noise on a power rail affecting the HSS data.

Test and measurement instrument 1100 may include additional hardware and/or processors, such as B. conditioning circuits, analog to digital converters and/or other circuits for converting a received signal into a waveform for further analysis. The resulting waveform can then be stored in memory 1110 and displayed on display 1112.

The one or more processors 1116 may be configured to execute instructions from memory 1110 and to perform any methods and/or associated steps indicated by such instructions, such as: B. the display of measurements on a paired device according to embodiments of the disclosure. The one or more processors 1116 may perform the functions described above with reference to the measurement unit 1120, the visualization unit 1130, or the filter 1140, or the one or more processors 1116 may cooperate with still other processors to perform such functions. Memory 1110 may be implemented as a processor cache, random access memory (RAM), read only memory (ROM), solid state memory, hard disk drive(s), or other type of memory. Memory 1110 serves as a medium for storing data, computer program products, and other instructions.

The user inputs 1114 are connected to the one or more processors 1116 . User inputs 1114 may include a keyboard, mouse, trackball, touch screen, and/or other controls usable by a user with a user interface on display 1112 . The user interface of the display 1112 may present the user with the wizard-style workflow or the non-guided workflow, both of which are described above. Display 1112 may be a digital screen, CRT, or any other monitor for displaying waveforms, measurements, and other data to the user. While the components of test device 1100 are shown as being integrated into test and measurement instrument 1100, a person skilled in the art will understand that any of these components may be external to test device 1100 and associated with test device 1100 in any conventional manner coupled (e.g., wired and/or wireless communication media and/or mechanisms). For example, in some embodiments, the display 1112 may be remote from the test and measurement instrument 1100 .

Aspects of the disclosure may operate on specially designed hardware, firmware, digital signal processors, or on a specially programmed computer having a processor operating under programmed instructions. As used herein, the terms “controller” or “processor” are intended to include microprocessors, microcomputers, application specific integrated circuits (ASICs), and dedicated hardware controllers. One or more aspects of the disclosure may be embodied in computer-usable data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including controller modules) or other devices. In general, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types when executed by a processor in a computer or other device. The computer-executable instructions may be stored on a computer-readable storage medium such as a hard disk, optical disk, removable storage medium, solid-state memory, random access memory (RAM), and so on. As will be clear to a person skilled in the art, the functionality of the program modules can be combined or distributed at will. Additionally, the functionality may be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits, FPGA, and the like. Certain data structures can be used to more effectively implement one or more aspects of the disclosure, and such data structures are contemplated within the context of the computer-executable instructions and computer-usable data described herein.

The foregoing description of the invention is merely illustrative of the invention and is not to be construed as limiting. Since modifications of the disclosed embodiments that incorporate the spirit of the invention may occur to those skilled in the art, the invention should be construed to include everything that falls within the scope of the invention.

In the following description, for the purpose of explanation, specific details are set forth in order to facilitate an understanding of the present disclosure. However, one skilled in the art will appreciate that the present disclosure may be practiced without these details. Those skilled in the art will recognize that embodiments of the present disclosure, some of which are described below, can be integrated into a variety of systems.

However, the systems and methods are not limited to the specific embodiments described herein. Furthermore, the structures and devices shown in the figures are example embodiments of the present disclosure and are not intended to obscure the present disclosure.

It should be noted that the description is merely illustrative of the principles of the present invention. Thus, those skilled in the art will be able to devise various arrangements which, although not expressly described herein, embody the principles of the present invention. Furthermore, all examples mentioned herein are generally intended to be expressly explanatory only, to help the reader understand the principles of the invention and the concepts contributed by the inventor to advance the art, and should be construed as not limiting thereto specifically mentioned examples and conditions. Furthermore, all statements contained herein that describe principles, aspects, and embodiments of the invention, and specific examples thereof, should be understood to include equivalents thereof.

EXAMPLES

The following are examples of the technologies disclosed herein. An embodiment of the technologies may include one or more and any combination of the examples described below.

Example 1 is a method in a test and measurement instrument, comprising: measuring a noise at an output of a power supply, measuring a jitter of a serial data signal generated by a data generation circuit coupled to the power supply, and correlating the measured from the power supply noise with the jitter of the serial data signal.

Example 2 is a method according to Example 1, further comprising generating a first frequency domain spectral representation of measured noise spanning a spectrum of frequencies, generating a second frequency domain spectral representation of measured jitter spanning the same spectrum of frequencies, and presenting the first spectral representation and the second spectral representation on an output screen.

Example 3 is a method according to Example 2, in which the spectrum of frequencies is specified by the user.

Example 4 is a method according to any of the preceding examples, wherein correlating the noise measured from the power supply to the jitter of the serial data signal, searching noise components of the output of the power supply over a spectrum of frequencies, searching jitter components of the serial data signal over the same spectrum of frequencies and determining particular frequencies within the range of frequencies for which the noise components of the output of the power supply exceed a first threshold and for which the jitter components of the serial data signal exceed a second threshold.

Example 5 is a method according to any of the preceding examples, further comprising applying a generated voltage signal to the power supply at a specific frequency.

Example 6 is a method according to any of the preceding examples, in which measuring noise at an output of a power supply includes measuring a ripple.

Example 7 is a method according to any of the preceding examples, in which measuring jitter of a serial data signal includes measuring time interval error.

Example 8 is a method according to any of the preceding examples, further comprising measuring the vertical noise of the serial data signal and correlating the noise measured from the power supply to the vertical noise of the serial data signal.

Example 9 is a method according to any of the preceding examples, further comprising applying a notch filter to the serial data signal to generate a filtered serial data signal and displaying a visual output of the filtered serial data signal.

Example 10 is a method according to example 9, where parameters for the notch filter are configurable by a user of the test and measurement instrument.

Example 11 is a method according to Example 9, wherein displaying a visual output of the filtered serial data signal includes generating an eye diagram of the filtered serial data signal, generating a spectral representation of the filtered serial data signal, or generating a histogram of the filtered serial data signal.

Example 12 is a method according to Example 9, further comprising displaying a visual output of the serial data signal prior to applying the notch filter.

Example 13 is a method according to Example 9, further including determining an amount of increase in the opening of an eye diagram generated from the serial data signal before and after application of the notch filter and presenting the determined amount of improvement on a display.

Example 14 is a method according to any of the preceding examples, wherein correlating the noise measured from the power supply to the jitter of the serial data signal comprises comparing the ripple measured from the power supply to the time interval error of the serial data at specified frequencies.

Example 15 is a method according to Example 14, wherein only a power supply measured ripple greater than a ripple threshold is used in the correlation.

Example 16 is a method according to any of the previous examples, in which only the ripple measured from the power supply at a frequency below a predefined frequency is used for the correlation.

Example 17 is a method according to any of the preceding examples, further comprising presenting a series of interactive screens to a user of the test and measurement instrument.

Example 18 is a method according to example 17 in which the series of interactive screens accepts a voltage ripple frequency from the user and the voltage ripple is applied to the power supply at the assumed ripple frequency.

Example 19 is a method according to Example 17, in which the test and measurement instrument is coupled to a device under test (DUT) that includes the power supply and the data generation circuitry, and in which the series of interactive screens accepts input from a user who is a Defines an input channel of the test and measurement instrument coupled to the power supply and accepts input from the user defining an input channel of the data generation circuit.

Example 20 is a test and measurement system with a device under test (DUT), the DUT containing a power supply and a serial data generator that uses energy supplied by the power supply, and a test and measurement instrument that is connected to the DUT and includes an input channel for receiving a power supply signal from the power supply of the DUT, another input channel for receiving the serial data signal generated by the DUT, a measurement unit constructed to measure the noise of the power supply signal and the jitter of the signal generated by the DUT serial data signal measures, a processor that is constructed in such a way that it correlating noise measured from the power supply to the jitter of the serial data signal, and a display arranged to display the results of the correlation.

Example 21 is a test and measurement system according to Example 20, in which the results of the correlation provide a first spectral representation in a frequency domain of power supply noise spanning a spectrum of frequencies and a second spectral representation in the frequency domain of jitter spanning the same spectrum of frequencies. include.

Example 22 is a test and measurement system according to Example 17, in which the processor of the test and measurement instrument is structured to apply a notch filter to the serial data signal to generate a filtered serial data signal, and in which the display is structured so is that it displays a visual output of the filtered serial data signal.

Example 23 is a test and measurement system according to example 22, wherein the visual output of the filtered serial data signal comprises an eye diagram of the filtered serial data signal, a spectral plot of the filtered serial data signal, or a histogram of the filtered serial data signal.

Example 24 is a test and measurement system according to Example 22, in which the processor is structured to determine an amount of increase in the aperture of an eye diagram display generated from the serial data signal before and after application of the notch filter, and in which the display is structured to show results of the determination.

Example 25 is a test and measurement system according to any of Examples 20-24, wherein the test and measurement instrument includes memory for storing a series of interactive screens on the display used for measuring power supply noise and power supply jitter serial data signal are relevant.

The previously described versions of the disclosed subject matter have many advantages that are either described or obvious to a person of ordinary skill in the art. However, these benefits or features are not required in all versions of the disclosed devices, systems, or methods.

In addition, certain features are referenced in this written description. It is to be understood that the disclosure in this specification encompasses all possible combinations of these special features. Where a particular feature is disclosed in connection with a particular aspect or example, that feature may also be used in connection with other aspects and examples where possible.

When reference is made in this application to a method having two or more defined steps or acts, the defined steps or acts may be performed in any order or simultaneously unless the context precludes those possibilities.

While specific examples of the invention have been shown and described for purposes of illustration, various modifications can be made without departing from the spirit and scope of the invention. Accordingly, the invention should not be limited except as by the appended claims.

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• IN 202221006430 [0001]

Claims (25)

A method in a test and measurement instrument that includes: measuring noise at an output of a power supply; measuring the jitter of a serial data signal generated by a data generation circuit connected to the power supply; and Correlate the noise measured by the power supply with the jitter of the serial data signal. The procedure in a test and measurement instrument claim 1 further comprising: generating a first spectral representation in a frequency domain of the measured noise comprising a spectrum of frequencies; generating a second frequency domain spectral representation of the measured jitter comprising the same spectrum of frequencies; and presenting the first and second spectral representations on an output screen. The procedure in a test and measurement instrument claim 2 , where the spectrum of frequencies is set by the user. The method in a test and measurement instrument according to any one of Claims 1 until 3 wherein correlating the noise measured from the power supply to the jitter of the serial data signal comprises: looking for noise components at the output of the power supply over a specified spectrum of frequencies; searching for jitter components of the serial data signal over the same spectrum of frequencies; and determining particular frequencies within the spectrum of frequencies for which the noise components of the output of the power supply exceed a first threshold and for which the jitter components of the serial data signal exceed a second threshold. The method in a test and measurement instrument according to any one of Claims 1 until 4 , further comprising applying a generated voltage signal to the power supply at a specific frequency. The method in a test and measurement instrument according to any one of Claims 1 until 5 wherein the measurement of noise at an output of a power supply includes a measurement of ripple. The method in a test and measurement instrument according to any one of Claims 1 until 6 wherein the measurement of the jitter of a serial data signal comprises a measurement of a time interval error. The method in a test and measurement instrument according to any one of Claims 1 until 7 further comprising: measuring vertical noise of the serial data signal; and correlating the noise measured from the power supply to the vertical noise of the serial data signal. The method in a test and measurement instrument according to any one of Claims 1 until 8th further comprising: applying a notch filter to the serial data signal to generate a filtered serial data signal; and displaying a visual output of the filtered serial data signal. The procedure in a test and measurement instrument claim 9 wherein the parameters for the notch filter are configurable by a user of the test and measurement instrument. The procedure in a test and measurement instrument claim 9 or 10 wherein displaying a visual output of the filtered serial data signal comprises generating an eye diagram of the filtered serial data signal, generating a spectral representation of the filtered serial data signal, or generating a histogram of the filtered serial data signal. The method in a test and measurement instrument according to any one of claims 9 until 11 , further comprising displaying a visual output of the serial data signal prior to application of the notch filter. The method in a test and measurement instrument according to any one of claims 9 until 12 further comprising: determining an amount of increase in the opening of an eye diagram generated from the serial data signal before and after application of the notch filter; and presenting the determined improvement amount on a display. The method in a test and measurement instrument according to any one of Claims 1 until 13 wherein correlating the noise measured by the power supply to the jitter of the serial data signal comprises comparing the ripple measured by the power supply to the time interval error of the serial data at specified frequencies. The procedure in a test and measurement instrument Claim 14 , where only power supply measured ripple greater than a ripple threshold is used in the correlation. The method in a test and measurement instrument according to any one of Claims 1 until 15 , where only a ripple measured from the power supply at a frequency lower than a predefined frequency is used for the correlation. The method in a test and measurement instrument according to any one of Claims 1 until 16 , further comprising presenting a series of interactive screens to a user of the test and measurement instrument. The procedure in a test and measurement instrument Claim 17 , where the series of interactive screens accepts a voltage ripple frequency from the user and where the voltage ripple is applied to the power supply with the accepted ripple frequency. The procedure in a test and measurement instrument Claim 17 or 18 in which the test and measurement instrument is coupled to a device under test (DUT) comprising the power supply and the data generation circuitry and in which the series of interactive screens accepts input from a user defining an input channel of the test and measurement instrument, coupled to the power supply and accepting input from the user defining an input channel of the data generation circuit. A test and measurement system that includes: a device under test (DUT), the DUT including a power supply and a serial data generator using power provided by the power supply; and a test and measurement instrument coupled to the DUT, including: an input channel for receiving a power supply signal from the power supply of the DUT; another input channel for receiving a serial data signal generated by the DUT; a measurement unit structured to measure noise of the power supply signal and jitter of the serial data signal generated by the DUT; a processor structured to correlate the noise measured from the power supply to the jitter of the serial data signal; and a display structured to show the results of the correlation. The test and measurement system claim 20 wherein the results of the correlation comprise: a first spectral representation of power supply noise in a frequency domain comprising a spectrum of frequencies; and a second frequency domain jitter spectral plot covering the same spectrum of frequencies. The test and measurement system claim 20 or 21 in which the processor of the test and measurement instrument is structured to apply a notch filter to the serial data signal to produce a filtered serial data signal and in which the display is structured to provide a visual output of the filtered serial data signal indicates. The test and measurement system Claim 22 wherein the visual output of the filtered serial data signal comprises an eye diagram of the filtered serial data signal, a spectral representation of the filtered serial data signal, or a histogram of the filtered serial data signal. The test and measurement system Claim 22 or 23 wherein the processor is structured to determine an amount of increase in opening of an eye diagram display generated from the serial data signal before and after application of the notch filter, and wherein the display is structured to display results of the determination . The test and measurement system according to one of the claims 20 until 24 , in which the test and measurement instrument includes memory for storing a series of interactive screens on the display relevant to the measurement of power supply noise and jitter on the serial data signal.

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