DE102021208765A1 - Clamping circuit for a semiconductor switching element in an inverter; Inverter with such a clamp circuit - Google Patents

Abstract

Clamping circuit (10) for a semiconductor switching element (16) in an inverter, the inverter being designed to power an electric drive in an electric vehicle or hybrid vehicle in order to convert a direct current provided by a DC direct voltage source into an alternating current, the clamping circuit (10) thereto is designed to short-circuit a control connection (17) of the semiconductor switching element (16) to a reference potential connection (19) of the semiconductor switching element (16) in order to counteract voltage fluctuations at the semiconductor switching element (16) caused by parasitic capacitances of the inverter, the inverter additionally having a driver component (12) which is designed to generate control signals for driving the semiconductor switching element (16) and to conduct these to the control connection (17) of the semiconductor switching element (16), the clamping circuit (10) being arranged spatially separate from the driver module (12).

Description

The invention relates to a method and a device for detecting a short circuit in a semiconductor switching element installed in an inverter. The inverter is used to power an electric drive in an electric vehicle or hybrid vehicle. Furthermore, the invention relates to an inverter with such a device.

Purely electric vehicles and hybrid vehicles are known in the prior art, which are driven exclusively or in support of one or more electric machines as drive units. In order to supply the electric machines of such electric vehicles or hybrid vehicles with electric energy, the electric vehicles and hybrid vehicles include electric energy stores, in particular rechargeable electric batteries. These batteries are designed as DC voltage sources. However, the electrical machines usually require an AC voltage. Therefore, power electronics with a so-called inverter are usually connected between a battery and an electric machine of an electric vehicle or a hybrid vehicle.

Such inverters typically include semiconductor switching elements typically formed of transistors. It is known to provide the semiconductor switching elements in different degrees of integration, namely either as discrete individual switches with a low degree of integration but high scalability, as power modules with a high degree of integration but low scalability, and as half-bridges, which in terms of degree of integration and scalability between individual switches and half-bridges rank Each half-bridge includes a high-side switch position (hereinafter: "highside") with a higher electrical potential and a low-side switch position (hereinafter: "lowside") with a lower electrical potential. The high side and the low side can each include one or more individual switches/semiconductor switching elements that are connected in parallel.

Depending on the design of the semiconductor switching elements, these can then be switched to conduct or block current by applying current or voltage to the semiconductor switching elements. In this way, the semiconductor switching elements are preferably switched in accordance with a pulse width modulation (PWM) in order to enable a sinusoidal time characteristic of the phase currents. In this way, a direct current on the input side can be converted into a multi-phase output current (alternating current) with a plurality of phase currents, with which an electric drive (electric machine) of an electric vehicle or hybrid vehicle is supplied with current.

Parasitic elements are known to be present in inverter systems. They can exist in the form of parasitic capacitances between a control terminal (gate terminal) and a controlled terminal (drain terminal) of the semiconductor switching elements (e.g. IGBT or MOSFET). Such parasitic capacitances result in voltage fluctuations, in particular voltage overshoots, when the semiconductor switching elements are switched. These voltage fluctuations represent a disruption to the regular operation of the inverter, particularly in the case of inverter systems which are based on so-called wide bandgap semiconductors as their base material and which are characterized by their short switching times a bridge short circuit in which the high side is short circuited to the low side and the functionality of the inverter is severely impaired.

It is an object of the invention to provide a clamp circuit in which the above disadvantages are at least partially overcome.

According to the invention, this object is achieved by the clamping circuit and the inverter according to the independent patent claims. Advantageous refinements and developments of the invention emerge from the dependent patent claims.

The invention relates to the field of inverters for powering an electric drive in an electric vehicle or a hybrid vehicle. The inverter includes a plurality of half-bridges, each corresponding to one of the power phases of the output multi-phase alternating current. For example, the inverter includes three half-bridges, each half-bridge being associated with an associated current phase of the three-phase output current. The output current is an alternating current, which is generated based on a direct current on the input side by means of targeted switching operations of the semiconductor switching elements. The half bridges each include a high side and a low side. The high side and the low side each include one or more semiconductor switching elements connected in parallel. The semiconductor switching elements are preferably mounted on a substrate. The semiconductor switching elements form a switch arrangement.

The semiconductor switching elements are preferably in the form of transistors, such as IGBTs or MOSFETs, educated. The semiconductor switching elements each have a control connection (eg gate connection) for impressing a control signal in order to switch the respective semiconductor switching element between a closed or conducting state and an open or blocking state. The semiconductor switching elements each have a controlled connection (eg drain connection) and a reference potential connection (eg source connection) for sending through a base current or transistor current.

In terms of circuitry, the inverter includes, in addition to the switch arrangement, a driver module which includes a large number of electronic components with which a printed circuit board is fitted, for example. The electronic components are used to generate control signals and to transmit them to the control connection of the semiconductor switching elements in order to enable switching operations in the semiconductor switching elements between the blocking state and the conducting state. In addition, the inverter circuit includes a clamping circuit which is designed to short-circuit (or "clamp") the control terminal of at least one of the semiconductor switching elements to the reference potential terminal of the semiconductor switching element in order to counteract the voltage fluctuations caused by parasitic capacitances (so-called Miller capacitances) of the inverter. According to the invention, the clamping circuit is arranged separately from the driver module. This meant that the clamping circuit is not part of the driver module, but is separate circuitry from it. In this way, the distance between the clamping circuit and the semiconductor switching elements is reduced, so that the voltage fluctuations that occur due to parasitic capacitances, in particular voltage increases (or "spikes"), can be derived more effectively to the reference potential, which is usually a ground potential provided by a ground . Bridge short circuits can thus be reduced particularly effectively. The functionality of the inverter is therefore improved.

According to one embodiment, the clamping circuit has a clamping transistor circuit block comprising a clamping transistor and an activation circuit block for activating the clamping transistor. The clamping transistor is connected between the control connection and the reference potential connection of the semiconductor switching element and is therefore able to bring about a short circuit between the control connection and the reference potential connection in order to discharge voltage fluctuations or excess voltage increases to ground.

According to a further embodiment, the activation circuit block has a comparator which is designed to compare a control voltage of the semiconductor switching element with a predetermined reference voltage and to activate a conductive state of the clamping transistor depending on the result of the comparison. In this way, the operating state of the clamping transistor can be controlled by means of a precise measurement of the control voltage of the semiconductor switching element and a comparison of the measurement result with the reference voltage. The short circuit or Miller clamping is set particularly reliably. The comparator is preferably designed to switch a signal inverter connected between a control connection and a reference potential connection of the clamping transistor into a conductive state with a first activation voltage if the control voltage of the semiconductor switching element is higher than the predetermined reference voltage. More preferably, the comparator is also designed to put the signal inverter into a non-conducting state with a second activation voltage that is lower than the first activation voltage if the control voltage of the semiconductor switching element is lower than the predetermined reference voltage.

According to a further embodiment, the activation circuit block has two comparators connected in parallel with one another. The use of two comparators connected in parallel increases the signal strength of the activation voltage, so that the control terminal of the signal inverter can be charged more efficiently. This results in easier switching of the signal inverter.

In accordance with a further embodiment, the clamping circuit has a deactivation circuit block for deactivating the clamping transistor, the deactivation circuit block having a signal inverter which is connected between the control connection and the reference potential connection of the clamping transistor. A Zener diode is preferably connected upstream of the signal inverter, which is designed to block the signal inverter as long as a gate voltage provided by the voltage generator and measured across a gate resistor of the semiconductor switching element does not exceed a preset threshold voltage. The gate voltage, which is measured in front of the gate resistance of the semiconductor switching element, corresponds to the control voltage of the semiconductor switching element in real time. If the control voltage of the semiconductor switching element exhibits excesses due to the Miller capacitances inherent in the inverter, these voltage excesses can be delayed when the preset threshold voltage is exceeded cause the signal inverter to switch into the conductive state without causing any damage. With this measure, delays between the generation of the activation voltage by the comparator/comparators and the corresponding switching of the clamping transistor/comparators can be effectively avoided.

The invention is explained below by way of example using the embodiments shown in the figures.

• 1 ein schematisches Schaltbild eines Inverters mit einer Schalteranordnung, einem Treiberbaustein und einer externen Klemmschaltung;
• 2 ein schematisches Schaltbild des Inverters, wobei die Schalteranordnung detailliert gezeigt ist;
• 3 ein schematisches Schaltbild der Klemmschaltung, die einen Klemmtransistorschaltungsblock, einen Aktivierungsschaltungsblock und einen Deaktivierungsschaltungsblock umfasst.

Show it:

• 1 a schematic circuit diagram of an inverter with a switch arrangement, a driver module and an external clamping circuit;
• 2 a schematic circuit diagram of the inverter, wherein the switch arrangement is shown in detail;
• 3 Figure 12 is a schematic circuit diagram of the clamp circuit including a clamp transistor circuit block, an enable circuit block, and a disable circuit block.

Identical objects, functional units and comparable components are denoted by the same reference symbols across the figures. These objects, functional units and comparable components are designed to be identical in terms of their technical features, unless the description explicitly or implicitly states otherwise.

1 shows a schematic and greatly simplified circuit of an inverter for energizing an electric drive in an electric vehicle or hybrid vehicle. The inverter circuit comprises a switch arrangement 14 which contains a number of semiconductor switching elements. The semiconductor switching elements typically form a number of half bridges, each of which has a high side and a low side. Each high side or low side in turn comprises one or more semiconductor switching elements connected in parallel. The number of half-bridges corresponds to the number of phases of the AC current on the output side, which is fed into the electric drive. The inverter circuit includes a driver module 12, which includes a large number of electronic components with which, for example, a printed circuit board is fitted. The electronic components are used to generate control signals and to transmit them to a control connection (eg gate connection) of the semiconductor switching elements in order to switch the semiconductor switching elements between an off state and an on state. In addition, the inverter circuit includes a clamping circuit 10, which is designed to short-circuit (or "clamp") the control connection of at least one of the semiconductor switching elements to a reference potential connection (e.g. source connection) of the semiconductor switching element in order to prevent parasitic capacitances (so-called Miller capacitances) of the Counteract voltage fluctuations caused by inverters at a controlled terminal (eg drain terminal) of the semiconductor switching element.

According to the invention, the clamping circuit 10 is arranged separately from the driver module. This means that the clamping circuit is not part of the driver module 12, but rather a circuit arrangement separate from it. In this way, the distance between the clamping circuit 10 and the semiconductor switching elements is reduced, so that the voltage fluctuations that occur due to parasitic capacitances, in particular voltage increases (or “spikes”), are discharged more effectively to the reference potential, which is usually a ground potential provided by a ground can.

2 FIG. 12 shows a schematic circuit diagram of the inverter, in which the switch arrangement 14 is shown by way of example and in detail. The switch assembly 14 preferably includes a plurality, e.g. B. three half-bridges, of which only one half-bridge with six parallel-connected semiconductor switching elements 16 is shown here for the sake of clarity. The semiconductor switching elements 16 are preferably in the form of IGBTs and each have a control connection 17 (gate connection), a controlled connection 18 (drain connection) and a reference potential connection 19 (source connection). The control connection 17 is connected in terms of signals via a signal line to a driver output 15 of the driver module 12 in order to enable control signals to be transmitted. A first DC voltage input 13 and a second DC voltage input are used to feed a DC voltage provided by a DC voltage source (eg battery) into the switch arrangement 14 . The controlled terminal 18 of the respective semiconductor switching elements 16 is electrically connected to the first or second DC voltage input 11, 13. The reference potential connection 19 of the respective semiconductor switching elements 16 is electrically connected to a ground 20 .

3 shows a detailed representation of the clamping circuit 10 according to the invention. The clamping circuit 10 comprises three circuit blocks: a clamping transistor circuit block 101, an activation circuit block 102 and a deactivation circuit block 103. The clamping transistor circuit block 101 comprises a clamping transistor 25 which is connected between the control terminal 17 and the reference potential terminal 19 of the semiconductor switch lementes 16 is connected. The clamping transistor 25 itself has a control connection 26 (gate connection), a controlled connection 27 (drain connection) and a reference potential connection 28 (source connection). The controlled connection 27 of the clamping transistor 25 is electrically connected to the control connection 17 of the semiconductor switching element 16 . The reference potential connection 28 of the clamping transistor 25 is electrically connected to the reference potential connection 19 of the semiconductor switching element 16 . The control connection 26 of the clamping transistor 25 is connected to a main supply line 22 via a secondary supply line 24 (see FIG 2 ) of the driver module 12 is connected. A series resistor 29b and a diode 31a, which are designed to limit the base current for the clamping transistor 25, are connected in the auxiliary supply line 24. FIG. This measure protects the clamping transistor 25 from the risk of burnout due to excessive current feed. In addition, a capacitor 23a and a series resistor 29a are connected in parallel to one another between the control connection 26 and the controlled connection 27 of the clamping transistor 25 . The capacitor 23a and the series resistor 29a serve as an additional voltage supply for operating the clamping transistor 25 in the event that the main supply line 22 and/or the auxiliary supply line 24 fail.

The clamping transistor 25 is operated between a conducting state and a blocking state by transmitting corresponding control signals from the main and auxiliary supply lines 22, 24 to the control terminal 26. In the conductive state of the clamping transistor 25, a forward current flows through the clamping transistor 25, so that the control connection 17 of the semiconductor switching element 16 is short-circuited with its reference potential connection 19. In this case, Miller clamping is brought about as a result, so that a bridge short circuit, namely a short circuit between the high side and the low side, which can be attributed to parasitic capacitances in the switch arrangement 14, is prevented. When the clamping transistor 25 is in the blocking state, the on-state current is blocked, so that there is no short circuit between the control connection 17 and the reference potential connection 19 of the semiconductor switching element 16 .

It is essential that Miller clamping is not active at random but only at appropriate times. To ensure this, the clamping circuit 10 according to the invention uses the activation circuit block 102. The activation circuit block 102 includes a signal inverter 33 which is electrically connected to the control terminal 26 of the clamping transistor 25 on the one hand and to ground 20 on the other hand. The signal inverter 33 is designed to receive control signals and to be switched to a conducting or a blocking state. When the signal inverter 33 is in the on state, the control connection 26 of the clamping transistor 25 is short-circuited to the reference potential connection 28 of the clamping transistor 25 or to ground 20 . In the case of such a short circuit, control signals from the secondary supply line 24 are not transmitted to the control connection 26 but instead are diverted directly to ground 20 . This prevents the clamping transistor 25 from being switched for the purpose of Miller clamping. This short circuit is prevented in the blocking state, so that control signals are transmitted from the secondary supply line 24 to the control connection 26 in order to switch the clamping transistor 25 to activate Miller clamping.

A first comparator 38 and a second comparator 39 are provided in the activation circuit block 102 to switch the signal inverter 33 between the above two operating states. Each of the two comparators 38, 39 has a positive signal input 41, 44 and a negative signal input 42, 43 and a signal output 45, 46. A control voltage or a gate voltage of the semiconductor switching element 16 is input into the positive signal input 41, 44. The control voltage is taken from a control signal generator 34, 35, with a series resistor 29d, 29e being connected between the positive signal input 41, 44 and the control signal generator 34, 35 for voltage division. A reference voltage diode 50 connected to a reference signal line 40 is designed to generate and send a reference voltage to the negative signal input 42,43. In the first and second comparator 38, 39, the control voltage is compared with the reference voltage. If the control voltage is less than the reference voltage, a first activation voltage for the signal inverter 33 is generated at the signal output 45, 46, with which the signal inverter 33 is operated in the open or non-conductive state. In this case, the supply current can flow from the auxiliary supply line 24 to the control terminal 26 of the clamping transistor 25 without being diverted through the signal inverter 33 to ground. The clamping transistor 25 can therefore be operated in the conductive state, so that the short circuit between the control connection 17 and the reference potential connection 19 of the semiconductor switching element 16 is activated for the purpose of Miller clamping. If the control voltage is greater than the reference voltage, a second activation voltage, which is higher than the first activation voltage, is generated at the signal output 45, 46 for the signal inverter 33, with which the signal inverter 33 is operated in the closed or conductive state. In this case, the supply Current from the auxiliary supply line 24 does not flow through to the control terminal 26 of the clamping transistor 25, but is diverted through the signal inverter 33 to ground. The clamping transistor 25 can therefore not be operated in the conductive state, so that the short circuit between the control connection 17 and the reference potential connection 19 of the semiconductor switching element 16 is deactivated. For the purpose of limiting the control current, a resistor 29c and a diode 31b are connected between that of the secondary supply line 24 and the signal output 45, 46, with a further resistor 29h being connected in front of the signal inverter 33 at the same time. By means of the two comparators 38, 39 connected in parallel, the control connection of the signal inverter 33 can be electrically charged more quickly in order to switch the signal inverter 33 more effectively and more quickly.

A plurality of capacitors 23b,c are connected between the reference signal line 40 and ground 20 and serve as a filter for the reference voltage, in particular to eliminate interference signals from the reference voltage and to smooth the reference voltage. In addition, several resistors 29f,g are connected between the control signal generator 34, 35 and the ground 20, which serve to divide the control voltage.

Depending on the design, delays can occur between the generation of the activation voltage by the comparators 38, 39 and the corresponding switching of the clamping transistor 25. To counteract these delays and to avoid late Miller clamping (or termination) associated with the delays, the disable circuit block 103 is used. A further signal inverter 37 is used in the deactivation circuit block 103 and is supplied with a deactivation voltage from a voltage generator 36 . The deactivation voltage corresponds to the control voltage or gate voltage of the semiconductor switching element 16, the deactivation voltage being a gate voltage measured before the gate resistance of the semiconductor switching element 16, which is not subject to a delay. A Zener diode 51 and a gate resistor 29j are connected between the voltage generator 36 and the signal inverter 37 . Zener diode 51 blocks signal inverter 37 as long as the deactivation voltage does not exceed a preset threshold voltage. When the deactivation voltage exceeds the preset threshold voltage, the zener diode 51 becomes conductive so that the deactivation voltage switches the signal inverter into a conducting state. In this state, the control connection 26 of the clamping transistor 25 is short-circuited to ground 20 . The threshold voltage is chosen depending on the gate resistance of the semiconductor switching element 16 . A so-called pull-down resistor 29k is additionally connected between the gate resistor 29j and the ground 20.

Reference List

10

clamping circuit

11

second DC voltage input

12

driver block

13

first DC voltage input

14

switch arrangement

15

driver output

16

semiconductor switching element

17

control port

18

controlled connection

19

reference potential connection

20

Dimensions

22

main supply line

23a-c

capacitor

24

secondary supply line

25

clamping transistor

26

control port

27

controlled connection

28

reference potential connection

29a-k

Resistance

31 ab

diode

33

signal inverter

34, 35

control signal generator

36

voltage generator

37

signal inverter

38

first comparator

39

second comparator

40

reference signal line

41, 44

positive signal input

42, 43

negative signal input

45, 46

signal output

50

reference voltage diode

51

zener diode

101

clamping transistor circuit block

102

activation circuit block

103

disable circuit block

Claims (9)

Clamping circuit (10) for a semiconductor switching element (16) in an inverter, the inverter being designed to power an electric drive in an electric vehicle or hybrid vehicle in order to convert a direct current provided by a DC direct voltage source into an alternating current, the clamping circuit (10) thereto is designed to short-circuit a control connection (17) of the semiconductor switching element (16) to a reference potential connection (19) of the semiconductor switching element (16) in order to counteract voltage fluctuations at the semiconductor switching element (16) caused by parasitic capacitances of the inverter, the inverter additionally having a driver component (12) which is designed to generate control signals for driving the semiconductor switching element (16) and to conduct these to the control connection (17) of the semiconductor switching element (16), the clamping circuit (10) being arranged spatially separate from the driver module (12). Clamping circuit (10) after claim 1 wherein the clamping circuit (10) comprises a clamping transistor circuit block (101) comprising a clamping transistor (25) and an activation circuit block (102) for activating the clamping transistor (25). Clamping circuit (10) after claim 2 , wherein the activation circuit block (102) has a comparator (38, 39) which is designed to compare a control voltage of the semiconductor switching element (16) with a predetermined reference voltage and to activate a conductive state of the clamping transistor (25) depending on the comparison result. Clamping circuit (10) after claim 3 , wherein the comparator (38, 39) is designed to put a signal inverter (33) with a first activation voltage into a conductive state when the control voltage of the semiconductor switching element (16) is higher than the predetermined reference voltage. Clamping circuit (10) after claim 4 , wherein the comparator (38, 39) is designed to put the signal inverter (33) into a non-conducting state with a second activation voltage that is lower than the first activation voltage if the control voltage of the semiconductor switching element (16) is lower than the predetermined one reference voltage is. Clamping circuit (10) according to one of claims 3 until 5 wherein the activation circuit block (102) has two comparators (38, 39) connected in parallel with one another. Clamping circuit (10) according to one of Claims 1 until 6 , wherein the clamping circuit (10) has a deactivation circuit block (103) for deactivating the clamping transistor (25), wherein the deactivation circuit block (103) has a signal inverter (37) which is connected between the control connection (26) and the reference potential connection (28) of the clamping transistor ( 25) is switched on. Clamping circuit (10) after claim 7 , wherein the signal inverter (37) is preceded by a zener diode (51) which is designed to block the signal inverter (37) as long as a voltage generator (36) provided and measured in front of a gate resistance of the semiconductor switching element (16). Gate voltage does not exceed a preset threshold voltage. Inverter for an electric drive of an electric vehicle or a hybrid vehicle, comprising a clamp circuit (10) according to one of Claims 1 until 8th .

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