DE102021208417A1 - METHOD OF RUNNING A SWITCHED SWITCHING ISOLATION POWER CONVERTER WITH AN OUTPUT POWER RANGE TO RUN A CONNECTABLE LOAD - Google Patents

Abstract

The invention relates to a method for operating a clocked isolating power converter with an output power range for operating a load that can be connected, the output power range resulting from a permissible output voltage range and a permissible output current range, the power converter having a switch, an inductance and an on/off device Method is characterized by the following steps:- in a first mode of operation, ranging from the maximum output current of the power converter of 100% to a reduced output current, setting the on/off device to a duty cycle of 100%, and adjusting the converter clock frequency to the output current of the power converter for the load,- in a second mode of operation ranging from the reduced output current to the minimum output current, maintaining the converter clock frequency and adjusting the duty cycle around the working point to change, and thus to further reduce the output current of the clocked converter for the load, wherein an on-blanking device frequency from a duty cycle that is in the range of 40% to 20% is reduced with decreasing duty cycle, to a modulation depth of the current modulation of the output current in a desired range, with the on/off gate frequency being higher than the on/off gate frequency by a factor of 2 to 40, preferably by a factor of 3 to 15 at the duty cycle which is in the range of 40% to 20% minimum duty cycle.

Description

technical field

The invention relates to a method for operating a switched-mode isolating power converter with an output power range for operating a connectable load.

background

Electronic circuits, for example power converters for supplying a load with electrical energy or power, ie for converting it between a source and a load, are nowadays mostly operated in a clocked manner in order to be able to work with low losses, and almost always have to be controlled. For this purpose, such a clocked electronic power converter must be able to enable different voltage transformations between its input and output, even with different output currents. In other words, this power converter must be able to set and thus control different output currents, which can result in different voltage conversions between its input and output, depending on the current load. Each clocked electronic power converter considered here must therefore work properly in a planar and integrally coherent work area in an IV diagram that is spanned by the output current I _A as the x-axis and the voltage conversion as the y-axis, i.e. low-loss electrical energy or power can walk. If the average value of the input voltage over time is essentially constant and known as such, which is always assumed below, the output voltage V _A can also be plotted directly on the y-axis of the above IV diagram instead of the voltage ratio.

The clocked electronic power converter must also be able, using a special control variable and depending on its current load, to approach a specific working point within its planar working area repeatedly and repeatedly, which ultimately happens through quick and precise adjustment of the power to be transmitted at the moment. Only then is the clocked electronic power converter under consideration suitable as an actuator within the control loop for electronic energy conversion or energy supply. This control circuit occurs in all control gear, laboratory power supplies, switched-mode power supplies, DC or DC converters, active voltage or current sources or similar and takes on a second coordinate within the working area, which is also called the control coordinate. A first coordinate corresponds to the load characteristic. The point of intersection between these two coordinates, i.e. between the load characteristic and the control coordinate, results in the above working point. If this control circuit is, for example, geared to the output current of the clocked electronic power converter, its associated control coordinates in said IV diagram are perpendicular to the I _A axis at the point that corresponds to the currently specified target value for the output current I _A . In the case of control to the output voltage, the associated control coordinates lie horizontally in the IV diagram at the level that corresponds to the setpoint value of the output voltage V _A that has just been specified.

Discharge lamps or light-emitting diodes as a load have inherent burning or flow voltages, as a result of which their load characteristics become quasi-horizontal straight lines within the working range in the IV diagram. Such loads are preferably supplied with energy in a current-controlled manner so that a well-defined operating point results. Ohmic loads, on the other hand, have oblique straight lines as characteristic curves, all of which intersect the zero point of the IV diagram. These characteristic curves are flatter the lower the resistance of the load. Such loads should preferably also be supplied with energy in a current-controlled manner in order to obtain a well-defined operating point at the intersection between the flat characteristic curve and the vertical control coordinate. High-impedance loads with their steep characteristic curves, on the other hand, are best supplied with voltage control because the control coordinates are then horizontal in the working range. A third option is to regulate an electronic circuit for supplying energy to its instantaneous performance. The resulting control coordinates are all hyperbolas symmetrical to the bisecting line of the IV diagram, which also intersect the characteristic curves of all the above loads to form well-defined operating points, especially at higher power levels. Power hyperbolas as control coordinates are therefore particularly well suited for control to the maximum permissible power when the clocked electronic power converter is overloaded.

• • maximaler Ausgangsstrom
• • maximale Ausgangsleistung
• • maximale Ausgangsspannung
• • minimaler Ausgangsstrom
• • minimale Ausgangsleistung
• • minimale Ausgangsspannung

definiert sein, also durch lauter Regelkoordinaten. Soll der minimale Ausgangsstrom bei null liegen, die gesamte Versorgungsschaltung also leerlaufstabil sein, empfiehlt sich statt der minimalen Ausgangsleistung - die dann ja null ist - die minimal mögliche Leerlaufausgangsspannung als neuer definierender Punkt. Soll dieselbe Versorgungsschaltung zusätzlich kurzschlussfest sein, ist als weiterer definierender Punkt der minimal einstellbare Kurzschlußstrom geeigneter als die minimale Ausgangsspannung, die jetzt ja null betragen soll. Die Verbindungskurve zwischen diesen beiden letztgenannten Punkten ersetzt obige Koordinate der minimalen Ausgangsleistung und soll „bauchig“ möglichst nahe am Nullpunkt des IV-Diagramms vorbeziehen. Diese Verbindungskurve soll keinesfalls in Form bspw. eines Fingers in den Arbeitsbereich hineinragen, wodurch ein wichtiges Flächenstück aus dem Arbeitsbereich herausgeschnitten werden würde. Jeder durch lauter Regelkoordinaten oder durch die ersten vier davon plus minimale Leerlaufausgangsspannung plus minimal möglicher Kurzschlußstrom plus Verbindungskurve dazwischen eingegrenzte Arbeitsbereich wird im Weiteren als „geforderter Arbeitsbereich“ angesehen. Letztere Kurve kann in Abschnitten durchaus einer minimalen Ausgangsleistung nahekommen.In particular for operating devices that are intended to supply light-emitting diodes as a load, a planar and integrally coherent working area can be defined, for example, by the six sizes

• • maximum output current
• • maximum output power
• • maximum output voltage
• • minimum output current
• • minimum output power
• • minimum output voltage

be defined, i.e. by nothing but rule coordinates. If the minimum output current is to be zero, i.e. the entire supply circuit should be stable when idling, instead of the minimum output power - which is then zero - the minimum possible no-load output voltage is recommended as a new defining point. If the same supply circuit is also to be short-circuit proof, the minimum short-circuit current that can be set is another defining point that is more suitable than the minimum output voltage, which should now be zero. The connection curve between these last two points replaces the above coordinate of the minimum output power and should be “bulky” as close as possible to the zero point of the IV diagram. This connecting curve should in no way protrude into the work area in the form of a finger, for example, which would cut an important surface area out of the work area. Each working range delimited by nothing but control coordinates or by the first four of them plus minimum no-load output voltage plus minimum possible short-circuit current plus connecting curve in between is regarded as "required working range". The latter curve can come close to a minimum output power in sections.

Most electronic circuits for converting electrical energy or power that is taken from a source and used to supply a load after conversion, in particular all operating devices, laboratory power supplies, switched-mode power supplies, DC or DC converters, active voltage or current sources or similar use the public source as a source Power supply network that usually offers a known effective voltage between 90 V and 277 V with an ideally sinusoidal voltage curve and at a frequency between 50 Hz and 60 Hz to its input voltage does not exceed certain narrow limits. For all input powers > 5 W, a power factor corrector is required, which is often abbreviated to PFC (= Power Factor Corrector) and, viewed in the direction of power flow, directly follows the input of the entire electronic circuit. Its output, buffered via a large intermediate circuit capacitor, is the so-called intermediate circuit voltage E, on whose time average the PFC is regulated. The intermediate circuit voltage E is therefore known and approximately constant and supplies the actual clocked electronic power converter with energy, which is characterized in that it often has galvanic isolation between its input and its output, and that it always has a planar form as described above and offers an integral, cohesive workspace. Its third characteristic is the special control variable, with which various working points within its working range can be approached in a controlled manner.

All clocked electronic power converters each include at least one storage capacitor and at least one storage inductance or storage coil or storage inductor and at least one rectifier diode and at least one actively controllable power transistor. This already outlines the three simplest power converter topologies: step-down converter (buck), step-up converter (boost) and inductive inverse converter (buck-boost or flyback). The latter necessarily requires two storage capacitors, a second one in parallel with its output, and can produce an output voltage less than or equal to or greater than its input voltage. In the case of the former, an output storage capacitor is not obligatory, but is usually present, as is the basis for the further explanations, and it can only generate an output voltage that is smaller than its input voltage. The step-up converter, in turn, requires a storage capacitor only at its output, across which an output voltage is generally present that is greater than the input voltage of the step-up converter. If two storage inductances are used instead, which can also be coupled, and one of the storage capacitors moves as an internal capacitor between the power transistor and the rectifier diode, a Cuk converter can be constructed from this. Zeta converters and SEPIC (single-ended primary inductor converters) have emerged from the Cuk converter and again require an additional storage capacitor, the Zeta converter at its input and the SEPIC at its output. All three of the latter power converter topologies can generate an output voltage that can be greater than, equal to, or lower than the respective input voltage, and each requires the same special control variable as the buck-buck converter, the value of which even generates the same voltage transformation ratio in all four topologies. Cuk and buck buck converters produce their output voltages in negative polarity with respect to their input voltages. In most cases, a PWM or some other type of digital clocking between “on” and “off” of the at least one active power transistor is the special control variable provided for this, with its duty cycle D as the value to be displayed.

In all of these six clocked electronic power converters, the at least one storage capacitor can be identical to the intermediate circuit capacitor. With the step-up converter, with the flyback and with the SEPIC, the second can also be used The storage capacitor, i.e. the output capacitor, must be identical to the intermediate circuit capacitor if these three power converter topologies are used as PFCs, as is very often the case. In the case of the buck-inductor converter, the zeta converter and the SEPIC, the storage inductance connected to a continuous ground line can be replaced by a transformer, as a result of which the buck-inverter converter becomes a flyback converter. It follows from this that flyback and SEPIC can also be designed as insulating PFCs. Constructing an isolating cuk converter is also possible, but more complicated. A Cuk converter with a pure PFC function is unusual, the same applies to the Zeta converter.

As long as all times of the two switching activities “switching on” and “switching off” of the at least one active power transistor in all these converters are specified externally, it is a so-called hard-switching electronic power converter or, for short, hard-switching converter. The disadvantage of this is strong radio interference and switching losses proportional to the clock frequency and quadratically proportional to the voltage range. These losses occur in particular in the so-called "continuous conduction mode" (CCM), which automatically switches to a "critical conduction mode" (CRM) or "transient conduction mode" (TCM) for smaller output currents. The current of the at least one storage inductance touches the zero line once per cycle, but shows almost no gap. Since this mode significantly reduces the above switching losses and radio interference, it is intended as the normal mode for virtually all hard-switching electronic power converters of small and medium power (up to e.g. 500 W) and is also the basis for all further descriptions of this type of converter. In contrast to the above hard-switching converters, the switch-on times of the power transistor are no longer specified from the outside, but result from optimal status points within the circuit.

The size of the at least one storage inductor within these six basic single-ended power converters from the buck converter to the SEPIC influences the minimum possible output current, and their saturation behavior and the dimensioning of the other components involved in the converter limit the maximum possible output current. The latter is difficult to detect during operation and must therefore be maintained by regulating to a setpoint that is stored or otherwise maintained to match this maximum. The maximum output voltage is either capped at the input voltage as with the step-down converter or limited by the dimensioning of the components, the maximum output power is limited by the maximum permissible losses. These two things can also be recognized by the control system and intercepted according to stored or otherwise available maximum setpoint values. The step-up converter is a special case in that its minimum output voltage is limited to the instantaneous input voltage E.

If two actively controllable power transistors are used in the same power converter topology, the so-called push-pull power converters result, among other things, in the synchronous variants of the six converter topologies above from the step-down converter to the SEPIC or their associated current-bidirectional converters or half-bridges, which include a so-called bridge arm made of two power transistors connected in series , which is terminated towards the input via the first storage capacitor. This lies between the working electrode of the upper and the reference electrode of the lower power transistor and can also be identical to an intermediate circuit capacitor. The two "large" electrodes of both power transistors that are not connected to the first storage capacitor, i.e. the reference electrode of the upper power transistor and the working electrode of the lower power transistor, together form a center point of the bridge arm. In addition to a functional change for the storage inductance, which will be described further below, and in addition to at least one additional rectifier diode, which together with the one already present in the step-down converter forms a full-wave rectifier that is terminated by the second storage capacitor, the half-bridges also require at least a third storage capacitor in Series for storage inductance, which absorbs the DC component of the output voltage at the middle point of the bridge arm. If this third storage capacitor together with the storage inductance, which in the case of half-bridges is advantageously at least partially realized by a transformer, forms a resonant circuit with a natural frequency just below a lowest clock frequency of the output voltage at the midpoint of the bridge branch, a resonant half-bridge with ZVS switching load relief is created. The latter means that each switching-on process of a power transistor involved in the clocked power converter, in this case both power transistors of one bridge branch, occurs without voltage, which avoids any switch-on losses and thus also minimizes radio interference. The frequency-lowering effect of the purely ohmic part of each load, i.e. all non-reactive elements connected to the output of the rectifier, can be used to get everything connected to the midpoint of the bridge arm below the clock frequency. To achieve this very advantageous ZVS shift relief the resonant circuit and the rectifier connected to it are almost always supplied with energy in an over-resonant manner by its bridge branch, so it behaves at least slightly inductively. In order to reduce the power to be transmitted, the clock frequency of a resonant electronic ZVS power converter is generally increased. The resonant circuit behaves more and more inductively, which ultimately reduces the active power that can be transmitted. With all resonant electronic power converters, the special control variable is their clock frequency, and as with CRM or TCM above, the respective switch-on times of the power transistors cannot be specified from the outside, but are defined by optimal state points from the inside of the circuit. As soon as an operating or control method for power transmission is discussed below, either CRM or TCM or resonant ZVS apply as the normal mode.

The term "push-pull power converter" implies the presence of at least two power transistors in the same switched-mode power converter, or generally an even number of them. In principle, two of them are controlled in a complementary manner, which means that the power converter always remains low-impedance, regardless of the current switching position. When switching, however, so-called control pauses or clock gaps or key gaps are usually allowed between the control signals of the two power transistors involved in a push-pull in order to enable commutation to the new switching position with as little loss and interference as possible. This is particularly important in the case of resonant ZVS, since there these pauses or gaps can have highly variable durations. With CRM or TCM, on the other hand, these pauses or gaps can be assumed to be approximately constant and adjusted accordingly, since they only depend on known reactances from inside the circuit.

The storage inductance from the six single-ended power converters from the step-down converter to the SEPIC, in which currents with DC currents or, in the case of CCM, even uninterrupted or continuous DC currents that only have a ripple in clock frequency, can be stored, is in the half-bridge in a resonant inductance or in a inductive portion of the resonant circuit with consequent significantly reduced Henry values. At least in the transformer section of this resonant inductance, pure alternating current now flows at the frequency of the output voltage at the midpoint of the bridge branch. i.d. The leakage inductance of the transformer is usually not sufficient to form the resonance inductance, which is why a discrete resonance coil usually has to be connected in series. This is because the at least one third storage capacitor also becomes a resonant capacitor by being correspondingly reduced in size, in order to set the output current range of the resonant half-bridge via the “root (L/C)” impedance of the resonant circuit created with it. As an alternative or in addition to the discrete resonance coil, at least one coil can be connected in series with the output of the rectifier before the output of the entire resonant half-bridge, i.e. before the second storage capacitor, which then filters and thus stores and at the same time, if its value is small enough, at the resonance process participates.

In addition to the output current range mentioned and the fact that each half-bridge can transfer approximately half of its input voltage E to its output (assuming a 1:1 turns ratio in the transformer and Grätz rectifier), the possible operating range of a resonant half-bridge is limited by its natural ZVS limits defined according to 2 lie in the IV diagram. With a turns ratio of n = n _sec /n _prim of the transformer and a midpoint rectifier, which is used more frequently than the Grätz rectifier due to the fact that it only requires two rectifier diodes and its built-in voltage halving, a resonant half-bridge has the value n*E/4 as the reference voltage for their ZVS limits. These natural limits can touch or even intersect the axes of the IV diagram, a resonant half-bridge can be open-circuit stable as well as short-circuit-proof. The two control coordinates "maximum output current" and "maximum output voltage" trim the possible working range, and its upper and right natural ZVS limit can replace the control coordinate "maximum power" if the control of the bridge branch by means of symmetrical push-pull either knows this natural working range limitation ( Maximum operating points stored in a µ-processor or controller) or continuously measured or not exceeded at all. The latter is intrinsically given in particular with so-called self-oscillating systems if their controls are optimally matched to their resonant circuits.

However, the range of small output currents, small output voltages or small output powers remains generally problematic with regard to its accessibility and controllability, not only with a resonant half-bridge, but also with all six single-ended power converters. In the case of the resonant half-bridge, the exact shape and design of the resonant circuit determines how far the possible working range runs past the origin at the bottom left, i.e. the natural ZVS limit at the zero point of the IV diagram.

The required operating range in the IV diagram is used to select the power converter topology as an actuator for, for example, an operating device and to design and dimension it, including its special control variable. The larger this working range should be and, above all, the closer it should be to the axes of the IV diagram, which increases the spread of the output variables, the more expensive this actuator will be, because its natural working range deviates almost fundamentally from the required one. According to usual design and dimensioning as a first possibility, this natural working area is made so large that it encloses the required one, which is logically costly. Then the clocked electronic power converter shovels an unnecessarily large amount of reactive power back and forth or requires an unnecessarily complicated topology. Both drive up costs and losses, but can also lead to an increase in the natural working area and to the fact that the power converter can serve areas that are not required in its working area. For example, a current-to-bidirectional converter is useful for zero output current, even if the negative part of its working range is not used at all.

In principle, a selected and already optimized power converter topology cannot allow a section of the required operating range in its normal mode, which is why, as a second option, its normal mode, for example ZVS, must be temporarily abandoned, which then leads to increased radio interference, increased losses and reduced efficiencies. Another normal mode that is almost always used, especially with the six single-ended power converters for lower outputs, is the above-mentioned "Critical Conduction Mode" (CRM) or "Transient Conduction Mode" (TCM), in which the current in at least one storage inductance per clock period should become zero exactly once or at most twice. This one or first point is detected each time, after which it is waited each time until the voltage across the still switched-off power transistor has become minimal, and only then is it switched on again. The current in the storage inductance is therefore periodically zero, but has almost no gaps in this frequently used additional normal mode. In conjunction with the highest possible clock frequency in the form of the lowest possible on-time of the power transistor, this results in the lowest possible output currents for the normal mode via the value of the at least one storage inductance, which also depend on the instantaneous input and output voltages. If the above voltage minimum is allowed to elapse and the power transistor is switched on later each time, an even smaller output current is made possible, but the CRM or TCM, which minimizes losses and radio interference, is also abandoned. A possibility to comply with both at the same time, at least to some extent, i.e. to switch on periodically with a delay and still meet minimum voltage levels, is presented in WO-2016/050689 -A2 revealed.

However, the latter can only be implemented with great effort. A simpler and third option for increasing the working range downwards leads to operation in the so-called burst mode. During the so-called "bursts", a power converter is operated in its normal mode and completely switched off between two bursts, i.e. its active power transistor is simply not activated during this pause, for example. This happens periodically, which results in a second control variable in the form of a burst duration and a pause duration between two bursts in addition to the clock frequency as a special control variable for the power converter as such. The time between two consecutive beginnings of bursts is called "burst period", the reciprocal of which is called "burst frequency". The idea behind this is a thinning out of the additional losses due to the violation of the CRM or TCM principle, because these additional losses do not occur in every clock period of the power converter, but only at the beginning of each burst. Of course, the said burst period must be significantly longer than the clock period of the actual power converter. If this is not the case, a kind of "single-pulse burst operation" can result, the optimal variant of which is shown in WO-2016/050689 -A2 is described.

Fourth, the dimensioning of a power converter topology, especially if it is a resonant one, can be switched either periodically or in blocks, depending on which part of a working range is currently needed. With block switching, additional reactive power is switched on when an increased or changed working range is required, and switched off again when this is no longer necessary. In the case of periodic switching, a combination with the third option above can result if the reactive power that can be switched on periodically is of such a nature and high that when it is switched on, the power converter separates into a reactive power oscillator and a rectifier, which is actually decoupled together with a load. During the bursts or during continuous operation in normal mode, the reactive power that can be switched on is switched off in order not to decouple the rectifier and the load, but to supply them with energy normally.

A fifth possibility exists, particularly for non-resonant power converter topologies in the temporary structural switching of the power converter topology. For example, by bypassing the internal capacitor and the actual rectifier diode with an additional switchable rectifier diode, a step-up converter can be made from a SEPIC, as is the case, for example, in EP-1710898-B1 or in US-8,379,422-B2 is revealed.

A combination of the third option above and the fifth option is in EP-2952060 -B1 shown. There, a pause between two bursts consists of a brief short-circuit in the rectifier of a resonant half-bridge, with this pause being able to last at least half a clock period of the bridge branch and being synchronized thereto. Conversely, a single burst can have minimally the same duration. In between, all combinations with a time grid in this half clock period are possible. The topology is switched because the bridge arm continues to be clocked during the pauses, with the resonant circuit connected to it and then closed in itself always (almost) only processing reactive power. This also comes close to option four above with periodic activation of a large amount of reactive power.

In addition to the desired mean value, the goal in all of this, especially in the respective burst mode, can also be a certain ripple of an output signal. This ripple should be independent of the mean value of the output signal and thus of the pulse duty factor of a clocking that controls this output signal.

Task

It is the object of the invention to specify a method for operating a clocked electronic power converter, for example for an operating device for light-emitting diodes, which does not require any unnecessary circuit extensions for the power converter, but instead optimally combines the two to four options above for expanding its working range towards smaller output currents combined. In this case, the operating method comprises at least two areas, an area with operation of the power converter in its normal mode and at least a second area with a special control method for a burst mode. A different approach than in WO-2016/050689 -A2, NO single-pulse burst operation is expressly aimed at, which results in an absolute minimum of ripple in an output signal, but based on a permitted and larger ripple in the same output signal, a burst duration and a pause time between two bursts are determined. The ripple of the output current or the modulation depth of the output current should remain in a desired range that depends on the modulation frequency, and preferably below a limit value that depends on the modulation frequency, with the aim of avoiding unwanted flicker and stroboscopic effects in the to avoid or minimize the connected LED load.

An important secondary condition for all solutions for the control method to be considered below is power transmission across a galvanic isolation barrier.

The permitted ripple increases with decreasing output currents in a way that makes sense, in particular, for the power supply of light-emitting diodes that are to be dimmed down to very low levels of brightness - almost to their physical limit.

Since this ripple also depends on the output voltage that the power converter is supposed to deliver at the moment, the operating method must also offer the possibility of this output voltage in the Ifd. to measure operation. In the case of, for example, light-emitting diodes that are connected in series on a module and are to be supplied by the power converter of their operating device, the output voltage depends on the current temperature of the module. In addition, an operating device provided for the specified operating method should alternatively be able to supply many different modules with different forward voltages with current, so that the output voltage is always an unknown quantity when the operating device is started for the first time.

Ultimately, the operating procedure should enable the correspondingly clocked electronic power converter of a control gear equipped with it to start up "out of nowhere", i.e. to be able to implement a minimum possible dimming setpoint from the start in order to avoid the notorious switch-on light flash.

The more detailed explanation of the operating method is based, for example, on a resonant half-bridge with a series resonant circuit between its bridge arm and its rectifier, the series resonant circuit comprising a transformer, and at least one of the windings of this transformer being connected in parallel with at least one bypass capacitor whose capacitance is variable in a controlled manner using the specified control method . It is also described here how the same control method can be applied to controls of other clocked electronic power converters as actuators within controlled operating devices, such as they are provided particularly advantageously for the supply of light-emitting diodes can be used.

Presentation of the invention

The object is achieved according to the invention with a method for operating a clocked isolating power converter with an output power range for operating a load that can be connected, the output power range resulting from a permissible output voltage range and a permissible output current range, the power converter having at least one switch which is controlled by a controller is operated at a suitable converter clock frequency in order to magnetize and demagnetize at least one inductance in the circuit, and an on/off gating device as part of the controller, which periodically directs an output current of the power converter to an output capacitor synchronously with the converter clock frequency. Here, the output capacitor advantageously filters the output current of the power converter.

• - in einem ersten Betriebsmodus, der von dem maximalen Ausgangsstrom des Leistungswandlers von 100% bis zu einem reduzierten Ausgangsstrom reicht, Einstellen der Ein-Austastvorrichtung auf ein Tastverhältnis von 100%, und Verstellen der Wandlertaktfrequenz, um den Ausgangsstrom des Leistungswandlers für die Last zu reduzieren,
• - in einem zweiten Betriebsmodus, der von dem reduzierten Ausgangsstrom bis zu dem minimalen Ausgangsstrom reicht, beibehalten der Wandlertaktfrequenz und Einstellen des Tastverhältnisses um den Arbeitspunkt zu verändern, und damit den Ausgangsstrom des getakteten Wandlers für die Last weiter zu verringern, wobei eine Ein-Austastvorrichtungsfrequenz ab einem Tastverhältnis, das im Bereich von 40% bis 20% liegt, mit abnehmendem Tastverhältnis reduziert wird, um eine Modulationstiefe der Strommodulation des Ausgangsstroms in einem gewünschten Bereich zu halten, mit dem Ziel die Lichtqualität zu optimieren z.B. um stroboskopische Effekte zu minimieren. Gleichzeitig wird durch die Reduzierung der Ein-Austastvorrichtungsfrequenz die zeitliche Auflösung des Stellglieds bzw. die Auflösung der Wirkung des Tastverhältnisses der Ein-Austastvorrichtung wunschgemäß erhöht, so dass die Stromregelung eine bessere Auflösung erhält. Die Ein-Austastvorrichtungsfrequenz ist bei dem Tastverhältnis, das im Bereich von 40% bis 20% liegt, vorteilhaft um den Faktor 2 bis 40, vorzugsweise um den Faktor 3 bis 15 höher als die Ein-Austastvorrichtungsfrequenz bei minimalem Tastverhältnis.

The procedure is characterized by the following steps:

• - in a first mode of operation ranging from the maximum output current of the power converter of 100% to a reduced output current, setting the on-off device to a duty cycle of 100%, and adjusting the converter clock frequency to reduce the output current of the power converter for the load ,
• - in a second mode of operation, ranging from the reduced output current to the minimum output current, maintaining the converter clock frequency and adjusting the duty cycle to change the operating point, and thus further reduce the output current of the clocked converter for the load, with a on-off gating device frequency from a duty cycle in the range of 40% to 20%, is reduced with a decreasing duty cycle in order to keep a modulation depth of the current modulation of the output current in a desired range, with the aim of optimizing the light quality, e.g. to minimize stroboscopic effects. At the same time, by reducing the on/off gate frequency, the temporal resolution of the actuator or the resolution of the effect of the duty cycle of the on/off gate is increased, as desired, so that the current control has a better resolution. The on/off device frequency at the duty cycle, which is in the range of 40% to 20%, is advantageously higher by a factor of 2 to 40, preferably by a factor of 3 to 15, than the on/off device frequency at the minimum duty cycle.

The method is used to transfer electrical power across a galvanic barrier, where the galvanic barrier is e.g. an isolation transformer or a power transformer, the on-off gating device directs the current pulses with an adjustable duty cycle to the output capacitor, which serves to supply the output current filter. The output current is reduced or dimmed in the above-mentioned second operating mode, which ranges from the reduced output current to the minimum output current, by adjusting the duty cycle. The output current is modulated by on/off gating of the current pulses. This modulation is dependent on the on/off device frequency as well as the duty cycle and the size of the output capacitor.

• - Beim Arbeitspunkt 1 liegt die Ein-Austastvorrichtungsfrequenz in einem Bereich zwischen 60Hz und 600Hz, vorzugsweise in einem Bereich zwischen 200Hz und 450Hz, und das Tastverhältnis in einem Bereich zwischen 0,05% bis 10%, vorzugsweise in einem Bereich zwischen 1% und 5%,
• - Beim Arbeitspunkt 2 liegt die Ein-Austastvorrichtungsfrequenz in einem Bereich zwischen 800Hz und 4000Hz, vorzugsweise in einem Bereich zwischen 1000Hz und 2000Hz, und das Tastverhältnis in einem Bereich zwischen 15% bis 35%, vorzugsweise in einem Bereich zwischen 20% und 30%,
• - Beim Arbeitspunkt 3 liegt die Ein-Austastvorrichtungsfrequenz in einem Bereich zwischen 800Hz und 4000Hz, vorzugsweise in einem Bereich zwischen 1000Hz und 2000Hz, und das Tastverhältnis in einem Bereich zwischen 65% bis 85%, vorzugsweise in einem Bereich zwischen 70% und 80%,
• - Beim Arbeitspunkt 4 liegt die Ein-Austastvorrichtungsfrequenz in einem Bereich zwischen 60Hz und 600Hz, vorzugsweise in einem Bereich zwischen 200Hz und 450Hz, und das Tastverhältnis in einem Bereich zwischen 90% bis 100%, vorzugsweise in einem Bereich zwischen 98% und 100%.

In a particularly preferred embodiment, the on/off gating device has four operating points:

• - At operating point 1, the on/off gate frequency is in a range between 60Hz and 600Hz, preferably in a range between 200Hz and 450Hz, and the duty cycle in a range between 0.05% to 10%, preferably in a range between 1% and 5 %,
• - At operating point 2, the on/off device frequency is in a range between 800Hz and 4000Hz, preferably in a range between 1000Hz and 2000Hz, and the duty cycle is in a range between 15% and 35%, preferably in a range between 20% and 30%,
• - At operating point 3, the on/off device frequency is in a range between 800Hz and 4000Hz, preferably in a range between 1000Hz and 2000Hz, and the duty cycle is in a range between 65% and 85%, preferably in a range between 70% and 80%,
• - At operating point 4, the on/off gate frequency is in a range between 60Hz and 600Hz, preferably in a range between 200Hz and 450Hz, and the duty cycle in a range between 90% and 100%, preferably in a range between 98% and 100%.

With this measure, the above goals are achieved particularly well and the light quality increases considerably over the entire dimming range.

In a further embodiment, the on-blanker frequency increases linearly over the duty cycle in the range between operating point 1 and operating point 2. This advantageously ensures a particularly soft transition between the operating points that is not perceptible in the light.

In another embodiment, in the range between operating point 3 and operating point 4, the on/off gate frequency falls linearly over the duty cycle. Here, too, the aim is to achieve a particularly constant and pleasant quality of light when dimming.

In another embodiment, the on/off gate frequency remains substantially constant in the range between operating point 2 and operating point 3. This measure also serves to ensure that the dimming process is as uniform as possible without visible steps in the light output.

In a preferred embodiment, pulse patterns of the on-blanker repeat periodically at the on-blanket frequency. This measure is advantageously used for simplified control of the power converter and also ensures a high quality of light.

• - Bei einer Ein-Austastvorrichtungsfrequenz von 70Hz bis 100Hz liegt die Modulationstiefe im Bereich 50% bis 10% und vorzugsweise im Bereich 25% bis 10%,
• - Bei einer Ein-Austastvorrichtungsfrequenz von 200Hz bis 240Hz liegt die Modulationstiefe im Bereich 60% bis 12% und vorzugsweise im Bereich 30% bis 12%,
• - Bei einer Ein-Austastvorrichtungsfrequenz von 500Hz bis 600Hz liegt die Modulationstiefe im Bereich 80% bis 26% und vorzugsweise im Bereich 65% bis 26%,
• - Bei einer Ein-Austastvorrichtungsfrequenz von 1000Hz bis 1200Hz liegt die Modulationstiefe im Bereich 85% bis 36% und vorzugsweise im Bereich 80% bis 36%,
• - Bei einer Ein-Austastvorrichtungsfrequenz von 1200Hz bis 4000Hz liegt die Modulationstiefe im Bereich 100% bis 36% und vorzugsweise im Bereich 90% bis 36%.

In another embodiment, the output capacitor is connected downstream of the on-off device and in parallel with the output terminals of the power converter, and the capacitance of the output capacitor is selected such that a modulation depth of the current modulation of the output current meets the following criteria:

• - With an on-off-blanker frequency of 70Hz to 100Hz, the modulation depth is in the range of 50% to 10% and preferably in the range of 25% to 10%,
• - With an on-off-blanker frequency of 200Hz to 240Hz, the modulation depth is in the range of 60% to 12% and preferably in the range of 30% to 12%,
• - With an on-off-blanker frequency of 500Hz to 600Hz, the modulation depth is in the range of 80% to 26% and preferably in the range of 65% to 26%,
• - With an on-off-blanker frequency of 1000Hz to 1200Hz, the modulation depth is in the range of 85% to 36% and preferably in the range of 80% to 36%,
• - With an on-blanker frequency of 1200Hz to 4000Hz, the modulation depth is in the range 100% to 36% and preferably in the range 90% to 36%.

This measure advantageously ensures uniform lighting of all LEDs connected to the power converter in the entire dimming range, and enables high-quality light with little modulation at higher power levels.

In a particularly preferred embodiment, at least one time segment is provided within a period of the on/off switching device frequency, in which the load that can be connected is measured. This ensures accurate regulation of the output power of the switched-mode power converter performing the method. This advantageously results in a high quality of light.

In a refinement of the previous embodiment, the period of time at which the connectable load is measured occurs at a time when the on/off device directs the output current of the power converter onto the output capacitor, the period of time being in the range 10us to 5000us and preferably in the range 50us to 1000us. This measure is used for simple and precise regulation of the clocked power converter.

During the time segment in which the load that can be connected is measured, variables are particularly preferably measured which are required as input variables for current regulation of the power converter, in particular an input current and an input voltage on a primary side of the power converter and an output voltage on the secondary side of the power converter. This measure enables a particularly precise regulation of the clocked power converter.

In a development of the previous embodiment, the measured variables are used in particular to calculate an input current and an input voltage on a primary side of the power converter and an output voltage on the secondary side of the power converter, and the output current using the duty cycle and a model for the losses occurring between the primary and secondary sides of the converter calculated and controlled by adjusting the duty cycle. This measure also ensures good and precise regulation of the output power.

The electronic power converter that can be controlled by the specified method is comprised of an operating device for the control and power supply of light-emitting diodes that are provided for lighting.

In the following, a pattern of the current pulses that are applied to the output capacitor of the switching converter flow or not flow by the current pulses being gated on and off by means of the on-off gating device.

• - Bei einem getakteten Wandler mit LLC-Topologie mit Halbbrückenschaltern und LLC Resonanzkreisen wird ein Bypass-Kondensator ein- und ausgetastet.
• - Bei einem getakteten Wandler in Flyback-Topologie oder in einer anderen Eintakt-Leistungswandlertopologie mit einem MOS-FET als getaktetem Schalter und einem Transformator wird der MOS-FET ein- und ausgetastet. Austasten bedeutet hier, dass der MOS-FET nicht im Wandlertakt schaltet, sondern für die Aus-Tastzeit permanent ausgeschaltet bleibt.

In the following, a device with which the current flow or the current pulses on the output capacitor of the switching converter can be keyed in and out is considered as an on/off keying device. The current pulses are switched on and off synchronously with the switching frequency of the converter, i.e. with the converter clock frequency. Exemplary embodiments for the on/off device: e.g. e.g.:

• - In a clocked converter with LLC topology with half-bridge switches and LLC resonant circuits, a bypass capacitor is keyed in and out.
• - In a flyback topology clocked converter or other single-ended power converter topology with a MOSFET as a clocked switch and a transformer, the MOSFET is keyed on and off. Blanking here means that the MOS-FET does not switch in the converter cycle, but remains permanently switched off for the off-switching time.

The duty cycle corresponds to the percentage of time during which the current pulses flow to the output capacitor, i.e. are switched on. In principle, the duty cycle here corresponds to the duty cycle in a classic pulse width modulation

The converter clock frequency is the clock frequency of the switched-mode isolating power converter, ie the frequency at which the switch or transistors of the switched-mode isolating power converter are switched on and off.

In the following, the frequency of the on/off device, which is synchronized with the converter clock frequency, is regarded as the on/off device frequency. In one period of the on-off-sampler frequency, the current path may be switched from the output of the switched-mode isolating power converter to the output capacitor of the switched-mode isolating power converter several times. The on/off switching device thus generates a pulse pattern in one period, the pulses representing current pulses which flow into the output capacitor.

Preferred embodiments can be found in the dependent claims and the disclosure as a whole, whereby the presentation does not always distinguish in detail between device and use aspects; at least implicitly, the disclosure is to be read with regard to all categories of claims.

Further advantageous developments and refinements of the method according to the invention for operating a clocked isolating power converter result from further dependent claims and from the following description.

character list

• 1a einen durch sechs Regelkoordinaten begrenzten geforderten Arbeitsbereich im IV-Diagramm,
• 1b einen bis zu den Achsen des IV-Diagramms ausgedehnten günstigen Arbeitsbereich,
• 1c einen bis zu den Achsen des IV-Diagramms ausgedehnten ungünstigen Arbeitsbereich,
• 2 einen möglichen Arbeitsbereich eines resonanten LLCC-Halbbrückenwandlers mit mindestens einer schaltbaren Resonanzkapazität,
• 3a einen Arbeitsbereich eines hartschaltenden Tiefsetzstellers,
• 3b einen Arbeitsbereich bspw. eines hartschaltenden SEPICs,
• 4a ein Modell zur Welligkeitsermittlung an ohmscher Last,
• 4b ein Modell zur Welligkeitsermittlung mit differenziellem Lastwiderstand,
• 5 Frequenzen für konstante Welligkeit eines durch PWM gesteuerten Mittelwertes abhängig vom Duty-Cycle oder Tastverhältnis derselben PWM,
• 6a eine Anwendung des Betriebsverfahrens auf ein Weitbereichs-LED-Betriebsgerät in einer Darstellung seines vollen Dimmbereichs von 100% bis unter 1%,
• 6b eine detailliertere Darstellung des unteren Dimmbereichs des Betriebsgeräts mit dem Betriebsverfahren,
• 7a gemessene Signale am rechten Rand der 6b,
• 7b gemessene Signale an einem Punkt in der Mitte von 6b,
• 7c gemessene Signale am linken Rand der 6b,
• 8 eine Darstellung möglicher Trajektorien zum Starten eines neu installierten Weitbereich-Betriebsgeräts aus völliger Dunkelheit und anschließendem Hochfahren der LED-Helligkeit.

Further advantages, features and details of the invention result from the following description of exemplary embodiments and from the drawings, in which identical or functionally identical elements are provided with identical reference symbols. show:

• 1a a required work area in the IV diagram delimited by six control coordinates,
• 1b a favorable working range extended to the axes of the IV diagram,
• 1c an unfavorable working range extended to the axes of the IV diagram,
• 2 a possible working range of a resonant LLCC half-bridge converter with at least one switchable resonant capacitance,
• 3a a working range of a hard-switching step-down converter,
• 3b a working area, e.g. of a hard-switching SEPIC,
• 4a a model for determining ripple on an ohmic load,
• 4b a model for ripple determination with differential load resistance,
• 5 Frequencies for constant ripple of a PWM controlled mean depending on the duty cycle or duty cycle of the same PWM,
• 6a an application of the operating method to a wide-range LED control gear in a representation of its full dimming range from 100% to less than 1%,
• 6b a more detailed representation of the lower dimming range of the control gear with the operating procedure,
• 7a measured signals at the right edge of the 6b ,
• 7b measured signals at a point in the middle of 6b ,
• 7c measured signals on the left edge of the 6b ,
• 8th a representation of possible trajectories for starting a newly installed wide-range control gear from complete darkness and then ramping up the LED brightness.

Preferred embodiment of the invention

Since the limitations of the possible working ranges of clocked electronic power converters, each operated in their normal mode, can be overcome by the operating method to be specified, in particular for even smaller output powers or currents, the natural limits of the possible working ranges of some selected clocked electronic power converters are first described and the Boundaries of a required work area compared. The operating method states that it operates a switched-mode electronic power converter loaded with it in its normal mode as long as the required operating point is within the possible operating range of the power converter, and that it operates the same power converter in a burst mode as soon as the required operating point is to the left of the possible operating range. Furthermore, the operating method can independently recognize the mode boundary between these two areas. A special clock generation is used by the operating method within the burst mode.

1a shows a required working range in the IV diagram, which is particularly typical for wide-range LED control gear, which is defined by the six control coordinates already listed at the beginning. "Wide range" is to be understood as a possibility of being able to alternatively supply and operate various LED modules whose working points are all within the required working range from one and the same LED control gear. This working range is limited upwards by the maximum output voltage _VAMax , which is mostly 54 V for SELV devices, which is calculated from the normatively maximum permitted 60 V minus 10% of it. Due to its safety relevance, this limit must be reliably measured and regulated. At this limit - and of course also below it - the power converter delivers more power the higher the output current. This V _AMax control coordinate therefore transitions into the P _AMax control coordinate, which corresponds to the hyperbola of the constant and maximum possible output power P _AMax . When passing through this hyperbola, the output voltage V _A decreases by as much as the output current I _A increases. With the maximum permissible output current I _AMax, the associated control coordinates, which are on the right-hand side vertically in the IV diagram, take over the limitation of the working range. Since many clocked electronic power converters do not have a topologically specified limit for I _AMax , this limit has to be ensured in terms of control technology, just like the limit of the maximum output power often does.

Many hard-switching or otherwise clocked electronic power converters do not operate properly at very small output voltages, so the I _AMax control coordinate ends at a minimum output voltage V _AMin and the limitation of the operating range is taken over by the associated V _AMin control coordinate. The output power, which is already small anyway, is reduced even further as the output current I _A decreases, until the hyperbola of the constant and minimum possible output power P _AMin is reached. The further the output current I _A falls, the higher the output voltage V _A must be in return. All even smaller output powers, ie all operating points below or to the left of this P _AMin hyperbola, cannot be reached by a specific power converter in its normal mode. The same applies to a minimum output current I _AMin, which cannot be fallen below in the normal mode of a power converter. Hence the left boundary of the working area is the rule coordinate for I _AMin .

This limitation is the most critical for two reasons. Many LED control gear can be set to an individual maximum output current before they are put into operation, which can be smaller than the maximum output current that is possible in the design. If the LED current should be dimmable, i.e. if the output current should be able to be reduced during operation, the degree of this reduction is always specified relative to the maximum current set. This means that the minimum output current actually required is also smaller if the maximum output current has been set smaller. If the device is also to be able to dim its output current down to (almost) zero, this must either be achievable by the power converter working in it over its possible operating range in normal mode, or the specified operating procedure with a second range in burst mode for particularly small output currents can be used for this power converter become.

In 1b shows a required working range for "dimming to dark", i.e. for reducing the output current I _A to zero. The left boundary of the required workspace now corresponds to a portion of the _VA axis of the IV diagram ending at _VAMax above. Thither is the work area compared to 1a extended. Since P _A = 0 applies to all working points on this section, the hyperbola for the minimum power P _AMin can no longer be a limitation. It makes sense So it's time to expand the working range to an output short-circuit at the same time, i.e. to working points below V _AMin , in particular to working points with V _A = 0. The power converter should be able to safely limit the short-circuit current and - even better - reduce it to tolerable values . This section of the I _A axis, which delimits the extended required working range below, ends on the right at I _AMax .

Questionable, however, are the left end of the I _A -intercept and the lower end of the V _A -intercept, whose connecting curve 1 must replace the hyperbola of minimum output power. Because no hyperbola of a minimum output power, no matter how small, intersects one of the axes of the IV diagram. In 1b a possible favorable course of this connection curve 1 is shown. In its central area, it resembles a hyperbola of minimum output power P _AMin , toward the _VA axis it moves away from this hyperbola and ends on this axis at a point V _ALeerMin that is to be newly defined. So the output current can go to zero, but not below this minimum open circuit output voltage. There is something comparable for the end point of this connection curve on the I _A axis, which is again removed from the hyperbola of a theoretical minimum power and is defined by the minimum possible short-circuit output current I _AShortMin .

1c differs from the previous figure only in this connection curve, here 1' between the points V' _ALeerMin at I _A = 0 and I' _AShortMin at V _A = 0. In particular for resonant electronic power converters, this connection curve 1' can protrude like a finger into the working area and thus make important working points unattainable if the resonant converter is to comply with the ZVS principle at all working points, for example, in a normal mode given to it. By optimizing the resonance system, which usually goes hand in hand with an increase in the reactive power and thus a reduction in the efficiency of the power converter, this connecting line can be stretched or the gap in the working range can even be closed completely. The specified operating method, on the other hand, makes it possible to approach operating points "within this finger" without additional work on the dimensioning of a resonant or other power converter system.

2 shows in bold solid lines the natural limits of the possible working range of an experimentally studied LLCC resonant electronic power converter in the IV diagram. In contrast to the previous and following figures, here the V _A axis is scaled in volts [V] and the I _A axis in milliamperes [mA]. A required working range of a wide-range LED control gear for "dimming to dark", for which the LLCC power converter is intended, is drawn in thin solid lines. The unused hatched areas in between should of course be as small as possible, which can be achieved by optimizing the resonance system. The points nE/4 and E/root(LC), which are only drawn in qualitatively, result from this and take into account the excessive increases that are possible in every resonant electronic power converter. E means the input voltage for the LLCC power converter, as it is made available to it by a power factor corrector, for example, and nE/4 means that in the power converter on which this is based, a half-bridge works as an inverter and a midpoint circuit as a rectifier, n describes the turns ratio n _sec /n _prim of the obligatory transformer in this topology. The hatched area above the thinly drawn required operating range can also be used if the control of the LLCC power converter either recognizes its ZVS limits or adheres to them intrinsically. The latter can be achieved particularly well with so-called self-oscillators.

The point V _ALeerMin at I _A = 0 of the required working range is NOT covered by the natural boundaries of the possible working range drawn in bold and solid lines. Connection curve 2 as the "minimum output current" limitation of the possible working range bypasses this. For example, one of the capacitances in the resonant system of the LLCC converter can be changed, usually increased as in U.S. 63/032,468 proposed, whereby the left-hand part of the possible operating range changes to a form as drawn by thick dashed lines, in particular by a more favorable connection curve 3. This encloses the point of the minimum no-load output voltage _VAleerMin . After switching and, in particular, enlarging one of the resonant capacitors, it is often the case that the maximum required output voltage V _AMax can no longer be achieved for small output currents, as can be seen from the upper limit 4 of the possible working range that is now valid. Depending on the required output voltage V _A , for example, one capacitance must be increased or not. The specified operating method can then be applied particularly advantageously, especially if, as shown here, there is at least one area 5 which does not lie within the natural limits of the possible working areas either with one size of a resonant capacitor or with the other size of the same resonant capacitor.

When operating in normal mode, no operating point should be below the Hori defined by V _ALeerMin be approached zontal, in the event of an overload or short circuit, this happens compulsorily. The hatched working range below V _ALeerMin as part of the possible working range shows that almost every resonant converter, especially the one used here, is short-circuit proof.

The so-called isotaches are also drawn thin and dashed, i.e. the working curves at a constant (Greek "iso" = equal) clock frequency (Greek "tachys" = speed) of the resonant half-bridge. The jump in the clock frequency between two adjacent isotaches is 10 kHz in each case, the lower clock frequency is on the right. The high steepness of these isotaches in the IV diagram, each valid for the smaller value of an enlargeable resonance capacitor, shows that the LLCC power converter selected in the experiment already has a pronounced current source characteristic. The full voltage swing from 15 V to 54 V causes only a few mA change in the output current I _A at a constant clock frequency. In order to compensate for changes in the output voltage V _A , only a small frequency adjustment is necessary in order to keep the output current constant.

Even with single-ended power converters, there are natural limits to their possible operating ranges, especially with CRM or TCM as their normal mode, which are defined by the topology itself, by the design of their components and by the clock generator. The clock generator generates, for example, a PWM with a clock period T from an analog signal, with which the active power transistor is driven. Switch-on periods t _on and switch-off periods t _off alternate in each case. It is therefore t _On +t _off = T. A variable that is important for the possible operating range is the minimum switch-on time t _OnMin that the clock generator can still reliably generate. The second important quantity is the value L of the at least one storage inductance occurring in each single-ended power converter. The input voltage E, which can always be provided by a power factor corrector and to which the output voltage V _A can be related, is the third important variable.

The working range of a step-down converter as a power converter in the IV diagram of 3a is intrinsically capped at its input voltage E with its upper limit V _AMax . This is because each step-down converter can only generate output voltages V _A that are lower than its input voltage. The coordinates for the maximum output power P _AMax and the maximum output current I _AMax are drawn in dashed because they are only defined by secondary parameters of the components of the step-down converter. The lower limit of the same working range is at V _A = 0, for which the active power transistor is only switched on very rarely and very briefly at higher output currents and almost never at all at low output currents. For the following consideration for the derivation of the left-hand limitation 11 for small output currents, on which the normal mode provided for the buck converter under consideration is just given, the CRM or TCM already explained above is assumed to be the same.

definiert, weil die Speicherinduktivität L direkt in Serie zu seinem Ausgang geschaltet ist, und zweitens, dass das für den CCM (Continuous Conduction Mode) bekannte Spannungsübersetzungsverhältnis $${\mathbf{V}}_A/\mathbf{E}={\mathbf{t}}_{On}/\mathbf{T}$$

hier ebenso gilt. Der Spitzenstrom gehorcht der Bedingung $${\widehat{I}}_L=\left(\mathbf{E}-{\mathbf{V}}_A\right){\mathbf{t}}_{On}/\mathbf{L}$$

gemäß der steigenden Flanken obigen Sägezahns, woraus sich $$I_{AMin}=\left(\text{E}-{\mathbf{V}}_A\right){\mathbf{t}}_{OnMin}/2L$$

für einen minimal möglichen Ausgangsstrom I_AMin ergibt. Dieser hängt nicht nur linear von t_OnMin ab, sondern ist auch umso größer, je kleiner V_A ist. Dies führt zu der fehlenden Ecke, dargestellt durch die Diagonale 11, in der Umgebung des Ursprungs des IV-Diagramms im Arbeitsbereich von 3a sogar für einen Tiefsetzsteller als einfachsten getakteten elektronischen Leistungswandler.The current I _L in the storage inductance L thus performs an uninterrupted and uniform sawtooth curve between zero and Î _L . For the step-down converter, it follows firstly that its output current can be determined by the simple equation $${\mathbf{I}}_A={\widehat{\text{I}}}_L/2$$

defined because the storage inductance L is connected directly in series to its output, and secondly, that the voltage transformation ratio known for the CCM (Continuous Conduction Mode). $${\mathbf{V}}_A/\mathbf{E}={\mathbf{t}}_{On}/\mathbf{T}$$

applies here as well. The peak current obeys the condition $${\widehat{I}}_L=\left(\mathbf{E}-{\mathbf{V}}_A\right){\mathbf{t}}_{On}/\mathbf{L}$$

according to the rising edges of the above sawtooth, resulting in $$I_{AMin}=\left(\text{E}-{\mathbf{V}}_A\right){\mathbf{t}}_{OnMin}/2L$$

for a minimum possible output current I _AMin . This not only depends linearly on t _OnMin , but is also greater the smaller V _A is. This leads to the missing corner, represented by the diagonal 11, in the vicinity of the origin of the IV diagram in the work area of 3a even for a buck converter as the simplest clocked electronic power converter.

mit einem Gewichtungsfaktor t_Off/T im Vergleich zum Tiefsetzsteller, der die relative Ankoppeldauer des Ausgangs an die Speicherinduktivität L beziffert. Deshalb weicht auch die Spannungsübersetzung des Drosselinverswandlers mit $${\mathbf{V}}_A/\mathbf{E}={\mathbf{t}}_{On}/{\mathbf{t}}_{Off}$$

von obiger ab. Weil die Speicherinduktivität im Drosselinverswandler von der Eingangsspannung direkt aufmagnetisiert wird, gehorcht der Spitzenstrom nun der geänderten Bedingung $${\widehat{I}}_L=\mathbf{E}{t}_{On}/\mathbf{L}$$

anhand der steigenden Flanken obigen Sägezahns. Die beiden letzten Gleichungen in die darüber für I_A eingesetzt ergibt $${\mathbf{I}}_A={\mathbf{E}}^2{t}_{On}{}^2/2L{V}_{A}T$$

nach Eliminierung von t_Off. Die spätere Fokussierung auf t_OnMin wird hierdurch vorbereitet. Der Term t_On ²/T lässt sich wie folgt $${\mathbf{t}}_{On}{}^2/\mathbf{T}={\mathbf{V}}_A{t}_{On}/\left({\mathbf{V}}_A+E\right)$$

umformen, wobei obige Spannungsübersetzung des Drosselinverswandlers erneut zum Einsatz kommt sowie das t_On + t_off = T. Damit lässt sich die Periodendauer T und das t_On ² aus der Gleichung für den Ausgangsstrom $$I_A={\mathbf{E}}^2{t}_{On}/2L\left({\mathbf{V}}_A+\mathbf{E}\right)$$

eliminieren. Das minimal mögliche t_OnMin dort eingesetzt ergibt $${\mathbf{I}}_{Amin}={\mathbf{E}}^2{t}_{OnMin}/2L\left({\mathbf{V}}_A+\mathbf{E}\right)$$

als Bedingung für den minimal möglichen Ausgangsstrom, von denselben Größen abhängig wie beim Tiefsetzsteller und wieder umso größer, je kleiner die Ausgangsspannung ist. Die letzte Gleichung führt zu der Kurve 12 als natürliche linke Begrenzung des möglichen Arbeitsbereichs eines Drosselinverswandlers, wie er in 3b dargestellt ist. Beide Begrenzungen 11 und 12 der jeweiligen Arbeitsbereiche wandern umso näher an die V_A-Achse heran, je größer die Speicherinduktivität L ist. Damit ist obige erste Möglichkeit, durch Erhöhung einer installierten Blindleistung einen möglichen Arbeitsbereich zu vergrößern, bestätigt. 3b shows the same reasoning for the four step-down and step-up single-ended power converters, namely inductor inverse converters, Cuk, Zeta and SEPIC, which produce identical voltage transformations with the same t _On /T apart from the polarity, whereby the former is used for the derivation. In contrast to the step-down converter, the "local four" can theoretically generate infinitely high output voltages, which is why the coordinates for V _AMax are shown here as dashed lines, because the maximum output voltage must be dimensioned into the components, stored as a maximum setpoint or otherwise maintained and maintained by a controller . Since now the storage inductance L only then with the off connected when the active transistor is currently off, applies to the output current $${\text{I}}_A=\left({\widehat{I}}_L/2\right)\left({\mathbf{t}}_{Off}/\mathbf{T}\right)$$

with a weighting factor t _Off /T compared to the step-down converter, which quantifies the relative coupling time of the output to the storage inductance L. Therefore, the voltage ratio of the choke inverse converter also deviates $${\mathbf{V}}_A/\mathbf{E}={\mathbf{t}}_{On}/{\mathbf{t}}_{Off}$$

from above. Because the storage inductance in the inverse-throttle converter is directly magnetized by the input voltage, the peak current now obeys the changed condition $${\widehat{I}}_L=\mathbf{E}{t}_{On}/\mathbf{L}$$

using the rising edges of the above sawtooth. The last two equations inserted into the above for I _A yields $${\mathbf{I}}_A={\mathbf{E}}^2{\mathrm{<figure-callout\; id="2"\; label="t\; O\; n"\; filenames="DE102021208417A1\_0033.png"\; state="\{\{state\}\}">t</figure-callout>}}_{On}{}^2/2L{V}_{A}T$$

after eliminating t _Off . This prepares for later focusing on t _OnMin . The term t _On ² /T can be written as follows $${\mathbf{<figure-callout\; id="2"\; label="t\; O\; n"\; filenames="DE102021208417A1\_0033.png"\; state="\{\{state\}\}">t</figure-callout>}}_{On}{}^2/\mathbf{T}={\mathbf{V}}_A{t}_{On}/\left({\mathbf{V}}_A+E\right)$$

transform, whereby the above voltage conversion of the buck inverse converter is used again, as well as the t _on + t _off = T. This allows the period T and the t _on ² from the equation for the output current $$I_A={\mathbf{E}}^2{t}_{On}/2L\left({\mathbf{V}}_A+\mathbf{E}\right)$$

eliminate. The minimum possible t _OnMin inserted there results $${\mathbf{I}}_{Amin}={\mathbf{E}}^2{t}_{OnMin}/2L\left({\mathbf{V}}_A+\mathbf{E}\right)$$

as a condition for the minimum possible output current, dependent on the same variables as with the step-down converter and again the larger the smaller the output voltage. The last equation leads to curve 12 as the natural left limit of the possible operating range of a buck-boost converter, as shown in 3b is shown. The greater the storage inductance L, the closer the two boundaries 11 and 12 of the respective working areas move to the V _A axis. This confirms the first possibility above of enlarging a possible working range by increasing an installed reactive power.

als Bedingung für den minimal möglichen Ausgangsstrom. Der Arbeitsbereich des Hochsetzstellers entspricht - abgesehen von der feststehenden Hyperbel der maximalen Ausgangsleistung P_AMax - exakt dem des Drosselinverswandlers, nur um 1 E parallel zur V_A-Achse noch oben verschoben.The calculation of the operating range of a hard-switching pure step-up converter is analogous and results in $${\mathbf{I}}_{Amin}={\mathbf{E}}^2{t}_{OnMin}/2L{V}_A$$

as a condition for the minimum possible output current. Apart from the fixed hyperbola of the maximum output power P _AMax , the working range of the step-up converter corresponds exactly to that of the choke inverse converter, only shifted upwards by 1 E parallel to the V _A axis.

The fact that small and very small output currents cannot be achieved even with the simplest clocked electronic power converters, the single-ended power converters, in their normal mode (e.g. CRM or TCM), although this is necessary, for example, for deep dimming of LEDs when they are powered by the powered and controlled by power converters underscores the need for the specified method of operation.

In contrast to many other methods of clock generation, the residual ripple of the variable controlled by the specified operating method plays the decisive role here. This residual ripple, which can also be referred to as the modulation depth of the current modulation of the output current, should be kept within a desired range in order to avoid or minimize undesired stroboscopic effects and light flicker. Therefore, this residual ripple must first be defined, which is caused by clocking and not only depends on the period T, but also on the duty cycle D of the same clocking.

dem zeitlich gewichteten Ladestrom I_C, wobei zugleich das Tastverhältnis oder der Duty-Cycle D = t_On / T definiert ist. Ebenso wird klar, dass der Ladestrom I_C dem maximalen Ausgangsstrom I_AMax entspricht, für den ein D = 1 gelten muss. Dieser maximale Ausgangsstrom entspricht entweder dem Nenn- oder Konstruktionsstrom eines kompletten elektronischen Leistungswandlers oder dem Strom, den ein getakteter elektronischer Leistungswandler im Normalmodus an einem Arbeitspunkt auf der natürlichen linken Begrenzung seines möglichen Arbeitsbereichs abgibt. 4a shows the entry-level model for this. A constant current I _C is periodically interrupted with a period T and connected to the parallel circuit consisting of filter capacitor C _A and load resistor R _A . The "switch" is set to " _On " during the periods t On and to " _Off " accordingly during the periods t Off. As above, t _On + t _Off = T. The mean value over time I _A of the output current I _A corresponds to $${\underset{\_}{I}}_A=I_C{t}_{On}/\mathbf{T}={\text{I}}_{c}D$$

the time-weighted charging current I _C , with the duty cycle or duty cycle D = t _On / T being defined at the same time. It is also clear that the charging current I _C corresponds to the maximum output current I _AMax for which D=1 must apply. This maximum output current corresponds to either the rated or design current of a complete electronic power converter, or the current that a switched mode electronic power converter can deliver in normal mode at an operating point on the natural left limit of its possible working range.

zulässig. Durch Einsetzen der Gleichung darüber entsteht mit $$\mathbf{X}=\mathbf{T}{\underset{\_}{I}}_A\left(1-\mathbf{D}\right)=\mathbf{T}{I}_{C}D\left(1-\mathbf{D}\right)$$

die dazugehörige Gleichung, aus der t_Off eliminiert ist. Die Auflösung nach T bzw. nach der Taktfrequenz f = 1/T führt mit $$\mathbf{f}={\mathbf{I}}_{C}D\left(1-\mathbf{D}\right)/\mathbf{X}={\mathbf{I}}_C\left(\mathbf{D}-{\mathbf{D}}^2\right)/\mathbf{X}={\mathbf{I}}_C\left(\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$4$}\right.-{\left(\mathbf{D}-\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\right)}^2\right)/\mathbf{X}$$

zur gesuchten Bestimmungsgleichung für die von D abhängige Taktfrequenz f bei konstanten I_C und X. Sie beschreibt eine auf den Kopf gestellte Parabel zweiter Ordnung mit einem $${\mathbf{f}}_{Peak}={\mathbf{I}}_C/4X={\mathbf{I}}_C/4\left({\mathbf{C}}_{A}Delta\left({\mathbf{V}}_C\right)\right)$$

als Maximum bei D = ½ und mit Nullstellen bei D = 0 und bei D = 1. Die Auflösung von X in der vorletzten Gleichung bringt mit $$\mathbf{f}=\left(\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$4$}\right.-{\left(\mathbf{D}-\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\right)}^2\right){\mathbf{I}}_C/\left({\mathbf{C}}_{A}Delta\left({\mathbf{V}}_C\right)\right)$$

die vier Abhängigkeiten der Taktfrequenz zutage, um die Ausgangswelligkeit Delta (V_C) konstant zu halten:

• • Je höher die Kapazität des Ausgangsfilterkondensators C_A ist, desto niedriger kann die Taktfrequenz f gewählt sein.
• • Je höher der Ladestrom bzw. der maximale Ausgangsstrom I_C ist, desto höher muss die Taktfrequenz f gewählt sein.
• • Je niedriger die Ausgangswelligkeit Delta(V_C) sein soll, desto höher muss die Taktfrequenz f gewählt sein.
• • Der Term ¼-(D-½)² beschreibt die auf den Kopf gestellte Parabel, deren Werte abhängig vom Tastverhältnis D mit den obigen drei statischen Faktoren multipliziert werden müssen, um die tatsächlich passende Taktfrequenz f zu erhalten.

As a simplification, the ripple of the filter capacitor voltage V _C corresponds exactly to the ripple of the output current I _A , which can be assumed as a permissible simplification for purely ohmic loads with a relatively high resistance value, because the absolute current ripple is small compared to the absolute voltage ripple and the latter is therefore small hardly affected. Then the definition of the ripple X is complete $${\mathbf{C}}_{A}Delta\left({\mathbf{V}}_c\right)=\mathbf{X}={\underset{\_}{I}}_A{t}_{Off}$$

allowed. Inserting the equation above gives with $$\mathbf{X}=\mathbf{T}{\underset{\_}{I}}_A\left(1-\mathbf{D}\right)=\mathbf{T}{I}_{C}D\left(1-\mathbf{D}\right)$$

the corresponding equation from which t _Off is eliminated. The resolution according to T or according to the clock frequency f = 1/T also leads $$\mathbf{f}={\mathbf{I}}_{C}D\left(1-\mathbf{D}\right)/\mathbf{X}={\mathbf{I}}_C\left(\mathbf{D}-{\mathbf{D}}^2\right)/\mathbf{X}={\mathbf{I}}_C\left(\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$4$}\right.-{\left(\mathbf{D}-\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\right)}^2\right)/\mathbf{X}$$

to the required conditional equation for the D-dependent clock frequency f at constant I _C and X. It describes an upside down parabola of the second order with a $${\mathbf{f}}_{Peak}={\mathbf{I}}_C/4X={\mathbf{I}}_C/4\left({\mathbf{C}}_{A}Delta\left({\mathbf{V}}_C\right)\right)$$

as a maximum at D = ½ and with zeros at D = 0 and at D = 1. The resolution of X in the penultimate equation brings with it $$\mathbf{f}=\left(\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$4$}\right.-{\left(\mathbf{D}-\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.\right)}^2\right){\mathbf{I}}_C/\left({\mathbf{C}}_{A}Delta\left({\mathbf{V}}_C\right)\right)$$

the four dependencies of the clock frequency to keep the output ripple delta (V _C ) constant:

• • The higher the capacity of the output filter capacitor C _A , the lower the clock frequency f can be selected.
• • The higher the charging current or the maximum output current I _C , the higher the clock frequency f must be selected.
• • The lower the output ripple Delta(V _C ) should be, the higher the clock frequency f must be selected.
• • The term ¼-(D-½) ² describes the upside down parabola whose values, depending on the duty cycle D, must be multiplied by the above three static factors in order to obtain the clock frequency f that actually fits.

eines durch die zugehörige Taktung gesteuerten Signals umso größer, je näher D bei ½ liegt.An increase in the clock frequency "in the middle" of the D values resulting from this parabola term and a reduction of this frequency at "the edges" is a key point of the specified control method in order to achieve a constant residual ripple Delta(V _c ) or to constantly utilize a maximum permissible residual ripple. Viewed from the rear, i.e. valid for a constant clock frequency f, is the residual ripple $$\mathbf{delta}\left({\mathbf{V}}_C\right)=\mathbf{X}/{\mathbf{C}}_A$$

of a signal controlled by the associated timing, the greater the closer D is to ½.

4b illustrates the load case present with LED supply. An LED chain is connected in series to the now only differential load resistance R' _A , which is also significantly lower in resistance than R _A above, which impresses a constant output voltage V _A into the entire model. For this reason in particular, Delta(V _c ) has a significantly stronger ripple-forming effect than with the above purely ohmic load. The above calculation thus quantifies the lowest of all possible frequencies for constant residual ripple when controlled by clocking, because a stronger ripple formation caused by a lower-impedance differential resistance can only be compensated for by correspondingly higher clock frequencies in order to ultimately achieve the same constant and low residual ripple again.

die umgekehrte Parabel 20 als unterste Begrenzung für die Taktfrequenzen, die für eine Taktung gewählt werden können, um insbesondere bei rein ohmschen Lasten eine als zulässig gegebene Restwelligkeit über den gesamten D-Bereich von 0 bis 1 sowohl nicht zu überschreiten als auch optimal auszunutzen. Je differenzieller der ohmsche Anteil der Last und je dominanter eine fest eingeprägte LED-Lastspannung V_A wird, dargestellt durch die Bewegung des fallenden Scharparameters R'_A, desto stärker wirkt eine Taktung welligkeitsbildend in der Umgebung von D = ½, und die Parabel geht mehr und mehr über in die Form eines symmetrischen Giebeldachs bestehend aus den zwei winkelhalbierenden Geradenabschnitten 22 und 23 von 5. Die Steigung dieser Geradenabschnitte entspricht der Steigung der Parabel 20 an ihren Nullstellen, da ein differenzieller Widerstand an den Randwerten D = 0 (kein Ausgangsstrom) und D = 1 (idealer Gleichstrom als Ausgangsstrom) keine Rolle spielt. Der Berührungspunkt zwischen diesen Geradenabschnitten liegt auf einer Taktfrequenz f_Max. Der Wert 2f_Max hat nur konstruktive Gründe, wie sich im Folgenden zeigen wird. In einem dem angegebenen Ansteuerverfahren zugrundeliegenden Experiment zeigt sich, dass bei üblicher Dimensionierung der Ausgangsfilterkapazität C_A und daran angeschlossenen LED-Moduln, die üblicherweise LED-Serienschaltungen umfassen, obige Giebeldachform 22+23 des Frequenzgangs einer Taktung sehr gut damit übereinstimmt, eine zulässige Restwelligkeit des durch diese Taktung gesteuerten Signals über den gesamten D-Bereich derselben Taktung exakt einzuhalten.For 5 the last statement is combined with the calculation about it. The above parabolic equation results from the conversion $${\mathbf{f}}_{Max}=2f_{Peak}={\mathbf{I}}_C/2X={\mathbf{I}}_C/2\left({\mathbf{C}}_{A}Delta\left({\mathbf{V}}_C\right)\right)$$

the inverted parabola 20 as the lowest limit for the clock frequencies that can be selected for clocking, in particular in the case of purely resistive loads in order not to exceed and optimally utilize a residual ripple given as permissible over the entire D range from 0 to 1. The more differential the ohmic component of the load and the more dominant a fixed LED load voltage V _A becomes, represented by the movement of the falling family parameter R' _A , the stronger the clocking has a ripple-forming effect in the vicinity of D = ½, and the parabola expands and more about in the form of a symmetrical gable roof consisting of the two bisecting straight line sections 22 and 23 of 5 . The gradient of these straight line sections corresponds to the gradient of the parabola 20 at its zero points, since a differential resistance at the boundary values D=0 (no output current) and D=1 (ideal direct current as the output current) is irrelevant. the touch point between these straight line sections is at a clock frequency f _max . The value 2f _Max is only for constructive reasons, as will be shown below. An experiment on which the specified control method is based shows that with the usual dimensioning of the output filter capacitance _CA and the LED modules connected to it, which usually include LED series circuits, the above gable roof shape 22+23 of the frequency response of a clocking corresponds very well with a permissible residual ripple of the of the signal controlled by this timing must be maintained exactly over the entire D range of the same timing.

If the differential resistance R' _A becomes even smaller, the "gable roof", i.e. the frequency response required for constant residual ripple, develops a clear peak and finally a pole at D = ½. The peak indicates that the output current I _A from there 4b With very small differential resistances, gaps can even begin, which is equivalent to an infinitely high residual ripple that requires very high clock frequencies to compensate for it. Finally, the pole point applies to R' _A → 0, where the clock frequency f would have to approach infinity in order to comply with a residual ripple limit. In other words, it makes no sense to connect a capacitor as an energy store in parallel with pure or ideal diodes or light-emitting diodes.

In the following, the assumption is followed that for all D > 1/2 the switch-off time t _off = t _OffMin of a clock generation is constant, and that for all D < 1/2 the switch-on time t _On = t _OnMin of the same clock generation is constant. In the middle, i.e. at D = ½, both apply, i.e. t _off = t _OffMin = t _On = t _OnMin = T _Min /2.

ermittelbare Zusammenhang $$\mathbf{D}/\mathbf{f}={\mathbf{t}}_{On}$$

ermöglicht die Berechnung der Taktfrequenz f bei konstanter Ausschaltzeit t_OffMin = T_Min/2 abhängig von D, wobei D > ½ gilt: $${\mathbf{t}}_{On}=\mathbf{D}/\mathbf{f}=\mathbf{T}-{\mathbf{t}}_{OffMin}=\mathbf{T}-{\mathbf{T}}_{Min}/2;$$

$$\mathbf{D}/\mathbf{f}=1/\mathbf{f}-{\mathbf{T}}_{Min}/2;{\mathbf{T}}_{Min}/2=1/\mathbf{f}-\mathbf{D}/\mathbf{f}=\left(1-\mathbf{D}\right)/\mathbf{f}.$$

the over $$\mathbf{f}=1\text{/}\mathbf{T}\text{and}\ddot{\text{and}}\text{calculated}\mathbf{D}={\mathbf{t}}_{On}\text{/}\mathbf{T}$$

identifiable connection $$\mathbf{D}/\mathbf{f}={\mathbf{t}}_{On}$$

enables the clock frequency f to be calculated with a constant switch-off time t _OffMin = T _Min /2 depending on D, where D > ½ applies: $${\mathbf{t}}_{On}=\mathbf{D}/\mathbf{f}=\mathbf{T}-{\mathbf{t}}_{OffMin}=\mathbf{T}-{\mathbf{T}}_{Min}/2;$$

$$\mathbf{D}/\mathbf{f}=1/\mathbf{f}-{\mathbf{T}}_{Min}/2;{\mathbf{T}}_{Min}/2=1/\mathbf{f}-\mathbf{D}/\mathbf{f}=\left(1-\mathbf{D}\right)/\mathbf{f}.$$

als gesuchtes Ergebnis, wobei T_Min = 1 / f_Max berücksichtig ist. Dies ist exakt die Bestimmungsgleichung für das Geradenstück 22 von 5.The last equation leads to $$\mathbf{f}=2{\mathbf{f}}_{Max}\left(1-\mathbf{D}\right)$$

as the searched result, taking into account T _Min = 1 / f _Max . This is exactly the equation for the straight line 22 of 5 .

die Gleichung $$\mathbf{f}=2{\mathbf{f}}_{Max}D$$

als Bestimmungsgleichung für das Geradenstück 23 aus 5.The same calculation for D < ½ with a clock generation with a constant switch-on time t _On = t _OnMin results in over $${\mathbf{t}}_{OnMin}={\mathbf{T}}_{Min}\text{/}2=1\text{/}2{\mathbf{f}}_{Max}=\mathbf{D}\text{/}\mathbf{f}$$

the equation $$\mathbf{f}=2{\mathbf{f}}_{Max}D$$

as a conditional equation for the straight segment 23 5 .

The gable roof shape shown there with the straight line 22+23 is therefore exactly sufficient for a clock generation scheme in which the switch-off time t _Off remains constant for all D>½ and the switch-on time t _{On for all D<½.} The control method specified behaves accordingly or at least approximately according to this clock generation scheme, at least in two contiguous sections of variable D values of the entire D range.

This control method, i.e. at D = 0 starting with a constant switch-on time t _on , increasing D by ½ by linearly increasing the clock frequency, and then increasing D further to 1 with a constant switch-off time t _off , by linearly decreasing the clock frequency again, can be used, for example, for the transmission of analog signals across a galvanic isolation barrier, with the signal being encoded in the duty cycle D, or for generating the clock signal for the at least one active power transistor of a switched-mode electronic power converter that converts electrical power across a galvanic barrier into Is to be transmitted in the form of an isolation transformer, with the level of power being encoded in the duty cycle D, or for controlling a burst mode, which is explained in more detail below.

Starting from a D = 1, the same driving method means periodically switching off a flow of energy with a low clock or burst frequency f during a relatively short period of time t _Off and starting from there decreasing the D by keeping t _Off constant and the clock or burst frequency f is increased up to a D = ½. Therefore the corresponding diagonal is called 22 5 also constant toff branch of the control method. At the point D = ½, f has a maximum value f _Max , and the switch-off time t _Off - ie the pause between, for example, two consecutive bursts - and the switch-on time t _On - e.g. the burst duration - is the same length. Thereafter, this switch-on time t _On is kept constant, and to further reduce the pulse duty factor D, the clock or burst frequency f is reduced again. Therefore, the corresponding diagonal 23 is off 5 also referred to as the constant tone branch of the control method. From here on, the duty cycle D means, restricted to the exemplary description, only the ratio of burst length t _On to burst period 1/f 1 , but in a general case that is not described further it can also mean the ratio of switch-on time to clock period. The same applies to the time durations t _On and t _Off , which only describe a burst length and a pause duration here, restricted to the exemplary following description, but in a general case can also denote an on time and an off time.

6a shows on the far left an area with the above control method and some of its possible effects as well as the overall integration of this control method in an operating method for power supplies, especially for LED control gear, which should be able to dim their output current to values close to zero. The pulse duty factor D recorded here basically relates to the above control method, in which essentially the clock frequency is adjusted, particularly in the ranges of D between 99% and 80% and between 30% and 1%. In these areas, the ripple W of the output signal, here the output current, for example for supplying LEDs, is increased to permissible values between 5% and 10%, but is constant in each case, as required for the specified control method. In these two areas, the control gear operates in a burst mode.

To the right of this there is a D = 100% and an equally constant but smaller ripple W of the output signal in relation to a maximum current which corresponds to the point PS = 100%. Here the output current is plotted on the x-axis in relative terms in the form of a percentage PS, each related to the maximum current above. In the larger right area of the 6a the control gear works in its normal mode as represented by D = 100% (i.e. no burst mode), the hard-switching or otherwise controlled electronic single-ended or push-pull power converters used in it consequently serve only those operating points that are within its possible operating range according to one of the 1a until 3b lay. In the normal mode, the ripple W is determined almost exclusively by the work of the power converter in interaction with its output filter and the differential resistance of the currently connected load acting in parallel. Because in most cases it is the task of the power converter, in addition to setting the required output current, to actively filter out or regulate out the fluctuations in its internal supply voltage E, which is almost always provided by a mains rectifier or a power factor corrector and therefore almost always a so-called " Mains hum" of twice the mains frequency. While this operation of a normal mode power converter is part of the specified method of operation, it is not further described because it is well known. Regarding the residual ripple or the modulation depth of the current modulation of the output current in the power converter clock frequency of the required output current, it should be noted that the residual ripple decreases in absolute terms with a reduction in the output current if the clock frequency of the power converter increases to achieve this reduction. The output low-pass filter contained in each clocked power converter, the components of which can also be at least partially surrounded by a resonant circuit, works all the better the smaller the current output current should be. With appropriate filter tuning, it can be achieved that the residual ripple is constant relative to the current output current in the entire right-hand range from PS = 100% down to PS = 10%.

The above maximum output current is either the maximum possible with an output voltage (e.g. specified by the connected LED module) or is fixed and set below the maximum possible value when the operating device is commissioned. In normal mode, almost every clocked electronic power converter can achieve 40% to 4% of this maximum output current at all output voltages that are usual for it, so the mode limit of the specified operating method is PS = 40% ... 4%. This mode limit corresponds to the left natural limit of a possible working range for the power converter working in the control gear according to one of 1a until 3b . If, however, an operating point is to be served just to the left of it, the specified operating method jumps into its burst mode, usually with a D=99% or a similar value. The value of the special control variable, for example the clock frequency, with which the power converter has reached the limit of its possible operating range, remains constant for all further actions beyond this limit in burst mode. This also eliminates the need for active correction of the mains hum, i.e. filtering out the fluctuations in the internal supply voltage E. The jump in the ripple W in 6a from approx. 3% to approx. 10% at the point of a mode limit with a percentage PS = 10% is caused precisely by this, because every clocked electronic power converter that is rigidly controlled outputs all fluctuations in its input voltage E wie here the mains hum is proportionally passed on to its output. Passing on these fluctuations to the instantaneous output current is also possible for all percentages PS = 40% ... 4% that are smaller than the usual mode limit, where work is generally carried out in burst mode, because the transmitted power is already significantly reduced at these points and thus also the amplitude of the mains hum that causes the fluctuations.

und $${\mathbf{t}}_{Off}={\mathbf{t}}_{On}\text{/}{\mathbf{D}}_{99}-{\mathbf{t}}_{On}=\left(1-{\mathbf{D}}_{99}\right){\mathbf{t}}_{On}\text{/}{\mathbf{D}}_{99}$$

zu $${\mathbf{t}}_{Off}=\left(1-{\mathbf{D}}_{99}\right)\text{/}{\mathbf{f}}_{99}.$$

Because loud 5 when entering the burst mode with e.g. D ₉₉ = 0.99 theoretically almost infinitely low burst frequencies f would be possible, in practice at this point the burst frequency f ₉₉ is set so high that the ripple W of the output signal despite fluctuations in the internal supply voltage permissible value of, for example, 5% to 10%. This also results in the initially constant switch-off time t _Off , ie the pause duration between two consecutive bursts, which are still very long at this point $${\mathbf{f}}_{}$$$${\mathbf{}}_{99}=1\text{/}\left({\mathbf{t}}_{On}+{\mathbf{t}}_{Off}\right)={\mathbf{<figure-callout\; id="9"\; label="D"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">D</figure-callout>}}_{99}\text{/}{\mathbf{t}}_{On}$$

and $${\mathbf{t}}_{Off}={\mathbf{t}}_{On}\text{/}{\mathbf{<figure-callout\; id="9"\; label="D"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">D</figure-callout>}}_{99}-{\mathbf{t}}_{On}=\left(1-{\mathbf{<figure-callout\; id="9"\; label="D"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">D</figure-callout>}}_{99}\right){\mathbf{t}}_{On}\text{/}{\mathbf{<figure-callout\; id="9"\; label="D"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">D</figure-callout>}}_{99}$$

to $${\mathbf{t}}_{Off}=\left(1-{\mathbf{<figure-callout\; id="9"\; label="D"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">D</figure-callout>}}_{99}\right)\text{/}{\mathbf{<figure-callout\; id="9"\; label="f"\; filenames="DE102021208417A1\_0038.png,DE102021208417A1\_0040.png"\; state="\{\{state\}\}">f</figure-callout>}}_{99}.$$

For percentages PS as in 6a shown, for example, less than 10%, the operating method changes to its burst mode. In this area of the operating method, the ripple W of the output current is significantly larger than in the normal mode area of the clocked electronic power converter. This larger ripple W of the output current in burst mode is even desirable because lighting installations with many light-emitting diodes that are connected in series and are therefore operated with the same current get a coarse-grained appearance if the same current is dimmed down very far and is absolutely smooth. The reason for this are flaws in the LED crystal, which impose an individual minimum current on each individual light-emitting diode, which is still positive, and if the current falls below this, the affected light-emitting diode goes completely dark for the first time. Some light-emitting diodes are the first to do this, while another may be the only one that lights up to the end. The optical appearance of a light installation equipped with many light-emitting diodes and operated in this way suffers considerably as a result. Due to the higher permissible values of the ripple W of the light-emitting diode current at these low brightnesses, e.g. at PS < 10%, all light-emitting diodes involved in the same light installation shine almost equally brightly, but so to speak micro-pulsed, and a further darkening occurs by reducing a duty cycle, which is smoothed by the eye into a continuously reducing brightness. There is also a positive glitter effect, because the human eye is used to light sources flickering slightly at very low levels of brightness, such as the natural starry sky.

This is precisely why the specified operating method in burst mode allows even higher values for the ripple W _of the output current, e.g -Control method would actually result. For this purpose, the control method, in which the burst frequency f is first increased under a substantially constant t _off in order to reduce the duty cycle D, is modified from a first point A, at which the burst frequency f reaches a value f _DACH , which is significantly below the value of f _Max 5 lies. In 6a this point A is approximately at D = 80%. After that, i.e. for decreasing D, classic PWM is used at a constant burst frequency f=f _DACH , whereby the ripple W according to the drawing rises steeply to a value of 80% for D=½, which is a maximum value. Typically this peak ripple should be 25%...40% of the output current at the mode limit. If the duty cycle is further reduced below D = ½ with an unchanged burst frequency f = f _DACH , the ripple decreases just as steeply as it had previously increased up to a second point B, after which a smaller burst frequency f < f _DACH is required according to Constant t _On -Asts 23 of the specified control method. This second point B is according to 6a e.g. at about D = 30%. For even smaller duty ratios D, the ripple W again constantly maintains the permissible value of, for example, 5% to 10% because of compliance with the constant t _on branch 23 of the specified control method.

obiger Proportionalitätsfaktor heraus, und es bestätigt sich nicht nur, dass eine höhere Frequenz f₂ eine geringere Welligkeit W₂ zur Folge hat und dementsprechend eine geringere Frequenz f₁ eine höhere Welligkeit W₁, sondern auch, dass die Welligkeiten im umgekehrten Verhältnis zu ihren Frequenzen stehen, was sich auch aus der Definition der Periodendauern ergibt. Daher verläuft hier über D die Welligkeit W genau in derselben Giebeldachform, nach welcher in 5 die Frequenz f verläuft.This peak in the course of the ripple W over the duty cycle D corresponds to the gabled roof shape of 5 consisting of the rising branch or constant toff branch 22 and the falling branch or constant t _on branch 23, only interpreted inversely: If the goal there was to keep the ripple W constant over all D by adjusting the frequency, this is just that Frequency constant f = f _DACH , resulting in 6a the ripple W must rise and fall again over a variation of the pulse duty factor D of, for example, 80% to 30%, with a ripple maximum at D=½, ie at PS=5%. Because with a pulse duty factor D assumed to be constant, a ripple W _x generally behaves with a factor proportional to the period duration 1/f _x . Will two ripples come out of the same power converter and their associated period lengths are compared with one another, is reduced according to $${\mathbf{W}}_1\text{/}{\mathbf{<figure-callout\; id="2"\; label="W"\; filenames="DE102021208417A1\_0033.png"\; state="\{\{state\}\}">W</figure-callout>}}_2=\left(1\text{/}{\mathbf{f}}_1\right)\text{/}\left(1\text{/}{\mathbf{f}}_2\right)={\mathbf{<figure-callout\; id="2"\; label="f"\; filenames="DE102021208417A1\_0033.png"\; state="\{\{state\}\}">f</figure-callout>}}_2\text{/}{\mathbf{f}}_1$$

above proportionality factor out, and it is not only confirmed that a higher frequency f ₂ results in lower ripple W ₂ and correspondingly a lower frequency f ₁ results in higher ripple W ₁ , but also that the ripples are inversely related to their frequencies stand, which also results from the definition of the period lengths. Therefore the ripple W runs over D exactly in the same gabled roof shape, according to which in 5 the frequency f runs.

6b shows such a first point A, at which the constant-toff control of the burst mode 'transitions into a constant-f _DacH -PWM, and a second point B, at which the classic burst PWM in a constant-ton control for the Burst mode transitions, as positions on the respective x and D axes and in between the constant burst frequency f = f _DACH < f _Max and the effects caused by it. Because here only working points below the mode limit, so louder those are shown in burst mode, the duty cycle D can the percentage PS from 6a replace on the x-axis. 6b is the enlargement and detailing of the short left part of the previous figure. The residual ripple W here refers to the value of the output current at the mode limit at D = 100% if the differential load resistance is constant over the output current sub-range considered here. It is striking that all transitions are continuous despite the changes in the control process.

The above-mentioned gable roof shape consisting of the constant toff branch 22 and the constant t _on branch 23 is drawn in dashed lines in the upper graph, according to which those burst frequencies f can be represented in kHz that theoretically result according to the specified control method in order to - as in shown in sections in the lower graph - to obtain a constant residual ripple W of, for example, 5% in relation to the output current at the mode limit. As shown by the dotted diagonal and the hatching below, at the mode limit on the right-hand edge of this lower graph, ¾ of the residual ripple is caused by the fluctuations in the internal supply voltage E or by the mains hum, the effect of which is when the output power decreases, i.e. for supplying LEDs when the output current decreases and thus when D decreases, it also decreases linearly. Therefore, on the left-hand edge, e.g. at D = 1%, the full residual ripple may be caused by the burst operation as such, for which a burst frequency f ₀₁ = 100 Hz is sufficient, whereas on the right-hand edge only ¼ of the residual ripple is left for the effects of a burst mode' is left. Experiments show that for a burst frequency f ₉₈ at the point D = 98%, a further 300 Hz must be added in order to get the sum of the residual ripples W caused by the burst mode and the mains hum below the permissible value of 5%, for example. Therefore, there, for example at D = 98%, the burst frequency f ₉₈ must be 400 Hz, for example, and at D = 1% 100 Hz are sufficient as burst frequency f ₀₁ for the same effect, which is indicated in the form of the end points of the solid line at the corresponding Positions of the upper graph of the 6b is shown. This also benefits the fact that at PS < 1%, i.e. at D < 10%, a four times higher resolution between the individual dimming setpoint levels is required than in the vicinity of the mode limit, which at the above-mentioned burst frequencies results in levels of extension of the same length or shortening of burst or pause durations in the specified control method. Consequently, it helps to maintain a logarithmic dimming characteristic by making particularly good use of a number of bits specified in a (digital) control circuit.

Due to the already very small output current values, an LED load here comes into the area of the knee in its characteristic. With a decrease in the output current, the differential load resistance increases so much here, and with it a filter effect for the output current, that its residual ripple values, which are used in the course of the entire description, increase 6b are mentioned, even apply relative to the instantaneous value of the output current.

Due to the difference between f ₀₁ and f ₉₈ in the necessary burst frequency, the distance increases from values close to zero at D = 1% to, for example, 300 Hz at D = 98% between the solid line of the upper graph of this figure, according to which the burst frequencies actually are to be set, and the dashed line 22+23 for theoretically constant residual ripple. Between points A and B, however, the course of this line, which is shown here as a dotted line, is left and instead at a constant burst frequency f _DACH , here for example at 2.0 kHz or particularly advantageously at only 1.25 kHz, using classic PWM duty cycle D varies. In this example, point A is at D = 65%, point B at 36%. Due to the fact that the burst frequency is actually too low, between these two points there is a similar gabled roof in the lower graph for the residual ripple W, as it is cut off above by the solid horizontal line for the burst frequency f _DACH . Outside of these two points, the hatching shown in the graph below means what the mains hum removes from the permissible residual ripple W. To compensate for this, in the upper graph, the necessary overhang at the burst frequency f is shown in the form of the distance between solid and dashed lines. Because removal and overhang depend linearly on D, point B is closer to D = ½ or PS = 5% than point A in the specified control method. Expressed in general terms, point B is by no means further away from D = ½ than point A.

Another reason for capping the chest frequency f to the value f _DACH , which at 2.0 kHz or 1.25 kHz, for example, is well below the value of f _Max , is an acoustic one. Illuminated objects tend to oscillate mechanically at the frequencies that occur electrically in them, their multiples or at possible subharmonics thereof and emit corresponding noise. Large luminaires for large fluorescent lamps often hum at 100 Hz. The smaller and more compact the light installations become, such as for LED applications, the higher the frequency at which they can oscillate mechanically. Several kHz as mechanical natural resonance are possible, with 3 kHz as natural resonance being more likely than 1.25 kHz. The aim is therefore to always remain below such mechanical natural resonances with the value of f _DACH . Finally, the human ear is even less sensitive to continuous noise at 1.25 kHz than to continuous noise at higher frequencies. Finally, with such relatively low burst frequencies, stroboscopic effects can also be avoided relatively reliably in the areas that are illuminated by an LED module that is supplied and controlled by an operating device whose electronic power converter works according to the specified operating method.

The 60 Hz are deliberately at the lower end of the scale for the burst frequencies. Because below this lowest occurring burst frequency, an unpleasant flicker can emanate both from the LED module, which is supplied and controlled by an operating device whose electronic power converter works according to the specified operating method, and from the area illuminated by it.

7a shows the working point for D=99% or PS=9.9% on the way to smaller percentages PS, i.e. a first possible working point after the mode limit. The clock frequency of the normal mode 'of a resonant half-bridge used for this measurement, whose operating range in 2 is shown here is constant at, for example, 160 kHz. It includes at least one switchable bypass capacitor, which in normal mode is actually constantly decoupled beyond the mode limit. This bypass capacitor is used to accommodate the 7a coupled for the first time periodically for a very short time. The coupling can be seen from the second-top measurement curve 21, which shows a low value when the bypass capacitor is coupled and a constantly high value when it is uncoupled. The time interval between two consecutive coupling activities, ie between two falling edges of the measurement curve 21, is the burst period 1/f. The same curve 21 illustrates the maximum pulse duty factor D required for this operating point, with “low” meaning a decoupled load and “high” a load that is normally supplied by the resonant half-bridge. Because the switchable bypass capacitor is so large that when it is connected it actually decouples the load and sends the resonant half-bridge into (almost) pure flashing power work, which means that (almost) no active power is needed at these times. This makes it very elegantly possible, as initially required, to periodically interrupt an energy flow in the form of a current and thus also to generate operation in burst mode with a resonant half-bridge, which is an almost ideal AC source. This is precisely what can be seen from the top trace 46, which represents the current flowing out of the rectifier connected to the transformer of the resonant half-bridge: this becomes abruptly zero each time the bypass capacitor is coupled. The third measurement curve 47 shows the output current, and the bottom or fourth measurement curve 9 shows the input current of the entire resonant half-bridge, which is extremely noisy due to a low-impedance measurement that is required for this while at the same time having a high measurement amplification. The associated zero levels are marked on the left on the y-axis by 0 ₄₆ , 0 ₂₁ and 0 ₄₇ as well as in the two following figures. The zero level of the measurement curve 9 is at or below the lower edge of the window and is therefore not shown.

For 7b the duty cycle D is reduced to about 40% from the maximum it has in the previous figure. The much longer zero pauses in the "upper" current 46, which flows out of the rectifier, and the corresponding longer coupling phases of the at least one switchable bypass capacitor can be seen clearly, as can be seen from the respective low levels in the second-to-top measurement curve 21. In contrast to the previous one In the figure, the curve 47 for the output current appears further away from the measurement curve 21 since it has decreased as required. The bursts have become shorter. As above, the bottom curve 9 represents the input current of the entire resonant half-bridge.

The ripple of the output current 47 is significantly higher at this operating point than at the operating point in the previous figure. origin and end The effects of this have already been described in detail above.

7c finally shows the measurement curves for the lowest possible working point according to 6b , i.e. with a duty cycle D in the vicinity of 1% or with a percentage PS of significantly less than 1%. In contrast to the two previous figures, the time resolution is finer here, which is why individual half-bridge cycles can be seen in the rectifier output current 46 and in the half-bridge input current 9, which is why, on the other hand, a complete burst period can no longer be represented. The output current 47 has moved further down as required, and its ripple is again as small as that in 7a . As can be seen from current curve 46, the load is almost permanently decoupled. At 7c It is also clear, as can be seen in particular from the complete peak 46a in the rectifier output current 46, that in the burst mode the start and, in the case of resonant power converters, above all the end times of each individual burst are particularly advantageously synchronous with the work of the power converter in a normal mode. In power converter topologies other than a resonant half-bridge, for example in single-ended power converters, one or more control pulses in succession for the at least one active power transistor of the clocked power converter can be omitted to generate the pauses between the bursts. The duty cycle within the bursts corresponds, for example, to a minimum duty cycle required for the lowest operating point in normal mode.

As the first condition for the in 7c The minimum duty cycle D shown and thus the minimum possible burst length T _mess (must still be drawn in the figure, see LLCaddC!) results in the period of complete clocking of the power converter working in the control gear. Exactly two pulses of the rectifier output current 46 appear between the two edges in the logic signal 21, the first of which represents the decoupling and the second the recoupling of the at least one switchable bypass capacitor a full wave rectifier. Thus there are always two energy transfer phases per clock period.

Second, any regulated power supply, particularly an operating device that is designed to power and operate various types of LED modules, must continuously measure the load connected to it. For example, the output voltage is not known when first switched on or after a very long period of inactivity, and the same voltage varies greatly with module temperature. For example, if the module illuminates an exterior facade in winter and has just been switched on, the output voltage can be significantly higher than after continuous operation of the same module in summer.

The measurement can only take place as long as the power converter working in the power supply actually converts power and delivers it to its load, i.e. only during the bursts, because only then does an output voltage arise and an output current can be regulated to its (dimming) setpoint. This measurement must be settled in each case in order to be able to obtain at least one meaningful value for the current output current and for the current output voltage for each burst. Because nothing can be measured in between, since then there is (almost) only reactive power. The short bursts with their duration T _mess must be longer than 10 μs, or preferably longer than 50 μs or, as in another exemplary embodiment, longer than 150 μs. At 160 kHz as an example clock frequency, this corresponds to 1.6 or 8 or 24 full clock periods, whereby the first condition “at least one full clock period” is met in each case. In this case, the burst durations T _meas only have to be longer than the period duration of a complete power converter clocking, but they do not have to be integer multiples thereof. The minimum possible burst length T _mess corresponds to the constant t _on from above for the constant t _on branch 23 of the control method 5 . In the case of a burst frequency f ₀₁ =100 Hz and a minimum duty cycle D=1%, a t _On of 100 μs or 16 full clock periods of the exemplary resonant half-bridge results as the burst length.

Knowing the output voltage, and consequently measuring it, is also important because the specified operating procedure may vary with different values of the output voltage. In particular, in the case of a resonant half-bridge as an electronic power converter, the mode limit can be at higher clock frequencies _flimit , the lower the instantaneous output voltage V _A is. The burst frequency f ₉₈ or f ₉₉ after exceeding the mode limit can also depend on the output voltage: The higher this is and consequently the smaller the output current, the lower the burst frequency can be, which also means the use of a fixed time quantization (= e.g. number of bits for conversion into burst lengths): The lower the output current, the lower the individual current levels must be for the same dimming effect. The lower the burst frequency, i.e. the longer the bursts are, the more “time quanta” of the same length fit in there, and the finer they are The output current can be adjusted in more stages.

8th shows a possible procedure resulting from this, how the specified control method and the specified operating method can be used in an LED control gear in order to solve what is sometimes the most difficult of all possible cases. A resonant half-bridge is installed as an electronic power converter in the control gear under consideration, to which a permissible LED module or a permissible combination thereof is connected. However, the control gear does not know exactly what is currently connected. The operating device only knows a mode limit cut 6 through the output voltages, ie a table of mode limit clock frequencies f _limit describing this line as a function of the respective output voltage V _A , below which normal mode applies and at which burst mode is carried out. A third column of this table, which is often a so-called “look-up table”, for example, can contain the lowest burst frequencies f ₀₁ associated with the output voltages V _A . The control gear under consideration is now started for the first time and should dim up the LEDs connected to it from complete darkness - i.e. starting from its minimum possible output current I _A . The notorious switch-on light flash should be avoided at all costs, so it is better to set the control gear to an output current that is too small than too large.

To do this, the control gear initially assumes the worst case 7 in terms of output current, which means that a module with the lowest possible output voltage, e.g. 15 V, is connected because every resonant electronic power converter then naturally delivers the most current. This output voltage therefore also includes the highest mode limit clock frequency f _Grenz0 at which the half-bridge starts, and at the same time the highest burst frequency f ₀₁ for the lowest dimming position. The smallest possible pulse duty factor D, for example 1%, is set with this burst frequency. As soon as the first few bursts with a constant duration _tmeas = _ton and correspondingly long pauses in between have taken place at the starting operating point 8 resulting from this, the operating device has measured its current output voltage V _A .

If this is actually 15 V, everything remains unchanged, except that the burst frequency is first increased according to the dimming speed on the one hand and according to the specified control method on the other hand, then kept constant at f _DACH and then reduced again in order to continuously increase the duty cycle D and thus the dimming level . If the mode limit is reached, the burst mode changes to normal mode. In addition, i.e. towards even higher dimming levels, the electronic power converter in the operating device under consideration is operated and controlled in its normal mode within the natural limits of its possible operating range using its special control variable, i.e. in the case of a resonant half-bridge by reducing its clock frequency. The output current controller, which is always active, is responsible for all of these controls.

However, if a higher output voltage is measured, the control gear under consideration first lowers its mode limit clock frequency to the value f _limit1 and possibly also its lowest burst frequency f ₀₁ according to the table above, in order to adapt both to the newly measured output voltage V _A . This process 19 runs constantly in the background, because the output voltage can change in Ifd. Operation can also change, e.g. due to a change in temperature of the LED module, due to errors or by controls at module level, e.g. due to spontaneous bridging of individual LEDs. If the measurement of the output voltage is stable, the operating device can start with the same dimming up 10 as described above for a V _A =15 V, only with changed start values including the adjusted value for the mode limit clock frequency f _limit1 . At an operating point 13 on the line of said mode limit intersection 6, the output current controller detects a burst frequency below the value f _limit1 that is usual for this output voltage and thus the mode limit. As a result, the burst mode is exited and the normal mode of the resonant half-bridge is switched to at the clock frequency f _limit1 . Starting at operating point 13, the output current I _A is increased by reducing the clock frequency f _HB until the desired operating point 15 is reached along the characteristic curve 14 for the respective output voltage, which is here, for example, at an output current I _A =200 mA. As above, the output current controller is responsible for all the controls required for this, because it is the only one that carries out a constant target/actual comparison for the output current.

The charm of this approach lies firstly in the above-described particularly good utilization of digital control processors, which makes large power ranges possible with relatively little effort, and secondly in improved utilization of the natural limits of the possible working range of a resonant power converter with a more complex resonance system.

With the single-ended power converters operating in CRM, TCM or Valley Detect mode as their most common normal mode, which is the boundary between Continuous Conduction Mode (CCM) and Discontinuous Con duction mode (DCM), precisely because of this limit position, the special case applies that the clock frequency is a measure of the currently transmitted current (coming from the DCM), and that at the same time the inner pulse duty factor of this clock frequency is a measure of its voltage conversion (coming from the CCM). ). In this case, the output voltage is higher, the higher this internal pulse duty factor is, and the transmitted current is higher, the lower the clock frequency is. As already for the derivation of 3a and 3b described, the limiting factor for both is the minimum possible switch-on time t _OnMin for the active power transistor. This limits small output voltages because of the small pulse duty factor required for this, with simultaneously small output currents because of the high frequency required for this. Therefore, the "lower left corner" is missing in the natural working areas there, each "cut off" from the natural limits 11 or 12. Because of this strong coupling of the individual variables with each other, it does not make sense for single-ended power converters to use different limit parameters and set burst parameters. Instead, the mode limit is simply reached when t _On = t _OnMin .

Similarly, the mode limit clock frequency f _limit , which at the same time represents the maximum frequency for the normal mode and is therefore close to t _OnMin , can be fixed as constant for all output voltages for resonant half-bridges that work as electronic power converters in operating devices for LEDs. In the example examined, f _limit is fixed at a value of 166.5 kHz, and the internal duty cycle is generally slightly less than ½ for both power transistors involved, as is usual in most cases for resonant half bridges. The minimum burst frequency f ₀₁ can also be constant and be 100 Hz, for example, independently of the instantaneous output voltage V _A . As a result, the mode boundary section 16 is perpendicular to 8th , and the above procedure, which belongs to the same figure, is simplified in that the output voltage measurement is unimportant for this, and the always active output current control in the vicinity of the operating point 17 or above it automatically decides whether burst mode or normal mode is present.

Because the special control variable on this side of the mode limit, i.e. in normal mode, mostly wobbles, for example to compensate for mains hum, but is rigid beyond the mode limit for burst operation, the mode limit should include a hysteresis (not shown), i.e. from two closely adjacent or even parallel boundary lines that cause their mode changes to be directional and counter-current. It makes sense for a first boundary line, at which there is a transition from normal mode to burst mode, to be at shorter t _on or at higher f _limit than a second boundary line at which there is a change back from burst mode to normal mode. The distance between these two boundary lines sensibly corresponds to the maximum possible wobble of the special control variable for the respective normal mode. In this way, it is effectively avoided that an electronic power converter has to jump back and forth between its two modes periodically—for example, at twice the supply network frequency.

Reference List

1

natural limit "bottom left", i.e. for small output currents and small output voltages, of a possible working range for a clocked electronic power converter in a favorable form

1'

the same in an unfavorable form

2

the same for a resonant half-bridge as a switched LLCC power converter

3

same as FIG. 2 for increased resonant capacitance within the LLCC power converter

4

upper natural limit of the possible working range at high output voltages and medium to low output currents for an increased resonant capacitance within the LLCC power converter

5

Part of a required work area that is not covered by any of the possible work areas

6

Mode boundary cut general

16

Mode limit cut at constant f _limit

7

Entry working point in general

17

Entry operating point at constant f _limit

8th

Determination of the general entry mode limit frequency f _limit0

9

Measuring signal for the input current of a resonant half-bridge

10

Dimming up in burst mode according to the specified control method

11

left natural limit of a possible working range with small output currents for a step-down converter in the CRM or TCM

12

left natural limit of a possible working range with small output currents for one of the four step-up and step-down single-ended power converters in the CRM or TCM

13

Operating point on the mode limit when the output voltage is present

14

Dim up in normal mode

15

target operating point

19

Ifd. Adjustment of f _limit (and f ₀₁ ) based on the current output voltage

20

Parabola of the lowest possible frequencies for uniform residual ripple with different duty cycles

21

Logic signal according to specified control method

22

Constant toff branch of the specified control method

23

Constant t _On -Ast of the specified control method

46

Output current of the rectifier of the switched-mode electronic power converter

47

Output current I _A of the entire electronic power converter suitable as LED operating current

Any sizes or references identified by letters, indexed or not, are not listed here.

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• WO 2016050689 [0017, 0018, 0023]
• EP 1710898 B1 [0020]
• US 8379422 B2 [0020]
• EP 2952060 [0021]
• US63032468 [0061]

Claims (11)

Method for operating a clocked isolating power converter with an output power range for operating a load that can be connected, the output power range resulting from a permissible output voltage range (U _A ) and a permissible output current range, the power converter having: - at least one switch, which is controlled by a controller with a is operated at a suitable converter clock frequency in order to - magnetize and demagnetize at least one inductance (4, 5a) in the circuit, - a switch-on/off-switching device as part of the controller, which periodically conducts an output current of the power converter synchronously with the converter clock frequency to an output capacitor, characterized by the following Steps: - in a first mode of operation, ranging from the maximum output current of the power converter of 100% to a reduced output current, setting the on/off device to a duty cycle of 100%, and adjusting the wall ler clock frequency in order to reduce the output current of the power converter for the load, - in a second operating mode, which ranges from the reduced output current to the minimum output current, maintaining the converter clock frequency and adjusting the duty cycle to change the operating point, and thus the output current of the clocked to further reduce the converter for the load, with an on-off gating device frequency being reduced from a duty cycle that is in the range of 40% to 20% as the duty cycle decreases, in order to keep a modulation depth of the current modulation of the output current in a desired range, the On-blanker frequency at the duty cycle, which is in the range 40% to 20%, is higher than the on-blanker frequency at minimum duty cycle by a factor of 2 to 40, preferably by a factor of 3 to 15. procedure according to claim 1 , characterized in that the on/off blanking device has four operating points: - At operating point 1, the on/off blanking device frequency is in a range between 60Hz and 600Hz, preferably in a range between 200Hz and 450Hz, and the duty cycle is in a range between 0.05% to 10%, preferably in a range between 1% and 5%, - At operating point 2, the on/off blanking device frequency is in a range between 800Hz and 4000Hz, preferably in a range between 1000Hz and 2000Hz, and the duty cycle is in a range between 15% to 35%, preferably in a range between 20% and 30%, - At operating point 3, the on/off blanking device frequency is in a range between 800Hz and 4000Hz, preferably in a range between 1000Hz and 2000Hz, and the duty cycle is in a range between 65% to 85%, preferably in a range between 70% and 80%, - At operating point 4, the on/off gating device frequency is in a range calibrated between 60Hz and 600Hz, preferably in a range between 200Hz and 450Hz, and the duty cycle in a range between 90% to 100%, preferably in a range between 98% and 100%. procedure according to claim 2 , characterized in that the on-blanker frequency increases linearly over the duty cycle in the range between operating point 1 and operating point 2. procedure according to claim 2 or 3 , characterized in that the on-blanker frequency falls linearly over the duty cycle in the range between operating point 3 and operating point 4. Method according to one of claims 2 until 4 , characterized in that the on-blanker frequency is substantially constant in the range between operating point 2 and operating point 3. Method according to one of Claims 1 until 5 , characterized in that pulse patterns of the on-blanker repeat periodically at the on-blanker frequency. Method according to one of Claims 1 until 6 , characterized in that the output capacitor is connected downstream of the on/off device and in parallel with the output terminals of the power converter, and the capacitance of the output capacitor is selected in such a way that a modulation depth of the current modulation of the output current meets the following criteria: - At an on/off device frequency of 70 Hz to 100Hz the modulation depth is in the range 50% to 10% and preferably in the range 25% to 10%, - At an on-blanker frequency of 200Hz to 240Hz the modulation depth is in the range 60% to 12% and preferably in the range 30% to 12% , - With an on-blanking device frequency of 500Hz to 600Hz, the modulation depth is in the range 80% to 26% and preferably in the range 65% to 26%, - With an on-blanking device frequency of 1000Hz to 1200Hz, the modulation depth is in the range 85% to 36% % and preferably in the range 80% to 36%, - With an on-blanker frequency of 1200Hz to 4000Hz, the modulation depth is in the range 100% to 36% and preferably in the range 90% to 36%. Method according to one of Claims 1 until 7 , characterized in that at least one time segment is provided within a period of the on/off gating device frequency at which the connectable load is measured. procedure according to claim 8 , characterized in that the period of time at which the connectable load is measured takes place at a point in time when the on/off device conducts the output current of the power converter onto the output capacitor, the period of time being in the range 10us to 5000us and preferably in the range 50us to 1000us lies. Method according to one of Claims 8 or 9 , characterized in that during the time segment in which the load that can be connected is measured, variables are measured which are required as input variables for current regulation of the power converter, in particular an input current and an input voltage on a primary side of the power converter and an output voltage on the secondary side of the power converter. procedure according to claim 10 , characterized in that the measured variables are used in particular to calculate an input current and an input voltage on a primary side of the power converter and an output voltage on the secondary side of the power converter, and the output current is calculated using the duty cycle and a model for the losses occurring between the primary and secondary sides of the converter and is controlled by adjusting the duty cycle.

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