DE102021113004B3 - LOAD SIMULATION DEVICE, TEST DEVICE - Google Patents

Abstract

A load simulation device (10a) for simulating a three-phase load for a three-phase or generally multi-phase inverter (1) has three or generally several phase connections (17u, 17v, 17w) for an inverter (1) to be connected, two direct current outputs (14p, 14n) for a DC power supply (16) to be connected, three or generally more transistor bridges (11u, 11v, 11w), which are each connected between the DC lines (14a, 14b) and each have at least two series-connected electronic switches (21, 22), their connection area (23) are connected directly or indirectly to one of the phase connections (17u, 17v, 17w). For each of the electronic switches, the load simulation device has a control line (sup - swn) for controlling the respective electronic switch, and a control circuit (13) connected to the control lines (sup - swn) for driving the electronic switches (21, 22) by means of respective control signals generated by it (up, un, vp, vn, wp, wn). The control circuit (13) is designed to generate the control signals (up, un, vp, vn, wp, wn) in chronological coordination with control signals in an inverter (1) to be connected.

Description

Inverters are electronic circuits that generate alternating current from direct current. They regularly generate multi-phase alternating current (“three-phase current”), for example three-phase or six-phase. Especially with regard to electromobility, such inverters for driving electric motors, even those with high electrical power, are becoming increasingly important. It is therefore also important to be able to test and inspect such inverters efficiently. Efficiency includes on the one hand the efficient handling of test routines and data management, but on the other hand also energy efficiency and equipment for this that is as uncomplicated and inexpensive as possible.

Known for this are simple chokes that work as a passive, pure reactive power load. The energy oscillates between the motor phases. The electrical replica of the load is only approximate. The direct current path of the inverter is not actually loaded.

Also known are high-end motor simulations that simulate a load in an electronically controlled manner and feed the electrical power consumed back into the AC voltage network. However, these circuits are very complex and require a powerful DC power supply.

the U.S. 2007/0165438 A1 describes an inverter test apparatus and method using lamps as a test load.

the U.S. 2017/0206297 A1 describes a simulation device for simulating a peripheral device that can be connected to a controller. The simulation device has semiconductor switches for setting a current.

The object of the invention is to specify a load simulation device and a test device for multi-phase inverters that can be built efficiently and operated in an energy-efficient manner.

This object is achieved with the features of the independent patent claims.

A load simulation device for simulating a three-phase load for a multi-phase inverter ("test item" or "DUT") has the features of claim 1. It has several, preferably three or six, phase connections for an inverter to be connected, one or more pairs of two DC outputs for a DC power supply to be connected to internal DC lines, several, preferably three or six, transistor bridges, each connected between the DC lines of a pair and each having at least two series-connected electronic switches, the connection area of which is connected directly or indirectly to one of the phase connections, for each the electronic switch has a control line for controlling the respective electronic switch, and a control circuit, which is connected to the control lines for driving the electronic switches by means of respective control signals generated by it len. The control circuit is designed to generate the control signals in a timely coordination with control signals in an inverter to be connected.

The load simulation device can generally simulate a multi-phase electrical load. In particular, it can simulate a synchronous electric motor or an asynchronous electric motor. The load simulation device can simulate an electric motor which has a plurality of phases, in particular three or six phases, and which are connected at a common neutral point. Motors with several mutually separate star points can also be simulated, e.g. B. two star points, each with three connected phases, the phases of which are offset from each other by 2/3π.

The DC outputs are intended and designed to be connected to the DC inputs of the inverter or to the DC outputs of the DC source feeding the inverter under test. In order to make this advantageously possible, the control circuit is designed for the timing of the drive of the transistor bridges that is coordinated with the test object. In this way, it is caused/avoided that strong current ripples arise in the case of uncoordinated switching operation.

The direct coupling of the DC paths of the inverter under test, the load simulation and the DC source ensures that the majority of the DC current flows between the load simulation and the inverter under test. The direct current source only has to make up for the unavoidable losses of the system and can accordingly be designed for a much lower output.

The load simulation device can have one or more devices for generating one or more synchronization signals as a function of electrical variables at one or two or all phase terminals and can supply the synchronization signals to the control circuit. There, the control signals for the transistors based on the synchronization signals are timed to the controller in the DUT generated. The device for generating a synchronization signal can have a delay device.

The control timing in the inverter to be tested, referred to below as "DUT" - "Device Under Test", can be derived from the electrical quantities - current and/or voltage - which the load simulation device receives at its phase connections. The timing of control interventions or control steps of the controller in the DUT can be determined directly or indirectly from these variables, so that the control in the load simulation device can then take place in a timely manner.

The control initially includes a frequency control to the effect that control clock frequencies in the load simulation device are the same as those in the DUT. Pulse width modulation, hereinafter also referred to as "PWM" ("pulse width modulation"), can be used in the DUT as in the load simulation device. The PWM pulse frequency in the load simulation device can be set to that in the DUT. The synchronization can, however, take place to the extent that the phase position within a cycle is also corrected. Since, viewed systematically, the determination of a control clock in the DUT takes a certain amount of time, the synchronization can also have a delay after the clock in the DUT has been determined, such that the phase angle in the load simulation device is set to the phase angle in the DUT by delay.

In the load simulation device, the PWM control can involve the use of the rotating d/q coordinate system and there can then be the d component (direct component) and/or the q component (quadrature component) of the quantities to be controlled - phase current and/or phase voltage - controlled to the desired values and, if necessary, also regulated with feedback. The rotational frequency of the rotating d/q system is set or used in a known manner. It corresponds to the mechanical speed of the simulated electrical machine multiplied by the number of pole pairs of the same.

The control circuit can be designed to generate the control signals in such a way that the sum of the currents it causes at the phase terminals assumes a specific value or is within a specific range, in particular is as small as possible and preferably 0.

Real loads are regularly electric motors with windings connected at a star point. According to Kirchhoff's node rule, the sum of all currents at the neutral point is zero. The control or regulation of the load simulation device can understand this in terms of regulation, in that the sum of the currents is made as small as possible and is preferably guided/controlled/regulated to zero or approximately zero. This can be a regulation based on fed-back current signals from the phase connections. It can be subordinate to or superimposed on another regulation.

In general, it is noted that the term "controller" in this specification is intended to address both open-loop and closed-loop/feedback devices, unless expressly stated otherwise. The load simulation device described can receive one or more of the voltage values at the phase terminals and/or one or more of the current values at the phase terminals as returned or fed back values.

The control circuit of the load simulation device can also be designed to generate the control signals for the switches/transistors/transistor bridges in such a way that harmonics are at least partially compensated for. The load simulation modulates the duty cycle at the transistor bridges of each motor phase, preferably in such a way that the phase current curve is as ideally as sinusoidal as possible. In the case of the space vector pulse width modulation (SVPWM) mostly used in a DUT, this means that the load simulation must superimpose a compensating triangular modulation with three times the fundamental frequency of the sine wave in addition to the sinusoidal modulation of the duty cycle on the motor phases. In the case of the so-called third-harmonics-injection pulse-width modulation (THIPWM) in DUT 1, this means that the load simulation must superimpose a compensating sinusoidal modulation with three times the fundamental frequency of the sinus in addition to the sinusoidal modulation of the duty cycle on the motor phases.

The compensation of harmonics from a possibly used in the DUT SVPWM or THIPWM or similar in the load simulation device causes the simulation to behave close to reality. Since the phases are coupled at a star point in a real load, harmonics compensate themselves there, since they are present in all phases in the same way. The active compensation in the load simulation device simulates this behavior.

Both the addition or omission of a compensating harmonic for the PWM in the load simulation device as well as its waveform (sine, triangle, ...), frequency and amplitude can be selectably adjustable as part of the configuration of the load simulation device and set via a user interface. However, this can also be done automatically by evaluating the voltages at the phase connections of the load simulation device, e.g. B. Deviations from an ideal sine wave can be examined. Correctly compensating values can then be determined and set automatically.

The control circuitry of the load simulation device can further be designed to generate the control signals for the switches/transistors/transistor bridges in such a way that the load simulation device behaves like an electrical generator. This can be done, for example, by setting the q component of a variable to be controlled—phase current and/or phase voltage—to a negative value in the controller.

The load simulation device can have a position transmitter simulation device, which simulates a position transmitter signal from a sensor of a real three-phase load and provides it at a connection.

In many cases, inverter-fed electric motors feed “position” signals back to the inverter. It is usually a pulse signal that provides information about the progression of the angle of rotation in the supplied motor and, for example, is integrated or extrapolated or interpolated into an angular position in the controller of the DUT. The load simulation device can be designed to simulate such a signal so that it can be fed back to the controller of the DUT via a signal output of the load simulation device. The design can be such that the signal is formed exactly like a signal from a real load, so that it can be fed directly to the DUT and no further modifications are necessary in this respect for the test mode. In the controller of the DUT, the signal can then be used to determine the virtual rotational speed of the simulated load.

The control circuit of the load simulation device can have a pulse width modulation circuit for generating the control signals according to desired values. It may also include vector control circuitry for generating current and/or voltage control setpoints.

The transistors of the transistor bridges of the load simulation device can be driven using pulse width modulation technology (PWM) that is known per se. The necessary techniques, facilities and provisions can be used and provided for here. The control can include vector control, ie at least temporarily the representation of alternating currents and voltages in a rotating coordinate system, for example by means of d and q components. Feedback can also be provided and taken into account in this domain. For this purpose, phase voltages or currents measured for feedback can be converted into the d-q system. Before the actual pulse width modulation control, the d-q values determined in the control or in the controller are transformed back into u-v-w values.

Also on the input side (before d-q) u-v-w values can be used and/or specified and/or fed back.

The load simulation device, in particular its control circuit, can have an interface circuit for connection to a user interface and/or to a higher-level controller.

It may be desirable for the load simulation device to specify different target values for different behaviors. For this purpose, it can be connectable to a higher-level controller or a user interface, or it can have these itself. In this way, different target values can be specified for the load simulation device in order to simulate different behavior during the course of a more complex test program. Accordingly, target values, for example for speed and/or torque and/or one or more phase currents and/or phase voltages, must also be specified for the DUT.

Furthermore, the controller of the DUT can be designed to receive sensor signals, for example ambient temperature. The load simulation device or a higher-level controller that can be connected to it can be designed to serve such inputs of the DUT with simulated signals. This may be settable via an interface as part of the configuration of the load simulation device.

Furthermore, the load simulation device can be designed to record electrical values that arise in combination with the DUT and to format, evaluate, log and thus make them available in a suitable scope and format. This can be done digitally and can also include communication with a higher-level controller.

The load simulation device can have an inductance between each of the phase connections and each of the connection areas of the transistor bridges. Their inductances can be automatically or manually adjustable.

The load simulation device can have a current and/or voltage detection device at one or more or all phase connections or behind the inductances and feedback of the detection values for the control.

Current values can be measured inductively or using small measuring resistors (shunts). Voltages can be carried directly over a line.

The inductances that may be provided at the phase connections contribute to a real simulation of the load by showing inductive switch-on and switch-off behavior. The inductances can be designed in such a way that the maximum current rise experiences a desired limitation, in particular to protect components and to avoid unwanted high-frequency ripples in the current on the motor phases.

A test device for a multi-phase inverter to be tested has a load simulation device, which can be designed as described above and which has several, e.g. B. three or six, transistor bridges corresponding to the number of phases of the DUT. They can be connected parallel to one another between two direct current lines and each have at least two series-connected electronic switches whose connection area can be connected directly or indirectly to one of the phase connections. It is also conceivable that several, e.g. B. to define two sets of transistor bridges and to connect these different sets between different DC lines. The test device also has a DC voltage source with further DC outputs, which is designed to provide a DC voltage supply for the multi-phase inverter to be tested at its further DC outputs. A control device is provided, which is designed at least for driving the load simulation device and for driving the multi-phase inverter to be tested. The direct current outputs of the load simulation device are connected to the corresponding further direct current outputs of the direct voltage source.

The load simulation device described so far can be integrated with a higher-level controller and optionally also integrated with a DC power supply. They then form a test device overall as a single piece of equipment to which the DUT can be connected on the input side and on the output side. The test device then needs a certain power supply for the internal operation as well as for the operation of the DUT. It can be connected to a conventional power supply, such as 110 volts, 60 hertz, or 230 volts, 50 hertz, or three-phase current for more power-intensive equipment. It then internally generates the direct current that is fed to the DUT on the input side. At the same time, the load simulation device accepts three-phase current from the DUT and converts it back to direct current, which in turn can be fed to the direct current source. In this way, a noticeable part of the energy converted in the DUT is ultimately returned, so that large amounts of energy can be saved in test operation, since only the control energy and energy losses, but not the actual converted energy, have to be provided.

The test device can also be implemented without an integrated direct current source. The direct current source can then be switched on externally. The test device then has a DC output that can be connected to the corresponding DC output of the DC power source for the DUT. Finally, it is also conceivable to work with two bidirectional DC sources, one for the DUT and the other for the load simulation. If there is then no longer any direct direct current coupling, the direct current sources must apply their full power.

• • Bestimmen eines Testprogramms: Ein DUT kann ein mehr oder minder ausführliches und komplexes Testprogramm durchlaufen, das unterschiedliche Betriebe, unterschiedliche Betriebsmoden, unterschiedliche Leistungsbereiche etc. pp. umfasst. Ein solches Testprogramm kann anhand von Parametern festgelegt werden, sodass diese dann umgesetzt werden können. Es können unterschiedliche Betriebszeiten simuliert werden, unterschiedliche Lastbereiche, unterschiedliche Moden (Betrieb als Last, Betrieb als Generator), unterschiedliche virtuelle Geschwindigkeiten und so weiter.
• • Abarbeiten eines Testprogramms: Wenn das Testprogramm festgelegt ist, kann es entsprechend den Vorgaben abgearbeitet werden. Dies kann selbstständig erfolgen und womöglich ohne Nutzereingriff ablaufen.
• • Sollwertvorgabe und Parametervorgabe für den zu testenden Wechselrichter: Das DUT wird vorzugsweise „real bedient“, damit es sich möglichst real verhält. Im realen Betrieb erhält es Sollwertvorgaben, etwa für Motorgeschwindigkeit oder Motordrehmoment, die auch im simulierten Betrieb zugeführt werden können. Gleiches gilt für womöglich erwartete Parameter, etwa Betriebstemperatur, Spannungen und ähnliches.
• • Entgegennahme von Daten von Messwerten vom DUT: Für Testzwecke kann das DUT mit Sensoren ausgestattet werden, etwa Temperatursensoren, deren Werte zur Testvorrichtung zurückgeführt und dort ausgewertet oder protokolliert werden können.
• • Sollwertvorgabe für die Lastsimulationsvorrichtung: Wie weiter oben erläutert, müssen der Lastsimulationsvorrichtung Sollwerte zur Ansteuerung ihrer Transistorbrücken vorgegeben werden. Dies kann nach unterschiedlichen Strategien erfolgen. Die Sollwerte können eine virtuelle Drehzahl aufweisen und/oder eine virtuelle feste Position bei Drehzahl = 0 und/oder die Amplitude der Modulation, die als Größe der induzierten Motorspannung interpretiert werden kann. Weiter unten wird dies genauer erläutert.
• • Entgegennahme von Daten von der Lastsimulationsvorrichtung: Die Lastsimulationsvorrichtung kann gemessene und erzeugte Größen protokollieren und dann gesammelt oder fortlaufend als Datenstrom bereitstellen, sodass das Verhalten des DUT protokolliert ist. Es können hier auch Auswertungen vorgenommen werden, die über die Einzelwerte hinaus Auswerteergebnisse liefern.
• • Steuern der Gleichspannungsquelle: Entsprechend dem Testprogramm kann die Gleichspannungsquelle mindestens auf An/Aus gesteuert werden und womöglich auf weitere Zustände.
• • Datenformatierung, Datenaufzeichnung, Protokollierung, Datenausgabe, Datenauswertung: Da ein DUT getestet wird, sind Testergebnisse von Interesse. Sie können von den verschiedenen beschriebenen Quellen erhalten werden und dann geeignet formatiert, verarbeitet, protokolliert, gespeichert, ausgewertet und ausgegeben werden.
• • Netzwerkanbindung und Kommunikation: Gegebenenfalls kann eine Anbindung an ein Datennetz vorgesehen sein, um Daten einzuholen oder auszugeben. In einem einfachen Fall kann es lokal ein Bus oder ein Speichermedium sein. Genauso kann es ein vermittelbares Netzwerk sein, etwa ein lokales vermittelbares Netzwerk, das Internet oder ähnliches.
• • Benutzerschnittstelle: Für die Durchführung des Testbetriebs sind Benutzereingabe häufig nötig. Es kann hierzu eine Benutzerschnittstelle vorgesehen sein, um die nötigen Angaben machen zu können und um gegebenenfalls auch Ausgaben entgegennehmen zu können.

The control device of the test device can be designed to control or provide one or more of the following measures or devices:

• • Defining a test program: A DUT can go through a more or less detailed and complex test program that includes different operations, different operating modes, different power ranges, etc. pp. Such a test program can be defined using parameters so that they can then be implemented. Different operating times can be simulated, different load ranges, different modes (operation as a load, operation as a generator), different virtual speeds and so on.
• • Processing a test program: Once the test program has been defined, it can be processed according to the specifications. This can be done independently and possibly without user intervention.
• • Setpoint specification and parameter specification for the inverter to be tested: The DUT is preferably operated "real" so that it behaves as realistically as possible. In real operation, it receives setpoint specifications, for example for engine speed or engine torque, which can also be supplied in simulated operation. The same applies to parameters that may be expected, such as operating temperature, voltages and the like.
• • Receiving data from measured values from the DUT: For test purposes, the DUT can be equipped with sensors, such as temperature sensors, whose values can be fed back to the test device and evaluated or logged there.
• Setpoint specification for the load simulation device: As explained above, the load simulation device must be specified with setpoints for driving its transistor bridges. This can be done using different strategies. The target values can have a virtual speed and/or a virtual fixed position at speed=0 and/or the amplitude of the modulation, which can be interpreted as the size of the induced motor voltage. This is explained in more detail below.
• • Receiving data from the load simulation device: The load simulation device can log measured and generated variables and then provide them collectively or continuously as a data stream so that the behavior of the DUT is logged. Evaluations can also be carried out here that deliver evaluation results beyond the individual values.
• • Control of the DC voltage source: According to the test program, the DC voltage source can be controlled at least to on/off and possibly to other states.
• • Data formatting, data recording, logging, data output, data evaluation: Since a DUT is being tested, test results are of interest. They can be obtained from the various sources described and then suitably formatted, processed, logged, stored, evaluated and output.
• • Network connection and communication: If necessary, a connection to a data network can be provided in order to collect or output data. In a simple case it can be locally a bus or a storage medium. Likewise, it can be a routable network, such as a local routable network, the Internet, or the like.
• • User Interface: User input is often required to perform test operations. For this purpose, a user interface can be provided in order to be able to provide the necessary information and, if necessary, to also be able to receive outputs.

The load simulation device and overall test device are designed to handle the voltages in the DUT. These voltages can be 12V or 24V on the DC side, generally below 50V. However, they can also be higher and have values of up to 400 V, generally below 1,000 V.

In order to be able to handle DC voltages in significantly different value ranges, the load simulation device can have an exchangeable power semiconductor module, possibly with the connected inductances and possibly a driver part, in order to be able to quickly use different power semiconductor modules for different nominal voltages and thus be able to make adjustments to different operating voltages of different DUTs. A deployed module may be auto-detectable to recognize it as part of the existing configuration.

The PWM clock frequency of the load simulation device can be at least a factor of 5 or 10 above the highest frequency of the AC voltage to be handled by the DUT. It can be over 5 kHz or over 10 kHz.

Simulated engine speeds can range up to 10,000 or 20,000 or 50,000 or 100,000 rpm. For synchronous motors, it correlates directly to the frequency of the AC electrical voltage from the DUT.

• 1 den Gesamtaufbau einer Testvorrichtung,
• 2 eine Transistorbrücke,
• 3 schematisch als Blockdiagramm die Steuerung der Lastsimulationsvorrichtung,
• 4 schematisch als Blockdiagramm die Steuerung der Testvorrichtung,
• 5 ein Zeitdiagramm für Synchronisationsaspekte,
• 6 ein vereinfachtes schematisches Diagramm der Testvorrichtung,
• 7 ein Blockdiagramm einer Steuerungskomponente, und
• 8 verschiedene Wellenformen.

Individual embodiments of the invention are described below with reference to the drawings

• 1 the overall structure of a test device,
• 2 a transistor bridge,
• 3 schematically as a block diagram the control of the load simulation device,
• 4 schematically as a block diagram the control of the test device,
• 5 a timing diagram for synchronization aspects,
• 6 a simplified schematic diagram of the test device,
• 7 a block diagram of a control component, and
• 8th different waveforms.

1 shows above a three-phase inverter 1, which is the device under test (DUT). It does not form part of the invention but is presented here only to illustrate the environment of the invention. It is shown only schematically as it is not part of the invention. DC inputs 5a and 5b for plus and minus the DC supply voltage are shown on the left. Three-phase current outputs 6u, 6v, 6w are shown on the right, at which the three-phase alternating current (three-phase current) supplied by the DUT can be tapped off. Internal transistor bridges 4U, 4V, 4W, which generate the three-phase alternating current in a known manner, are only indicated. A PWM control 3 can be provided, which drives the transistor bridges 4 according to a control/regulation 2 . With 7 different signal inputs and signal outputs of the DUT 1 are indicated, which are used in conventional operation. These can be setpoint specifications or feedback inputs, for example for position transmitters/pulse transmitters from the load to be controlled. It can also be sensor inputs, for example for a temperature sensor, or signal outputs. Generally speaking, the DUT 1 is constructed in a known manner and does not require any modification for testing by the test device.

1 shows a test device at 10 below. It has a load simulation device 10a, a control section 10b and a direct current generation section 10c. The areas are separated from each other by dashed lines 10x and 10y. This is to indicate that the test device 10 may, but need not, be broken up into different pieces of equipment at the dashed lines. Instead of continuous lines, respective connections are then to be provided in order to be able to establish appropriate connections across borders.

1 indicates the case that direct current source 10c, higher-level controller 10b and load simulation device 10a are accommodated in a single device 10. However, it is equally possible to provide the direct current source 16 separately and to integrate only the control part 10b and the load simulation device 10a as one device. It is also possible to design the control part 10b as a conventional PC, which is equipped with suitable software to implement the various components and which has interfaces to the load simulation device 10a and to the DUT 1 and possibly also interfaces to the DC power source 16 in order to do this to be able to control if necessary. It is also possible to integrate the load simulation device 10a with all the necessary interfaces to the DUT 1 and possibly to the power source, so that the PC can be connected via one of its standard interfaces, e.g. B. USB or wireless z. B. via WiFi, communicates with the load simulation device 10a, which in turn then serves the other interfaces.

The load simulation device 10a is in 1 shown 10x to the right of the dashed line. It comprises a power semiconductor block 11 which, when simulating a load, can be considered as a controlled rectifier. It has three parallel transistor bridges 11u, 11v and 11w which are parallel to each other between DC lines 14a and 14b.

In general, it should be noted that the examples of the invention described here and shown in the figures represent three-phase embodiments. However, the invention and in particular the load simulation device 10a can be designed more generally for handling multi-phase systems, ie for connecting multi-phase DUTs 1. The number of phases in the DUT 1 and in the load simulation device 10a can be three, as described. But she can also be six. The number of phases of the load simulating device 10a is at least the number of phases of the DUT 1. The load simulating device 10a can have more phases in the hardware layout, e.g. B. six, than the DUT 1. Only the smaller number of phases are then driven in the load simulation device 10a during operation. This may be selectable as part of the configuration, or it may be done by automatically detecting which phase terminals have voltages from the DUT.

• • Spannungsbereiche,
• • Erkennung des Typs des verwendeten Leistungsmoduls,
• • Anzahl der genutzten Phasen/Pole,
• • Art der Modulation/Kompensation (SVPWM, THIPWM, ...),
• • Pulsfrequenz,
• • Pulsphase,
• • Drehfrequenz im d-q-System,
• • weitere betriebsnotwendige Parameter

Statt automatisch kann die Konfiguration aber auch „manuell“ vorgenommen werden, etwa über eine grafische Benutzerschnittstelle.In order to avoid configuration errors of the load simulation device relative to the connected DUT, a largely automatic configuration can be provided. For this purpose, before the simulation mode, a configuration mode can be provided, which can last a few seconds and during which basic parameters can be determined, which can then lead to configuring settings that can be set automatically. The configuration mode can also include a specific type of control of the DUT. In the configuration mode, the voltages at the phase connections 17 can be observed and evaluated. One or more of the following parameters can be determined and then set if necessary:

• • voltage ranges,
• • Recognition of the type of power module used,
• • number of phases/poles used,
• • Type of modulation/compensation (SVPWM, THIPWM, ...),
• • pulse rate,
• • pulse phase,
• • rotational frequency in the dq system,
• • further operational parameters

However, instead of being configured automatically, it can also be configured “manually”, for example via a graphical user interface.

2 FIG. 1 shows the structure of a single transistor bridge in a simplified manner, as can be used both in the load simulation device 10a and in the DUT 1. Between two DC lines 14a and 14b in the load simulation device are two transistor switches 21 and 22, which are regularly connected directly in series with one another, but sometimes also include other components between them. The connection area between the two transistors 21 and 22 is indicated with 23, which in many cases will directly be the connection of the two transistors 21 and 22 connected in series. The transistors can be field effect transistors, such as MOSFETs, or IGBTs. Freewheeling diodes 24, 25 can be present, which can be provided as separate semiconductors or integrated with the transistors 21, 22. A driver part with analog driver circuits 26, 27 can be provided, which from the PWM pulses up . . .

A transistor bridge as in 2 shown provided. Each transistor 21, 22 of the three transistor bridges 11u, 11v, 11w has a control input up, vp, wp for the transistors 21 of the individual phases u, v, w on the positive side of the DC voltage supply, and un, vn, wn for the transistors 22 of phases u, v and w on the negative side of the supply voltage. The phase u, v, w respectively connected to the connection area 23 can thus be applied either to plus or to minus the DC supply voltage.

The transistors 21 and 22 of the transistor bridges can be driven using PWM technology, which knows various control or regulation strategies. One of them is that the transistors 21 and 22 must not be closed (low impedance) at the same time, since this would be a short circuit between the DC voltage lines.

returning to 1 shows the load simulation device 10a on the left of the power semiconductor block 11 a controller 13, which is designed to drive the transistors 21, 22 of the transistor bridges 11u, 11v, 11w in a suitable manner in order to optionally also control them with high resistance or low resistance.

The load simulation device 10a has phase connections 17u, 17v, 17w to which the corresponding outputs 6u, 6v, 6w of the DUT 1 can be connected. In this case, the DUT 1 will regularly be a power source and consequently the load simulation device 10a will simulate a consumer. Systematically, however, the operating conditions can also be reversed, in reality, for example, during braking or when driving an electrically operated motor vehicle downhill. Then the previously consuming motor or simulated load 10a acts as a generator and the DUT 1 can feedback as a controlled rectifier and feed DC voltage back to the DC voltage source. The load simulation device 10a can map these operating cases accordingly through suitable control.

The load simulation device 10a regularly also has inductances 12 in the form of coils. A coil 12u, 12v, 12w is provided for each phase u, v, w and looped into the current path. The coil value can be set manually or automatically. It can be greater than 1 µH or 2 µH or 5 µH or 10 µH. It can be less than 5 mH or 2 mH or 1 mH or 500 µH. It can be between 20 µH and 100 µH. The phase terminals 17u, 17v and 17w are connected to the connection portions 23u, 23v, 23w directly or via the coils 12u, 12v, 12w, respectively.

The DC lines 14a and 14b in the power semiconductor block 11 are either led out via lines 14 to a plug connection 14p, 14n, or they are led directly to the DC voltage source 16 with line 14 in a fully integrated device 10 . In this way, the energy circuit is essentially closed or closable: the direct current source 16 generates direct current with which the DUT 1 is fed. This generates alternating current, which is fed to the load simulation device 10a. This in turn generates direct current which is fed back to the direct current source 16 . If the test device 10 is constructed as a unit of 10a, 10b and 10c, this feedback takes place inside the device by means of line 14 and can otherwise be produced via plug-in connections.

6 shows the flow of energy in a schematic and highly simplified manner. The DUT 1 on the left feeds AC power via the phase lines u,v,w and via the inductances 12 to the controllable rectifier 11 of the load simulation device 10a, where it is rectified and back to DC via lines 14n,14p input of the DUT 1 or to the DC voltage output of the DC voltage source 16 . Except for losses, power is fed back so that the load simulation device works together with the DUT in an energy-saving manner.

6 The thick arrow 61 below shows schematically how current can actually flow. Considering the phase u, on the left of the figure the u-phase bridge in the DUT 1 is shown, on the right the u-phase bridge in the load simulation device 10a. It is assumed that in the DUT 1 the upper transistor 21 is closed (low resistance). If at the same time in the load simulation device in the connected transistor bridge of the corresponding phase u the lower transistor is closed (low resistance), current can flow through the inductance 12u. If the lower transistor were open (high-impedance) on the simulation side, a non-negligible current would initially flow back to the DUT 1 via the freewheeling diodes of the upper transistor in the load simulation device 10a, depending on the energy stored in the coil 12u, but this current would then drop to 0. The same would apply if the upper transistor in the load simulation device were closed (low impedance). Current can flow in the other phases according to their switching states.

the 1 and 6 show that according to the invention the coupling of the DC circuits is provided. However, this can lead to overcurrents due to switching on for too long and/or to very high current ripples. In order to avoid this, it is ensured according to the invention that the switching operation of the transistor bridges in the load simulation device 10a takes place in a timely manner with the switching operation of the transistor bridges in the DUT 1 . The latter can be determined in particular in the frequency of the PWM pulses in the DUT 1 and in their phase position from the electrical values at the input 17 of the load simulation device, since these were generated by the switching operations in the DUT and reflect them.

The timing may include frequency matching of the PWM pulse frequencies and possibly also phase matching of the individual pulses. Since the output signals of the DUT 1 (voltages and currents at the outputs 6u, 6v, 6w) corresponding to the currents and voltages at the phase connections 17u, 17v, 17w of the load simulation device 10 are not pure sinusoidal oscillations, but reflect the switching activity of the transistors of the transistor bridges the switching operation in the DUT 1 can be read from the electrical values present at the load simulation device 10a. Voltage values and voltage curves can be evaluated. The load simulation device 10a has suitable devices in order to derive the switching frequency and possibly also the phase angle from the electrical values present and then to take them into account when driving the transistors of the transistor bridges 11u, 11v, 11w. Current sensors and/or voltage sensors and/or current returns and/or voltage returns can be provided for this purpose.

The current and/or voltage of one phase or two phases or all phases can be detected at the respective phase input 17u, 17v, 17w or behind it and fed to the controller. The determination of the switching frequency in the DUT 1 and the determination of the phase position, if applicable, can be done digitally if the input values at the phase connections 17u, 17v, 17w are converted to digital quickly, ie with a high clock frequency, and then evaluated. The sampling frequency can be over 100 or 200 or 500 kHz or over 1 or 2 or 5 MHz.

It can be assumed that both the DUT 1 and the load simulation device 10a operate on a PWM basis. The pulse frequency of the PWM in the DUT can then be determined from the returned signals. The phase position can then also be determined. Referring to 5 qualitative explanations are given.

In 5 Diagram 51 shows a pulse 51a to d which is intended to be the idealized clock which prevails in the DUT 1. It should be noted that this pulse as in 5 represented real possibly does not exist. It is used in the figure only to illustrate the basic ideas.

Diagram 52 in 5 shows pulse as it is initially determined on the part of the load simulation device 10a. For its part, it has idealized pulses 52a, 52b, 52c, 52d. Since there are processing times due to systematic reasons, it cannot be determined at the same time as pulse 51 in DUT 1, but is determined with a time delay of dt. The delay time dt includes the delay within the load simulation device 10a and is determinable and known as such, since it is a constant, determinable system parameter. The individual pulses 52a, 52b show the same interval tp as the idealized pulse 51 in the DUT 1, so that the time interval between the determined idealized pulse 52 corresponds to the interval in the idealized pulse 51. They correspond to the pulse frequency of the PWM in the DUT 1, which can then also be used in the load simulation device 10a.

Provision can also be made to delay the idealized imaginary pulse 52 by a delay time tv to delay. The delay time tv results from the difference between tp and dt, i.e. tv = tp - dt, as from the comparison of the positions between diagrams 51 and 52 in 5 to recognize. In this way, taking into account the delay time tv, another idealized pulse 53 can be set, which is delayed by an entire period compared to the ideal pulse 51 in the DUT 1 and which can then in turn be used to determine the timing of the drive signals for the transistors. This is indicated by the signaling in diagram 54 of the 5 implied.

In this way it can be ensured that the switching activities in the load simulation device 10a take place with the correct frequency and phase to those in the DUT 1, so that undesirable secondary effects due to the DC coupling are avoided.

The controller 13 generates control signals up, un, vp, vn, wp, wn for each of the two transistors of the three bridges 11u, 11v, 11w of the power semiconductor block 11. They are used to control the transistor switches to either on (low resistance) or off (high resistance ).

Variables that may be fed back in the load simulation device 10a can be tapped off directly at the phase connections 17 or can take place between the inductances 12 and the power semiconductor block 11 . For the currents it makes no difference. The voltages can differ according to the voltage drop across the inductances.

1 FIG. 12 further shows that the controller 13 operates an output 18 of the load simulation device 10a. A position signal or position pulse of the virtually rotating load is generated here and output for use in the DUT 1. A signal present in real devices is thus simulated in order to supply the DUT 1 with the input variables required for operation.

In general, reference is made here to the fact that various control devices, control aspects and control components are addressed. As mentioned, they can be divided into different real devices. However, it is just as possible to implement them in an integrated manner in just a single device, which is then programmed appropriately, is capable of multitasking if necessary and has sufficient power to be able to carry out the individual measures and activities.

3 shows schematically as functional blocks components of the controller 13 of the load simulation device 10a. The controller 13 can have a digital circuit, for example in the form of a small computer with CPU, RAM, ROM, bus, registers and other usual components of a computer. A/D converters operated in multiplex mode can be available on the input side and D/A converters on the output side. In addition, the controller can have analog circuit components, for example to generate the PWM control signals in a suitable manner and for communication purposes. The hardware implementation can have an FPGA (“field programmable gate array”) for fast digital processing. Here, for example, the values of electrical variables that have been converted to digital can be evaluated at the phase connections 17 . The controller 13 can be designed for the quasi-simultaneous execution of several programs/tasks in multitasking.

31 symbolizes the PWM control, which is connected to the transistors in the power semiconductor block 11 via lines sup, sun, svp, svn, swp, swn in order to control them. Signals suitable for driving the transistors of the power semiconductors are generated here in terms of timing, duration and amplitude in accordance with pulse width modulation technology. This can include digital and analog components, the latter primarily on the output side.

32 addresses the general control of the power semiconductors, which outputs current and/or voltage specifications according to input setpoint values, which can then be fed to the pulse width modulation control 31 so that they can be converted into corresponding pulses there. The various control measures, as have already been explained and as will be explained further below, can be implemented in the controller 32 .

• • Eingang für das simulierte Positionssignal aus dem Simulator 33,
• • Eingang für die ermittelten aktuellen Phasenströme (Zeitwert oder Amplitude) auf allen drei Phasen U, V, W, insbesondere zur Verwendung im Summenstromregler oder optional Phasenstromregler, falls das DUT keinen Strom regeln kann,
• • Eingänge für allgemeine Steuerungs-Sollwertvorgaben, etwa als Angabe von d/q-Komponenten im rotierenden Koordinatensystem.

The controller 32 may have one or more of the following inputs:

• • input for the simulated position signal from the simulator 33,
• • Input for the determined current phase currents (time value or amplitude) on all three phases U, V, W, in particular for use in the summation current controller or optionally phase current controller if the DUT cannot regulate a current,
• • Inputs for general control setpoint specifications, for example as an indication of d/q components in the rotating coordinate system.

Depending on the entered values, the controller 32 generates the current duty cycle, which is transferred to the PWM controller, as outputs to the PWM controller 31 .

The device 34 is used to generate one or more synchronization signals or Infor mation as already referring to 5 described. It can receive returned signals via lines 13u, 13v, 13w of the individual phases and determine the information described therefrom after rapid A/D conversion and digital evaluation. These can then be made available in particular to the pulse width modulator 31 in order to generate drive signals for the transistors 21, 22 of the transistor bridges with the correct frequency and phase. An FPGA can be used to implement this device.

Instead of converting the returned signals to digital with an A/D converter with a fixed sampling rate for the feedback, threshold switches can also be used for the feedback, which switch at about half the DC voltage, with a certain switching hysteresis for interference suppression.

The simulator for the position signal or for the position pulse, which generates the simulated position signal that is output at the output 18, is indicated at 33. It is formatted so that the DUT 1 can use it directly. The formatting of these pulses (amplitude and/or duration and/or waveform and/or pulses per virtual revolution) can be adjustable via an interface or user interface and thus adaptable to the needs of the DUT 1 . The simulation can simulate a SIN/COS encoder, possibly with magnetoresistive sensors, or a resolver, which can have inductively coupled coils, or a pulse encoder as the encoder. It can be switchable between different simulations of different encoders in order to be able to serve different requirements of different DUTs.

35 is a summation current setting device for superimposed or subordinate control of the power semiconductors in such a way that the sum of the currents at the phase connections 17 assumes a specific value or is within a specific value range, preferably smaller than a threshold value or is as small as possible overall and preferably zero. This component can be interwoven with other control components and can be implemented digitally and arithmetically. It is only in for visualization 3 shown in isolation. It can be subordinate in the sense that superimposed components generate setpoints in the u/v/w system that would lead to specific currents. If the sum were not the desired value, e.g. 15 A instead of 0 A, or not in the desired range, corrections can be made in such a way that the currents in all phases are changed by the same values, in the example given by 5 A, if 0 is desired as the sum. The controller can be designed to specifically set the sum of the currents to values not equal to 0 if this is advantageous for simulating the load. An error simulation can be implemented by e.g. B. an open line or a short circuit between lines is simulated.

The cumulative current setting device 35 can also be designed to control or regulate a plurality of separate cumulative currents, in particular star points with a current sum of 0, for a plurality of phases. For example, in a simulated six-phase system u, v, w, x, y, z, two sets u, v, w and x, y, z of three phases each can be controlled or regulated to separate total currents. The individual control components can exchange information with one another in order to ensure that all control components that may be working in separate locations can always set their outputs depending on the same input values. For example, two control components for three phases each can exchange information about the currently simulated position.

36 symbolizes a harmonic suppression component, which ensures that harmonics are at least partially compensated. It causes the phase current to develop a sinusoidal curve that is as ideal as possible. Certain types of modulation in the DUT 1 can cause harmonics to form on the generated voltage or current waveforms.

In 8th examples are shown. 8A shows the so-called "space vector PWM" (SVPWM). For the modulation, the inverter superimposes a triangular oscillation 82 of three times the frequency on an ideal desired sinusoidal oscillation 81 . All in all, this leads to an overall vibration that is no longer sinusoidal. 8B shows the so-called "third harmonics injection PWM" (THIPWM). For the modulation, the inverter superimposes a sinusoidal oscillation 84 of three times the frequency on an ideal setpoint sinusoidal oscillation (not shown). All in all, this leads to a total target oscillation 85 that is calculated that is no longer sinusoidal and is used to determine the pulse duty factor of the signals up, un, vp, vn, wp, wn.

It is advantageous to compensate for the harmonics shown in the load simulation device 10a because, as explained above, this compensation also occurs in the case of a real load with a neutral point, so that the load simulation device is more realistic with this compensation. For this purpose, the harmonic suppression component 36 for the PWM in the load simulation device 10a superimposes a harmonic compensating for the influence of the curves 82 and 84 on the ideal sine setpoint oscillation, which regularly corresponds to the superimposed component from the DUT 1 in terms of frequency, phase position and amplitude. It can be manually or automatically configurable.

37 symbolizes an interface for data input and data output. The data input is desirable for the flexible control of the load simulation device, ie ultimately for the specification of higher-level control and regulation parameters, test modes and the like. Data output is desirable for the output of measured values and values derived from them. In principle, it can be said in this respect that it is not the load simulation device 10a that is tested, but a DUT 1 that may be connected to it . If desired, they can be processed, evaluated, passed on and stored. This can also be done through the interface 37 .

The controller 32 can also bring about a switchover between behavior as a load and behavior as a generator by giving appropriate specifications to the PWM controller 31 . In particular, this can mean setting a q target component in the d/q system to a negative value if inverted load operation (load as a generator, as is the case in regenerative braking or when driving downhill) is to be simulated.

A higher-level controller 15 can be provided in the integrated or separately provided control part 10b. It can be connected to a memory 19 of sufficient volume. The higher-level controller can have various connections, namely in particular to the load simulation device 10a via lines 15b, to the memory 19, to the DUT 1 via lines 15a and possibly also to the direct current source 16 via lines 15c. Not shown as separate lines are connections to a user interface that is intended to be included in the higher-level controller 15 . The user interface can have a screen, possibly a graphical user interface, or input masks in order to be able to make the desired entries or queries. The higher-level controller 15 can also be suitable for receiving signals from the DUT 1, for example if it has been equipped with additional sensors, in order to be able to record these signals and manage, evaluate and store them in an assignable manner.

4 shows a schematic block diagram of the higher-level controller 15. It can also be or have a computer or small computer or PC. It can have the usual computer components CPU, RAM, ROM, bus, . . . A/D converters or D/A converters, possibly an FPGA and analog components, can also be provided here. It can be designed for the quasi-simultaneous execution of several programs/tasks in multitasking.

The actual arithmetic unit, which is used to implement the individual measures, is indicated at 41 .

42 indicates the interface to the load simulation device 10a, which communicates with it via lines 15b. As already mentioned, setpoint specifications can be generated here and output to the load simulation device 10a, and values can be received from it, in particular measured values, processed values or the like.

The interface to the DUT 1 is indicated at 45 . It generates the signals required for the DUT 1 to operate, so that the DUT 1 appears to operate normally on the input side. The DUT interface 45 can also receive sensor signals from the DUT 1 .

The interface to the DC voltage source 16 is indicated at 44 . In any case, it can include an on/off control and possibly other components. The user interface already described is indicated at 43, by means of which a user can make the desired inputs and outputs.

A sequence planning and sequence control is indicated with 46 . It can be used to determine and define test programs. It can then also control the implementation of the test programs determined in this way. Inputs and/or outputs and/or storage of data and/or processing or pre-processing of data can also be initiated in the desired manner, if necessary also alarms or the like.

7 FIG. 1 shows a component for the setpoint specification for the load simulation device 10a schematically as a block diagram. It can be implemented in the controller of the load simulation device 10a or in the higher-level controller of the test device or distributed between both.

One of several control or regulation modes 71, 72, 73 can be implemented. It can also, as in 7 symbolizes a choice possibility 74 between them. A first control mode 71 is pure current control or regulation at the phase connections 17 of the load simulation device 10a. A second control mode 72 is voltage control or regulation at the phase terminals 17 of the load simulation device 10a, e.g. B. can be selected if the DUT 1 itself carries out current regulation. A third control mode 73 is the use of a previously stored motor model, which mathematically simulates a motor as a load and from which setpoint values for current and/or voltage at the phase connections are derived. The reaction of the driven mechanical load on the electrical circuit can also be simulated, for example by a vehicle. The reaction can be simulated in a time-varying manner corresponding to real load cycles, for a vehicle, for example, driving uphill, driving straight ahead, driving downhill, accelerating, braking, stop-and-go and the like.

In any case, e.g. b. setpoint values in the d/q system arise or are generated in a d/q unit 75, which are then output for further processing in the controller 13 of the load simulation device 10a.

Choices 74, if any, including possible current and/or voltage and/or simulated speed setpoint inputs may be part of the user-accessible configuration. It can also be automatically selectable and/or switchable as part of a test program during the execution of the program. As far as a specification of a simulated speed is mentioned, this can also mean the specification of a simulated acceleration, i.e. changing simulated setpoint speed values from an actual speed, e.g. B. 0, include the predetermined speed.

The specification of target values for the load simulation device can go hand in hand and correlate in terms of content with the specification of target values for the operation of the DUT 1. Target values for the load simulation device can be set according to target values for the operation of the DUT 1 and/or vice versa.

10c in 1 symbolizes the direct current part. It can be a conventional direct current source, which has, for example, a mains connection 16a in order to be connected to a conventional alternating current mains. It can then generate direct current, which provides the input power for the DUT 1 at outputs 16b. However, it also has feed points 16c, at which the DC power obtained from the load simulation device 10 is fed back into the DC circuit or from where, in the case of inverted behavior—load as a generator—power for the load simulation device 10a is drawn. If, as in 1 shown, the described components 10a, 10b and 10c are integrated with each other, the feed points 16c can be inside the device. If, on the other hand, the DC part 10c is provided separately, ie is separated along line 10y, the DC power can also be supplied from the load simulation device 10a on the outside and/or via the terminals 16b. It then does not have to take place through the control part 10b. Connection lines between the higher-level controller 15 and the DC voltage source are indicated at 15c. On the one hand, if necessary, they can be used to supply the higher-level controller 15 with energy, but they can also be used for control and, in any case, monitoring.

All of the power semiconductors of the load simulation device, ie the power semiconductors 21, 22 of the transistor bridges, possibly with freewheeling diodes and with the connected inductances and upstream driver part with driver circuits, can be designed as an electrically and mechanically detachable built-in module. It can then be exchanged for another module with other semiconductor types and possibly other inductances. Power semiconductor blocks with different electrical dimensions can then simply be used for different nominal voltages of different DUTs 1, so that adaptations to different operating voltages of different DUTs can be made quickly. A deployed module may be auto-detectable to recognize it as part of the existing configuration.

The features described in this description and the claims or shown in an illustration should also be considered to be combinable with one another if their combination is not expressly described, insofar as the combination is technically possible. Features described in a particular context, embodiment, figure or claim should also be considered severable from that claim, context, embodiment or figure and combinable with any other figure, claim, embodiment or context, to the extent this is technically possible. Embodiments and figures are not to be construed as necessarily exclusive of each other. Descriptions of a method or a sequence or a method step or a sequence step are also to be understood as a description of devices and/or possibly program instructions of executable code on a data carrier that are required for the implementation of the method or the sequence or of Ver process step or the process step are suitable, and vice versa.

Reference List

1

Inverter, DUT

2

regulator, DUT

3

PWM control, DUT

4

Transistor bridges, DUT

5

DC input, DUT

6

Phase output, DUT

7

Signal input/output, DUT

10

test fixture

10a

load simulation device

10b

control part

10c

DC part

11

power semiconductor block

11u, 11v, 11w

transistor bridges

12

inductances

13

Control of the load simulation device

13u, 13v, 13w

return

14, 14a, 14b

DC power lines

14p, 14n

DC connection

15

Superimposed control

16

DC voltage source

16a

voltage source connection

16b

DC output

16c

feed points

17

phase connections

18

position signal output

19

Storage

21, 22

transistors

23

connection area

31

PWM control

32

steering

33

signal simulation

34

synchronization circuit

35

cumulative current setting device

36

harmonic suppression

37

interface

41

calculator

42

Interface to the load simulation device

43

user interface

44

Interface to the DC voltage source

45

Interface to the DUT

46

Program Planning and Execution

51 - 54

timing charts

71-73

control modes

74

voters

75

d/q unit

Claims (16)

Load simulation device (10a) for simulating a three-phase load for a multi-phase inverter (1) to be tested several phase connections (17u, 17v, 17w) for the phase outputs of the inverter (1) to be connected to the load simulation device (10a), two direct current outputs (14p, 14n) for a direct current power supply (16) to be connected to the load simulation device (10a), the direct current outputs (14p, 14n) being connected internally to direct current lines (14a, 14b), several transistor bridges (11u, 11v, 11w) of a controllable rectifier, which are each connected in parallel to one another between the DC lines (14a, 14b) and each have at least two series-connected electronic switches (21, 22), whose respective connection area (23) directly or indirectly connected to one of the phase connections (17u, 17v, 17w), for each of the electronic switches (21, 22) a control line (Sup - Swn) for controlling the respective electronic switch (21, 22), a control circuit (13), which is connected to the control lines (Sup - Swn) for driving the electronic switches (21, 22) by means of respective control signals generated by it (up, un, vp, vn, wp, wn), wherein the control circuit (13) is designed to generate the control signals (up, un, vp, vn, wp, wn) in time coordination with internal control signals (dut up...wn) of the multi-phase inverter (1) to be tested . Load simulation device (10a) after claim 1 , with one or more facilities (34) for generating one or more synchronization signals depending on electrical quantities at one or two or all phase connections (17u, 17v, 17w) and supplying the synchronization signals to the control circuit (13) for the timing of the control signals (up, un, vp, vn , wp, wn) on the internal control signals (dut up...wn) in the multi-phase inverter to be tested (1). Load simulation device (10a) after claim 2 , wherein the device (34) for generating a synchronization signal has a delay device. Load simulation device (10a) after claim 2 , in which the control circuit (13) is designed to generate the control signals (up, un, vp, vn, wp, wn) in such a way that they have the same pulse frequency as the pulse frequency in the multi-phase inverter (1) to be connected, and preferably also a defined phase position. Load simulation device (10a) according to one of the preceding claims, in which the control circuit (13) has a summation current setting device (35) which is designed to generate the control signals (up, un, vp, vn, wp, wn) in such a way that the sum of the currents caused by them at the phase connections (17u, 17v, 17w) assumes a specific value or is in a specific range, in particular as small as possible and preferably 0. Load simulation device (10a) after claim 5 , in which the summation current setting device (35) is designed to determine the sum of the phase currents and, in accordance with the sum, to change the currents in particular subordinately in the same way such that the sum assumes the specific value or is in the specific range. Load simulation device (10a) according to one of the preceding claims, in which the control circuit (13) comprises a harmonic suppression component which is adapted to generate the control signals (up, un, vp, vn, wp, wn) in such a way that harmonics are at least partially compensated for and which superimposes a harmonic of a suitable shape, amplitude, frequency and phase position on a desired sinusoidal oscillation, particularly when generating the desired value. Load simulation device (10a) according to one of the preceding claims, in which the control circuit (13) is designed to generate the control signals (up, un, vp, vn, wp, wn) in such a way that the load simulation device (10a) like an electric Generator behaves, and which is designed in particular to set target values in the rotating d/q system for the modulation of the transistor bridges to negative Q values. Load simulation device (10a) according to one of the preceding claims, with a position transmitter simulation device (33) which simulates a position transmitter signal of a sensor of a real three-phase load and provides it at a connection (18). Load simulation device (10a) according to one of the preceding claims, in which the control circuit (13) has a pulse width modulation circuit (31) for generating the control signals (up, un, vp, vn, wp, wn) according to desired values. Load simulation device (10a) according to any one of the preceding claims, in which the control circuit (13) comprises a vector control circuit (32) for generating current and/or voltage control setpoints. Load simulation device (10a) according to one of the preceding claims, in which the control circuit (13) has an interface circuit (15) for connection to a user interface and/or a higher-level controller (15), in particular for receiving one or more setpoint values and/or for outputting of measured values, preferably of currents at one or more of the phase connections (17u, 17v, 17w). Load simulation device (10a) according to one of the preceding claims, with at least one current and/or voltage detection device on at least one or more or all phase connections (17u, 17v, 17w) and feedback of the detection values to the control circuit (13). Load simulation device (10a) according to one of the preceding claims, each having an inductor (12u, 12v, 12w) between each one of the phase connections (17u, 17v, 17w) and each one of the connecting regions (23) of the transistor bridges (11u, 11v, 11w) , where the inductances can be adjustable. Test device (10) for a multi-phase inverter (1) to be tested, with a load simulation device (10a) (11 - 14), preferably according to one of the preceding claims, for simulating a three-phase load for the multi-phase inverter (1) to be tested, wherein the load simulation device (10a) has a plurality of transistor bridges (11u, 11v, 11w) of a controllable rectifier which are parallel to one another are connected between two DC lines (14a, 14b) and each have at least two series-connected electronic switches (21, 22), whose respective connection area (23) is connected directly or indirectly to one of the phase connections (17u, 17v, 17w), a direct voltage source (16) with further direct current outputs (16b), which is designed to provide a direct voltage supply for the multi-phase inverter (1) to be tested at its further direct current outputs (16b), a higher-level control device (15) which is used at least for driving the Load simulation device (10a) and designed to drive the multi-phase inverter (1) to be tested, and connections (14) between the DC outputs (14p, 14n) of the load simulation device (10a) and the corresponding further DC outputs (16b) of the DC voltage source (16) . test device claim 15 , characterized in that the higher-level control device (15) is designed to control or provide one or more of the following measures or devices: • Determining a test program, • Processing a test program, • Setpoint specification for the multi-phase inverter to be tested (1) , • parameter specification for the multi-phase inverter to be tested (1), • receipt of data and measured values from the multi-phase inverter to be tested (1), • setpoint specification for the load simulation device (10a), • receipt of data from the load simulation device (10a), • controlling the DC voltage source (16), • data formatting, data recording, logging, data output, • network connection and communication, • user interface.

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