DE102020207945A1 - Memory control device and method for operating a memory control device - Google Patents

Abstract

The invention relates to a memory control device for writing to and/or reading from a write-once memory of a predetermined size, this being designed to write pairs comprising an identification and a value associated with the identification into the write-once memory, the identification using a specifiable parameter can be assigned and wherein the memory size of the identifications and the values can be specified and wherein the memory control device is designed to determine the number of storable pairs based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once memory on the other to set.

Description

Technical area

The invention relates to a memory control device for writing to and / or reading out a write-once memory with a predetermined size.

The invention further relates to a method for operating a memory control device for writing to and reading out a write-once memory with a predetermined size.

The invention further relates to a memory device comprising a write-once memory with a predetermined size and a memory control device.

State of the art

One-time-programmable or one-time writable memories - also called OTP memories, one-time-programmable memory - can only be programmed, that is to say written, once. It is not possible to change values that have already been written.

Using so-called “paging” or “patching”, “reprogramming” is possible as follows: With the so-called “paging”, the OTP memory is divided into different pages. If a new programming is necessary, a new "page" is used. If the memory is divided into two pages of equal size, for example, a one-time, complete reprogramming can be carried out after the initial programming.

With "patching" a certain memory area of the memory is reserved. The addresses to be patched and the corresponding new values are then written there, which "cancel" the programming of the previous addresses accordingly.

Disclosure of the invention

In one embodiment, the present invention provides a memory control device for writing to and / or reading out a write-once memory with a predetermined size, said memory being designed to write pairs, comprising an identification and a value assigned to the identification, to the memory, using a specifiable parameter can be assigned to the identification and the memory size of the identifications and the values can be specified and the memory control device is designed to determine the number of storable pairs based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once memory on the other .

• - Festlegen einer maximalen Anzahl von in dem einmal beschreibbaren Speicher speicherbaren Paaren, wobei ein Paar eine Identifikation und einen der Identifikation zugeordneten Wert umfasst, anhand der Summe der Speichergrößen der Identifikationen und der Werte einerseits und der Größe des einmal beschreibbaren Speichers andererseits.
• - Ein oder mehrmaliges Beschreiben des einmal beschreibbaren Speichers mit einer Anzahl von Paaren, wobei die Summe der Anzahlen des ein oder mehrmaligen Beschreibens kleiner ist als die maximale Anzahl, und
• - Auslesen des Speichers.

In a further embodiment, the present invention provides a method for operating a memory device with a write-once memory for operating a memory control device for writing to and reading out a write-once memory with a predetermined size, comprising the steps

• Establishing a maximum number of pairs that can be stored in the write-once memory, one pair comprising an identification and a value assigned to the identification, based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once memory on the other.
• - One or more writing of the write-once memory with a number of pairs, the sum of the numbers of the one or more writing is less than the maximum number, and
• - Reading out the memory.

In a further embodiment, the present invention provides a memory device comprising a write-once memory of a predetermined size and a memory control device according to any one of claims 1-6.

One of the advantages achieved with this is that the flexibility with regard to reprogramming is increased: It does not matter whether a value of a parameter has to be reprogrammed several times or several values of different parameters have to be reprogrammed once. In particular, this makes it possible, for example, to determine and correct trim parameters at different times during the manufacture of a sensor and to store them in the write-once memory, which is small in terms of its structural size.

Further features, advantages and further embodiments of the invention are described below or become apparent as a result.

According to a further development, the memory control device is designed to provide a standard value for the parameter assigned to the queried identification as a query result when an identification is queried that is not present in any pair in the write-once memory. The advantage of this is that it is not necessary to program the write-once memory or to write to the write-once memory in order to return a standard value. Another benefit is that so that the number of programming steps is reduced.

According to a further development, a shadow register is arranged which assigns a standard value to at least one, in particular all, predeterminable parameters. The shadow register can either be part of the memory control device, part of the write-once memory, part of a memory device or be arranged completely separately. The shadow register can also be designed as a memory that can be written once or as a memory that can be written repeatedly. In this way it is avoided that the memory has to be written to unnecessarily and the remaining memory space that has not yet been written is unnecessarily reduced.

According to a further development, the memory control device is designed to write the identifications in a first memory area of the write-once memory and the values assigned to the identifications in a second memory area of the write-once memory. One of the advantages achieved with this is that it simplifies reading out the write-once memory.

According to a further development, the memory control device is designed to read out the identifications and the value contained in the respective pair one after the other when reading out the write-once memory, until a non-stored identification is determined, in particular where the location in the write-once memory of the determined non- stored identification is output and / or stored. The advantage of this is that reading is simplified and not all memory cells have to be read out. The first identification not saved, i.e. not written, serves as a "stop" when reading out. The further writing of the write-once memory is also simplified, since the point from which the write-once memory has not yet been written is then known. Reading out the identifications again until the identification is not saved is thus avoided.

According to a further development, the memory control device is designed to successively read out all identifications and in each case the value contained in the respective pair when reading out the write-once memory, and if an identification that has already been read out is read out again during reading out, the value assigned to the identification that has already been read out is also read out replaced by the value of the re-read identification. The advantage of this is a particularly simple programming, since - if a new programming of a value for a parameter is necessary - the identification of the parameter can simply be rewritten together with the value after the pairs that have already been saved. Reading out is also simplified, since it is not necessary to check whether an identification is stored more than once, but all stored pairs can simply be read out and, if the same identification is used, the value read out earlier with the same identification is overwritten with the value read out later.

According to a further development of the method, when reading out the write-once memory, the identifications and the value contained in the respective pair are read out one after the other until a non-stored identification is determined, in particular the location in the write-once memory of the determined non-stored identification is output and / or stored. The advantage of this is that reading is simplified and not all memory cells have to be read out. The first identification not saved serves as a "stop" when reading out. The further writing of the write-once memory is also simplified, since the point from which the write-once memory has not yet been written is then known. Reading out the identifications again until the identification is not saved is thus avoided.

According to a further development of the method, when the write-once memory is read out, all identifications and the value contained in the respective pair are read out one after the other and if an identification that has already been read out is read out again during the readout, the value assigned to the identification that has already been read out is assigned the value the re-read identification is replaced. The advantage of this is a particularly simple programming, since - if a new programming of a value for a parameter is necessary - the identification of the parameter can simply be rewritten together with the value after the pairs that have already been saved. Reading out is also simplified, since it is not necessary to check whether an identification is stored more than once, but all stored pairs can simply be read out and, if the same identification is used, the value read out earlier with the same identification is overwritten with the value read out later.

According to a further development of the memory device, all memory cells of the write-once memory have the value “0” or the corresponding inverse value to the value “0” before being written to for the first time. This makes it easy to determine whether the respective Memory cell has already been written with an identification and / or a value or not.

Further important features and advantages of the invention emerge from the subclaims, from the drawings and from the associated description of the figures on the basis of the drawings.

It goes without saying that the features mentioned above and those yet to be explained below can be used not only in the respectively specified combination, but also in other combinations or on their own, without departing from the scope of the present invention.

Preferred designs and embodiments of the invention are shown in the drawings and are explained in more detail in the following description, with the same reference symbols referring to the same or similar or functionally identical components or elements.

Figure list

• 1 in schematischer Darstellung einen Speicher gemäß einer Ausführungsform der vorliegenden Erfindung;
• 2 in schematischer Form Schritte eines Verfahrens gemäß einer Ausführungsform der vorliegenden Erfindung;
• 3 in schematischer Form eine Speichervorrichtung gemäß einer Ausführungsform der vorliegenden Erfindung; und
• 4 Schritte eines Verfahrens zum Betreiben einer Speichervorrichtung gemäß einer Ausführungsform der vorliegenden Erfindung.

It shows

• 1 a schematic representation of a memory according to an embodiment of the present invention;
• 2 in schematic form, steps of a method according to an embodiment of the present invention;
• 3 in schematic form a memory device according to an embodiment of the present invention; and
• 4th Steps of a method for operating a memory device according to an embodiment of the present invention.

Embodiments of the invention

1 Fig. 3 shows in schematic form a memory according to an embodiment of the present invention.

In detail is in 1 a write-once memory 2 shown in 256 addresses 3 , numbered from 0 to 255. Any of the addresses 3 is 16 bits in size. The bits are numbered from 0 to 15. The initial state of the write-once memory 2 is not programmed, i.e. all bits have the value "0". In addition, the memory is write-once 2 in two areas 2a , 2 B divided. The subdivision is not physically determined, but is controlled by a memory control device (in 1 not shown) to organize the write-once memory 2 performed. In the lower range 2a only the identifications IDX0-IDX169, i.e. a total of 170, are stored. Each of the identifications IDX (ID) has a size of 7 bits. Depending on the requirements, this can also be selected larger or smaller, i.e. essentially freely. Here are in each address 3 two successive identifications IDX (ID) are stored, with a bit not being written at the respective end of the identification, i.e. bit 7 and bit 15 are not written.

Each of the identifications IDX is assigned a parameter, the value of which is IDX (value) in the range 2 B is filed. The size of the values IDX (value) is 16 bits. In total, each pair (IDX (ID), IDX (value)) takes up a storage space of 23 bits. With a write-once memory with a size of 4096 bits, a maximum of 178 pairs (4096/23) can be stored.

In the following, a number of 170 storable pairs is therefore assumed.

$$\text{Adresse des zugeh}\ddot{\text{o}}\text{rigen Werts}=\text{idx}+85$$

The in 1 The shown subdivision of the write-once memory 2 in two areas 2a , 2 B , the readout can be optimized. The addresses 3 of the first area 2a of write-once memory 2 have the indices for all identifications IDX (ID), the addresses 3 of the second area 2 B have the indices for the values IDX (Value) corresponding to the identifications IDX (ID). Here, the following relationship holds between a pair and the address of the write-once memory 2 : $$\text{Address of identification}\left(\text{idx}\right)=\text{idx}/2$$

$$\text{Address of the}\ddot{\text{O}}\text{of some value}=\text{idx}+85$$

The even indices are saved in the address in bits 0 to 6, the odd indices in the same address in the bits 8th until 14th . Bits 7 and 15 are used here in 1 not programmed, i.e. described, but can be used in other embodiments.

2 shows in schematic form steps of a method according to an embodiment of the present invention.

In detail is in 2 a method of reading out the write-once memory 2 according to 1 shown. After starting the procedure in one step S0 a run variable i is set equal to the value "0". The run variable i denotes the index of the pair to be read out. The variable p designates a field / array in which the read out values are saved.

In a further step S2 a check is made as to whether the run variable i is (still) smaller than the value of the maximum pairs that can be stored, here 170. If no, the last value of the run variable is used as the prog_idx value in a further step S8 output and stored and the readout then in a further step S9 stopped or canceled. If so, it will be in a further step S3 the even and odd identifications id_even and id_odd are determined.

In a further step S4 it is checked whether the respective identification has just been written. If not, the last value of the run variable is used as the prog_idx value in a further step S8 output and stored and the readout then in a further step S9 stopped or canceled. If so, the associated value is used in a further step S5 read out and the value of the run variable increased by 1.

In a further step S7 it is checked whether the respective odd identification has been written. If not, the last value of the run variable is used as the prog_idx value in a further step S8 output and stored and the readout then in a further step S9 stopped or canceled. If so, the associated value is used in a further step S7 read out and the value of the run variable increased by 1. Then the procedure from step S2 repeated again.

In other words, the read-out is aborted as soon as an identification is found in an address that has not been written to, ie has the original value "0". This first address, which has not been written to, is stored as prog_idx, for example. If there are no more free identifications, the memory 2 regarded as "full".

After the write-once memory 2 has been partially written once, additional parameters can be programmed. The value prog_idx is then used to determine the correct address for programming / storing the other pairs. After each pair or value has been written, the value prog_idx can be changed 1 be increased and so on. Once this is the value 170 - which corresponds to the maximum number of storable pairs - has reached, there is no further programming of the memory or further writing to the write-once memory 2 possible.

3 Figure 12 shows in schematic form a memory device according to an embodiment of the present invention.

In detail is in 3 a storage device 1 shown. The storage device 1 has a one-time programmable memory 2 and one with the one-time programmable memory 2 for controlling the same connected storage control device 4th on.

4th 12 shows steps of a method for operating a memory device according to an embodiment of the present invention.

Shows in detail 4th Steps of a method for operating a memory control device 4th for writing to and reading from a write-once memory 2 with a predetermined size of memory cells.

• - Festlegen T1 einer maximalen Anzahl von in dem einmal beschreibbaren Speicher speicherbaren Paaren, wobei ein Paar eine Identifikation und einen der Identifikation zugeordneten Wert umfasst, anhand der Summe der Speichergrößen der Identifikationen und der Werte einerseits und der Größe des einmal beschreibbaren Speichers andererseits.
• - Ein oder mehrmaliges Beschreiben T2 des einmal beschreibbaren Speichers mit einer Anzahl von Paaren, wobei die Summe der Anzahlen des ein oder mehrmaligen kleiner ist als die maximale Anzahl, und
• - Auslesen T3 des einmal beschreibbaren Speichers.

The process comprises the following steps:

• - Determine T1 a maximum number of pairs storable in the write-once memory, a pair comprising an identification and a value assigned to the identification, based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once memory on the other.
• - Writing one or more times T2 of the write-once memory with a number of pairs, the sum of the numbers of the one or more times being smaller than the maximum number, and
• - Read out T3 of write-once memory.

• - Höhere Flexibilität beim Speichern von Werten von Parametern, insbesondere muss die Anzahl der Werte der Parameter als auch die Anzahl von Reprogrammierungen im Vorfeld nicht festgelegt werden.
• - Einfaches und schnelles Auslesen des einmal beschreibbaren Speichers
• - Weniger Programmierschritte

In summary, at least one of the embodiments of the invention can provide at least one of the following advantages and / or one of the following features:

• - Greater flexibility when saving parameter values, in particular the number of parameter values and the number of reprogrammings do not have to be defined in advance.
• - Easy and quick reading of the write-once memory
• - Fewer programming steps

Although the present invention has been described on the basis of preferred exemplary embodiments, it is not restricted thereto, but rather can be modified in many ways.

Claims (11)

Memory control device (4) for writing to and / or reading out a write-once Memory (2) with a predetermined size, which is designed to write pairs, comprising an identification and a value assigned to the identification, into the write-once memory (2), with a predeterminable parameter being assignable by means of the identification and with the memory size the identifications and the values can be specified and the memory control device (4) is designed to determine the number of storable pairs based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once memory (2) on the other. Memory control device (4) according to Claim 1 wherein the memory control device (4) is designed to provide a standard value for the parameter assigned to the queried identification as a query result when an identification is queried which is not present in any pair in the write-once memory (2). Memory control device (4) according to Claim 2 , wherein a shadow register is arranged which assigns a standard value to at least one, in particular all, predeterminable parameters. Memory control device (4) according to one of the Claims 1 - 3 wherein the memory control device (4) is designed to write the identifications in a first memory area (2a) of the write-once memory (2) and the values assigned to the identifications in a second memory area (2b) of the write-once memory (2). Memory control device (4) according to one of the Claims 1 - 4th , wherein the memory control device (4) is designed to read out the identifications and the value contained in the respective pair one after the other when reading out the write-once memory (2) until a non-stored identification is determined, in particular the location in the write-once memory (2) the ascertained, non-stored identification is output and / or stored. Memory control device (4) according to one of the Claims 1 - 5 , the memory control device (4) being designed to successively read out all identifications and the value contained in the respective pair when reading out the write-once memory (2), and if an identification that has already been read out is read out again during reading out, that of the identification that has already been read out is used The value assigned to the identification is replaced with the value of the identification that has been read out again. A method for operating a memory control device (4) for writing to and reading out a write-once memory (2) having a predetermined size, comprising the steps - Establishing (T1) a maximum number of pairs storable in the write-once memory (2), one pair comprising an identification and a value assigned to the identification, based on the sum of the memory sizes of the identifications and the values on the one hand and the size of the write-once Memory (2) on the other hand. - One or more writing of the write-once memory (2) with a number of pairs, the sum of the numbers of the one or more writing is less than the maximum number, and - Reading out the write-once memory (2). Procedure according to Claim 7 , whereby when reading out the write-once memory (2) the identifications and the value contained in the respective pair are read out one after the other until a non-stored identification is determined, in particular where the location in the write-once memory (2) of the determined non- stored identification is output and / or stored. Procedure according to Claim 8 , wherein when reading out the write-once memory (2) all identifications and the respective value contained in the respective pair are read out one after the other and if an identification that has already been read out is read out again during reading out, the value assigned to the identification already read out becomes the value of the Replaced identification replaced. A memory device (1) comprising a write-once memory (2) with a predetermined size and a memory control device (4) according to one of the Claims 1 - 6th . Storage device (1) according to Claim 10 , whereby all memory cells of the write-once memory (2) have the value “0” or the corresponding inverse value to the value “0” before being written to for the first time.

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