DE102020134243A1 - Quasi-resonant (QR) flyback converter with zero-voltage detection and improved digital control - Google Patents

Abstract

The present invention relates to a quasi-resonant (QR) flyback converter that includes a transformer circuit having a primary winding configured to receive an input voltage from the AC input, a secondary winding configured to provide an output voltage to the DC output, and an auxiliary winding connected to a primary side zero crossing detection circuit for detecting at least one zero voltage condition in the auxiliary winding and the timing thereof. A primary-side control circuit is configured to control a switching element to turn on and off the input voltage across the primary winding. Furthermore, a secondary-side control circuit is configured to detect the level of the output voltage and/or the level of an output current supplied to the DC output and to transmit and/or display the detected output voltage level and/or the detected output current level in a second response signal to the primary-side control circuit. The primary-side control circuitry is configured to set the OFF-duration to a pre-configured amount of time in accordance with the output voltage level and/or the output current and input voltage levels for a subsequent cycle, regardless of the OFF-duration of the current cycle, until the input voltage is switched back on again. respectively received in the second response signal.

Description

The present invention relates to a quasi-resonant QR flyback converter. In particular, the invention relates to a QR flyback converter having a secondary-side transient load detection circuit that transmits an additional data signal to the primary-side control circuit that controls the QR flyback converter.

In the past, quasi-resonant (QR) flyback converters have been widely discussed due to their numerous advantages, e.g U.S. 2010/0219802 A1 shown. A simplified equivalent circuit diagram of such an example QR flyback converter is shown in 6a shown. Furthermore, the functioning of the exemplary QR flyback converter is shown in 6b shown.

In relation to 6a For example, the example QR flyback converter includes a QR regulator that controls a current in a transformer circuit T having a primary winding Lm, a secondary winding, and an auxiliary winding. For exemplary purposes, a turns ratio of N:1 between the primary winding Lm and the secondary winding is considered.

The primary winding Lm of the transformer circuit T in the exemplary QR flyback converter is supplied with an input voltage from a voltage supply Vin. The primary winding Lm is also connected to a switching element S1 (e.g. a MOSFET) which switches the current flowing in the primary winding. The switching element S1 is controlled by a QR controller according to a pulse width modulated (PWM) control signal with an adjustable period.

The example QR flyback converter also includes a stray inductance L_stray, which corresponds to the stray component of the primary inductance Lm, and a parasitic capacitance Cp, which corresponds to the parasitic effects on the drain of the switching element S1. Both the stray inductance L_stray and the parasitic capacitance Cp are responsible for parasitic effects during the operation of the exemplary QR flyback converter.

Also, in the exemplary QR flyback converter, the secondary winding of transformer circuit T provides a voltage to diode D1 that (after rectification) is stored on capacitor C1 to provide an output voltage V_OUT to a load. In addition, the auxiliary winding of the transformer circuit T provides a degaussing signal DEM which is received by the QR controller.

Regarding 6b the operation of the exemplary QR flyback converter is explained in terms of the changes over time in the voltage level across the switching element S1 (e.g. drain-source voltage Vds for a MOSFET).

At time t0, the QR controller controls the switching element S1 to assume an ON state. Accordingly, the input current in the primary winding Lm increases, and the transformer circuit T stores the energy in the form of the induced magnetic field.

Then, at time t1, the QR controller controls the switching element S1 to be in the OFF state. Accordingly, the energy stored in the primary winding Lm is transferred to the secondary winding of the transformer circuit T due to the inductive coupling between the windings.

At the same time, a reverse current is induced in the primary winding Lm of the transformer circuit T, so that the switching element S1 is subjected to a higher voltage (e.g. drain-source voltage for a MOSFET) than before. The magnitude of the peak voltage is determined by the leakage inductance L_stray, the voltage Vin and the reflected voltage Vr in the transformer circuit T. The voltage Vr is equal to N*V_OUT (at a turns ratio of N:1).

More precisely, the peak voltage across the switching element S1 (e.g. drain-source voltage for a MOSFET) oscillates due to the stray inductance L_stray, which opposes the parasitic capacitance Cp.

Then, at time t2, the inductive spike has died down and the voltage level across switching element S1 returns to voltage Vin plus the reflected voltage Vr, which corresponds to V1. In other words, at this point in time t2, the stray inductance L_Streu is (completely) demagnetized.

In addition, energy is extracted from the secondary winding of the transformer circuit T by being stored in the capacitor C1, which provides the output voltage V_OUT to the load. In other words, the secondary winding starts to demagnetize.

Subsequently, at time t3, the output current flowing through diode D1 falls to zero and in response the voltage level across switching element S1 begins to decrease. This voltage level at switching element S1 falls between times t3 and t4 to the level of voltage Vin and even further to voltage V2 due to resonance effects. At time t4, the demagnetization of the primary winding Lm ends.

The drop in the voltage level results from resonance effects, ie from energy oscillating in a resonance circuit made up of the primary winding Lm and the parasitic capacitance Cp, with the resonance period 2*tV being determined by Lm and Cp. As in 6b As shown, the oscillations may produce one or more troughs, with a first trough occurring at time t4 and a second trough occurring at time t5.

At one of these valleys, the QR controller starts again to control the switching element to assume an ON state. Since the voltage level across the switching element S1 (e.g. the drain-source voltage Vds for a MOSFET) is zero or a local minimum in the valleys, the switching efficiency improves at this time. For example, the first valley can be chosen because it represents the smallest local minimum.

However, since the first valley also implies the shortest possible cycle time, this mode of operation of the QR flyback converter dictates the transfer of the maximum amount of energy over time, regardless of whether it is required by the secondary connected load or not.

Advances have been made in the past to more flexibly control the operation of conventional QR flyback converters.

First, traditional QR flyback converters were adapted to include a voltage detector that senses the voltage Vin. Since the input voltage Vin determines the current in the primary winding Lm of the transformer circuit T, it also determines the energy that is stored in the primary winding Lm and subsequently transferred to the secondary winding of the transformer circuit T. The determined level of the voltage Vin can be used by the QR controller to select the appropriate operating mode.

Secondly, conventional QR flyback converters have been adapted to additionally include a feedback circuit which, on the secondary side of the transformer circuit T, generates, for example, the voltage V_OUT across a storage capacitor (see C1 in 6A ) detected. Accordingly, a (first) response signal that indicates the magnitude of the voltage V_OUT allows the QR flyback converter to adapt to the load.

According to the invention, each switching cycle first includes an ON period (referred to as t_ON) and then an OFF period (referred to as t_OFF).

Thus, when switching from OFF to ON at time t0, QR flyback converter operation transitions from a previous switching cycle (referred to as t_cycle -1) to another (subsequent) current cycle (referred to as t_cycle). With the switch from OFF to ON at time t5, the operation of the QR flyback converter transitions from the other cycle (referred to as t_cycle) to yet another (subsequent) switching cycle (referred to as t_cycle +1).

Both advances have been shown to improve the flexibility of QR flyback converter operation, but are rather slow compared to fast load transients resulting from sudden load changes at the output of the traditional QR flyback converter.

In this context, the object of the invention is to enable faster and more precise responses in the operation of the QR flyback converter by additionally providing the primary-side controller of the QR flyback converter with a further digital (i.e. second) response signal.

According to a first aspect of the invention, a quasi-resonant (QR) flyback converter is proposed which has an AC input and a DC output. The QR flyback converter includes a transformer circuit having a primary winding configured to receive an input voltage from the AC input, a secondary winding configured to provide an output voltage to the DC output, and an auxiliary winding having a primary-side zero crossing -Detection circuit is connected to detect at least one zero voltage condition in the auxiliary winding and its timing

Further, a primary-side control circuit is configured to control a switching element such that the switching element sequentially turns ON and OFF the input voltage to the primary winding in a current cycle. An input voltage turn-on timing is when energy transfer into the transformer starts for the current cycle, an input voltage turn-off timing is set so that a current flowing in the primary winding does not exceed a peak current level, and a timing for that Turning the input voltage back on is set for the next cycle synchronously with the timing of the detected at least one zero voltage condition.

In addition, the OFF duration until the input voltage is switched on again is adjusted by varying the OFF duration of the cycle of a preconfigured time interval according to a first response signal transmitted from a secondary-side voltage detector.

The QR flyback converter further includes a secondary-side control circuit configured to sense the level of the output voltage and/or the level of an output current supplied to the DC output and configured to read the sensed output voltage level and/or the sensed output current level each in a second response signal to the primary-side control circuit, wherein in the event that the primary-side control circuit receives the second response signal from the secondary-side control circuit, this is configured so that it is switched OFF for a later cycle until switched ON again of the input voltage regardless of sets the OFF-duration of the current cycle to a pre-configured time duration in accordance with the output voltage level and/or the output current level respectively received in the second response signal.

It should be noted here that the setting of the OFF duration does not necessarily take place within an operating cycle of the primary-side control circuit (referred to as the control cycle), but only for the following control cycle. The later switching cycle, in which the OFF duration until the input voltage is switched on again, independently of the OFF duration of the current cycle, is set to a preconfigured time duration according to the received at least one second response signal, is therefore, for example, a switching cycle that is ten switching cycles after the switching cycle lies in which the second response signal is received.

The advantage of this solution is that the information about the output current and/or the output voltage is provided directly to the primary-side controller, so that the performance can be adjusted. The primary-side controller can include a powerful microcontroller, while the secondary-side controller can include a smaller and less sophisticated microcontroller that essentially only serves to collect data such as the output voltage and/or the output current. According to an example of the present disclosure, the second response signal may be a digital signal transmitted to the secondary-side controller via a bi-directional communication interface. The communication between the primary-side controller and the secondary-side controller can take place, for example, via UART communication.

UART stands for Universal Asynchronous Receiver/Transmitter. Strictly speaking, UART does not refer to a communication protocol like SPI and I2C, but to a physical circuit in a microcontroller or a standalone IC. The main purpose of a UART is to send and receive serial data. UART uses only two wires to transfer data between devices. In UART communication, two UARTs communicate directly with each other. The sending UART converts parallel data from a control device such as a CPU into serial data, transmits it in serial form to the receiving UART, which then converts the serial data back into parallel data for the receiving device. Only two wires (more generally: two electrically conductive lines) are required for the transmission of data between two UARTs. Data flows from the Tx pin of the sending UART to the Rx pin of the receiving UART. The communication is bidirectional.

UARTs transfer data asynchronously, meaning there is no clock signal to synchronize the sending UART's outputting bits with the receiving UART's sampling of bits. Instead of a clock signal, the sending UART adds start and stop bits to the data packet to be transmitted. These bits define the beginning and end of the data packet, so the receiving UART knows when to start reading the bits.

When the receiving UART sees a start bit, it starts reading the incoming bits at a specific frequency, called the baud rate. The baud rate is a measure of the speed of data transmission, expressed in bits per second (bps). Both UARTs must operate at approximately the same baud rate. The baud rate between the sending and receiving UART can only differ by about 10% before the timing of the bits differs too much.

Both UARTs must also be configured to send and receive the same data packet structure. As is well known, the data transmitted by UART is organized in packets. Each packet contains 1 start bit, 5 to 9 data bits (depending on the UART), an optional parity bit, and 1 or 2 stop bits.

However, it is understood that communication interfaces other than UARTs may be used for communication between the primary-side controller and the secondary-side controller within the scope of the present disclosure.

According to an advantageous example of the present disclosure, the QR flyback converter may further include a primary-side rectifier circuit connected between the AC input and the primary winding and another secondary-side rectifier circuit connected between the secondary winding and the DC output, and/or a power factor correction (PFC ) include.

According to a further advantageous embodiment, the QR flyback converter further comprises a primary-side electrolytic capacitor configured to buffer the input voltage and a further secondary-side electrolytic capacitor configured to buffer the output voltage.

The at least one second response signal can advantageously be transmitted from the secondary-side control circuit to the primary-side control circuit via an optocoupler or a Y-capacitor. This ensures safe galvanic isolation of the primary and secondary sides.

Additionally, the primary side control circuitry may be configured to determine the peak current level for the following cycle depending on the level of the input voltage received from the AC input of the current cycle. Normally the peak current level remains a constant predetermined value. However, the level of the input voltage can be added as an offset to a shunt voltage. Then the resulting peak voltage in each switching cycle is also dependent on the actually applied input voltage.

According to an advantageous embodiment, the primary-side control circuit is configured such that it synchronously adjusts the point in time for switching on the input voltage in a cycle so that it corresponds to the point in time of one of the at least one zero-voltage states detected by the zero-crossing detection circuit in the current cycle.

According to a further advantageous example, the pre-configured time interval is configured in the primary-side control circuit according to a difference in the instants between two consecutively detected zero-voltage states, and/or the pre-configured time duration is configured in the primary-side control circuit according to the relative instant of a count value of the at least one zero-voltage states, within the previous one cycle, configured.

In particular, the count of the at least one zero voltage condition may be determined using a lookup table, where the lookup table optionally stores a count of the at least one zero voltage condition for different sets of an input voltage level, an output voltage level, and/or an output current level. The advantage of using such look-up tables is that the output power can be adjusted particularly quickly and precisely. The values stored in the look-up table can be determined, for example, on the basis of measurements and characteristic parameters for each individual power supply device or for all devices of each type of power supply.

• einem Tupel aus einem Eingangsspannungspegel und einem Ausgangsstrompegel, oder
• einem Triple aus einem Eingangsspannungspegel, einem Ausgangsspannungspegel und einem Ausgangsstrompegel.

According to one advantageous example, the lookup table stores a count of the at least one detected zero voltage condition associated with:

• a tuple of an input voltage level and an output current level, or
• a triple of an input voltage level, an output voltage level and an output current level.

As previously mentioned, the primary side control circuit and optionally the secondary side control circuit is a microcontroller according to an example of the present disclosure.

According to a further example of the present disclosure, the primary-side control circuit is configured, upon receipt of the at least one second response signal, to interrupt the control process for setting the switch-off duration for a subsequent cycle.

Furthermore, the primary-side control circuit and the secondary-side control circuit can be configured for bi-directional communication, for example via UART communication interfaces.

According to a further advantageous embodiment, the secondary-side control circuit is set up to transmit at least one control signal when a change in the output current and/or the output voltage exceeds a threshold value. By way of example, there are two types of signals transmitted from the secondary-side control circuit to the primary-side control circuit. On the one hand, the fast response signals FR_Hoch and FR_Tief can be transmitted from the secondary-side control circuit to the primary-side control circuit when the load change is more than e.g. B. is 40% of the rated output current. As soon as the primary-side control circuit receives this response signal, an interruption is performed and the number of valleys is adjusted directly depending on the input voltage. Secondly, a data signal containing the information about the output current and/or the output voltage can be transmitted from the secondary-side control circuit to the primary-side control circuit. The data signal can be sent continuously every 300 µs. Upon receipt by the primary side control circuit, the valley count is adjusted based on the lookup table.

In other words, the secondary-side control circuit can be further configured to send at least one control signal to the primary-side control circuit to indicate a transmission of the second response signal, and optionally the secondary-side control circuit is configured to send the at least one control signal when a Change in the detected level of the output voltage and / or the detected level of the output current exceeds a predetermined threshold.

In particular, the at least one control signal can be transmitted from the secondary-side control circuit to the primary-side control circuit (132) via an optocoupler or a Y-capacitor.

• 1a zeigt eine schematische Darstellung eines quasiresonanten (QR) Sperrwandlers gemäß einer beispielhaften Ausführungsform der Erfindung;
• 1b bis 1d erläutert ein Reglungsschema zur Steuerung der vom quasiresonanten (QR) Sperrwandler übertragenen Leistung
• 2a und 2b stellen Regelungsstrategien für den Betrieb des quasiresonanten (QR) Sperrwandlers gemäß einer beispielhaften Ausführungsform der Erfindung;
• 3a zeigt ein schematisches Diagramm eines quasiresonanten (QR) Sperrwandlers gemäß einer weiteren beispielhaften Ausführungsform der Erfindung; und
• 3b zeigt ein Signaldiagramm des Betriebs des quasiresonanten (QR) Sperrwandlers gemäß einer anderen beispielhaften Ausführungsform der Erfindung;
• 3c zeigt ein anderes Signaldiagramm des Betriebs des quasiresonanten (QR) Sperrwandlers gemäß einer anderen beispielhaften Ausführungsform der Erfindung;
• 3d bis 3g zeigen weitere Signaldiagramme des Betriebs des quasiresonanten (QR) Sperrwandlers gemäß einer anderen beispielhaften Ausführungsform der Erfindung;
• 4a bis 4f zeigen Signaldiagramme, die verschiedene Szenarien für einen abrupten Lastanstieg illustrieren;
• 5a bis 5e zeigen Signaldiagramme, die verschiedene Szenarien für einen abrupten Lastabwurf illustrieren;
• 6a und 6b stellen ein schematisches Diagramm und ein entsprechendes Signaldiagramm des Betriebs eines herkömmlichen QR-Sperrwandlers dar.

Moreover, several aspects of the embodiments - individually or in different combinations - can form solutions according to the present invention. Other features and advantages will be apparent from the following more detailed description of various embodiments of the invention as illustrated in the accompanying drawings, in which like references refer to like elements, and in which:

• 1a 12 shows a schematic representation of a quasi-resonant (QR) flyback converter according to an exemplary embodiment of the invention;
• 1b until 1d describes a control scheme for controlling the power transmitted by the quasi-resonant (QR) flyback converter
• 2a and 2 B illustrate control strategies for operation of the quasi-resonant (QR) flyback converter according to an exemplary embodiment of the invention;
• 3a 12 shows a schematic diagram of a quasi-resonant (QR) flyback converter according to another exemplary embodiment of the invention; and
• 3b Figure 12 shows a signal diagram of the operation of the quasi-resonant (QR) flyback converter according to another exemplary embodiment of the invention;
• 3c Figure 12 shows another signal diagram of the operation of the quasi-resonant (QR) flyback converter according to another exemplary embodiment of the invention;
• 3d until 3g Figure 12 shows further signal diagrams of the operation of the quasi-resonant (QR) flyback converter according to another exemplary embodiment of the invention;
• 4a until 4f show signal diagrams illustrating different scenarios for an abrupt load increase;
• 5a until 5e show signal diagrams illustrating different scenarios for an abrupt load shedding;
• 6a and 6b Figure 12 illustrates a schematic diagram and corresponding signal diagram of the operation of a conventional QR flyback converter.

In the following a detailed description of different embodiments of the QR flyback converter according to the invention is given. In particular, all embodiments offer the advantage of quickly responding to load transients resulting from sudden changes in the load on the QR flyback converter output.

According to the invention, the transformer circuit of the QR flyback converter comprises a primary winding (or several windings) and a secondary winding (or several windings) with a predefined turns ratio Ns:Np. The primary and secondary windings are galvanically isolated from each other. The transfer of energy occurs from the primary to the secondary winding of the transformer circuit and vice versa through an inductive (or magnetic) coupling between the two.

Within the scope of the invention, reference is made to the primary-side and secondary-side circuits of the QR flyback converter. This term is used to denote the circuits placed either on the primary or on the secondary side of the isolation (galvanic) boundary of the transformer circuit (shown as a dashed line in the figures).

According to the invention, the transformer circuit also comprises an auxiliary winding (or several windings) with a predetermined turns ratio Na:Ns (or Na:Np) with respect to the secondary winding (or to the primary winding). These windings are also galvanically isolated from each other. In this respect, at least part of the energy, but not the main part of the energy, is absorbed by inductive coupling from the secondary winding (or the primary winding) into the auxiliary winding.

In the context of the invention, the QR flyback converter operates in cycles, each cycle including an ON duration and an OFF duration. In this regard, the time at which the QR flyback converter controls the switch from OFF to ON corresponds to the beginning of a cycle. Accordingly, the timing at which the QR flyback converter controls switching from ON to OFF corresponds to an intermediate timing of the same cycle.

The following description refers to switching cycles (i.e. switching cycles of the switching element). In particular, reference is made to a previous cycle, a current cycle, and a subsequent cycle. Although these cycles can be contiguous, a subsequent cycle can also be non-consecutive.

For example, the previous cycle may refer to a cycle with cycle number N, the current cycle to a cycle with cycle number N+i (where i is an integer and greater than 0, e.g. 15) and the following cycle a cycle with cycle number N+j (where j is another integer greater than 0, e.g. 30).

Whether or not the previous cycle, the current cycle and the following cycle are contiguous depends mainly on the processing speed of the primary-side control circuit (and/or the processing speed of the secondary-side control circuit), which will be described in more detail below. From this it can be seen that the specific implementation of the primary or secondary-side control circuits affects the control behavior, e.g. B. in the case of fast load transients.

It is important that such a delay in the control behavior has no influence on the switching speed of the switching element, ie the speed with which the control circuit controls the switching element.

Additionally, the present disclosure relates to control cycles. A control cycle is a recurring sequence of work steps of a microcontroller, sometimes also referred to as the machine cycle of the microcontroller.

In an example implementation, the primary-side control circuitry includes separate (e.g., dedicated) circuitry configured to control the switching element. This separate circuit includes, inter alia, a voltage comparator (e.g. in the form of an operational amplifier) which compares voltage inputs to the control circuit, e.g. the peak current value discussed above, with a reference voltage value and on this basis controls the switching element.

• In 1a ist eine beispielhafte Ausführungsform des quasiresonanten QR-Sperrwandlers 100 in Form eines schematischen Diagramms dargestellt. Dieses schematische Diagramm zeigt die Funktionsschaltungen des QR-Sperrwandlers als abstrakte Blöcke mit dazwischenliegenden Verbindungen, es ist also kein Schaltplan. Diese Darstellungsform wurde gewählt, um die Wechselwirkungen zwischen den Funktionsschaltungen besser sichtbar zu machen.

Referring now to an exemplary embodiment of a QR flyback converter 100:

• In 1a 1, an exemplary embodiment of the quasi-resonant QR flyback converter 100 is illustrated in schematic diagram form. This schematic diagram shows the functional circuits of the QR flyback converter as abstract blocks with interconnections in between, so it is not a schematic. This form of representation was chosen to make the interactions between the functional circuits more visible.

The QR flyback converter 100 according to the exemplary embodiment includes an AC input 102 and a DC output 104. With the AC input 102, the QR flyback converter 100 can be connected to a mains supply. In addition, the QR flyback converter 100 with the DC output 104 can drive a DC load, such as. B. drive an industrial device in the field of industrial automation.

The AC input 102 is configured to receive an input voltage, for example in the range of 0-264 VAC, preferably one of 85 VAC, 120 VAC, 230 VAC, and 264 VAC input voltages. The DC output 104 is configured to provide an output voltage in the range of 0-110 volts DC, preferably one of 5 volts DC, 15 volts DC, 24 volts DC, and 110 volts DC.

The QR flyback converter 100 also includes a transformer circuit 112 with a fixed turns ratio between the primary and secondary windings (i.e., Ns:Np). Thus, without switching on and off (i.e. switching element 126), the level of the output voltage would be the product of the level of the input voltage times the turns ratio Ns:Np. However, by switching the switching element 126, which is also contained in the QR flyback converter 100, the level of the output voltage can be set variably.

In other words, despite the fixed Ns:Np turns ratio, QR flyback converter 100 is configured to provide variable output voltage levels. This is accomplished by the QR flyback converter 100 controlling the switching element 126 to transfer a variable amount of energy from the primary winding 112 - 1 to the secondary winding 112 - 2 of the transformer circuit 112 .

• In dem QR-Sperrwandler 100 ist der Wechselstromeingang 102 mit einer EMI-Filterschaltung 106 verbunden, die so konfiguriert ist, dass sie elektromagnetische Störungen auf der Eingangswechselspannung reduziert. Verschiedene Implementierungen der EMI-Filterschaltung 106 sind in der Technik bekannt, einschließlich richtig abgestimmter analoger Filterschaltungen, die die Störungen im niedrigen Band reduzieren, und Abschirmungsschaltungen, die dieselben Störungen im hohen Band reduzieren.

QR flyback converter 100 is described in more detail below:

• In the QR flyback converter 100, the AC input 102 is connected to an EMI filter circuit 106 configured to reduce electromagnetic interference on the AC input voltage. Various implementations of EMI filter circuit 106 are known in the art, including properly tuned analog filter circuits that reduce the low band noise and shielding circuits that reduce the same high band noise.

The EMI filter circuit 106 is connected to a rectifier circuit 108 which rectifies the AC input voltage (which has been filtered) into a constant input voltage. Various implementations of the rectifier circuit 108 are known in the art, including a full-wave rectifier illustrated in the figures by way of example. For reasons of clarity, the rectifier circuit 108 can also be referred to as a primary-side rectifier circuit 108 .

Alternatively, the rectifier circuit 108 can be connected directly to the AC input 102 (ie, without the EMI filter circuit 106). Such a configuration might be advisable for a QR flyback converter when a lower part count has to be achieved or when production size and/or production cost constraints have to be met.

The rectifier circuit 108 is connected to an electrolytic capacitor 110 (abbreviated to elcap in the figures) which serves to buffer the (constant) input voltage which is then used in the transformer circuit 112 . Alternatively, the electrolytic capacitor 110 can also be replaced by a ceramic capacitor or another capacitor provided a decoupling effect is achieved. For reasons of clarity, the electrolytic capacitor 110 can also be referred to as the primary-side electrolytic capacitor 110 .

The electrolytic capacitor 110 is connected to a transformer circuit 112 which converts the energy of the (rectified) input voltage (which has also been decoupled) from the rectifier circuit 108 into energy which enables the DC output 104 to provide a (constant) output voltage for driving a load .

In addition, a power factor correction (PFC) stage can also be provided, as is known in the art. With power factor correction, the input current of offline power supplies is shaped in such a way that the real power available from the grid is maximized. The choice of power factor correction solutions ranges from passive circuits to a variety of active circuits. Depending on the power level and other specifics of the application, the appropriate solution will vary. Advances in discrete semiconductors in recent years and the availability of lower-cost control ICs have made active PFC solutions more suitable for a wider range of applications. However, any suitable PFC solution can be combined with the principles of the present disclosure.

Specifically, the transformer circuit 112 includes the primary winding(s) 112-1 connected to the rectifier circuit 108 with the electrolytic capacitor 110 therebetween. Accordingly, the primary winding 112-1 is configured to receive an input voltage (i.e., a constant input voltage). This input voltage is ultimately provided by the AC input 102, albeit as an AC input voltage, and has subsequently been rectified.

The transformer circuit 112 also includes a secondary winding (or windings) 112-2 connected to a further rectifier circuit 114 which provides a constant output voltage to the DC output 104. Accordingly, the secondary winding 112-2 is configured to ultimately provide an output voltage, albeit as an AC output voltage that is subsequently rectified. For the sake of clarity, the other rectifier circuit 114 can also be referred to as the secondary-side rectifier circuit 114 .

Further, the transformer circuit 112 includes an auxiliary winding (or windings) 112-3 connected to a zero crossing detection circuit 116-1.

This zero crossing detection circuit 116-1 is configured to detect at least one zero voltage condition (or valley) of the voltage provided by the auxiliary winding 112-3. In other words, it detects a condition where the auxiliary winding is in a demagnetized state (i.e., no current flows in the auxiliary winding 112-3). In addition, the zero crossing detection circuit 116-1 detects the time (t_Tal) of the at least one zero voltage condition (or valley).

For the sake of clarity, it should be noted that the zero voltage state can also be referred to as valley and the time as t_valley. Accordingly, in view of this terminology, it can be said that the turn-on of the input voltage to the primary winding 112-1 is controlled to occur at a time corresponding to the time of a trough, specifically synchronous with the time (t_Tal) of a trough previous cycle. By changing the number of valleys at which the input voltage turns on, the turn-off time t_OFF can be changed.

In an exemplary implementation, the zero crossing detection circuit 116-1 is configured to detect each zero voltage condition and their respective times in a cycle. In an alternative implementation, zero-crossing detection circuit 116-1 is configured to operate in detects only the first zero voltage state and its timing during an OFF state of a switching element 126 in one cycle.

As already discussed in connection with the prior art, for the quasi-resonant operation of a QR flyback converter it is only necessary to detect the first zero voltage state (or valley) and its timing in each cycle, since the subsequent zero voltage states (or valleys) follow in a constant interval 2*tV, which corresponds to the resonant frequency caused by the inductance L (see L_stray in 6a ) of the primary winding 112-2 and the parasitic capacitance (see Cp in 6a ) of the switching element 126 is determined.

It is worth noting that the interval 2*tV is constant only under ideal conditions. In practice, it can be observed that the interval 2*tV slowly decreases with decreasing amplitude (e.g. the oscillation frequency increases). However, this decrease is slow and negligible between successive valleys.

Consequently, even if the zero-crossing detection circuit 116 - 1 detects only the first valley, the timings of all subsequent OFF-state valleys can be derived based on the internal parameters of the QR flyback converter 100 . Alternatively, the zero crossing detection circuit 116-1 detects up to 20 zero voltage states and their respective times in one cycle.

In addition, the auxiliary winding 112-3 of the transformer circuit 112 is connected to an overvoltage protection circuit 116-2.

This overvoltage protection circuit 116-2 is configured to compare the level of the voltage across the auxiliary winding 112-3 with a predetermined threshold. When this threshold is exceeded, the overvoltage protection circuit 116-2 sends an overvoltage detection signal to the connected control circuit 132. For example, the control circuit 132 may (immediately) terminate all operations of the QR flyback converter 100 upon receipt of the overvoltage protection signal. However, since this process is not the focus here, a detailed description has been omitted for the sake of brevity.

The other rectifier circuit 114 is connected to another electrolytic capacitor 118 (abbreviated to elcap in the figures) that is configured to buffer the (constant) output voltage that is ultimately fed to the DC output 102 . Alternatively, the electrolytic capacitor 118 can also be replaced by a ceramic capacitor or another capacitor, provided that a decoupling effect is achieved. For the sake of clarity, the other electrolytic capacitor 118 can also be referred to as the secondary-side electrolytic capacitor 118 .

More specifically, the (constant) output voltage from the other rectifier circuit 114 is fed to the DC output 102 via the other electrolytic capacitor 118 , a filter circuit 120 and a shunt resistor 122 .

The filter circuit 120 is configured as a low-pass filter for the output voltage used as a (first) response signal for operating the QR flyback converter 100 .

In an example implementation, the filter circuit 120 is a resistor-capacitor, RC, low-pass filter circuit or an inductor-capacitor, LC, low-pass filter circuit configured to attenuate high-frequency transients in the output voltage. The cutoff frequency of the low-pass filter circuit can be configured to suppress switching transients in the output voltage that result from the input voltage across the primary winding 112 - 1 of the transformer circuit 112 continuously switching off and on. For this purpose, the cut-off frequency z. B. be 100 Hz.

For the sake of clarity, it should be emphasized that this filter circuit 120 is a cause of a slow response when the QR converter 100 operates only on the basis of the (first) response signal. On the one hand, the filter circuit 120 must provide a long averaging window for the (oscillating) output voltage in order to achieve good filtering results, on the other hand, the filtering introduces a significant delay in the first response signal, which the embodiments attempt to solve.

The filter circuit 120 is connected to a voltage detector 124 which detects the level of the output voltage for voltage regulation purposes (referred to as the V regulation circuit 124 in the figures). Specifically, the voltage detector 124 is configured to sense (or adjust) the level of the low-pass filtered output voltage and transmit a first response signal corresponding to the sensed level to the primary side of the QR flyback converter 100 .

The voltage detector 124 is another reason for a slow response when the QR flyback converter 100 operates solely on the (first) response signal. Voltage detector 124 is typically set to operate at a slow regulation rate to avoid oscillatory regulation of QR flyback converter 100, particularly in situations where QR flyback converter 100 is designed with a high output capacitance.

In an example implementation, the voltage detector 124 is an operational amplifier that amplifies/attenuates the output voltage (after filtering) to convert it into the first response signal that corresponds to the level of the output voltage.

Furthermore, the filter circuit 120 is also connected to the shunt resistor 122, which enables the detection of the output current that corresponds at least in part to the current that is induced in the secondary winding 112-2 of the transformer circuit 112 and (subsequently) flows to the DC output 104, in particular the output current flowing to a load to be connected to QR flyback converter 100 .

It is clear that the placement of the shunt resistor 122 between the filter circuit 120 and the DC output 104 is only one of several possibilities. For example, shunt resistor 122 can be connected not only in the forward (plus) path to DC output 104, but also in the reverse (negative) path from DC output 104 to secondary winding 112-2. In both paths, the shunt resistor 122 enables the output current induced in the secondary winding 112-2 to be sensed.

In the transformer circuit 112, the primary winding 112 - 1 is also connected to the switching element 126 . The switching element 126 is configured to sequentially switch the input voltage to the primary winding 112-1 ON and OFF. In other words: the switching element 126 switches the current flowing in the primary winding 112-1. In an example implementation, the switching element 126 is a MOSFET, an IGBT, a high voltage NPN transistor, or other power switching field effect transistor (FET).

When switching element 126 is in an ON state, current from AC input 102 flows through EMI filter circuit 106, rectifier circuit 108, charges or bypasses electrolytic capacitor 110, and flows into primary winding 112-1. From this primary winding 112-1, the same current flows through the switching element 126 in the ON state (i.e. in the conducting state) via a further shunt resistor 128 to ground.

In addition, when switching element 126 is in the OFF state, current can flow from AC input 102 through EMI filter circuit 106 and rectifier circuit 108 to charge electrolytic capacitor 110 . However, current cannot flow into primary winding 112-1 because it cannot exit primary winding 112-1 when switching element 126 is in the OFF state (i.e., non-conductive state).

Accordingly, the switching element 126 turns ON or OFF the input voltage provided by the AC input 102 in the primary winding 112-1, thereby allowing or blocking current flow in the primary winding 112-1. In short, the switching element 126 switches ON and OFF the input voltage to the primary winding 112-1.

Furthermore, a snubber circuit 130 is connected in parallel to the primary winding 112-1 between the node connecting the primary winding 112-1 to the switching element 126 and the node connecting the electrolytic capacitor 110 to the primary winding 112-1. The snubber circuit 130 is configured to prevent voltage spikes when the switching element 126 is turned off. In addition, the snubber circuit 130 improves electromagnetic compatibility. In an example implementation, the snubber circuit 130 is a series combination of a diode and a capacitor, both connected in parallel with a resistor, with the diode drawing current from the primary winding 112-1 into the electrolytic capacitor 110 when switching from an ON to an OFF state directs.

Finally, the QR flyback converter 100 includes a control circuit 132 on the primary side and another control circuit 134 on the secondary side. Both the primary-side control circuit 132 and the secondary-side control circuit 134 are advantageously embodied as microcontrollers (abbreviated to μC in the figures). Due to the isolation limit, both microcontrollers are connected to separate linear voltage regulators 136 and 138, each providing a supply voltage (eg +5 volts). According to the present disclosure, the primary-side controller 132 consists of a high-performance microcontroller, while the secondary-side controller 134 consists of a smaller and less sophisticated microcontroller that essentially only serves to collect data such as the output voltage and/or the output current.

Advantageously, the use of microcontrollers with low operating speeds allows for a significant reduction in manufacturing cost of the QR flyback converter 100 without compromising the fast response to load transients resulting from changes in the loading of the QR flyback converter output, as will become apparent below.

• Die Steuerschaltung 132 ist mit dem Elektrolytkondensator 110 verbunden. Damit ist die Steuerschaltung 132 in der Lage, einen Pegel der Eingangsspannung zu erfassen. Der gleiche Eingangsspannungspegel wird (nacheinander) an die Primärwicklung 112-1 angelegt, nämlich beim Einschalten des Schaltelements 126. Insbesondere erfasst die Steuerschaltung 132 die gleichgerichtete Eingangsspannung, die von der Gleichrichterschaltung 108 ausgegeben wird, und nicht die Eingangswechselspannung, die vom Wechselstromeingang 102 empfangen wird.

The control circuit 132 will now be discussed in more detail:

• The control circuit 132 is connected to the electrolytic capacitor 110 . With this, the control circuit 132 is able to detect a level of the input voltage. The same input voltage level is (sequentially) applied to the primary winding 112-1, namely when the switching element 126 turns on. In particular, the control circuit 132 detects the rectified input voltage that is output from the rectifier circuit 108, and not the AC input voltage that is received from the AC input 102 .

In addition, the control circuit 132 is also connected to the shunt resistor 128 . Thus, the control circuit 132 is able to detect a current flowing through the switching element 126 (and the primary winding 112-1) when the switching element 126 is turned on. In other words, the control circuit 132 senses the current flowing through the primary winding 112-1 and the switching element 126 when it is in the ON state (i.e., conductive state).

Sensing the input voltage level and/or sensing the current flowing in the primary winding 112 - 1 allows the control circuit 132 to determine the amount of energy being transferred from the primary winding 112 - 1 to the secondary winding 112 - 2 of the transformer circuit 112 . This has the beneficial effect that QR flyback converter 100 can convert different (i.e., varying) input voltages to an equal or different output voltage.

Based on the sensed current, the control circuit 132 may limit the amount of energy to be transferred in the transformer circuit 112 by continuously checking that the current does not exceed a peak current level. To do this, the control circuit 132 repeatedly compares the current detected via the shunt resistor 128 with a predefined peak current level and controls the switching off of the switching element 126 before the peak current level is exceeded. The amount of energy transmitted is controlled by shifting the first response signal added to the shunt signal.

Specifically, the control circuit 132 may be configured to determine the peak current level for the subsequent cycle depending on the magnitude of the input voltage received from the AC input of the current cycle. This allows the control circuit 132 to determine a peak voltage level required to transfer an equal amount of energy to the secondary winding 112-2 over varying input voltages.

In particular, the control circuit 132 is configured to determine the peak current level for the following cycle depending on the magnitude of the voltage across the electrolytic capacitor 110 . This voltage across the electrolytic capacitor 110 corresponds to the input voltage. Importantly, the peak current level determined by the control circuit 132 prevents the primary winding 112-1 from being driven into saturation.

For example, if the control circuit 132 detects a lower level of the input voltage, the control circuit 132 can adjust the t_ON time of the switch to a longer ON time according to the feedback signal shift added to the shunt signal, so that the same amount of energy is transferred from the primary winding 112-1 to the secondary winding 112 -2 is transmitted. In another example, when the control circuit 132 detects an increased level of input voltage, it can adjust the t_ON time of the switch to a shorter ON time so that the same amount of energy is used is transmitted over a period of several switching cycles (e.g. at least 10 cycles). The peak current level always remains the same and is used by the microcontroller 132 for comparison.

More specifically, when the control circuit 132 controls the switching element 126 to switch to the ON state, a current begins to flow through the primary winding 112-1, the switching element 126 and the shunt resistor 128 and increases to a peak current level.

Once the control circuit 132 detects a current corresponding to the peak current using the shunt resistor 128, the control circuit 132 controls the switching element to an OFF state. In other words, the detected peak current determines the point in time at which the control circuit 132 switches off the input voltage at the primary winding.

More specifically, the control circuit 132 controls the ON state of the switching element 126 based on the predetermined peak current level and the sensed current flowing through the shunt resistor 128 . The control circuit 132 includes, for example, a comparator (e.g., in the form of an operational amplifier) that compares the predetermined peak current level to the sensed current.

When the switching element 126 turns ON, no current is yet flowing through the shunt resistor 128. The comparison of the detected current to the predetermined peak current level therefore produces a positive output. In this case, the control circuit 132 drives the switching element 126 to remain in the ON state.

After the switching element 128 is turned ON, a slowly increasing current begins to flow through the primary winding 112-1 and thus through the shunt resistor 128 as well. As long as the comparison of the sensed current to the predetermined peak current level produces a positive output signal, the control circuit 132 controls the switching element 126 to remain in the ON state.

At a certain point in time, the slowly increasing current flowing through the primary winding 112-1 and the shunt resistor 128 exceeds the predetermined peak current level. Then, the comparison result becomes a negative output, and the control circuit 132 controls the switching element 126 to turn to the OFF state. Thus, by comparing the current through the shunt resistor 128 to a predetermined peak current level, the control circuit 132 controls the duration of the ON state.

The above description refers to the simplified case that (only) the current flowing through the shunt resistor 128 is detected by the control circuit 132 . For QR flyback converter 100, the current sensed by control circuit 132 corresponds to the current through shunt resistor 128 and has an offset superimposed thereon. The shift corresponds to an amplified version of the first response signal.

The shunt resistor 128 is connected to a feedback circuit 142 for this purpose. The feedback circuit 142 provides the amplified version of a first response signal (discussed further below). This output signal is combined (e.g., superimposed) with the signal corresponding to the current flowing through the shunt resistor 128 . In other words, the control circuit 132 detects a combination of the current flowing through the shunt resistor 128 shifted by the first response signal.

The first response signal can preferably assume values between 0V and 5V. This voltage is adjusted to the shunt signal via a voltage divider. The higher the offset, the more the turn-on time is reduced, and the lower the offset, the longer the turn-on time of the switch. if e.g. For example, when the first response signal is high, the current flowing through the shunt resistor 128 is increased by a large offset due to the interference. The control circuit 132 detects current in excess of the predetermined peak current level much sooner. Therefore, the control circuit 132 drives the switching element 126 to switch from the ON state to the OFF state much earlier. The ON duration becomes shorter.

In another example, when the first response signal has a low value, the sensed current flowing through the shunt resistor 128 is reduced by a low offset due to the interference. The control circuit 132 does not detect a current in excess of the predetermined peak current level until much later. Therefore, the control circuit 132 reverses the switching element 126 much later switch from ON to OFF state. The ON duration becomes longer. In other words, the first response signal is the offset superimposed on the shunt signal and causes the turn-off threshold "peak current level" to be reached earlier, so that the switch 126 turns off earlier. The detection of the switch-off condition always follows the relationship below: $$\begin{array}{l}\text{V\_IP}=\text{V\_shunt}\left[\text{f}\left(\text{l\_112}-\text{1}\right)\right]+\text{V\_shift}\left[\text{f}\left(\text{R}\ddot{\text{and}}\text{feedback circuit}\right)\text{142}\right]>\\ \text{peak current threshold}\end{array}$$

Importantly, the filter circuit 120 and voltage detector 124 are slow and provide only a relatively small offset in the form of the first response signal. In addition, the control circuits require several control cycles to reset the time values when necessary. Therefore, this control does not allow sufficiently fast control response to load transients.

The control circuit 132 is also connected to a gate driver circuit 140 . The control circuit 132 is thus able to control the switching element 126 . This is necessary when the control circuit 132 itself is not able to supply the switching element 126 (directly) with a suitable range of control voltages. In an alternative configuration, the control circuit 132 is configured to drive the switching element 126 directly.

In addition, the control circuit 132 is connected to the zero crossing detection circuit 116-1. Thus, the control circuit 132 is able to drive the switching element 126 in one cycle so that the timing for turning on the input voltage is adjusted synchronously with the timing of the at least one zero-crossing state (or valley) detected by the zero-crossing detection circuit 116- 1 is detected.

In other words, the control circuit 132 is configured to drive the switching element 126 in one switching cycle to switch the input voltage from OFF to ON (i.e. define the OFF duration) when a zero voltage (or valley) condition is present. namely, when the primary winding 112-1 is in a demagnetized state. In other words, the timing for turning on the input voltage is determined in synchronization with the troughs detected by the zero-cross detection circuit 116-1 in the cycle. By changing the number of valleys at which the input voltage turns on, the turn-off time t_OFF can be changed. Such a change in the number of valleys can be made by the control circuit 132 during a control cycle for one of the following control cycles.

In the context of the invention, the term "synchronous" is to be understood in such a way that it refers to a (specific) point in time that corresponds to the point in time (see t_Tal in 6b ) corresponds to one of the at least one zero-stress states or valleys occurring in the cycle (see t_cycle in 6b ) can be detected by the zero crossing detection circuit 116-1.

For example, if the zero crossing detection circuit 116-1 detects only a single zero voltage condition or valley in the cycle, then the term "synchronous" is clearly understood to refer to that (specific) point in time. For example, if the zero crossing detection circuit 116-1 detects multiple, for example 10, zero voltage states in the cycle, then the term "synchronous" can be understood as referring to each of these (specific) points in time.

This improves the switching efficiency of the QR flyback converter 100 compared to switching at various times with no zero voltage (or valley) condition.

If the primary winding 112-1 is in a demagnetized state at the time of switching and the zero crossing detection circuit 116-1 detects a zero voltage condition, the switching element 126 will experience a minimum voltage level reflected from the secondary winding 112-2 to the primary winding 112-1 becomes. Thus, when switching element 126 turns on, only the minimum voltage level is discharged to ground, resulting in improved switching efficiency.

When the control circuit 132 is configured to switch the switching element 126 synchronously with the detected zero voltage condition, this is commonly understood as quasi-resonant operation, ie specifying the operation of the QR flyback converter 100. In other words, the term quasi-reso The flyback converter, QR, inherently mandates the flyback converter of the present exemplary embodiment to support quasi-resonant operation.

Again, for the sake of clarity, quasi-resonant operation of a flyback converter does not dictate the exact time (i.e., valley) at which the switching element 126 is controlled to switch from OFF to ON. In other words, since there are numerous repetitive zero voltage states (or troughs) for switching the switching element 126 at the various instants of the zero voltage states, the precise instant in the control circuit 132 must be further determined.

To this end, the control circuit 132 receives a first response signal (referred to as feedback in the figures) which is detected on the secondary side of the transformer circuit 112 . Depending on this first response signal, the control circuit 132 determines the OFF duration of the input voltage at the switching element 126, i. H. the duration that no current flows through the primary winding 112-1, thereby determining the amount of energy transferred to the secondary winding 112-2.

Furthermore, the control circuit 132 controls the duration of the switch-off, i.e. until it is switched on, synchronously with the time (t Tal in 6b ) of the at least one zero voltage state (or valley) detected by zero crossing detection circuit 116-1. In other words: In addition to the first response signal, the control circuit 132 controls the switching element 126 such that the QR flyback converter is always in quasi-resonant operation, ie switching only takes place when the primary winding 112-1 is in a demagnetized state .

This is achieved by the control circuit 132 controlling the switching element 126 to switch from OFF to ON (definition of OFF duration) by varying the OFF duration in increments or decrements of a pre-configured time interval, e.g. B. in increments or decrements of 2*tV. This variation in the OFF duration is determined by the control circuit 132 in response to the first response signal. For example, the input voltage turn-on time can be changed from turn-on at the first valley to turn-on at the third valley. Several control cycles are required for such a change in the switch-on time, since the values stored in the respective time units must be set to the desired new values.

For example, if the control circuit 132 receives a first response signal indicative of a reduction in the output voltage level, then the control circuit 132 determines that the OFF duration should be increased by the preconfigured time interval, e.g. 2*tV, while the control circuit 132, upon receiving a first response signal indicative of an increase in the output voltage level, determines that the OFF duration is increased by the (same) preconfigured time interval, e.g. B. 2*tV, is increased.

Following this example, the control circuit 132 may decrease the OFF duration as follows. Assuming the OFF duration has been determined to correspond to the tenth zero voltage state or valley, the control circuit 132 may decrease the OFF duration to correspond to the ninth zero voltage state or valley. This reduction corresponds to the pre-configured time interval, e.g. B. 2*tV. Changing the point in time for switching the input voltage on again takes several control cycles, so that the rapid response signal according to the invention is required.

Also in this example, the control circuit 132 can increase the off-time as follows. For example, assuming the OFF duration was determined to correspond to the fifteenth zero voltage state or valley, the control circuit 132 may increase the OFF duration to correspond to the sixteenth zero voltage state or valley. This increase in turn corresponds to the pre-configured time interval, e.g. B. 2*tV.

The time interval (e.g. 2*tV in 6b ) can be preconfigured to match the calculated resonant frequency caused by the inductance L (see L_stray in 6a ) of the primary winding 112-2 and the parasitic capacitance (see Cp in 6a ) of the switching element 126 is determined. Alternatively, the time interval can be preconfigured to correspond to the time duration (time difference) between the points in time (t_Tal) of a certain number, e.g. B. corresponds to two (or more), consecutive zero voltage conditions detected by the zero crossing detection circuit 116-1.

Coming back to the example above, the time interval is preconfigured to correspond to the time difference between the instants (t_Tal) of (precisely) two consecutive zero voltages stands, namely the time interval 2*tV. Then the control circuit 132 increases/decreases the OFF duration by adding/subtracting the time difference between the instants of the (precisely) two consecutive zero voltage states.

In an alternative implementation, control circuit 132 includes a counter circuit that counts the zero voltage states (or valleys) detected by zero crossing detection circuit 116-1 for each cycle and compares the total number of zero voltage states counted to the specified target number of zero voltage states. When the control circuit 132 determines that the target number of zero voltage states has been reached, it controls the switching element 126 to change from the OFF state to the ON state (OFF duration).

In this implementation, the control circuit 132 increases/decreases the OFF duration by varying the target number of zero voltage states. When the control circuit 132 receives a first response signal indicative of a decrease in the output voltage level, the control circuit 132 decreases the OFF duration by decreasing the target number of zero voltage states according to the pre-configured number. When the control circuit 132 receives a first response signal indicative of an increase in the output voltage level, the control circuit 132 increases the OFF duration by increasing the target number of zero voltage states according to the pre-configured number.

Since the time interval (e.g. 2*tV in 6b ) is preconfigured in accordance with the calculated or detected instants of the zero-voltage states, it is consequently ensured that the control circuit 132 turns on the input voltage consistently (only) synchronously at the different instants of the zero-voltage states, even if the OFF-duration compared to the previous cycle according to the first Response signal is varied.

Specifically, the control circuit 132 receives the first response signal from the voltage detector 124 on the secondary side of the transformer circuit 112. The voltage detector 124 detects the level of the output voltage on the secondary side and then forwards a corresponding first response signal via an optocoupler 144 to the primary side of the transformer circuit 112.

The optocoupler 144 serves to maintain the isolation (galvanic) boundary between the primary and secondary sides of the transformer circuit 112. However, this is just one of several alternative implementations for propagating the first response signal across the isolation (galvanic) boundary. The first response signal can also be transmitted via a Y-capacitor, for example.

The first response signal is received by the control circuit 132 on the primary side. In particular, the first response signal is first received by a feedback circuit 142 . The first response signal can have a voltage level between 0V and 5V due to the supply voltage (usually +5V) of the optocoupler 144 . The feedback circuit 142 bypasses a voltage divider to generate an offset signal for the shunt voltage, as will become apparent as the description proceeds. Optionally, the feedback circuit 142 may also amplify and/or filter the first response signal of the optocoupler 144 and then provide the conditioned signal to the control circuit 132, thereby reducing oscillations and unwanted transient signals. This can ensure that the first response signal has a level range that is suitable for detection by the control circuit 132 .

In addition, the feedback circuit 142 is connected to the shunt resistor 138 . With this connection, the feedback circuit 142 provides the (optionally conditioned) version of the first response signal as an offset upon sensing the current flowing through the shunt resistor 128 . In other words, the first response signal shifts the current to be sensed by the control circuit 132, thereby adjusting the ON duration, namely when the control circuit 132 controls the switching element 126 from ON to OFF.

However, the first response signal is slow (e.g., due to the first filter circuit 120 and due to processing in the voltage detector 124) and is unable to reflect fast load transients at the DC output 104. Accordingly, with this first response signal, the control circuit 132 can only imprecisely (ie with a large time delay) determine the point in time at which the input voltage at the primary winding 112-1 is switched on. In addition, the operations within the microcontroller that forms the control circuit 132 are also slower than the switching cycles. As before mentioned above, changing the time at which the input voltage is switched on requires several control cycles.

In order to more accurately and quickly determine when to turn on the input voltage, the primary side control circuit 132 receives a digital fast (second) response signal from the other control circuit 134 on the secondary side. The rapid (second) response signal enables faster adjustment of the control parameters to changing load conditions than with the first response signal alone. Advantageously, the secondary side microcontroller captures output data, such as data indicative of output current and/or data indicative of output voltage. The secondary-side microcontroller can provide a communication interface, e.g. a UART, for transmitting this data to the primary-side controller. The primary-side controller can then use a look-up table to call up the optimum control parameters. A particularly rapid adaptation of the output power can be achieved as a result.

For the sake of clarity, it should be emphasized in this connection that the second response signal, which is transmitted from the other control circuit 134 to the control circuit 132, cannot be regarded as a substitute for the first response signal in the present embodiment. Rather, this embodiment is based on the understanding that the second response signal complements the first response signal in certain situations, namely in the case of fast load transients.

• Die weitere Steuerschaltung 134 ist auf der Sekundärseite der Transformatorschaltung 112 vorgesehen und ist dazu ausgebildet, die Steuerschaltung 132 auf der Primärseite zu unterstützen. Insbesondere unterstützt die Steuerschaltung 134 der Sekundärseite die Steuerschaltung 132 beim Auftreten schneller Lasttransienten (d. h. schnelle Lastschritte oder schneller Lastabwurf). Zu diesem Zweck ist die Steuerschaltung 134 kommunikativ mit der Steuerschaltung 132 gekoppelt und stellt diesem ein zweites Antwortsignal zur Verfügung.

Now to the secondary side control circuit 134 in detail:

• The further control circuit 134 is provided on the secondary side of the transformer circuit 112 and is configured to support the control circuit 132 on the primary side. In particular, the secondary side control circuit 134 assists the control circuit 132 in the event of rapid load transients (ie, rapid load steps or rapid load shedding). For this purpose, the control circuit 134 is communicatively coupled to the control circuit 132 and provides it with a second response signal.

In an example implementation, control circuitry 134 and control circuitry 132 are coupled to enable data communication, optionally bi-directional data communication. In this example implementation, the bi-directional communication may be via a universal asynchronous receiver-transmitter (UART) included in both control circuitry 132 and control circuitry 134 .

In particular, as in 1a As shown, the secondary-side control circuit 134 is connected via an optocoupler 146 to the control circuit 132, which forwards the second response signal in one direction and optionally an associated request in the other direction. In an alternative implementation, the connection can also be implemented via separate Y-capacitors for the receiving and/or transmitting processes or other connection means, as long as the (galvanic) isolation limit is observed.

Specifically, the secondary side control circuit 134 is connected to the DC output 104 and configured to sense a level of the output voltage provided to the DC output 104 by the secondary winding 112 - 2 . The sensed output voltage level corresponds to that at the DC output 104. In addition, the control circuit 134 is connected to the shunt resistor 122 and is configured to sense a level of output current induced in the secondary winding 112-2 and thus also to the DC output 104 is delivered. The sensed level of the output current corresponds to that at the DC output 104.

Accordingly, the secondary side control circuit 134 is configured to detect the level of the output voltage and output current and thus it can detect fast load transients. For example, the control circuitry 134 may be configured to send a second response signal (specifically) when the change in the sensed level of the output voltage and/or output current exceeds (i.e., is greater than) a predetermined threshold. However, the control circuit 134 may be configured not to send the second response signal only under certain conditions.

The control circuit 134 is then configured to transmit the second response signal including the detected output voltage level and/or the detected output current level to the control circuit 132 on the primary side. In other words, the second response signal is a data signal (no control signal) containing at least one of the detected output voltage level and the detected output current level as data. In this regard, the control circuit 132 is able to receive the second response signal, including the detected output voltage level and/or the detected output current level, with a short transmission delay that is significantly shorter than the time delay of the first response signal.

Depending on the second response signal received, including the detected output voltage level and/or output current level, the primary-side control circuit 132 is set up to set the duration of the switch-off of the switching element 126 to a preconfigured point in time for the subsequent cycle. The primary-side control circuit 132 can use a look-up table to determine the optimal operating point of the power supply for the respective output values.

In particular, this point in time is preconfigured in the control circuit 132 to be independent of the duration of the input voltage turn-off during the previous cycle. For example, the preconfigured time may set the duration of turning off the input voltage corresponding to the (absolute) time of a particular (e.g., first/second) zero voltage state (or first/second valley) detected by the zero crossing detection circuit 116-1 .

A fast load transient occurs independent of any cycle boundaries. Thus, the detection process by the control circuit 134 on the secondary side and the transmission to the control circuit 132 on the primary side is not necessarily completed before the control circuit 132 drives the switching element 126 in the current cycle. In other words, even if the fast load transient occurs in the previous cycle, a corresponding response of the primary control circuit 132 in the subsequent cycle cannot be guaranteed. Therefore, the control circuit 132 sets the duration of turning off the input voltage only for the subsequent cycle.

Such an embodiment of the control circuit 132 ensures that the switching element 126 is always actuated after the at least one second response signal has been received, specifically independently of the current cycle. The second response signal affects (only) the OFF duration of the subsequent cycle. The second response signal can thus also be used during the starting operation. In particular, a pre-configured period of time may be used by the control circuit 132 regardless of whether or not the same control circuit 132 controlled the switching element 126 immediately before. Because the microcontroller is slower, multiple switching cycles are always performed with the same valley settings. The switch-on and switch-off times can only be changed slightly within a processor (control) cycle due to the signal V_feedback.

In an example implementation, the time duration in the control circuit 132 for the first of the at least one second response signal (referred to as FR_High) is preconfigured to correspond to a time of a first/second zero voltage state (or a first/second valley). This pre-configured amount of time may then be used by the control circuit 132 in response to receipt of the first of the at least one second response signal (referred to as FR_High) indicative of a fast load transient increase of the connected load.

In another example implementation, the time duration in control circuit 132 for the second of the at least one second response signal (referred to as FR_Low) is preconfigured to correspond to a twentieth/thirtieth zero voltage state (or twentieth/thirtieth valley) point in time. This preconfigured amount of time may then be used by the control circuit 132 in response to receipt of the second of the at least one second response signals (referred to as FR_Tief) indicative of a rapid load transient decrease in the connected load.

In an example implementation, the control circuit 132 determines the count (i.e., not the timing) of the at least one zero voltage condition (or valley) based on a look-up table. In other words, the control circuit 132 stores a look-up table that provides a unique association with various counts. Using this count, the control circuit 132 then determines the preconfigured amount of time to adjust the OFF duration for the next cycle.

For example, the lookup table may provide a (unique) count (not the timing) of the at least one zero voltage state (or valley) for different sets of an input voltage level, an output voltage level and/or an output current level. Thus, the control circuit 132, having sensed the input voltage level through its connection to the electrolytic capacitor and having received the sensed output voltage level and/or sensed output current level in the second response signal, can use the look-up table to determine the appropriate count to calculate the OFF duration for the next set the cycle accordingly.

In a more detailed example, the lookup table may store a (unique) count of the at least one zero voltage state, which is either a tuple (two element set) of an input voltage level and an output current level, or a triple (three element set) of an input voltage level, a Output voltage level and an output current level is assigned.

wobei L die Induktivität des Transformators ist.Referring to the 1b until 1d discusses in more detail how the timing based on the count of valleys to skip affects the transmitted power of the QR flyback converter 100. How from the in 1b As can be seen from the timing diagram shown, the troughs (1st, 2nd, 3rd, ..., nth, (n+1)th trough) occur after the secondary-side transformer current ILsec has reached zero. The switching element 126 is not yet switched on again, as can be seen from the LOW state of the gate signal. The earliest time for the switching element 126 to turn on is the time of the first valley. In 1c and 1d two different times for switching on the switching element 126 are compared. In both cases, the primary peak current î in the transformer is identical and so is the energy E_puls, which is transferred with each pulse. The energy per pulse is calculated from the primary peak current î using the following equation: $${\text{E}}_{\text{Pulse}}=0.5*{\text{L*}\widehat{\text{l}}}^2$$

where L is the inductance of the transformer.

In 1c the fifth valley is selected for switching on the switching element 126 by way of example. By reducing the number of valleys skipped and switching element 126 on at the second valley, within the same total time range shown in FIG 1c and 1d is shown as an example in 1d 13 energy packets transferred to the secondary instead of 7 as in 1c shown. Since the power corresponds to the energy per time, it can be seen that the energy transferred has almost doubled, while the primary peak current î has remained the same. The transmitted power can thus be increased or decreased, even if the slow feedback signal only minimally influences the primary peak current î directly after the load step.

• Unter Bezugnahme auf die 2a und 2b sollen verschiedene Regelungsstrategien des QR-Sperrwandlers 100 gemäß der beispielhaften Ausführungsform näher erläutert werden. Insbesondere wird in den 2a und 2b der Inhalt einer Nachschlagetabelle für Zählwerte des mindestens einen Nullspannungszustands visuell dargestellt.

Now for example control strategies of the QR flyback converter 100:

• Referring to the 2a and 2 B 1, various control strategies of the QR flyback converter 100 according to the exemplary embodiment will be explained in more detail. In particular, in the 2a and 2 B visually representing the contents of a look-up table for counts of the at least one zero voltage condition.

Both figures show associations of a (unique) count with an input voltage level (in VAC) and an output current level (denoted as I_nom).

Let's take in relation to 2a For example, suppose that the control circuit 132 controls the OFF duration on the primary side at a certain time t1, which corresponds to a count value = 10, then the control circuit 132 controls the switching element 126 so that it is synchronous with the time (t_Tal) of the tenth zero-voltage state (or Tals) detected by the zero-crossing detection circuit 116-1 in the previous cycle switches from OFF to ON.

Then the control circuit 134 on the secondary side detects a fast load transient resulting from an increase in the load on the DC output 104 . In particular, the control circuit 134 detects the level of the output voltage via the connection to the DC output 104 and the level of the output current via the connection to the shunt resistor 122 and, based on this, forwards the second response signal to the primary-side control circuit 132, which uses the detected output voltage level and /or receives the sensed output current level contained in the second response signal.

Upon receipt of the second response signal, the primary-side control circuit 132 is configured to set the OFF duration, ie until the input voltage is switched on, to a preconfigured time for the next cycle (not the cycle in which it received the second response signal). , which is independent of the OFF duration of the cycle in which the second response signal is received. In other words, by receiving the response signal, the primary side control circuit 132 breaks the dependency between the OFF duration of one cycle and the OFF duration of the next cycle.

In particular, the control circuit 132 on the primary side refers to a look-up table (corresponding to 2a ) and determines that for the sensed input current level of 230 volts AC and the received 50% increase in output current level, the count = 4, ie the fourth zero voltage condition (or fourth valley) is to be selected. With this count = 4, the control circuit 132 then determines the time (t_Tal) of the fourth zero voltage state detected by the zero crossing detection circuit 116-1 and thereby establishes the OFF duration for the next cycle.

Thus, at time t2, the primary side control circuit 132 controls the switching element 126 such that the switching element 126 switches from OFF to ON synchronously with the timing of the fourth zero voltage state (or valley) of the previous cycle. In this regard, the detection of a 50% increase in output current results in the primary-side control circuit 132, with the detected constant input voltage of 230 VAC, switching the switching element on for an OFF duration corresponding to the time of the tenth zero voltage state (or valley). controls an OFF duration corresponding to the timing of the third zero voltage state (or third valley).

In this way, a fast reaction to an increased load can be ensured in only three consecutive cycles by the secondary-side control circuit 134 detecting the increased load in a first cycle and then sending the second response signal to the primary-side control circuit 132 in the same first or second cycle, which then sets the corresponding OFF duration for the third cycle in the second cycle. It is therefore immediately apparent that the second response signal enables the QR flyback converter 100 to respond quickly to load transients resulting from sudden changes in the load on the output.

Let's take in relation to 2 B For example, assume that at a certain time t1, the control circuit 132 on the primary side controls the OFF duration according to a count value=13. Then, when the control circuit 134 on the secondary side detects an increase in load that causes the output current to increase from 0.5 A to 1.0 A, the control circuit 134 sends a second response signal at the detected output level to the control circuit 132 on the primary side . Upon receipt thereof, the primary-side control circuit 132 adjusts the off-time according to this second response signal, ie, adjusts the off-time according to a count equal to 5 at time t2. Thus, a quick reaction to an increased load can be guaranteed here as well.

• Mit Bezug auf 3a ist eine weitere beispielhafte Ausführungsform des quasiresonanten QR-Sperrwandlers 200 in Form eines schematischen Diagramms dargestellt. Auch dieses schematische Diagramm zeigt die Funktionsschaltungen des QR-Sperrwandlers als abstrakte Blöcke mit dazwischenliegenden Verbindungen, es ist also kein Schaltplan. Diese Darstellungsform wurde gewählt, um die Interaktion zwischen den funktionalen Schaltungen besser sichtbar zu machen.

Now for another exemplary embodiment of a QR flyback converter:

• Regarding 3a 1, another example embodiment of the quasi-resonant QR flyback converter 200 is shown in schematic diagram form. Again, this schematic diagram shows the functional circuits of the QR flyback converter as abstract blocks with interconnections in between, so it's not a schematic. This form of representation was chosen to make the interaction between the functional circuits more visible.

The QR flyback converter 200 of the other exemplary embodiment is very similar to the QR flyback converter 100, and description of the same functional circuits or their interconnection has been omitted for the sake of brevity. In addition, the QR flyback converter 200 differs from the QR flyback converter 100 in that the primary-side control circuit 132 and the secondary-side control circuit transmit not only the second response signal, but also at least one (additional) control signal (designated as FR_High and FR_Low in the figure). exchange.

For the sake of clarity, it should be emphasized that the second response signal is a data signal, as explained in detail above, and the at least one control signal is not a data signal but a control signal. In this regard, it is immediately apparent that the second response signal and the control signal cannot be used for the same purpose.

In particular, the at least one control signal (referred to as FR_High and FR_Low) is transmitted from the secondary-side control circuit 134 to the primary-side control circuit 132 in order to indicate large Respond to load transients prior to (subsequent) transmission of the second response signal. After receiving the at least one control signal, the primary-side control circuit can be made available for receiving the second response signal. The control signal FR_Hoch, FR_Tief is used in particular in the case of large jumps in load and/or load shedding (eg with a difference of more than 40% of the nominal output current I_OFF). The reason for this is that it is even faster than the data transfer from the secondary side to the primary side. The data transmission can take up to 300 µs after the load transient. With this control signal, the number of valleys can only be set as a function of the input voltage U_IN, since no information is yet available about the output voltage U_OUT or the output current I_OUT. The number of valleys is therefore set to the highest possible value or a value lower than the highest possible value, depending on the input voltage U_IN. For example, with an input voltage of 85 VAC, the number of valleys can be 1 or 2, with an input voltage of 120 VAC, the number of valleys can be 2 or 3, with an input voltage of 230 VAC, the number of valleys can be 4 or 5 (see .

After the data signal has been received, the number of valleys is also changed as a function of the output voltage U_OUT and/or the output current I_OUT. In the event of large load jumps or load shedding, a particularly fast reaction and, in addition, a very short settling time can be achieved as a result.

To transmit the at least one control signal, the primary-side control circuit 132 and the secondary-side control circuit 134 are connected to one another via Y-capacitors 250 and 252, one of which forwards a control signal (designated as FR_High) that indicates an increase in the load on the DC output 104, and the other second, a control signal (referred to as FR_Tief) that (also) indicates a reduction in load. The control signals FR_High and FR_Low are used to react even faster to an increase or decrease in load.

Despite being configured with two separate control signals, the control circuits 134 and 132 send/receive the same formatted second response signal, just with different load data. With the separate control signals FR_Hoch and FR_Tief, the control signal 132 on the primary side can (additionally) be indicated as to whether a sudden increase or decrease in load has taken place.

In an exemplary embodiment, the secondary-side control circuit 134 is configured to send the at least one control signal (referred to as FR_High and FR_Low) when a change in the sensed level of the output voltage and/or the sensed level of the output current exceeds a predetermined threshold. In this regard, the transmission of the second response signal can be limited to cases where a fast load transient has been detected.

However, this is only one of many alternative mechanisms for making the primary-side control circuit 132 ready to receive the second response signal from the secondary-side control circuit 134 . In another alternative that differs from this embodiment, the primary-side control circuit 132 requests (repeatedly) the transmission of the second response signal (e.g., at a preconfigured interval) via a bi-directional communication interface between the primary-side control circuit 132 and the secondary-side control circuit 134 is configured.

Upon receipt of the second response signal, the primary-side control circuit 132 performs the same control over the switching element 126 as previously described with respect to the exemplary embodiment. Essential aspects of this mode of operation of the QR flyback converter 200 are based on 3b clarified, presented in the form of a signal graph over time, identifying the relevant signals influencing it.

among themselves are in 3b the switch drain voltage (referred to as U_Drain_Switch) sensed by the control circuit 132 on the primary side, the first response signal received from the control circuit 132 on the primary side (referred to as feedback), a control signal forwarded from the control circuit 134 on the secondary side to the control circuit 132 on the primary side (referred to as FR_High) and the output current (referred to as I_OUT) sensed by the control circuit 134 on the secondary side.

In 3b For example, QR flyback converter 200 is initially open circuit and the drain-to-source voltage across switching element 126 (referred to as U_Drain_Switch) continuously varies between a high and low voltage level. The output voltage and the output current (as I_AUS denoted) are both maintained at a constant level. Typically, this operation is found in a QR flyback converter 200 which has its AC input 102 connected to an external power supply, but which has its DC output 104 not connected to an external load.

Then, the QR flyback converter 200 is connected to a load, and at time t1, the QR flyback converter 200 transitions from a no-load state to a heavy-load state. This is evidenced by the output current ramping from a low to a high value. In other words, the QR flyback converter 200 has to deal with a fast load transient in this example.

The transition to the high-load state primarily affects the output current and not the output voltage, which remains essentially constant. This behavior results from the fact that the QR flyback converter 200 is configured with a sufficiently large electrolytic capacitor 118 that decouples the output current rise from the output voltage at the DC output 104 .

Since the control circuit 134 on the secondary side continuously detects the level of the output voltage and the output current, it also detects an increasing level of the output current at time t1. Incidentally, time t1 is only one of many detection times on which the following explanations should focus.

At time t1, the control circuit 134 determines that the sensed change in the level of the output current exceeds a predetermined threshold. The threshold value can be predetermined in the control circuit 134 in order to be able to detect an increase and/or a decrease in the load condition. At least when the threshold is exceeded, the control circuit 134 is configured to communicate the detected output voltage level and the detected output current level to the primary-side control circuit 132 .

First, the control circuit 134 on the secondary side sends at least one control signal to the control circuit 132 on the primary side. For the increased load condition, the control circuit 134 sends a corresponding control signal labeled FR_High to the control circuit 132. This at least one control signal is transmitted from the control circuit 134 via the Y-capacitor 248 (or 250) to the control circuit 132, which delays the time when to which it can be recognized by the control circuit 132..

At time t2, the control circuit 132 receives the at least one control signal. In this example, the control signal is in the form of a pulse with a high signal level, a steep rising edge and a steep falling edge. This allows the control circuit 132 to easily recognize the time t2. In other words, it can be easily distinguished from the signal transients of the control signal (as shown from time t3 onwards) that result from the control circuit 134 detecting changes in the output voltage during normal operation of the QR flyback converter 200 .

As already mentioned, after receiving the at least one control signal FR_Hoch, FR_Tief, which is used to deal with large load jumps and/or load shedding, the primary-side control circuit 132 receives, for the in 3b illustrated time t6, the second response signal with the detected output voltage level and the detected output current level. It then resets the number of valleys, in this case from 2 to 1, to determine an adequate amount of energy to meet the connected load's needs. Without the control signal FR_Hoch, FR_Tief, a time loss of 100 µs would occur.

At time t6, the control circuit 132 determines a count equal to 1 for turn-on synchronously with the instants (t_valley) of the zero-crossing states (or valleys) in accordance with the received output voltage level and/or output current level contained in the second response signal. In other words, based on the second response signal, the control circuit 132 first determines the corresponding count value and then determines its relative timing so that it can be used as a pre-configured time duration for the next cycle (t_cycle+1).

Due to the significant delay between the time t1 at which the primary-side control circuit 132 is made aware of the increasing load condition and the corresponding configuration of the switching element 126 by appropriately adjusting the off-time at time t3, This other exemplary embodiment of the QR flyback converter 200 (already) begins to operate upon receipt of the at least one control signal.

In other words, in this other example embodiment of the QR flyback converter 200, the control circuit 132 is configured to control the switching element 126 based only on the at least one control signal (namely, between times t1 and t6), while the control circuit 132 at Time t6 is configured to control the switching element 132 in response to the second control signal. As a result, an even faster response and a shorter adjustment time until the steady state is reached can be guaranteed.

Accordingly, at time t2, the control circuit 132 interrupts its processing to extend the OFF duration for a subsequent cycle, i. H. the duration until the input voltage is switched on, to a preconfigured period of time. The preconfigured duration is independent of the OFF duration of the current cycle. In other words, even if the control circuit 132 has not yet started operation, it determines the OFF duration for the subsequent cycle according to a preconfigured value.

In this particular example, the OFF duration is adjusted by the control circuit 132 to correspond to the timing of the second zero voltage condition (or second valley). This can be seen in the figure during the subsequent cycle between times t3 and t4. In this subsequent cycle, the control circuit 132 actually controls the switching element 126 to switch from OFF to ON at a time corresponding to the detected time of the second zero voltage state (or valley).

In addition, the peak current level is defined by a reference voltage value, e.g. B. is set by hardware. The internal comparator of the primary-side control circuit 132 compares the voltage across the shunt 128 with the reference voltage value. If the shunt voltage exceeds the reference voltage value, the input voltage is switched off. The duration of the ON time t_AN thus results from the switch-off condition specified by the comparator.

In addition, a maximum duty cycle can be set. This maximum duty cycle can be viewed as a protective measure. If the controller does not correctly recognize the peak current I_peak, the input voltage will still be switched off after the maximum ON time has elapsed. This means that the device is not damaged even in the event of an error. However, the maximum switch-on time is set in such a way that, under normal conditions, the switch-off criterion I_peak is met first.

Normally the peak current level remains a constant predetermined value. However, the input voltage level can be added as an offset to a shunt voltage. Then the resulting peak voltage in each switching cycle is also dependent on the actually applied input voltage.

The control circuit 132 then controls the switching element 126 to switch from OFF to ON at any instant since each turn-on instant is synchronous. This switching ON occurs at the start after the control circuit 132 has set the OFF duration and determined the peak current level as previously described. After these two steps, it can be ensured that the control circuit 132 can continuously control the switching element 126 with the correct timing.

Further, the control circuit 132 controls the turning off of the input voltage so that the current flowing in the primary winding 112-1 does not exceed the peak current level. As previously mentioned, the detected peak current level, along with the sensed current through shunt resistor 128 shifted by the first response signal, allows control circuit 132 to control the ON duration of switching element 126.

In this example, the control circuit 132 detects a current superimposed with a decreasing offset corresponding to a decreasing response signal. The decreasing displacement voltage at the shunt resulting from V_feedback ensures that the ON time is also increased and thus the transmitted energy per switching cycle increases. As a result, the control circuit 132 controls the switching element 126 to have a longer ON duration in the current cycle than in the previous cycle, i.e. the cycle between times t3 and t4.

Upon turn-off at time t3, the current flowing in the primary winding 112-1 ceases and a limited amount of energy is transferred to the secondary winding 112-2 of the transformer circuit 112. Accordingly, after time t3, an increase in the drain-source voltage across switching element 126 (referred to as U_Drain_Switch) can be observed.

However, since only a finite amount of energy is being transferred, the drain-to-source voltage across switching element 126 (referred to as U_Drain_Switch) subsequently decreases, and first and second instants of a zero-voltage state (or first and second valleys) can be derived from the zero-crossing detection circuit 116-1.

Since, as stated, the turn-off time before the input voltage on the primary winding 112-1 is switched on again was determined by the control circuit 132 in the previous cycle, it is already configured in such a way that the switches are switched on synchronously, i. H. at the time of the second zero voltage state (or second valley).

Thus, at time t4, the control circuit 132 controls the timing of turning on the input voltage synchronously with the timing of the at least one zero voltage (or valley) condition. At time t5, switch 126 is turned off again.

In addition, after point in time t6, the number of skipped valleys is further reduced, so that switching on takes place at the earliest possible point in time, namely at the first valley.

In summary, the QR flyback converter 200 transfers a high amount of energy from the AC input 102 to the DC output 104 due to the longer ON duration caused by the decreasing displacement value on the shunt 128 and the shorter OFF duration. As can be seen from curve C1, at time t3, the number of valleys is abruptly reduced to two. This shows that the at least one second control circuit 134 enables the QR flyback converter to react to fast load transients. In contrast, the at least one second control circuit 134 allows the QR flyback converter 200 to respond quickly to load transients.

Furthermore, in the QR flyback converter 200, the primary-side control circuit 132 and the secondary-side control circuit 134 exchange a data signal indicative of the detected output voltage level and/or the detected output current level, the temperature level of individual secondary-side circuits, e.g. the electrolytic capacitor 118, and/or control information such as the threshold values to be used by the secondary side control circuit 134.

In this regard, the control circuit 132 is able to receive the data signal including the detected output voltage level and/or the detected output current level with a short transmission delay that is significantly shorter than the time delay of the first response signal.

In particular, the control circuit 134 is connected via an optocoupler 146 to the control circuit 132, which forwards the data signal in one direction and optionally a corresponding request in the other direction. In an alternative implementation, the connection can also be realized via separate Y-capacitors for the receiving and/or transmitting processes or in some other way, as long as the (galvanic) isolation limit is observed.

With the data signal containing the detected output voltage level and/or the detected output current level, the control circuit 132 is able to more precisely adjust the turn-off duration for each cycle, as it obtains the exact levels of the load transients with a response time that depends only on the transmission delay depends. Again, the control cycle can set the off-time before the input voltage turns on, regardless of the off-time of the cycle, to a pre-configured time interval that matches the received data signal.

3c 12 shows an example low load condition of QR flyback converter 200.

In 3c At first, QR flyback converter 200 is in steady state operation, and the drain-to-source voltage across switching element 126 (called U_Drain_Switch) continuously oscillates between a high and a low voltage level. With this oscillating drain-source voltage, the QR flyback converter 100 generates a sufficiently high output current (referred to as I_OUT) to be required by a load connected to the DC output 104 .

In this example, QR flyback converter 200 initially operates in a high load condition, but then transitions to operation in a low load condition, as will become clear below. This is reflected in the output current dropping from a high current level to a low current level. In other words, the QR flyback converter has to cope with a fast load transient in this example as well.

The transition to the low-load state primarily affects the output current, which can also affect the output voltage.

Since the control circuit 134 on the secondary side continuously detects the level of the output voltage and/or the output current, it also detects a falling level of the output current at time t1. Incidentally, this point in time t1 is only one of many recording points in time on which the following explanations focus.

Then the control circuit 134 determines that the change in the level of the output current determined at time t1 exceeds a predetermined threshold value. As already mentioned, the threshold value can be predetermined in the control circuit 134 in order to be able to determine an increase and/or a decrease in the load condition.

In response to this determination, the control circuit 134 on the secondary side sends at least a second response signal to the control circuit 132 on the primary side. For the reduced load condition, the control circuit 134 sends a corresponding signal labeled FR_Tief to the control circuit 132. This at least one second response signal is transmitted from the control circuit 134 to the control circuit 132 via the Y capacitor 148.

At time t2, the control circuit 132 receives the at least one second response signal. In this example, the second response signal has the form of a pulse with a high signal level, a steep rising edge and a steep falling edge. This allows the control circuit 132 to easily recognize the time t2. It can be easily distinguished from the signal transients (noise) of the second response signal before and after time t2. These signal transients result from the continuous operation of the switching element 126, but do not affect the function of the QR flyback converter 200.

In response to receiving the at least one second response signal at time t2, the control circuit 132 suspends its processing to extend the off duration for a subsequent cycle, i. H. the duration of the switch-on of the input voltage, to a different pre-configured period of time. The pre-configured duration is independent of the switch-off duration of the current cycle. In other words, even if the control circuit 132 controls the OFF duration of the current cycle in increments or decrements of a preconfigured time interval, e.g. B. 2 * tV according to the first response signal transmitted from the voltage detector 124, it determines the OFF duration for the subsequent cycle as a pre-configured value.

In this particular example, the OFF duration is adjusted by the control circuit 132 to correspond to the time of the twentieth of the detected zero voltage conditions (or twentieth valley). This can be seen in the figure during the subsequent cycle between times t3 and t4. In this subsequent cycle, the control circuit 132 actually controls the switching element 126 to switch from OFF to ON at a time corresponding to the twentieth detected time of the twentieth zero voltage state (or twentieth valley).

According to the present invention, the peak current signal I_peak is only affected by the offset caused by the feedback signal. This displacement is small at high loads, so that as much energy as possible can be transferred. After load shedding, the feedback signal changes slowly and without the present invention, too much energy would be transferred for many switching cycles until the peak current is reduced to the point where the output voltage no longer increases. According to the invention, the second response signal (FR_Tief) provides the control circuit 132 with the information that the output power has been significantly reduced and therefore less energy has to be transmitted. The control circuit 132 responds as quickly as possible by increasing the duration of the OFF time. In this way, the transmitted energy can be reduced immediately while the charged energy remains the same.

Then, the control circuit 132 controls the switching element 126 to turn from OFF to ON at a timing that is a variation of the OFF duration of the previous cycle. The preset length of time only takes effect in the following cycle.

Thus, the control circuit 132 schedules the turn-on time synchronously with the time at which at least one zero voltage condition was detected in the previous cycle. In particular, the control circuit 132 adjusts the OFF-duration to turn-on by varying the OFF-duration of the previous cycle in increments or decrements of the preconfigured time interval 2*tV according to the first voltage detector 126 response signal.

Further, the control circuit 132 controls the turning off of the input voltage so that the switch 126 is turned off when the current flowing in the primary winding 112-1 reaches the peak current level. Reaching the peak current level is the turn-off condition. In particular, as previously mentioned, the predetermined peak current level, along with the sensed current through the shunt resistor 128 shifted by the first response signal, allows the control circuit 132 to control the ON duration of the switching element 126.

In this example, the control circuit 132 detects a current superimposed with an increasing offset corresponding to an increased first response signal. The increasing offset level results in an increase in the input voltage at the I_peak terminal of the control circuit 132 and hence a shorter ON time of the switch 126. Thus, a higher offset value results in a lower peak current through the primary winding 112-1.

Upon turn-off at time t3, the current flowing through the primary winding 112-1 ceases and a limited amount of energy is transferred to the secondary winding 112-2 of the transformer circuit 112.

In addition, the control circuit 132 has transitioned to turning on the switch 126 only at the twentieth valley, such that a first through twentieth instant of a zero voltage condition (or a first through the twentieth valley) is detected by the zero-crossing detection circuit 116-1 before turn-on occurs .

Since, as stated, the OFF duration before the input voltage at the primary winding 112-1 is switched on again was set by the control circuit 132 in the previous cycle, it is already configured in such a way that the switching element 126 is synchronous, i. H. turns ON at the time of the twentieth zero voltage state (or twentieth valley).

Thus, at time t4, the control circuit 132 controls the timing of turning on the input voltage synchronously with the timing of the at least one zero voltage (or valley) condition.

In summary, QR flyback converter 200 transfers a small amount of energy from AC input 102 to DC output 104 due to the shorter ON duration (caused by the first response signal) and the longer OFF duration (caused by control circuit 132). Thus, the at least one second control circuit allows the QR flyback converter 200 to respond quickly to load transients.

3d until 3f illustrate the increase in reaction speed that can be achieved by the control method according to the invention in response to a load transient, for example a load increase. Each figure shows a schematic timing diagram of the output voltage VOUT, the feedback voltage V_feedback, the output current IOUT, the maximum primary peak current î_L_max, the number of valleys, the transmitted power P_ transmitted and the second response signal FR_high.

As in 3d As can be seen, relying only on the feedback voltage, without using the second response signal FR_High or the look-up table to determine the valley number, the transmitted power responds quite slowly to the load change. When using the second response signal FR_Hoch (see 3e ) the on-time is first set to the minimum valley value that matches the measured input voltage V_IN. The transmitted power P_transferred then reached after a compared to 3d the final value in a shorter time. When setting the valley value using the lookup table as in 3f shown, the transmitted power P_transmitted reaches the final value even faster, but the increase right after the load transient occurs is rather slow. the Fastest adaptation can therefore be achieved by the combined use of the second response signal FR_High and the look-up table to determine the number of valleys, as in 3g shown.

Based on the in 4a until 4f and 5a until 5e In the signal diagrams shown, various scenarios for a sudden increase and decrease in load are explained below. The figures show the load increase and the load shedding under different conditions, such as e.g. B. Different input voltages (120 VAC, 230 VAC) and load changes (greater than 40% of rated current, less than 40% of rated current and 100% of rated current) to illustrate the effect of the first and second response signals. The figures show at what point in time each signal affects the number of valleys.

First, in 4a until 4f the scenario of an abrupt increase in load is presented.

4a shows the signal diagram for an input voltage U_IN=230 VAC and a load increase from I_OFF =0.6 A to I_OFF =1.1 A (load increase < 40% I_nominal). The output voltage is U_ AUS =24 VAC.

As can be seen from curve C1, the number of valleys initially starts at 15. At the time indicated by arrow 400, the data signal is received and the number of valleys is reduced to five. Since the load rise is less than 40% of the rated current (1.3A in this example), there is no second response signal FR_High and the valley value is calculated based on the data signal, i. H. the lookup table. The reaction to the increase in load therefore only takes place after 450 µs. For such a small change in load, however, this period of time is fast enough.

4b shows the signal diagram for an input voltage U_IN=230 VAC and a load increase from 0.2 A to 0.9 A (load increase > 40% I_nominal), with I_nominal = 1.3 A. The output voltage is U_OUT=24 VDC.

In this case, the second response signal FR_High and the data signal, i. H. the look-up table, as the second response signal. The second response signal FR_High reduces the number of valleys from 20 to 4 (see arrow 402) as the maximum number of valleys at the rated load point depending on the input voltage (230 VAC). This achieves a quick reaction to the increase in load. Since the second response signal FR_High only indicates a load increase of more than 40% of the nominal current, the primary control circuit has no information about the load point it is in after the load increase. The first feedback signal (curve C3) is too slow for this information. After another 300 µs (see arrow 404) the primary control circuit reduces the number of valleys to 7 based on the received data (output current, output voltage) and using the look-up table. This ensures a fast settling time since the optimum number of valleys is already set can be and no major readjustments for the first response signal feedback are required.

4c shows the signal diagram for an input voltage U_IN=230 VAC and a load increase from 0.1 A to 1.3 A (maximum load increase). The output voltage is U_ AUS =24 VDC.

In this case, the second response signal FR_High and the data signal (the look-up table) are used. The response to the load increase occurs after 150 µs, with the number of valleys being reduced from 20 to 4. The primary control circuit does not need to adjust the number of valleys upon receipt of the data signal since the correct number of valleys for that load point (rated load) has already been chosen by the FR signal.

Furthermore shows 4d the signal diagram for an input voltage U_IN=120 VAC and a load increase from 0.6 A to 1.1 A (load increase < 40% I_nominal). The output voltage is U_ AUS =24 VDC.

Since the load increase is less than 40% of the rated current (1.3A), only the data signal is transmitted as the second response signal and the look-up table is used. Based on the data received with the second response signal, the number of valleys is suddenly reduced from 11 to 4 (see arrow 406). After another 200 µs (arrow 408), the number of valleys is reduced to 3 because the feedback signal has fallen below a threshold. The final reaction to the increase in load therefore only occurs after 450 µs. However, this period of time is short enough for the comparatively small increase in load.

4e shows the signal diagram for an input voltage U_IN=120 VAC and a load increase from 0.2 A to 0.9 A (load increase > 40% I_nominal), with I_nominal = 1.3 A. The output voltage is U_OUT =24 VDC.

In this case, the second response signal FR_High and the data signal (the look-up table) are used. The reaction to the increase in load takes place after 150 µs (see arrow 410). With an input voltage of 120 VAC, the second response signal FR_High sets the number of valleys to 2, which is the maximum number of valleys at the rated load point as a function of the input voltage. In this way, a quick reaction to the increase in load can be achieved. Since the second response signal FR_High only indicates a load increase of more than 40% of the nominal current, the primary control circuit has no information about the load point it is in after the load increase. The first feedback signal (curve C3) is too slow for this information. After a further 300 µs (see arrow 412) the primary control circuit reduces the number of valleys to 5 based on the received data (output current, output voltage) and using the look-up table. This ensures a fast transient time since the optimum number of valleys is already set can be and no major readjustments for the first response signal feedback are required.

4f finally shows the signal diagram for an input voltage U_IN=120 VAC and a load increase from 0.1 A to 1.3 A (maximum load increase). The output voltage is U_ AUS =24 VDC.

In this case, the second response signal FR_High and the data signal (the look-up table) are used. The reaction to the increase in load takes place after 100 µs to 150 µs (see arrow 414). With an input voltage of 120 VAC, the second response signal FR_High sets the number of valleys to 2, which is the maximum number of valleys at the rated load point as a function of the input voltage. This achieves a quick reaction to the increase in load. After another 300 µs (see arrow 416), based on the received data (output current, output voltage) and using the look-up table, the primary control circuit reduces the number of valleys to 1.

Based on the in 5a until 5e In the signal diagrams shown, various scenarios for an abrupt load shedding will now be explained.

5a shows the signal diagram for an input voltage U_IN=230 VAC and a load drop from I_OFF =1.1 A to I_OFF =0.6 A (load drop < 40% I_nominal). The output voltage is U_ AUS =24 VDC.

Since the load drop is less than 40% of the rated current (1.3A), only the data signal is transmitted as the second response signal and the lookup table is used. The reaction to the drop in load only takes place after 450 μs (see arrow 500) if the number of valleys is increased from 5 to 15 after the data signal has been received and processed. However, this timing is fast enough because the load drop is small.

5b shows the signal diagram for an input voltage U_IN=230 VAC and a load reduction from I_OFF =1.3 A to I_OFF =0.5 A (load reduction > 40% I_nominal). The output voltage is U_AUS =24 VDC.

In this case, the second response signal FR_Tief and the data signal (the look-up table) are used. The reaction to the drop in load takes place after 150 μs (see arrow 502). After receiving the FR_Low signal, the primary control circuit increases the number of valleys from 4 to 20 (maximum number of valleys) when the input voltage is 230VAC, and fast response to load shedding can be achieved. However, since the FR_Tief signal only indicates a load shedding of more than 40% of the nominal current (here: 1.3 A), the primary control circuit has no information about the load point it is in after the load shedding. The first response signal is too slow for this information. After another 300 µs (see arrow 504), the primary control circuit reduces the number of valleys to 15 based on the received data (output current, output voltage) and its look-up table no major readjustment for the first response signal feedback is required.

5c shows the signal diagram for an input voltage U_IN=230 VAC and a load reduction from I_OFF =1.3 A to I_OFF =0.1 A (load reduction > 40% I_nominal). The output voltage is U_AUS =24 VDC.

In this case, the second response signal FR_Tief and the data signal (the look-up table) are used. The reaction to the drop in load takes place after 150 μs (see arrow 506). Upon receiving the FR_Low signal, the primary control circuit adjusts the number of valleys from 4 to 20 (see arrow 506). After another 600 µs (see arrow 508) the maximum threshold of the feedback signal is triggered and the primary control circuit turns off the switch completely because there is too much energy in the system.

5d shows the signal diagram for an input voltage U_IN=120 VAC and a load reduction from I_OFF =1.1 A to I_OFF =0.6 A (load reduction < 40% I_nominal). The output voltage is U_AUS =24 VDC.

Since the load drain is less than 40% of the rated current (1.3A), only the data signal is transmitted as the second response signal and the look-up table is used. No FR_Tief signal is used. The reaction to the drop in load only takes place after 450 μs (see arrow 510) if the number of valleys is increased from 3 to 13 after the data signal has been received and processed. However, this timing is fast enough because the load drop is small.

5e shows the signal diagram for an input voltage U_IN=120 VAC and a load decrease from I_AUS =1.3 A to I_AUS =0.1 A (maximum load decrease). The output voltage is U_AUS=24 VDC.

In this case, the second response signal FR_Tief and the data signal (the look-up table) are used. The reaction to the load drop takes place after 150 µs (see arrow 512). Upon receipt of the FR_Low signal, the primary control circuit adjusts the number of valleys from 2 to 20. After another 600 µs (see arrow 514) the maximum threshold of the feedback signal is triggered and the primary control circuit turns off the switch completely because there is too much energy in the system.

Reference List

100,200

Quasi-resonant (QR) flyback converter

102

AC input

104

DC output

106

EMI filter circuit

108

rectifier circuit

110

electrolytic capacitor

112

transformer circuit

112-1

primary winding

112-2

secondary winding

112-3

auxiliary winding

114

rectifier circuit

116-1

Null detection unit

116-2

overvoltage protection circuit

118

electrolytic capacitor

120

filter circuit

122

shunt resistance

124

voltage detector

126

switching element

128

shunt resistance

130

damping circuit

132

control circuit

134

control circuit

136

Linear Voltage Regulator

138

Linear Voltage Regulator

140

gate driver circuit

142

feedback circuit

144

optocoupler

146

optocoupler

248

Y capacitor

250

Y capacitor

FR_High

Control signal indicating an increase in load

FR_low

Control signal indicating a decrease in load

T_Valley

Time of a zero voltage condition (valley)

2*tv

Time interval between two consecutive valleys

400-416

Arrows indicating points on a time chart

500-514

Arrows indicating points on a time chart

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• US 2010/0219802 A1 [0002]

Claims (15)

A quasi-resonant (QR) flyback converter (100) having an AC input (102) and a DC output (104), comprising: a transformer circuit (112) having a primary winding (112-1) configured to receive an input voltage from the AC input (102), a secondary winding (112-2) configured to provide an output voltage to the DC output (104), and an auxiliary winding (112-3) connected to a primary side zero crossing detection circuit (116- 1) is connected to at least one zero voltage state in the auxiliary winding (112-3) and its time (t_Tal - 6b ) capture; and a primary-side control circuit (132) configured to control a switching element (126) such that the switching element (126) in a current cycle (t_cycle - 6b ) the input voltage at the primary winding (112-1) switches ON and OFF sequentially, where: - a time (t0) of switching on the input voltage is the time at which the energy transfer into the transformer for the current cycle (t_cycle - 6b ) begins, - a point in time (t1 - 6b ) for switching off the input voltage is set so that a current flowing in the primary winding (112-1) does not exceed a peak current level, - a point in time (t5 - 6b ) to switch the input voltage on again for the next cycle (t_cycle +1 - 6b ) synchronous with the time (t Tal - 6b ) of the detected at least one zero-voltage state is set, and in addition - the OFF duration (t_OFF - 6b ) until the input voltage is switched on again by varying the OFF duration of the cycle (t_cycle - 6b ) in increments/decrements of a preconfigured time interval (2*tV - 6b ) is adjusted according to a first response signal transmitted from a secondary side voltage detector (124); further comprising: a secondary-side control circuit (134) configured to sense the level of the output voltage and/or the level of an output current supplied to the DC output (104), and configured to respectively read the sensed output voltage level and/or or transmitting and/or indicating the sensed output current level in a second response signal to the primary-side control circuit (132); and wherein in the event that the primary-side control circuit (132) receives the second response signal from the secondary-side control circuit (134), this is configured so that for a later cycle the OFF duration (t_OFF - 6b ) until the input voltage is switched on again, regardless of the OFF duration of the current cycle (t_cycle - 6b ) to a preconfigured time period (t4; t5 - 6b ) in accordance with the output voltage level and/or the output current level and/or the input voltage level received in the second response signal, respectively. QR flyback converter claim 1 , further comprising a primary-side rectifier circuit (108) connected between the AC input (102) and the primary winding (112-1), and a further secondary-side rectifier circuit (114) connected between the secondary winding (112-2) and the DC output ( 104) and/or a power factor correction stage (PFC). QR flyback converter claim 1 or 2 , further comprising a primary side electrolytic capacitor (110) configured to buffer the input voltage and a further secondary side electrolytic capacitor (118) configured to buffer the output voltage. QR flyback converter according to one of Claims 1 until 3 , wherein the second response signal is transmitted from the secondary-side control circuit (134) to the primary-side control circuit (132) via an optocoupler (146) or a Y-capacitor (146; 248). QR flyback converter according to one of Claims 1 until 4 , wherein the primary side control circuit (132) is configured to control the peak current level for the subsequent cycle (t_cycle+1 - 6b ) in accordance with the level of current cycle (t_cycle - 6b ) received input voltage. QR flyback converter according to one of Claims 1 until 5 , wherein the primary-side control circuit (132) is configured to adjust the timing (t5) for the synchronous turn-on of the input voltage in one cycle so that it corresponds to: the point in time (t_valley - 6b ) one of the at least one in the current cycle (t_cycle - 6b ) zero voltage conditions detected by the zero crossing detection circuit (116-1). QR flyback converter according to one of Claims 1 until 6 , where: the preconfigured time interval (2*tV - 6b ) in the primary-side control circuit (132) corresponding to a difference in time (t Tal - 6b ) is configured between two subsequently detected zero voltage conditions, and/or the pre-configured time period (t4; t5 - 6b ) in the primary-side control circuit (132) according to the relative point in time (t_Tal - 6b ) of a count of the at least one zero voltage condition within the previous cycle. QR flyback converter claim 7 wherein the count of the at least one zero voltage state is determined based on a lookup table, and optionally the lookup table storing a count of the at least one zero voltage state for different sets of an input voltage level, an output voltage level, and/or an output current level. QR flyback converter claim 8 wherein the lookup table stores a count of the at least one detected zero voltage condition associated with a tuple of an input voltage level and an output current level, or a triple of an input voltage level, an output voltage level and an output current level. QR flyback converter according to one of Claims 1 until 9 , wherein the primary-side control circuit (132) and optionally the secondary-side control circuit (134) is a microcontroller. QR flyback converter according to one of Claims 1 until 10 , wherein the primary-side control circuit (132) is configured such that, in the event of receipt of the at least one second response signal, it interrupts the control process for setting the OFF duration for a subsequent cycle. QR flyback converter according to one of Claims 1 until 11 , wherein the primary-side control circuit (132) and the secondary-side control circuit (134) are designed for bidirectional communication. QR flyback converter according to one of Claims 1 until 12 wherein the primary-side control circuit (132) is configured to transmit at least one control signal to the secondary-side control circuit (134) in addition to transmitting the second response signal, the second response signal being transmitted at regular time intervals. QR flyback converter according to one of Claims 1 until 12 , wherein the secondary-side control circuit (134) is further configured to transmit at least one control signal to the primary-side control circuit (132) in addition to transmitting the second response signal, and optionally, the secondary-side control circuit (134) is configured to transmit the transmits at least one control signal continuously or in the event that a change in the detected level of the output voltage and/or the detected level of the output current exceeds a predetermined threshold value. QR flyback converter Claim 13 , wherein the at least one other control signal is transmitted from the secondary-side control circuit (134) to the primary-side control circuit (132) via an optocoupler or a Y-capacitor (248; 250).

Images