DE102020116671A1 - Wafer bonding - Google Patents

Abstract

Method for connecting a first wafer element (1) to a second wafer element (2), the first wafer element (1) having a plurality of first component regions (3) with a respective electronic structure (5) and a respective contact area (6), wherein the second wafer element (2) has a plurality of second component areas (4) with a respective electronic structure (5) and a respective contact area (6), the wafer elements (1, 2) being connected to one another in that the contact areas (6) of the two wafer elements (1,2) are connected to one another in pairs via a large number of nanowires (7).

Description

The invention relates to what is known as wafer bonding or wafer-to-wafer bonding, that is to say the connection of two wafers, in particular for the production of semiconductor components. In particular, the invention relates to a method for connecting a first wafer element to a second wafer element, an arrangement obtained therewith, a method for producing a plurality of imaging modules and an imaging module obtained therewith.

Video cameras, still cameras, cell phones, and many other electronic devices can take photos and / or videos. Such devices have an image sensor for this purpose. With the ever smaller image sensors, however, only an ever smaller amount of light can be recorded. The electronic signals obtained are correspondingly weak. Reinforcement is therefore required. Due to the weakness of the signals, this must be done in close proximity to the image sensor. Therefore, imaging modules are known which include an image sensor and an amplifier. In order to be able to individually amplify signals from the individual pixels of the image sensor, the amplifier has a correspondingly large number of amplifying elements. These are connected to the image sensor via a correspondingly large number of individual connections. With a resolution of the image sensor in the order of magnitude of a megapixel, the number of pixels, the reinforcement elements and the individual connections are each in the order of magnitude of a million. In order to produce such imaging modules inexpensively, it is known to connect wafers with a multiplicity of image sensors and wafers with a multiplicity of amplifiers to one another. The interconnected wafers are then diced so that the individual imaging modules are obtained. With this so-called wafer bonding or wafer-to-wafer bonding (“W2W bonding” for short), a large number of imaging modules can be produced at the same time. Wafer-to-wafer bonding is also used for other applications.

Known processes for wafer-to-wafer bonding are very complex and expensive. In addition, the known methods have the disadvantage that temperatures occur which can damage electronic structures on the wafers. The time required for known methods is also great. Furthermore, the known methods are not suitable for small structures. The electrical contacts to be connected must be of sufficient size and spacing from one another. As the structures continue to shrink, so do the demands on the electrical and / or thermal conductivity of the connections between the contact surfaces. With these connections, weak electrical signals must be reliably transmitted in quick succession in the smallest of spaces, without mutual interference between neighboring connections. Corresponding problems also exist in the prior art in other applications.

The object of the present invention is to present a method for connecting a first wafer element to a second wafer element based on the described prior art, which is particularly simple, fast and gentle and with which particularly small and closely spaced contact areas are particularly good electrically and / or thermally can be conductively connected to each other. In addition, a corresponding method for producing a plurality of imaging modules is to be presented. In addition, an arrangement and an imaging module will be presented that were obtained with the respective method.

These objects are achieved with the method, the arrangement and the imaging module according to the independent claims. Further advantageous refinements are given in the dependent claims. The features presented in the claims and in the description can be combined with one another in any technologically sensible way.

According to the invention, a method for connecting a first wafer element to a second wafer element is presented. The first wafer element has a plurality of first component regions with a respective electronic structure and a respective contact surface. The second wafer element has a plurality of second component regions with a respective electronic structure and a respective contact area. The wafer elements are connected to one another in that the contact surfaces of the two wafer elements are connected to one another in pairs via a large number of nanowires.

With the method described, a plurality of components can be produced at the same time. The components each have a first component area and a second component area. The first component regions are provided on a first wafer element and the second component regions are provided on a second wafer element. The manufacture of wafer elements with a plurality of, in particular, identical component areas is possible in a comparatively simple manner. The first component areas and the second component areas are connected to one another by connecting the first wafer element and the second wafer element to one another. Then the components can be obtained by dividing the interconnected wafer elements.

At least 100 components are preferably produced simultaneously with the method, in particular at least 500. For example, 5000 to 20,000 components can be produced simultaneously. Simultaneously means that the connection between the respective first component area and the respective second component area is formed at the same time.

The term wafer element is a generic term. On the one hand, a wafer element can be a one-piece wafer. On the other hand, a wafer element can be composed of several wafer pieces.

A one-piece wafer is also commonly referred to simply as a wafer. This is to be understood as a disk that serves as the starting point for the manufacture of electronic components. Wafers are used in particular in the manufacture of integrated circuits such as computer chips. The first wafer element and / or the second wafer element can be cut as a one-piece wafer, for example from a grown semiconductor blank. A wafer can in particular have a round or rectangular cross section. A damaged wafer can also be used as the first wafer element and / or as the second wafer element, provided parts of the wafer are undamaged. A damaged wafer can have any cross-section.

Instead of a one-piece wafer, it is also possible to use a wafer element which is composed of several wafer pieces. This makes sense because the manufacture of electronic components usually results in a certain amount of unusable components being rejected. If a large number of component areas are produced on a wafer, usually only a part of the component areas can be used. If, in the method described, a usable first component area is connected to a defective second component area, the component obtained is defective overall and must be sorted out. The corresponding component can only be used if both the first component area and the second component area are free of defects. The reject rate can be reduced with wafer elements that are composed of several wafer pieces. In this way, the first component areas and / or the second component areas can each be checked individually before being connected. One or more wafers can then be divided into wafer pieces in such a way that a wafer element can be formed from them, with which a particularly large number of usable components can be obtained. In this way, first component areas that can be used in a targeted manner can be combined with second component areas that can be used.

The wafer pieces can be assembled by attaching the wafer pieces to a substrate, for example with an adhesive. In this case, the substrate is located on the side of the wafer pieces which is opposite the side with the contact surfaces. For example, 2 to 10 wafer pieces can be put together. Correspondingly large wafer pieces are easy to handle. It is preferred that each wafer piece has a plurality of the respective component areas. It is preferred that a single component area forms a wafer piece. It is particularly preferred that all first component areas are combined as respective individual wafer pieces to form the first wafer element and / or that all second component areas are combined as respective individual wafer pieces to form the second wafer element.

The method described can be carried out in the following three ways. In a first embodiment, both wafer elements are designed as a respective one-piece wafer. This is particularly easy, but leads to a correspondingly high reject rate. In a second embodiment, the first wafer element is designed as a one-piece wafer and the second wafer element is composed of a plurality of wafer pieces. The scrap rate is reduced by the additional effort for the targeted assembly of the second wafer element. In a third embodiment, the two wafer elements are each composed of several wafer pieces. Due to the additional effort for the targeted assembly of the two wafer elements, the reject rate is reduced even further than in the second embodiment.

The first wafer element is preferably formed from a semiconductor material and / or the second wafer element is formed from a semiconductor material. The first wafer element and / or the second wafer element preferably have a circular cross section. The first wafer element and / or the second wafer element preferably have a diameter in the range from 50 to 300 mm [millimeters]. 8-inch wafers are particularly preferably used as the first wafer element and / or as the second wafer element. The two wafer elements are preferably, but not necessarily, the same size. Instead of circular disk-shaped wafer elements, wafer elements with a different shape can also be used. The first wafer element and / or the second wafer element can thus be rectangular, in particular square.

The first wafer element has a plurality of first component regions. The second wafer element has a plurality of second component regions. A component area is to be understood as such an area of the respective wafer element that is intended to become part of a manufactured component. In this way, components can be obtained from the interconnected wafer elements which each have one of the first component areas and one of the second component areas.

The first component areas and the second component areas preferably serve a respective function. These functions complement each other in the manufactured component. In order to fulfill the respective function, the component areas each have an electronic structure. In particular, any structure that is obtained by a lithographic process and that contains at least one electrically conductive section is to be understood as an electronic structure. The electronic structures preferably have at least one respective electronic element. In particular, a transistor, a resistor, an inductor and a capacitor come into consideration as the electronic element. The electronic structures are preferably a respective electronic circuit, in particular a respective integrated circuit. The electronic structures are preferably semiconductor structures.

The electronic structures are preferably produced on the respective wafer element using lithographic methods. As a result, a large number of electronic structures on the order of micrometers or even sub-micrometers can easily be produced on a wafer element. The first wafer element preferably has as many first component regions as the second wafer element has second component regions. Exactly one of the second component areas is then assigned to each first component area, and vice versa. However, it is also possible for the number of the first component areas and the second component areas to be different. If, for example, part of the first wafer element is damaged, it can be separated from the remaining part of the first wafer element. The remaining part of the first wafer element can then be connected to an undamaged second wafer element, with part of the second component areas of the second wafer element remaining unused or being able to be used in some other way.

With the method, the wafer elements can be connected to one another in such a way that the electronic structures of the first component areas are connected to the electronic structures of the second component areas. For this purpose, the component areas each have at least one contact surface. The contact areas can be obtained by lithographic methods. It is not necessary for the contact areas to be physically distinguishable from other parts of the electronic structure. Rather, the contact surfaces are defined in that the connection is formed between them. The contact surfaces can therefore also only be recognized as such when the connection is formed. For example, a contact surface can be an end of an electrical line that was produced lithographically on the respective wafer element. The end of the line can be enlarged so that a particularly large area serves as a contact area. In particular, such a contact surface can also be referred to as a pad.

It is sufficient for each component area to have one contact surface. However, it is preferred that the first wafer element has a plurality of first component areas with a respective electronic structure and a respective plurality of contact areas and that the second wafer element has a plurality of second component areas with a respective electronic structure and a respective plurality of contact areas. The first component areas preferably each have as many contact surfaces as the second component areas each have. Each contact area of the first component area is then assigned exactly one contact area of the associated second component area, and vice versa. If the first component areas and the second component areas have a different number of contact areas, individual contact areas can remain unused.

The wafer elements are connected to one another in that the contact surfaces are connected to one another in pairs via a large number of nanowires. Pairs each having a contact surface of a first component region and a contact surface of a second component region are therefore connected to one another. This creates a plurality of nanowire connections, in each of which a contact area of a first component area and a contact area of a second component area are involved.

A nanowire is understood here to mean any material body that has a wire-like shape and a size in the range from a few nanometers to a few micrometers. A nanowire can, for example, have a circular, oval or polygonal base. In particular, a nanowire can have a hexagonal base area.

The nanowires used preferably have a length in the range from 100 nm [nanometers] to 100 μm [micrometers], in particular in the range from 1 μm to 40 μm. Furthermore, the nanowires preferably have a diameter of Range from 10 nm to 10 µm, in particular in the range from 30 nm to 2 µm. The term diameter refers to a circular base area, with a comparable definition of a diameter being used for a base area that differs therefrom. It is particularly preferred that all nano-wires used have the same length and the same diameter.

For a connection that is particularly good electrically and / or thermally conductive, it is preferred that the nanowires are formed from an electrically and / or thermally conductive material. The use of copper, silver, nickel and gold is particularly preferred here. The contact surfaces are also preferably formed from an electrically and / or thermally conductive material, in particular with copper, silver, nickel or gold. The contact surfaces and the nanowires are particularly preferably formed from the same material. This makes the connection particularly stable.

An electrical and / or thermal conductivity in the sense used here is present in particular with metals such as copper, which are generally referred to as “electrically conductive” or equivalent as “electrically conductive” or “thermally conductive” or “thermally conductive”. In particular, materials that are generally considered to be electrically or thermally insulating should not be viewed here as being electrically or thermally conductive.

After the connection has been established, the respective ends of the nanowires are connected to the two contact surfaces involved in the connection. The nanowires are therefore perpendicular to the two contact surfaces involved in the connection. This is not to be understood as meaning that the two contact surfaces are necessarily exactly parallel to one another and the nanowires form straight lines between the contact surfaces. Rather, this is to be understood as a distinction from the fact that nanowires are placed on the contact surfaces with any orientation. In the method described, the nanowires are instead provided on the contact surfaces in such a way that the nanowires can be referred to as a lawn on the surface of the respective wafer element.

A large number of nanowires are involved in every connection between the contact surfaces. The connection is therefore formed over a particularly large surface. The connection is therefore particularly mechanically stable and electrically and / or thermally conductive. The nanowire connection enables electrical signals to be transmitted between the component areas in a particularly reliable and loss-free manner. Heat can also be derived from one of the component areas. In addition, apart from the nanowire connection, no further connection is required in order to mechanically connect the component areas to one another. Nevertheless, it is also possible to mechanically connect the wafer elements, for example with an adhesive. In this way, spaces between the nanowires can be filled in order to mechanically strengthen the connection.

The connection is formed by bringing nanowires into contact with one another or of nanowires with a contact surface. This can be done almost instantaneously. The procedure described is correspondingly quick. In this way, the wafer elements can be connected to one another in less than 60 seconds. In addition, the method described can be used to connect to one another wafer elements in which the contact areas are particularly small and / or are particularly close to one another. To assess the performance of the wafer-to-wafer bonding process, the minimum required “pad sizes” and the minimum required “pitch” are usually specified. The pad size indicates the extent of the contact areas. The pitch indicates the center-to-center distance between adjacent pads. This information relates in particular to contact surfaces that are arranged in a regular pattern. The method described can be reliably carried out with a pad size from 0.5 µm [micrometers] and a pitch from 1.5 µm. The pad size is preferably 0.5 to 150 μm. The pitch is preferably 1.5 to 300 µm. The small pad sizes and pitches that can be achieved with the method described are not possible with any technology known from the prior art with comparatively little effort and with comparatively high reliability. A particular factor here is that the formation of nanowire connections is particularly simple. This is shown in particular by the embodiments described below. In particular, it is possible to form nanowire connections without or with comparatively little heating. Methods of wafer-to-wafer bonding known from the prior art, in contrast, require significantly greater heating, which can damage the wafers and, in particular, electronic structures thereon.

In a preferred embodiment of the method, the first wafer element is designed as a one-piece wafer and the second wafer element is designed as a one-piece wafer. This embodiment has been described above as the first embodiment.

• ■ das erste Waferelement als ein einstückiger Wafer ausgebildet ist und das zweite Waferelement aus mehreren Waferstücken zusammengesetzt ist, oder umgekehrt oder dass
• ■ beide Waferelemente jeweils aus mehreren Waferstücken zusammengesetzt sind.

In a further preferred embodiment, at least one of the wafer elements is composed of several wafer pieces. This embodiment includes those above as first and foremost second embodiment designated embodiments. So it is provided here that

• ■ the first wafer element is designed as a one-piece wafer and the second wafer element is composed of several wafer pieces, or vice versa, or that
• ■ both wafer elements are each composed of several wafer pieces.

This embodiment makes it possible to use the described advantage that usable component areas are combined with one another in a targeted manner. This advantage exists when at least one of the two wafer elements is composed of several wafer pieces. The other wafer element can be designed as a one-piece wafer or composed of several wafer pieces.

Two preferred options for forming the nanowire connections are described below.

1. a) Bereitstellen einer Vielzahl von Nanodrähten auf den Kontaktflächen nur des ersten Waferelements,
2. b) Zusammenführen der beiden Waferelemente, so dass die Nanodrähte mit den Kontaktflächen des zweiten Waferelements in Kontakt kommen,
3. c) Erwärmen der beiden Waferelemente.

In a preferred embodiment of the method, the two wafer elements are connected to one another by the following method steps:

1. a) providing a large number of nanowires on the contact surfaces of only the first wafer element,
2. b) bringing the two wafer elements together so that the nanowires come into contact with the contact surfaces of the second wafer element,
3. c) heating the two wafer elements.

In step a) the nanowires are provided on the contact surfaces of only one of the wafer elements, that is to say not on the contact surfaces of both wafer elements. The alternative configuration, in which nanowires are provided on the contact surfaces of both wafer elements, is the subject of the embodiment described below.

The nanowires can, in particular, be grown galvanically and to that extent provided on the surface of the first wafer element. It cannot be ruled out that the nanowires are also provided outside of the contact areas. However, it is preferred that the nanowires are only provided on the contact surfaces. This is possible through lithographic structuring of the surface of the first wafer element. As a result of the restriction to the contact surfaces, the connections between the individual pairs of contact surfaces are particularly well insulated from one another electrically. Mutual influencing of neighboring pixels can thereby be reduced.

In step b) the two wafer elements are brought together. For this purpose, the two wafer elements are preferably positioned and aligned parallel to one another in such a way that the contact surfaces on the two wafer elements are opposite one another. The two wafer elements are then moved towards one another until they are in flat contact with one another. The two wafer elements are preferably pressed together. The two wafer elements are particularly preferably pressed together with a pressure in the range of 1 MPa and 200 MPa, in particular in the range of 2 MPa and 20 MPa.

In step c) the wafer elements are heated. If the wafer elements are pressed together, the heating can take place during this and / or afterwards. As a result of the heating, the nanowires connect to the contact surfaces of the second wafer element. The two wafer elements are preferably heated to at least 90 ° C., in particular to at least 150 ° C., in step c). The two wafer elements are preferably heated to a maximum of 270 ° C., in particular to a maximum of 240 ° C., in step c). The two wafer elements are particularly preferably heated to a temperature in the range from 90 ° C. to 270 ° C., in particular in the range from 150 ° C. to 240 ° C., in step c). These temperatures are considerably lower than the temperatures that occur in known processes of wafer-to-wafer bonding.

For the formation of the connection, it can be sufficient that the minimum temperature described is reached once, at least for a short time. It is not necessary to maintain the temperature. However, it is preferred that the temperature to which the heating is carried out in accordance with step c) is maintained for at least ten seconds, preferably at least 30 seconds. It can thus be ensured that the connection is formed as desired. Maintaining the temperature for a longer period is generally not harmful.

1. A) Bereitstellen einer Vielzahl von Nanodrähten auf den Kontaktflächen des ersten Waferelements und auf den Kontaktflächen des zweiten Waferelements,
2. B) Zusammenführen der beiden Waferelemente, so dass die Nanodrähte der beiden Waferelemente miteinander in Kontakt kommen.

In a further preferred embodiment of the method, the two wafer elements are connected to one another by the following method steps:

1. A) providing a multiplicity of nanowires on the contact surfaces of the first wafer element and on the contact surfaces of the second wafer element,
2. B) Merging the two wafer elements so that the nanowires of the two wafer elements come into contact with one another.

In this embodiment, the nanowires are provided on both contact surfaces involved in the connection. The connection is made in in the case that the nanowires get caught in one another and thus connect with one another.

• C) Erwärmen der beiden Waferelemente.

Step A) takes place analogously to step a). Step B) takes place analogously to step b). In this embodiment, heating is not necessary because the connection between nanowires is formed more easily than the connection between a nanowire and a contact surface due to the larger surface. Nonetheless, it is also preferred in the present embodiment that the method further comprises:

• C) heating the two wafer elements.

For step C) what was said above about step c) applies.

As an alternative to the embodiments with steps a) to c) or A) to B) or C), the connection can also be obtained by a further preferred embodiment. A large number of nanowires are provided on two opposing surfaces of a connecting element. The connecting element is arranged between the two wafer elements and these are thereby connected to one another via the connecting element. This can be done analogously to steps b) and c). In that case, no nanowires are provided on the contact surfaces of the wafer elements. Alternatively, a multiplicity of nanowires is additionally provided on the contact areas of the first wafer element and on the contact areas of the second wafer element. In this case, the connection takes place analogously to steps B) and, optionally, C). It is also possible for these two alternatives to be combined with one another. Thus, the connecting element can be connected to the first wafer element analogously to steps b) and c) and to the second wafer element analogously to steps B) and, optionally, C). The connecting element is preferably designed as a film. The connecting element can also be referred to as a connecting tape. It is preferred that the nanowires are provided on the connecting element only in accordance with the arrangement and extent of the contact surfaces. No connection is then formed between the wafer elements outside the contact areas, so that short circuits between the connections are avoided.

In a further preferred embodiment of the method, the first component areas are designed to be identical to one another and / or the second component areas are designed to be identical to one another.

The preferred combination is that the first component areas are designed to be identical to one another and the second component areas are designed to be identical to one another. The first component areas are preferably different from the second component areas. Alternatively, however, the first component areas can also be designed identically to the second component areas.

In a further preferred embodiment of the method, the first component areas are arranged in a grid shape on the first wafer element and / or the second component areas are arranged in a grid shape on the second wafer element.

The combination is preferred that the first component areas are arranged in a grid shape on the first wafer element and the second component areas are arranged in a grid shape on the second wafer element.

Grid-like means that the respective component areas are arranged according to a regular pattern with columns and rows. Such a regular arrangement particularly facilitates the assembly of wafer pieces to form a wafer element.

In a further preferred embodiment of the method, the interconnected wafer elements are divided up in such a way that components are obtained which each have one of the first component areas and one of the second component areas.

The division can take place, for example, by sawing up the interconnected wafer elements. This is particularly the case when the two wafer elements are each designed as a one-piece wafer. If a wafer composed of several wafer pieces is used, the division can also take place in that the individual wafer pieces are separated from one another again. For example, an adhesive can be loosened between the wafer pieces and a substrate. A combination of separating wafer pieces and sawing is also possible.

In a further preferred embodiment of the method, the first component areas are designed as a respective DRAM and / or the second component areas are designed as a respective DRAM.

The combination is preferred that the first component areas are designed as a respective DRAM and the second component areas are designed as a respective DRAM.

In the present embodiment, the method described can be used to stack DRAMs. This can also be referred to as stacking DRAMs. Preferably they are first component areas and the second component areas are identical to one another. A stack of similar DRAMs can thus be obtained.

As a further aspect of the invention, an arrangement comprising a first wafer element and a second wafer element is presented. The first wafer element has a plurality of first component regions with a respective electronic structure and a respective contact surface. The second wafer element has a plurality of second component regions with a respective electronic structure and a respective contact area. The wafer elements are connected to one another in that the contact surfaces of the two wafer elements are connected to one another in pairs via a large number of nanowires.

The described advantages and features of the method can be applied and transferred to the arrangement, and vice versa. The arrangement is preferably produced by the method described. The method described is preferably designed in such a way that the arrangement is obtained.

As a further aspect of the invention, a method for producing a plurality of imaging modules is presented. A first wafer element with a plurality of image sensors with a respective electronic structure and a respective plurality of contact areas is provided. A second wafer element with a plurality of signal processing elements with a respective electronic structure and a respective plurality of contact areas is provided. The wafer elements are connected to one another in that the contact surfaces of the two wafer elements are connected to one another in pairs via a large number of nanowires. The interconnected wafer elements are divided in such a way that the imaging modules are obtained which each have one of the image sensors and one of the signal processing elements.

The described advantages and features of the method for connecting a first wafer element to a second wafer element and the arrangement can be applied and transferred to the method for producing a plurality of imaging modules, and vice versa. The arrangement described is to be understood as an intermediate product for the imaging modules. The imaging modules can be obtained by dividing the assembly. With the method described here, several imaging modules can therefore be produced at the same time. In the method for producing a plurality of imaging modules, the wafer elements are preferably connected to one another according to the described method for connecting a first wafer element to a second wafer element.

An imaging module is understood to be a module that can record image signals and output them after processing. To this end, the imaging modules each include an image sensor and a signal processing element. Each pixel of the image sensor generates a respective signal, which is processed individually in the signal processing element. The distance between the pixel and the signal processing element can be so small that even particularly weak electrical signals can be processed by the signal processing element. The signal processing element is preferably set up at least for signal amplification. The short distance between the pixel and the signal processing element enables particularly small image sensors with a particularly high resolution and particularly high signal quality. The imaging modules are preferably imaging modules for photo cameras and / or video cameras. The imaging modules can also be referred to as video modules. This term does not exclude that still images can be recorded with a video module. To this extent, a photo camera can also have a video module.

The image sensors are preferably CMOS sensors or CCD sensors. The image sensors represent first component areas. The pixels of the image sensor can be implemented by photodiodes. A large number of photodiodes can be provided as the electronic structure. The image sensors can also be referred to as video sensors or photo sensors. The signal processing elements represent second component areas. A large number of electronic components can be provided as the electronic structure. These electronic components are set up to process the signal from a pixel. The signal processing element is preferably an amplifier. Alternatively, a microcontroller, a filter, a signal conditioner or a signal processing intelligence is preferred as the signal processing element. It is also preferred that the signal processing element is formed by chaining one or more of the named elements.

In particular when applied to imaging modules, the described advantages of the method for connecting a first wafer element to a second wafer element can be used. It is therefore preferred that the image sensors each comprise at least one million pixels. In this case, what are known as megapixel sensors are involved. The number of nanowire connections to be formed is correspondingly large. To particularly small image sensors with a particularly high To be able to produce resolution, the contact areas must be arranged correspondingly small and close together. With the described method for connecting a first wafer element to a second wafer element, a pad size of 0.5 µm [micrometers] with a pitch of 1.5 µm can be reliably processed. This is a great advantage in the manufacture of imaging modules.

As a further aspect of the invention, an imaging module is presented which comprises an image sensor with an electronic structure and a plurality of contact areas and a signal processing element with an electronic structure and a plurality of contact areas. The contact surfaces of the image sensor are connected in pairs to the contact surfaces of the signal processing element via a large number of nanowires.

The described advantages and features of the method for connecting a first wafer element to a second wafer element, the arrangement and the method for producing a plurality of imaging modules can be used and transferred to the imaging module, and vice versa. The imaging module is preferably one of the imaging modules that are produced using the method for producing a plurality of imaging modules. The method for producing a plurality of imaging modules is preferably designed such that a plurality of the imaging modules described is obtained.

• 1: eine Draufsicht auf ein erstes Waferelement, das erfindungsgemäß verwendet werden kann,
• 2: eine seitliche Schnittdarstellung einer erfindungsgemäßen Anordnung umfassend das erste Waferelement aus 1 sowie ein zweites Waferelement,
• 3: eine seitliche Schnittdarstellung eines erfindungsgemäßen Bildgebungsmoduls, welches aus der Anordnung aus 2 erhalten werden kann, und
• 4: eine Draufsicht auf eine alternative Ausgestaltung eines ersten Waferelements, das erfindungsgemäß verwendet werden kann.

The invention is explained in more detail below with reference to the figures. The figures show particularly preferred exemplary embodiments to which, however, the invention is not limited. The figures and the proportions shown therein are only schematic. Show it:

• 1 : a plan view of a first wafer element that can be used according to the invention,
• 2 : a lateral sectional view of an arrangement according to the invention comprising the first wafer element from 1 as well as a second wafer element,
• 3 : a side sectional view of an imaging module according to the invention, which is from the arrangement from 2 can be obtained, and
• 4th : a plan view of an alternative embodiment of a first wafer element that can be used according to the invention.

1 shows a wafer element 1 , which, in contrast to an in 2 second wafer element shown 2 as a first wafer element 1 referred to as. The first wafer element 1 is designed as a one-piece wafer. The first wafer element 1 has a plurality of first component regions 3 on. To illustrate, there are four first component areas 3 drawn. In fact, significantly more first component areas can also be used 3 be provided. Each of the first component areas 3 has a respective electronic structure 5 and four respective contact areas 6th on. In fact, significantly more than four contact surfaces can also be used 6th per first component area 3 be provided. For the sake of clarity, reference symbols are only used for one of the first component areas 3 , for its electronic structure 5 and for one of the contact surfaces 6th drawn. The first component areas 3 are grid-shaped on the first wafer element 1 arranged. The first component areas 3 are designed to be identical to one another.

2 shows a sectional side view of an arrangement 9 comprising the first wafer element 1 out 1 and a second wafer element 2 . The second wafer element 2 is analogous to the first wafer element 1 educated. Thus, a schematic plan view of the second wafer element 2 especially look like the one in 1 shown plan view of the first wafer element 1 . The first wafer element 1 and the second wafer element 2 have the same basic structure. However, the second wafer element 2 second component areas 4th instead of the first component areas 3 on. The second component areas 4th can from the first component areas 3 be different, so that the wafer elements 1, 2 also differ in particular to that extent. The second component areas 4th are grid-shaped on the second wafer element 2 arranged. The second component areas 4th are designed to be identical to one another.

The wafer elements 1, 2 are connected to one another in that the contact surfaces 6th of the two wafer elements 1,2 in pairs over a large number of nanowires 7th are connected to each other. That means that each of the contact surfaces 6th of the first wafer element 1 with a respective one of the contact surfaces 6th of the second wafer element 2 connected and vice versa. In this respect, pairs are formed, each with exactly one contact surface 6th of the first wafer element 1 and exactly one contact area 6th of the second wafer element 2 exhibit.

1. a) Bereitstellen einer Vielzahl von Nanodrähten 7 auf den Kontaktflächen 6 nur des ersten Waferelements 1,
2. b) Zusammenführen der beiden Waferelemente 1,2, so dass die Nanodrähte 7 mit den Kontaktflächen 6 des zweiten Waferelements 2 in Kontakt kommen,
3. c) Erwärmen der beiden Waferelemente 1,2.

The two wafer elements 1, 2 can be connected to one another by the following process steps:

1. a) Providing a large number of nanowires 7th on the contact surfaces 6th only the first wafer element 1 ,
2. b) Merging the two wafer elements 1,2, so that the nanowires 7th with the contact surfaces 6th of the second wafer element 2 get in touch,
3. c) heating the two wafer elements 1,2.

1. A) Bereitstellen einer Vielzahl von Nanodrähten 7 auf den Kontaktflächen 6 des ersten Waferelements 1 und auf den Kontaktflächen 6 des zweiten Waferelements 2,
2. B) Zusammenführen der beiden Waferelemente 1,2, so dass die Nanodrähte 7 der beiden Waferelemente 1,2 miteinander in Kontakt kommen.

Alternatively, the two wafer elements 1, 2 can be connected to one another by the following process steps:

1. A) Providing a multitude of nanowires 7th on the contact surfaces 6th of the first wafer element 1 and on the contact surfaces 6th of the second wafer element 2 ,
2. B) Merging the two wafer elements 1,2, so that the nanowires 7th of the two wafer elements 1,2 come into contact with one another.

The interconnected wafer elements 1, 2 can be divided up in such a way that components 8th are obtained, each one of the first component areas 3 and one of the second component areas 4th exhibit.

3 shows as an example of such a component 8th an imaging module 10 , which from the arrangement 9 out 2 can be obtained. The imaging module 10 includes an image sensor 11th as a first component area 3 and a signal processing element 12th as a second component area 4th . The signal processing element 12th can in particular be an amplifier. The image sensor 11th and the signal processing element 12th each have an electronic structure 5 and a plurality of contact areas 6th on. The contact areas 6th of the image sensor 11th are in pairs with the contact surfaces 6th of the signal processing element 12th over a variety of nanowires 7th connected.

4th shows an alternative embodiment of a first wafer element 1 which can be used in the present invention. Also the second wafer element 2 could be like in 4th be formed shown. In contrast to the design according to 1 is the first wafer element 1 in 4th not formed in one piece, but composed of two wafer pieces 13, 14. A first piece of wafer 13th corresponds to 3/4 of one as in 1 shown formed first wafer element 1 . On the first piece of wafer 13th are the first three component areas 3 arranged. The first piece of wafer 13th is to delimit a second wafer piece 14th shown hatched. The second piece of wafer 14th corresponds to 1/4 of a as in 1 shown formed first wafer element 1 without the unusable curves.

List of reference symbols

1

first wafer element

2

second wafer element

3

first component area

4th

second component area

5

electronic structure

6th

Contact area

7th

Nanowires

8th

Component

9

arrangement

10

Imaging module

11th

Image sensor

12th

Signal processing element

13th

first wafer piece

14th

second wafer piece

Claims (12)

Method for connecting a first wafer element (1) to a second wafer element (2), wherein the first wafer element (1) has a plurality of first component regions (3) with a respective electronic structure (5) and a respective contact surface (6), wherein the second wafer element (2) has a plurality of second component areas (4) with a respective electronic structure (5) and a respective contact surface (6), the wafer elements (1, 2) being connected to one another in that the contact surfaces (6) of the two wafer elements (1, 2) are connected to one another in pairs via a large number of nanowires (7). Procedure according to Claim 1 , wherein the first wafer element (1) is designed as a one-piece wafer and the second wafer element (2) is designed as a one-piece wafer. Procedure according to Claim 1 , wherein at least one of the wafer elements (1) is composed of a plurality of wafer pieces (13, 14). Method according to one of the preceding claims, wherein the two wafer elements (1, 2) are connected to one another by the following method steps: a) providing a plurality of nanowires (7) on the contact surfaces (6) only of the first wafer element (1), b) bringing the two wafer elements (1, 2) together so that the nanowires (7) come into contact with the contact surfaces (6) of the second wafer element (2), c) heating the two wafer elements (1,2). Method according to one of the Claims 1 until 3 , the two wafer elements (1, 2) being connected to one another by the following process steps: A) Providing a large number of nanowires (7) on the contact surfaces (6) of the first wafer element (1) and on the contact surfaces (6) of the second wafer element ( 2), B) bringing the two wafer elements (1,2) together so that the nanowires (7) of the two wafer elements (1,2) come into contact with one another. Method according to one of the preceding claims, wherein the first component areas (3) are designed to be identical to one another and / or the second component areas (4) are designed to be identical to one another. Method according to one of the preceding claims, wherein the first component areas (3) are arranged in a grid shape on the first wafer element (1) and / or the second component areas (4) are arranged in a grid shape on the second wafer element (2). Method according to one of the preceding claims, wherein the interconnected wafer elements (1, 2) are divided up in such a way that components (8) are obtained which each have one of the first component areas (3) and one of the second component areas (4). Method according to one of the preceding claims, wherein the first component areas (3) are designed as a respective DRAM and / or the second component areas (4) are designed as a respective DRAM. Arrangement (9) comprising a first wafer element (1) and a second wafer element (2), the first wafer element (1) having a plurality of first component areas (3) with a respective electronic structure (5) and a respective contact surface (6) , the second wafer element (2) having a plurality of second component areas (4) with a respective electronic structure (5) and a respective contact surface (6), the wafer elements (1, 2) being connected to one another in that the contact surfaces ( 6) the two wafer elements (1, 2) are connected to one another in pairs via a large number of nanowires (7). Method for producing a plurality of imaging modules (10), wherein a first wafer element (1) with a plurality of image sensors (11) with a respective electronic structure (5) and a respective plurality of contact surfaces (6) is provided, wherein a second wafer element (2) is provided with a plurality of signal processing elements (12) with a respective electronic structure (5) and a respective plurality of contact surfaces (6), the wafer elements (1,2) being connected to one another in that the contact surfaces (6) of the two wafer elements (1,2) are connected to one another in pairs via a multiplicity of nanowires (7), and the interconnected wafer elements (1,2) are divided in such a way that the imaging modules (10) are obtained, each of which is one of the image sensors (11) and one of the signal processing elements (12). Imaging module (10) comprising an image sensor (11) with an electronic structure (5) and a plurality of contact surfaces (6) and a signal processing element (12) with an electronic structure (5) and a plurality of contact surfaces (6), wherein the Contact surfaces (6) of the image sensor (11) are connected in pairs to the contact surfaces (6) of the signal processing element (12) via a plurality of nanowires (7).

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