DE102019214379B4 - Device and method for encryption - Google Patents

Abstract

Device for encrypting data (8) with an input device (23) for entering a password (10) and for the reproducible generation of a start vector (3) from the entry of the password (10), an electronic component (20) for generating at least a binary key (6) and which is connected to an electronic component (27) for the transmission of the at least one binary key (6), which is set up for encrypting data (8) into crypto blocks (9), which has an input ( 28) for data (8) and an output (29) for crypto blocks (9), wherein the electronic component (20), which is set up to generate the at least one binary key (6), has a reproducibly generated, binary-filled matrix ( 1) contains and is set up to generate at least one primary key vector (4) when a start vector (3) is entered into the binary-filled matrix (1) and from this to generate the at least one binary key (6) using test values eduction and to transmit this to the component (27) which is set up for encrypting data (8) into crypto blocks (9), the device having an activation control (30) with an activation counter (31) and a release device (32) has, wherein the device does not have a memory for a password and is activated for each entry into the input device (23) for entering a password (10) and that the device is set up to enter the binary key (6) as an entry into a matrix, to generate a further binary key (6), the device being set up to repeat this loop, in which the binary key (6) is entered again in a matrix, at least once in order to generate a sequence of binary keys (6) to create.

Description

The present invention relates to an electronic device and an electronic method for encryption, which are set up to generate at least one key from an extremely large number of possible keys based on a password and thus to encrypt data and the encrypted data, e.g. after storage and/or Transmission, then to decrypt. The device and the method that can be carried out with it have the advantage that, based on the key, the original password cannot be determined with an extremely high probability and the key cannot be reproduced without the method steps or without the device with an extremely high probability. The device and the method offer the advantage that the key cannot be calculated without knowledge of the password and/or without knowledge of the method steps, even with a great deal of computing effort. Generally preferred, the key is binary. In a preferred embodiment, the device or the method is set up to encrypt the data in sections with different keys.

An advantage of the invention is that the password itself is not stored or is not completely stored, so that even an analysis of the device or knowledge of the method does not reveal the password.

State of the art

The U.S. 4,777,622 describes a matrix as an associative memory in which a binary input of zero and one is entered into the matrix and an output is generated by means of the matrix in that it is specified in the matrix for each position of the input whether and at which position an output signal is given is produced. The output signal is preferably revised in that the output signals are added for each point and a predetermined value is subtracted from this value as a threshold value. This threshold value can be, for example, the number of ones in the input reduced by 1, so that a one is only output if the output signals added up at this point are at least equal to the number of ones in the input.

The WO 2006/045114 A2 describes the encryption of plain text with a binary key, for example using the known XOR function, in which encrypted data are generated from a key and data, which are preferably both binary, which is only decrypted back to the data as plain text if the key is known can become. The key, which can be a key stream, is formed from a specified working key, a specified quasi-group and part of the data, with the quasi-group preferably being an autotope of an initial quasi-group and being specified on the basis of a secret initial key of a selectable length.

The US 2015/0110269 A1 describes a matrix for encryption that is based on two prime numbers. An interaction with entering a password is not described.

The US 9,703,979 B1 describes an encryption method in which keys are determined and derivatized with preselected revision mechanisms.

The US 8,254,571 B1 describes the derivatization of an entered password through a loop, the result of which can be used for encryption. The loop should be run through repeatedly until a comparison with verification information turns out to be positive.

The U.S. 2017/0279606 A1 uses analog memory throughout, measuring the voltage required for individual cells to reach a threshold value. For example, the cells can be selected according to a first hash value. Only NAND flash memory is mentioned as an analog memory, for whose cells the required number of voltage pulses is measured. The number of voltage pulses required depends on the individual memory chip or is different for different memory chips and allows an individual fingerprint that goes back to the manufacturing process and results in a “physically non-clonable function” (“PUF”).

The DE 101 48 415 A1 describes the entry of a small key information vector into a public, binary-filled matrix to encrypt a large key vector, with which a plain text is then encrypted completely or in sections.

object of the invention

The object of the invention is to provide an alternative device and an alternative method for encryption and decryption that can be carried out with it, in which the generation of keys is preferably separated from the step of encrypting data. More preferably, the device and the method should be able to generate keys from which the method or an initial password cannot be inferred.

Description of the invention

The invention solves the problem with the features of the claims and provides in particular a device that is set up for generating keys, and provides a method with which at least one key or a sequence of keys are generated, with the at least one key or the sequence of keys data is encrypted and the encrypted data can be decrypted. In the process, the key is generated separately from the encryption of the data that form the plain text, so that the key cannot be deduced from the encrypted data, also referred to as a crypto block, without knowledge of the key. Accordingly, the device is set up to generate the at least one key or a sequence of keys in electronic components that are separate from an electronic component that is set up for encrypting data and is preferably connected to it only for the transmission of keys. The electronic components that are set up to generate the at least one key are preferably connected only for the transmission of the at least one key to the electronic component that is set up to encrypt and decrypt data. The connection for transmitting the at least one key can only be set up as permissible in one direction, namely from the electronic components set up to generate the at least one key to the electronic component set up to encrypt and decrypt data. Alternatively, the connection for transmitting the at least one key from the electronic components that are set up to generate the at least one key to the electronic component that is set up for encrypting and decrypting data can be set up as permissible and also the transmission of at least one Crypto blocks from the electronic component, which is set up for encrypting and decrypting data, to the electronic components, which are set up to generate the at least one key, be set up as permissible. The electronic component, which is set up for encrypting data, has an output for encrypted data and is set up, for example, to output one or more crypto blocks containing encrypted data, e.g. to a data line or to a memory for crypto blocks.

The electronic component, which is set up for encrypting data, is connected to a data line with the electronic components, which are set up to generate at least one key, with the data line optionally being set up, key only in the direction of the electronic components that are set up to generate keys to transmit to the electronic component that is set up to encrypt and decrypt data. To enter data, the electronic component set up for encrypting and decrypting data is set up to receive data, e.g. it has an input, e.g. a data line for incoming data or a memory from which incoming data can be read. The data can be any data, including electronic files, electrical signals, e.g., telephone signals.

In the device, the electronic components that are set up to generate the key are preferably separate, with the exception of a data line for transmitting keys, from the electronic components that are set up to encrypt and decrypt the data with the key. Correspondingly, the procedural steps that take place to generate the key preferably run separately from the procedural steps for encrypting and decrypting the data, with keys preferably only being transmitted in the direction from generating keys to encrypting and decrypting the data. The method runs in electronic components, e.g. in electronic computers and memories, preferably in electronic computers which are connected to electronic memories for reading out and/or storing data.

In general, the method describes the device and its electronic components that are set up for the steps of the method, and the setting up of the device or the setting up of its electronic components describes the method.

For decryption, the method for generating at least one key is the same, or the device for generating at least one key is the same, with the component for encryption, preferably an XOR computer, receiving encrypted data at its input and data as at the output be output in plain text. Therefore, the electronic component that is set up for encryption is also set up for decryption. Therefore, the electronic component that is set up for encryption is also the electronic component or is the same as the electronic component that is set up for decryption.

The components of binary data, e.g. binary keys or binary-filled matrices, are also referred to herein as zero or non-zero or one, as is usual for binary data.

The key is generated by entering and processing a binary start vector in a binary-filled matrix. A binary key is generated from the primary output that is output from the matrix, also called the primary key vector.

A binary key is generated from the binary start vector by the binary matrix according to a fixed rule, which preferably consists of entering one position of the start vector in exactly one row of the matrix and in each column of the matrix in which a one is in this row is present, a one is output for this column, the output ones for the column being at least partially or completely added up in order to obtain a primary key vector. The primary key vector can form the key.

Entering and processing a binary start vector in the matrix to generate the primary key vector comprises entering the start vector, one digit in each row of the matrix, and adding up the ones in each column of the matrix. The adding up can take place at least partially, e.g. for a predetermined sequence of the lines, e.g. until a predetermined test value is exceeded by the individual positions of the primary key vector, or by means of activation counting and value release. Optionally, entering the start vector for all rows and adding them up along the columns of the matrix can be done simultaneously.

An activation count determines the number of ones in a binary key, correspondingly an activation counter is set up to determine the number of ones in a binary key. A value release determines the number of ones to be set in a binary key.

For setting a first check value such that the check value is exceeded for a predetermined number of digits in the primary key vector, the primary key vector can be provided, optionally during the addition of the ones of each column or subsequently, by means of an activation count and value release to the number of the points in which this test value is exceeded. The binary key is only generated from the primary key vector if the value release exceeds the check value at least at the specified number of positions. If the value release does not exceed the check value in at least the specified number of places, the check value is reduced, e.g. by 1, and the binary key thus generated is checked by means of the activation count and value release. The test value can therefore also be referred to as a value to be tested, which can be a fixed value or an adjustable value or can be variable. This reduction in the test value can also be referred to as the MINA method.

Correspondingly, the primary key vector can be converted to a binary key with a value to be tested, optionally during the addition of the ones in each column or afterwards, and the binary key can be checked for the number of digits containing a one by means of an activation count and value release. The binary key is generated from the primary key vector only if the activation count is one in at least the number of positions specified by the value enable. If the value release does not result in a one in at least the specified number of places, the test value is reduced as the value to be tested, e.g. by 1, and a binary key is generated again and checked using the activation count and value release. For the activation count, the device can have an activation counter, which can optionally be set up to determine the sum of the ones in a binary key in less than one or in at most one time step of a clock signal. The device therefore preferably has an activation counter and a release device, which form the value release.

The value release can, for example, be set to 20 to 80%, e.g. 30 to 70% or 40% to 60%, preferably 50% to 55%, e.g. 20%, 30%, 40%, 50%, 55%, 60%, 70% or 80%, each with a range of +/- 5% or +/- 4% or +/- 3% or +/- 2% of the number of rows of the matrix. The ones are preferably added up at the positions in the individual columns which are determined, for example, by one or more of the rows with ones in the input, until the check value or the proportion of ones in the binary key is 20 to 80%, e.g. 30 to 70% or 40% to 60%, preferably 50% to 55%, for example 20%, 30%, 40%, 50%, 55%, 60%, 70% or 80%, each with a range of +/- 5% or +/- 4% or +/- 3% or +/- 2% of the digits of the primary key vector.

Alternatively or additionally, a second check value can be generated as a function of the first check value, e.g. by multiplying the first check value by a constant or adding a constant to the first check value, with a zero in the binary key for each column of the matrix or each position of the primary key vector is generated for which the sum or the position of the primary key vector at least reaches the second check value. This method is referred to here as the SIGMA method.

Alternatively, the test value can be arbitrarily preselected and entered, eg entered into the device by means of a control input.

If the ones that are output in each individual column of the matrix are only partially added up, until a first test value is at least reached or exceeded, a binary key can be generated from the primary key vector generated in this way, in that a one is only entered for this in the positions is generated for which the sum of the added ones is equal to or greater than the first test value and less than the second value, and a zero is generated in the other places.

The primary key vector is preferably converted to a binary key using a check value by subtracting a check value from the value of each digit in the primary key vector, with a zero being output if the value of the digit is equal to the check value or the result of the subtraction of the check value from value of the digit is less than zero.

The check value can generally be the sum number of (ones of the start vector)-1 or the check value can be a smaller number. By subtracting a first check value from the primary key vector, the binary key will have a zero wherever the value of the primary key vector is equal to or less than the first check value, and will have a one only where the primary key vector has a value greater than the first check value.

Accordingly, it can be provided that the total number of ones in the start vector is determined as the first test value and one is subtracted from it. Alternatively, it can be provided that the largest number or a smaller number, e.g. the value in the first or second digit or a predetermined one of the values that are smaller than the largest number, in the digits of the primary key vector and optionally from this can be determined as the test value Subtract number one. Then the check value can be determined independently of the size of the matrix and the check value subtracted from the results of the locations of the primary key vector.

Optionally, before converting the primary key vector to a binary key, each digit of the primary key vector can be additionally transformed, e.g. by means of a modulo calculation (residual class calculation), in which the respective total number of ones for each digit is reduced cyclically with a smaller number. For example, the modulo calculation can be adding up the ones for each column in a modulo counter. As a further option, the primary key vector can be transformed into a binary key using the SIGMA method and/or the modulo2 function before the conversion.

As a further option, the device can be set up, when converting the primary key vector into a binary key, to output a zero for the positions in the primary key vector that exceed a second test value. In this embodiment, a one is generated in the binary key only for those positions in the primary key vector whose values are greater than the first check value and less than the second check value, for positions in the primary key vector whose values are equal to or less than the first check value are greater than the second check value, a zero is generated in the binary key. The second check value can, for example, be the sum of the first check value and an integer to be entered.

The matrix is binary filled and preferably has from 30 to 70% of its digits ones, more preferably from 40 to 60% ones, still more preferably from 45 to 55% or from 48 to 52% ones content .

The matrix is generated in a reproducible manner, preferably the matrix is generated again before each generation of a key and the matrix is deleted in the meantime, e.g. by switching off the power to the electronic component in which the matrix is contained. For example, the matrix can be erased after generation of a key, after a predetermined period of operation, or under the control of a predetermined signal. The predetermined signal can, for example, be a signal that is generated by a distance sensor attached to the device, which is e.g. an electromagnetic component, a transponder or RFID chip, when a predetermined distance from a fixed point is exceeded, at which a item is attached. The electronic component preferably contains a reversible memory from which the matrix is deleted when the power is switched off, or in which the matrix is only stored when the power is supplied. The de-energization can alternatively or additionally be triggered by interrupting the power supply of the electronic component, e.g. by actuating a switch that is actuated when a housing is opened or by interrupting a line of the device. Accordingly, the electronic component in which the matrix is stored is preferably set up to generate or store the matrix before each generation of a key and to delete the matrix after each generation of a key.

The electronic component, which contains a matrix, is preferably set up to reversibly store and erase a matrix. This can electronic component can be connected to a pseudo-random number generator or a generator for generating a rule-based or predetermined matrix.

Optionally, the electronic component that contains a matrix can be set up to irreversibly contain the matrix. The electronic component in which the matrix is contained is also referred to here as a memory for a binary matrix. This electronic component is set up to generate at least one primary key vector and from this a binary key when the start vector is entered into the matrix. The electronic component is therefore set up to contain the matrix and to generate at least one primary key vector and from this at least one binary key when the start vector is entered into the matrix. In the present case, this electronic component is also referred to as a computer chip or as an electronic component for generating keys.

According to the invention, the electronic component that is set up for encrypting and/or decrypting the data using the key is a component that is separate from the electronic component in which the matrix is contained, with the latter only being connected for the transmission of binary keys, e.g an intermediate processor arranged to generate a binary key from a primary key vector. The electronic component that contains the matrix and is preferably set up to generate a primary key vector when a start vector is input is referred to here as a memory for the matrix and also as a matrix memory. The matrix memory can be set up to transmit the primary key vector exclusively to a processor for checking value reduction, which generates a binary key from the primary key vector and is set up to transmit this to the electronic component that is set up to encrypt and/or decrypt the data is.

By arranging the electronic component, which contains the matrix, separately from the electronic component, which is set up for encrypting and/or decrypting the data using the key, the device or the method is secure against an attack on the electronic component that is set up for encryption. Because the key is not permanently stored in this component, but is preferably only available separately during the actual encryption, e.g. with the XOR function. This electronic component is preferably also set up so that it does not contain any stored data in the de-energized state, or only has an empty memory.

In one embodiment, the matrix is filled or generated in a pseudo-random binary manner, e.g. using a pseudo-random number generator with a large period and by entering a start value, with the filling optionally taking place column-by-column until the matrix content of ones is reached. Such a start value, which is entered into the pseudo-random number generator, can be part of the start vector or part of a password on the basis of which the start vector is generated.

The pseudo-random number generator can be a feedback shift register which has a period of approximately ^10,200 . The matrix can be generated or filled with pseudo-random values using linear feedback shift registers, so that the positions of the matrix are set to zero or one. The pseudo-random number generator is preferably formed from an initial matrix, with the pseudo-random numbers each resulting from the binary keys that are generated using one of the methods described here with an initial matrix and the binary keys are entered again as input in the initial matrix, so that a sequence of binary keys is generated, with which the matrix is filled. This initial matrix can be filled by a feedback shift register or rule-based. Alternatively, the filling of the matrix can be a predetermined filling.

The matrix can, for example, have a size of at least 100 rows, more preferably at least 1000 rows, and independently of the number of rows, have at least 100 columns, more preferably at least 1000 columns or more. The matrix can have, for example, 100×100 positions, preferably 1000×1000 positions or more. The matrix preferably has ²ⁿ rows and ^2m columns, where n and m are independent of one another or are equal to an integer of at least 5, for example up to 15, and n and m are independent of one another or are equal, preferably at least 6, 7, 8, 9, 10, 11, 12, 13 or at least 14.

A binary key may have a length equal to a fraction of the total or a multiple of the number of columns in the matrix. Optionally, a binary key can have a length that includes at least a portion of at least two binary keys that come from a sequence of binary keys.

The starting vector can have a size less than, equal to, or greater than the number of rows in the matrix.

The start vector is preferably generated reproducibly from the input of a password, e.g by entering a password into an input device, which can be, for example, a keypad or a data connection for reading in a file, with the entry of the password preferably generating the start vector by means of a pseudo-random number generator. The input device preferably has at least 9, more preferably at least 16, different symbols that can be selected and is set up to display these symbols, from which a password can be determined by manual selection. The symbols that can be selected can be predetermined sections of an image. In general, the order of manual selection of the symbols can form part of the start vector. The device is preferably set up to convert the manual selection of symbols into a password that corresponds to a character string from a set of characters, such as alphanumeric passwords.

In embodiments in which the matrix is generated reproducibly randomly, in particular pseudo-randomly, the matrix memory is connected to a pseudo-random number generator, for example, and set up so that after a start value has been entered, the matrix memory is filled with a matrix.

The electronic component that is set up to encrypt and/or decrypt the data is preferably a computer that is set up to perform the XOR function for the data section of the plain text and a binary key, and is also referred to here as an XOR computer . The XOR calculator has an interface for inputting the key, an interface for inputting and/or outputting the data constituting the plaintext, and an interface for inputting and/or outputting the crypto block.

In a preferred embodiment, the device is set up to divide the data into data sections and to encrypt these sections separately. The sections can each have the same length or number of points, or different lengths. The binary key preferably has the same length or number of positions as the section of the data to be encrypted that forms the plain text.

More preferably, the device is set up to generate a sequence of keys and to encrypt sections of the data with the keys, e.g. with the keys in the sequence in which they were generated or with predetermined keys in their sequence.

To generate the sequence of keys, the device is set up to generate a binary key and enter this as input into the matrix and to generate another binary key and also enter this again as input into the matrix to generate yet another binary key generate which form the sequence of keys. Each passage of a binary key through a matrix generates another primary key vector and from this another binary key.

In order to generate a sequence of keys, the device can optionally be set up to enter a crypto block as input into the matrix and to generate a further binary key with which a next data section is encrypted. In this implementation, each subsequent binary key is dependent on the previously generated key and a data portion. At least one of the crypto blocks, preferably each crypto block, is generated from a binary key and a data section of the plain text.

In a preferred embodiment, the device is set up to divide a plain text into a series of at least 3 adjacent data sections and to encrypt the second data section to form a first crypto block with a first binary key, to enter the first crypto block as input into the matrix and thus to enter another generate a binary key and use it to encrypt the next section of data. In this embodiment, the last data section of the series is encrypted with a binary key that was generated by entering the crypto block for the penultimate data section. The first data chunk is finally encrypted with the key generated by entering the cryptoblock associated with the last data chunk of the series into the matrix. In this embodiment, the decryption can be performed by a device that is set up to enter the one cryptoblock as input into the matrix in order to generate the key for the next cryptoblock and to decrypt it.

In the method for generating a sequence of keys, it is generally preferred that the data sections, the binary keys and/or the crypto blocks are provided with an index for their sequence. Accordingly, the device can be set up to provide data sections, binary keys and/or crypto blocks with an index for their order. Preferably the index is encrypted as part of the crypto block.

The device is preferably set up to use the same matrix for each generation of a further key. Alternatively, the device can be set up to enter each or specific ones from the sequence of binary keys into another matrix in order to generate a further key. When generating a sequence of primary Keys can be any key from the sequence of keys used to encrypt the portions of the data, or only a predetermined number or further keys generated by a predetermined number of passes through a matrix, optionally at least two matrices. The device is preferably set up to record the number of inputs or runs of binary keys through the matrix and optionally to output this number, e.g. to append to a binary key, e.g. only to a key or a copy of a key that only to the XOR -Calculator and not re-entered as input to the matrix. Alternatively, the number of passes of binary keys through the matrix can be appended to a binary key which is then fed as input to the matrix to generate another key such that the data appended to a binary key for the number of passes the affect another key. Here, appending the data for the number of runs to a binary key can be, for example, appending the number at the beginning, inside or at the end of the key.

An advantage of the invention is that with only one matrix or with a number of at least two matrices, one binary key or at least two binary keys are generated on the basis of a start vector, the binary key being generated separately from the encryption of the data and only binary keys generated by a processor from primary key vectors are communicated towards the electronic component for encryption and decryption.

An advantage resides in embodiments in which a generated binary key is input into an array to generate another binary key, repeating this loop at least once each time the binary key is input back into an array in that with only one start vector and with only one matrix, or with at least two different matrices, a sequence of a large number of binary keys can be generated, with the majority of probability not being inferred from one binary key to another binary key in the sequence can be.

In this embodiment, the XOR computer optionally has an interface for outputting the key or the sequence of keys, which is set up for transmitting keys to the matrix memory. In this embodiment, the XOR calculator preferably has only one input for entering keys, and an electronic component which is arranged between the matrix memory and the XOR calculator routes keys once to the XOR calculator and once as an input to the matrix memory. The XOR calculator preferably has a first register which is connected to an interface which is preferably a serial interface. The first register is set up to store the data and/or the crypto block in binary format. The binary key is preferably contained in a second register of an electronic component which is connected to the XOR calculator in order to transfer the binary key into the XOR calculator. The electronic component in which the matrix is contained has a third register in which the matrix is contained reversibly or fixed or irreversibly. In order to generate the primary key vector, the component which contains the third register is set up to sum up the values generated by the input of the start vector for each column for each row. For example, the third register may be contained in a bit-addressable memory, preferably random access memory (RAM). The third register can be distributed over several RAM blocks. A plurality of RAM blocks are preferably interconnected in such a way that they can be accessed in parallel.

The third register has an output connected to a check value reduction calculator and to the second register for transferring the binary key determined from the output of the third register to the second register. For example, the check value reduction calculator has a fourth register configured to receive positive integer entries and connected to the second register for transmitting the binary key generated from the primary key vector.

The second register is preferably connected to the input of the electronic component in which the matrix is contained in a third register in order to enter the binary key in the third register and generate another binary key.

The first and second registers are optionally set up to hold binary data.

Optionally, the device is set up so that it is activated when the input device is actuated for each input, or independently of the input, and carries out the method, in particular generating the at least one key and data entered into the electronic component for encryption with the key encrypt or run the decryption process with the key for entered crypto blocks. The device is set up, the Ver run for each entry, including incorrect password entries. A plain text is encrypted each time it is entered into the input device for entering a password, and each crypto block is treated with the decryption process, although for inputs that do not correspond to the password, a different binary key is generated and the decryption process from crypto blocks that are generated with a key based on another password, the original plain text is not generated.

Optionally, the device has no memory for a password and the method does not have a step of comparing the input of a password with a stored password.

Optionally, the device can be set up to output a response signal for each entry into the input device to enter a password, which gives the user direct control as to whether the entry corresponds to the correct password. Since the device of this embodiment can be set up in such a way that a response signal is output for each input, the response signal does not indicate whether the input, e.g. by manually selecting symbols, corresponds to the correct password. The user must therefore be able to recognize the response signal independently of the device and assign it to the correct password. For example, the response signal may be audible and/or visual, such as the presentation of an image on a display. Optionally, the device, e.g., the input device for entering a password, may include a memory having a predetermined function for generating a response signal in response to the input, or a plurality of pre-stored response signals associated with inputs. The response signal can be individual for each input or be the same for multiple inputs, e.g., for 10 to 100 different inputs.

• - 1 das Verfahren,
• - 2 eine bevorzugte Vorrichtung und in
• - 3 ein Beispiel für die Erzeugung eines binären Schlüssels

zeigen.The invention is described in more detail with reference to figures that are shown schematically in

• - 1 the procedure
• - 2 a preferred device and in
• - 3 an example of generating a binary key

show.

The 1 shows that a matrix 1 is filled or generated by a matrix generator 2 . The matrix generator 2 can contain, for example, a pseudo-random number generator or a memory that contains at least one predetermined instruction for generating a matrix. A start vector 3 is input into matrix 1 and matrix 1 outputs a primary key vector 4 . In this case, for example, each position of the start vector 3 is entered, for example, in a respective row of the matrix 1 and the matrix 1 outputs the sum of the ones at the end of each column, which is generated in the column. The effect of the matrix is that a one is summed up in the column only at the points at which a one is arranged and only for a one of the start vector entered in the row.

The primary key vector 4 is converted to a binary key 6 by means of check value reduction 5, optionally with the activation check 30. The check value 5 is preferably set in such a way that the binary key 6 has a content of 40 to 60% of ones. The binary key 6 is transferred to an electronic component for encryption 7 which, for example, performs the XOR function for the binary key 6 and the entered data 8 in order to generate the crypto block 9 therefrom.

An activation control 30 is formed from the activation counter 31 and a release device 32 . The activation counter 31 is set up to determine the number of ones in the binary key 6 and the release device 32 is set up to reduce the check value so that the number of ones in the digits of the binary key 6 reaches a predetermined value, e.g. 40% to 60%. , preferably 50% to 55% of the number of digits of the key 6.

The matrix 1, the matrix generator 2, the start vector 3, the primary key vector 4, the test value reduction 5 and the activation control 30 as well as the initially generated binary key 6 run in electronic components, which are preferably used exclusively with the component for encryption 7, e.g. an XOR computer, only for the transfer, in particular only for the transfer in one direction, of the binary key 6 to this component for encryption 7 are connected, and e.g. are separated from memories for the crypto block 9 and from memories for the data 8.

In the method, the steps of generating the primary key 6 run independently of the encryption 7, or outside of the electronic component 7 for encryption. As a result of this separation, the way in which the binary key 6 was generated cannot be derived and cannot be reproduced if the encryption component 7 is tapped or copied.

The decryption takes place by a crypto block 9 is entered into the electronic component for encryption 7, in which a binary key 6 is also entered to derive the To generate data 8 as plain text, in particular by means of the XOR function.

The start vector 3 can be generated by entering a password 10. Preferably, an input device, such as a keypad, for entering a password 10 is connected only to the electronic component that generates the start vector and only to the electronic component that contains the matrix 1.

The embodiment in which a data section is encrypted with a key and this generated crypto block is entered as input into the matrix 1 is indicated by the arrow leading from the electronic component 7 to the matrix 1 for encryption. This embodiment is in 2 indicated by the arrow, which leads from the electronic component 27 to the input device 25 for encryption.

The 2 shows schematically the structure of an embodiment of the device, which is set up for carrying out the method and contains a computer chip 20 for generating a sequence of keys. The computer chip 20 forms an electronic component 20 for generating a key and can be designed as an electronic component or a combination of several electronic components. The computer chip 20 includes a binary matrix memory 21 connected to a processor 22 capable of generating a matrix, for example by means of a pseudo-random number generator or a memory containing a plurality of matrices. The processor 22 forms an electronic component for generating a matrix 1. The processor 22 can be connected to an input device 23 which transmits a seed value for a pseudo-random number generator or at least a part of such a seed value can be converted by being entered into a matrix and the output of the matrix is used. Then the converted start value forms the actual start value. The matrix can come from a memory.

The processor 22 may be connected to an input device 23 which transmits a seed for a pseudo-random number generator, or at least part of such a seed may be converted by entering it into a matrix and transmitting the output of the matrix to the processor 22 as a seed becomes. The seed can be part of a password entered into the input device 23 or a complete password.

The input device 23 is only connected to the computer chip 20, for example, and is preferably connected to its processor 22 only to transmit a start value.

The input device 23 is also connected to a processor 24 for transmitting a password entered into the input device 23 . The processor 24 can be part of the computer chip 20 . The processor 24 is set up to generate a start vector on the basis of the password and is connected to the memory 21 by means of an input device 25 in order to enter the start vector into the matrix.

The memory 21 is connected at its output to a processor 26 which is set up to generate a binary key from the primary key vector output from the matrix of the memory 21 . The processor 26, which preferably contains an activation control, is set up, for example, for check value reduction of the primary key vector, and is preferably set up to generate the key with a predetermined content of ones, and can be part of the computer chip 20.

The processor 26 is preferably connected to the input device 25 in order to input binary keys into the matrix of the memory 21, so that a sequence of keys is generated when the matrix is run through several times. The processor 26 is connected to the electronic component 27 for encryption in order to transmit binary keys to the latter, preferably only to transmit binary keys in the direction of the electronic component 27 for encryption.

The electronic component 26 for encryption has an input 28 for data and an output 29 for crypto blocks, with crypto blocks being input into the input 28 for decryption and decrypted data being output at the output 29 .

The 3 shows a start vector 3 made up of 8 digits, which are entered in the corresponding row of matrix 1. The matrix shown here has 2 ³ = 8 rows and columns. Here, ones are shown as black digits, blank digits show zeros. For each one of the start vector 3, a one is generated at each one of the corresponding matrix row, and a zero is generated at each zero of the matrix. For each zero of the starting vector, a zero is generated at each zero of the matrix as well as at each one of the matrix. The 1's generated in the matrix are summed for each column of the matrix, yielding the primary key vector 4 shown for the embodiment in which all 1's are summed column by column. With a first test value equal to the sum of the ones of the start vector 3, here equal to 4, reduced by 1, ie first test value =3, this primary key vector 4 would result in a binary key 6 which has zero at all points, since the primary key vector 4 has values at all points that are not greater than a first check value=3.

Reducing the first check value by 1, ie 3−1=2, results in the binary key 6 shown, further reducing the first check value to 1 results in an activation count equal to 7 and the binary key 6b shown. Using a first check value = 1 and a second check value = 3 results in an activation count equal to 4 and the binary key 6c shown if a zero is generated in the binary key 6 for each column of the matrix or each digit of the primary key vector 4, for which the sum or the position of the primary key vector at least reaches the second test value.

In the embodiment of generating a binary key from the primary key vector by means of a modulo counter, e.g. modulo = 2, a zero is generated for every even number of ones in the primary key vector and a one is generated for every odd number, in this example the binary key 6d .

Reference List

1

matrix

2

matrix generator

3

start vector

4

primary key vector

5

test value reduction

6, 6a, 6b, 6c, 6d

binary key

7

Encryption, electronic component for encryption

8th

entered data (plain text)

9

crypto block

10

password

20

Computer chip, electronic component for generating keys

21

Binary matrix memory, matrix memory

22

Processor, electronic component for generating the matrix 1

23

input device

24

Processor for transmitting a password

25

input device

26

processor

27

electronic component for encryption

28

Input for data or crypto blocks

29

Output for crypto blocks or data

30

activation control

31

activation counter

32

release device

Claims (22)

Device for encrypting data (8) with an input device (23) for entering a password (10) and for the reproducible generation of a start vector (3) from the entry of the password (10), an electronic component (20) for generating at least a binary key (6) and which is connected to an electronic component (27) for the transmission of the at least one binary key (6), which is set up for encrypting data (8) into crypto blocks (9), which has an input ( 28) for data (8) and an output (29) for crypto blocks (9), wherein the electronic component (20), which is set up to generate the at least one binary key (6), has a reproducibly generated, binary-filled matrix ( 1) contains and is set up to generate at least one primary key vector (4) when a start vector (3) is entered into the binary-filled matrix (1) and from this to generate the at least one binary key (6) using test values eduction and to transmit this to the component (27) which is set up for encrypting data (8) into crypto blocks (9), the device having an activation control (30) with an activation counter (31) and a release device (32) has, wherein the device does not have a memory for a password and is activated for each entry into the input device (23) for entering a password (10) and that the device is set up to enter the binary key (6) as an entry into a matrix, to generate another binary key (6). gene, the device being set up to repeat this loop, in which the respective binary key (6) is entered back into a matrix, at least once in order to generate a sequence of binary keys (6). device after claim 1 , characterized in that the electronic component (20), which is set up to generate the at least one binary key (6), contains the binary-filled matrix (1) in a reversible memory from which the binary-filled matrix (1) is removed when the power is switched off. is deleted, this component (20) being connected to a processor (22) with a pseudo-random number generator or a generator for generating a pseudo-random, rule-based or predetermined, binary-filled matrix (1). device after claim 1 , characterized in that the electronic component (20), which is set up to generate the at least one binary key (6), contains the binary-filled matrix (1) in an irreversible memory. Device according to one of the preceding claims, characterized in that the activation control (30) is set up to generate the at least one binary key (6) with a predetermined content of ones. Device according to one of the preceding claims, characterized in that it is set up to subdivide incoming data (8) into data sections at the input (28) and to encrypt them with the at least one binary key (6). Device according to one of Claims 1 until 4 , characterized in that it is set up to divide the data (8) into a series of data sections and to encrypt at least one data section with the binary key (6) to form at least one crypto block (9) and to encrypt this crypto block (9) in the binary Enter a filled matrix (1) to generate a next binary key (6) and use this to encrypt another data section. Device according to one of the preceding claims, characterized in that the electronic component (27), which is set up for the encryption of data (8), has or consists of an XOR computer. Device according to one of the preceding claims, characterized in that the electronic component (20), which is set up to generate the at least one binary key (6), for the transmission of binary keys (6) only in the direction of the component (27), which is set up for encrypting data (8) is connected to it. Device according to one of the preceding claims, characterized in that the input device (23) is connected to a processor (22) which contains a pseudo-random number generator and is set up to generate a binary start vector (3) with this on the basis of the password (10). and is connected to the electronic component (20), which is set up to generate the at least one binary key (6) in order to enter the binary start vector (3) into the binary-filled matrix (1). Device according to one of the preceding claims, characterized in that the input device (23) for entering a password (10) is set up to output a response signal with each entry. Device according to one of the preceding claims, characterized in that it is set up to provide data sections, binary keys (6) and/or crypto blocks (9) with an index for their order. Device according to one of the preceding claims, characterized in that it is set up to use the same matrix for each generation of a further binary key. Device according to one of Claims 1 until 11 , characterized in that it is set up, for each generation of a further binary key, to enter each or specific ones from the sequence of binary keys into another matrix in order to generate a further key. Method for encrypting data (8) using at least one key, a binary matrix (1) being reproducibly generated and provided in an electronic component which contains a memory (21) for a binary matrix (1), a start vector (3 ) is entered into the binary matrix (1) and the binary matrix (1) outputs a primary key vector (4), from which a binary key (6) is generated, and only this to an electronic component (27) used for encryption is set up, is transmitted, the data (8) is input into this component (27), which is set up for encryption, is encrypted with the binary key (6) and is output from it as at least one crypto block (9), the start vector (3) is generated reproducibly from the input of a password and the method has no step of comparing a password with a stored password, the binary key (6) being input into a binary Matrix (1) is entered to generate another binary key (6) and this loop, in which the binary key (6) is entered into a binary matrix (1), is repeated at least once to generate a sequence of binary generate keys (6). procedure after Claim 14 , characterized in that the matrix (1) is provided in the electronic component, which contains a memory (21) for the binary matrix (1), that a seed value is entered into a pseudo-random number generator and the binary matrix (1) out the output of which is generated or that the binary matrix (1) is generated based on rules or is read out from a memory, the binary matrix (1) being transferred to the electronic component which contains a memory (21) for a binary matrix (1). becomes. procedure after Claim 14 or 15 , characterized in that the binary matrix (1) is provided in the electronic component containing a memory (21) for the binary matrix (1) in that this electronic component contains the binary matrix (1) irreversibly. Procedure according to one of Claims 14 until 16 , characterized in that the data (8) are encrypted using the XOR function with the binary key (6). Procedure according to one of Claims 14 until 17 , characterized in that the start vector (3) is generated by entering the password (10) into the input device (23) which is connected to the transmission of the start vector (3) only in the direction into the electronic component which has a memory (21) for the binary matrix (1), and the start vector (3) is transferred into this component and entered into the binary matrix (1). Procedure according to one of Claims 14 until 18 , characterized in that the data (8) are divided into data sections and these data sections are each encrypted with one of the binary keys (6) from the sequence of binary keys (6) to form crypto blocks (9). Procedure according to one of Claims 14 until 19 , characterized in that the data (8) are divided into data sections and the binary keys (6) have the same length as the data sections. Procedure according to one of Claims 14 until 20 , characterized in that the same matrix is used for each generation of a further binary key. Procedure according to one of Claims 14 until 20 , characterized in that for each generation of a further binary key, each or certain ones of the sequence of binary keys are entered into a different matrix in order to generate a further key.

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