DE102019110666B3 - Operating circuit and method for operating at least one device on a bus line - Google Patents

Abstract

The invention relates to an operating circuit (10) and a method for operating at least one device (11) on a bus line (12), in particular on a DALI bus. The operating circuit has a converter circuit arrangement (13) which has at least one storage component (17) that can store electrical energy, in particular at least one inductance (18) and / or at least one capacitor (19). An output stage (15b) of the converter circuit (15) provides an operating voltage (UB) for the bus line. A transmission circuit (20) is also connected to the bus line (12). A control device (22) controls the transmission circuit (20) so that the transmission circuit can generate a transmission signal (TX) at the instigation of the control device (22), depending on which a bus signal (UD) on the bus line (12) changes. A coupling circuit (21) couples the transmission circuit (20) to the output stage (15) and transmits a coupling signal (K) to the output stage (15). The control device (22) monitors a supply voltage (UV) and, if a supply voltage error occurs, causes a transmission signal (TX) to be generated which assumes an error signal state. Due to the error signal state of the transmission signal (TX), the coupling signal (K) switches the output stage (15) to the blocking state. The removal of electrical power from the converter circuit (13) via the bus line (12) is then prevented.

Description

The invention relates to an operating circuit and a method for operating at least one device on a bus line. The operating circuit or the method can work according to the DALI standard. It is, so to speak, a DALI bus line or a DALI device connected to it.

DALI bus systems and devices connected to them are known. The connected devices are supplied with electrical energy via the DALI bus and control information can be transmitted via the DALI bus.

EP 2 524 578 B1 describes a device for a lamp application and a method for controlling the device. An internal DALI bus is connected to an external DALI bus via a separation unit. The control gear is connected to the internal DALI bus. If no electrical energy is provided on the external DALI bus, the electrical operating device is supplied with power by means of an internal power supply that is connected to the internal DALI bus. The separation unit is then switched to the blocking state. If the external DALI bus is working normally, the separation unit is in the conductive state and the internal DALI bus is supplied with electrical energy via the external DALI bus.

From WO 2013/113888 A1 known energy supply has a battery for emergency power operation, which is charged via a battery charger during normal operation when an external supply voltage is applied. If the external supply voltage fails, the connected devices can continue to be operated using the battery.

US 2003/0036807 A1 describes a DALI lighting system in which several devices are connected to a DALI bus. The devices are supplied with electrical energy via a voltage converter. The devices can communicate with each other via the bus.

U.S. 4,931,742 A relates to a self-protected system to avoid damage that can occur in the event of overvoltages on a supply bus for supplying electrical power. The system has a test power supply which applies test voltages to the supply bus during a test sequence. The test voltages are lower than the voltages applied by a main power supply. If no low-resistance connections are found during a test, the main power supply is switched on. Otherwise, the system can be shut down to avoid damage.

US 2010/0287399 A1 discloses a power supply circuit for a USB interface. A controller monitors a voltage on a voltage divider that is connected to a bus line. If the voltage at the voltage divider assumes a value that does not correspond to normal operation, the connection between a voltage source and the bus line is interrupted.

Starting from the prior art, it is an object of the present invention to optimize a fault shutdown when a fault occurs in an external supply voltage without an additional emergency energy source.

This object is achieved by the operating circuit with the features of patent claim 1 and the method with the features of patent claim 12.

The operating circuit is set up to operate at least one device on a bus line. The operating circuit has a converter circuit arrangement with at least one converter circuit having at least one storage component that can store electrical energy. The converter circuit arrangement can have an intermediate circuit with a storage component, in particular an intermediate circuit capacitor, as the storage component. The at least one memory component is in particular a capacitor or an inductor. The at least one memory component is already present in the converter circuit arrangement, for example in an intermediate circuit connected to a converter circuit on the input side or output side and / or in a converter stage of the converter circuit. The converter stage of the at least one converter circuit can be designed, for example, as a step-up converter, step-down converter, forward converter, flyback converter or in accordance with any other known converter topology. In particular, the converter circuit or the operating circuit does not have an emergency energy source, such as a battery or an accumulator.

The converter circuit arrangement with the at least one converter circuit is designed to convert a supply voltage present on the input side into an operating voltage. The operating voltage is at least also made available to the bus line.

A transmission circuit is also connected to the bus line. The sending circuit is for sending a message containing a message Bus signal set up via the bus line. The bus signal can be coded, for example, in particular in the manner of Manchester coding. The time course of the operating voltage is changed for coding. The bus signal can preferably assume two states, namely digital HIGH or digital LOW. Electrical energy for supplying the at least one device connected to the bus line is also transmitted via the bus signal. The bus signal thus has a double function: transmission of information and transmission of electrical energy.

The operating circuit also has a coupling circuit which is connected to the transmission circuit. A coupling signal describing the transmission signal is transmitted to an output stage of the converter circuit arrangement by means of the coupling circuit.

The operating circuit also has a control device which is set up to monitor a variable characterizing the supply voltage and, if a supply voltage error occurs, to control the transmission circuit in such a way that the transmission signal assumes an error signal state or goes into an error signal mode. In the error signal state or error signal mode, the transmission signal can be a time-invariant continuous signal or a time-changing predetermined signal course, e.g. a predetermined sequence of digital states or bits. This error signal state is transmitted to the output stage of the converter circuit arrangement or the at least one converter circuit by means of the coupling signal. In the error signal state, the coupling signal switches the output stage to a blocking state. In this blocking state of the output stage, no energy is released to the bus line. The supply of the operating voltage for the bus line is omitted.

If an error occurs in the supply voltage, it is avoided that the at least one connected device can continue to draw electrical energy from the converter circuit via the bus line. The electrical energy stored in the at least one memory component of the converter circuit arrangement is then available for essential voltage failure measures, for example in order to write data contained in a volatile memory to a non-volatile memory. For example, the control device can have a non-volatile memory and a volatile memory or be connected to a non-volatile memory and a volatile memory and use the remaining energy in the at least one memory component in order to save the information contained in the volatile memory.

The control device can have a microcontroller or be formed by a microcontroller.

When sending a message in error-free normal operation, the bus signal preferably has a constant duty cycle of, for example, 50%, i.e. the bus signal is digital HIGH 50% of the time and digital LOW 50% of the time when a message is sent via the transmission circuit. If the bus signal does not need to be coded to transmit a message, the bus signal is preferably constantly digital HIGH in error-free normal operation. In the error signal state, the bus signal is preferably digital LOW.

The at least one converter circuit preferably has a converter stage and an output stage connected downstream of the converter stage. The converter circuit can also have several converter stages. The converter circuit arrangement preferably has only one output stage or only one output stage per bus line. For example, there can be an output stage for each separate bus line. The output stage is set up to smooth the converter output voltage provided by the preceding converter stage. As a result, so-called ripples, which can occur in the converter output voltage, can be eliminated and a very uniform operating voltage can be provided.

The control device for the energy supply is preferably connected to the intermediate circuit of the converter circuit arrangement or to the input or the output of the converter stage. Regardless of the state of the output stage, the control device can thus draw electrical energy from the converter circuit arrangement or the converter stage. In particular, the control device can be connected or coupled to the converter stage via a secondary winding of a transformer in order to draw electrical energy from the converter circuit arrangement.

As already mentioned, the control device can have a volatile memory and a non-volatile memory. The control device is set up to write at least some of the data contained in the volatile memory to the non-volatile memory when it detects that a supply voltage error has occurred by monitoring the variable characterizing the supply voltage. As a result, important information for operating the at least one device on the bus line can be saved and this information is not lost even if a supply voltage fault occurs.

The output stage of the converter circuit arrangement preferably has at least one control component having a control input, for example a transistor or another controllable semiconductor component. The control component can thus be controlled by means of the control input. The control component can be switched to a blocking state by suitable activation. In this blocking state, the removal of electrical energy from the converter stage into the bus line and into other parts of the operating circuit connected to the bus line can be prevented.

The coupling circuit is preferably connected to the control input of the control component of the output stage. In this way, the control component can be switched into the blocking state by means of the coupling signal.

It is also advantageous if a current limiting circuit is present between the output stage of the converter circuit arrangement and the bus line. A current flowing into the bus line can be limited by means of the current limiting circuit.

In the method according to the invention for operating at least one device on a bus line, in particular an operating circuit according to one of the exemplary embodiments described above can be used. The procedure is as follows:

In normal operation, a supply voltage is converted into an operating voltage via the converter circuit arrangement and made available for the bus line. The supply voltage or an associated current or an associated voltage is monitored by the control device. If the supply voltage is not sufficiently high or if no supply voltage is provided at all (supply voltage = zero), this supply voltage error is recognized by the control device. The control device then controls the transmission circuit, which is connected to the bus line, and causes the transmission signal to assume an error signal state. For example, in the error signal state, the transmit signal has the effect that the bus signal is constantly digital LOW. A coupling signal is transmitted to an output stage of the converter circuit arrangement by means of a coupling circuit. The coupling signal is characteristic of the transmission signal and thus indicates the error signal status of the transmission signal. As a result, the output stage is switched to a blocking state, so that the operating voltage for the bus line is not provided. The removal of energy from the converter circuit into the bus line is prevented. The electrical energy stored in the at least one memory component is therefore available to initiate important measures due to the supply voltage fault, for example to save data contained in volatile memories of the operating circuit.

• 1 ein Blockschaltbild eines Ausführungsbeispiels einer Betriebsschaltung,
• 2 einen Schaltplan eines Ausführungsbeispiels einer Betriebsschaltung gemäß 1,
• 3 beispielhafte zeitliche Verläufe für Signale der Betriebsschaltung aus 2.

Advantageous embodiments of the invention emerge from the dependent claims, the description and the drawings. In the following, preferred exemplary embodiments of the invention are explained in detail with reference to the accompanying drawings. Show it:

• 1 a block diagram of an embodiment of an operating circuit,
• 2 a circuit diagram of an embodiment of an operating circuit according to 1 ,
• 3 exemplary time courses for signals of the operating circuit 2 .

In 1 Figure 3 is a block diagram of one embodiment of an operating circuit 10 illustrated. The operating circuit 10 is set up to have at least one device 11 connected to a bus line 12 the operating circuit 10 is connected to operate. With the device 11 it can be, for example, a sensor, an actuator, a lighting unit with at least one lamp or the like. A motion sensor or a brightness sensor, for example, can be used as the sensor. In the exemplary embodiment, the bus line is designed as a DALI bus line. The operating circuit 10 is set up to work according to the DALI standard.

Like it in 1 illustrated has the bus line 12 two wires at different potentials, between which there is a voltage that a bus signal UD corresponds. The bus voltage or the bus signal UD becomes all devices 11 provided to the bus line 12 are connected.

The operating circuit includes converter circuitry 13 which is set up to have a supply voltage applied to the input side UV into an operating voltage UB to walk. The operating voltage UB is used for the bus line 12 provided so based on the operating voltage UB the bus signal UD can be formed. The converter circuitry 13 has an intermediate circuit in the exemplary embodiment 14th and a converter circuit 15th . The converter circuit 15th has a converter stage 15a and an output stage 15b on. As an alternative to the representation, several converter stages can also be used 15a in series in front of the output stage 15b be switched.

The supply voltage UV can be a rectified mains voltage UN or another external voltage generated by an external voltage source 27 is provided and in normal operation at the input of the converter circuit arrangement 13 and according to the example at the intermediate circuit 14th is applied. The intermediate circuit 14th has to buffer the supply voltage UV an intermediate circuit capacitor 19z .

The converter stage 15a can be designed as a switched-mode power supply. The converter stage 15a can have a buck converter, a boost converter, a flyback converter, a forward converter or any other suitable converter topology for this purpose. Combinations of the converter topologies mentioned are also possible. The converter stage is at its output 15a a converter output voltage UW ready, the input side at an output stage 15b the converter circuit is present. The output stage is on the output side 15b for example indirectly and alternatively directly with the bus line 12 connected and provides the operating voltage on the output side UB ready. In the embodiment is between the output stage 15b and the bus line 12 a current limiting circuit 16 switched to one in the bus line 12 limit flowing current.

The converter circuitry 13 and according to the example the intermediate circuit 14th and / or the converter stage 15a has or have at least one memory component 17th which is set up to store electrical energy. The memory device 17th is in particular not an additionally present energy storage component, but rather a component of the converter circuit arrangement anyway 13 . The converter stage 15a has, for example, at least one inductance anyway 18th and / or at least one capacitor 19th on, the storage device that stores electrical energy 17th can be used. In the intermediate circuit 14th is the intermediate circuit capacitor 19z an already existing memory component 17th . Additional emergency energy stores, such as rechargeable batteries or the like, which are used exclusively to store energy in an emergency, are in the converter circuit arrangement 13 or the operating circuit 10 not present in this embodiment.

The operating circuit 10 also has a transmission circuit 20th that with the bus line 12 connected is. The transmission circuit 20th is set up by influencing the bus signal UD a message to the at least one device 11 to be able to transfer. The bus signal UD or the bus voltage has two functions: On the one hand, information or messages can be transmitted by the transmission circuit 20th the timing of the bus signal UD or the bus voltage. On the other hand, there is at least one device for the 11 electrical energy for its operation is provided by the device 11 via the bus line 12 removes.

In the embodiment described here, the bus signal UD preferably coded, in particular according to the Manchester coding. The bus signal UD can, for example, assume two states, namely digital HIGH or digital LOW. The transmission circuit 20th is set up for this, the bus signal UD in error-free normal operation of the operating circuit 10 to leave the same digital HIGH if no message is to be sent. If a message is to be transmitted in error-free normal operation, the bus signal UD alternately switched between the state digital HIGH and the state digital LOW, so that a duty cycle of 50% results. Depending on whether a rising edge from digital LOW to digital HIGH or a falling edge from digital HIGH to digital LOW occurs in a time interval, the at least one device 11 a corresponding bit 0 or 1 transfer. In this way, a bit sequence can be generated and transmitted to the at least one device without the energy transmission through the bus signal UD to interrupt for a long time.

To the bus signal UD to encode accordingly and to transmit a message is generated by the transmission circuit 20th a broadcast signal TX that shows the state or the time course of the bus signal UD pretends. By means of a coupling circuit 21st the operating circuit 10 becomes the transmission circuit 20th with the converter circuitry 13 and especially the output stage 15b the converter circuit 15th coupled. The coupling circuit 21st generates the transmit signal TX and / or the bus signal UD characterizing coupling signal K to the converter circuitry 13 and according to the example the output stage 15b is transmitted. By means of the coupling signal K can provide the operating voltage UB for the bus line 12 be prevented. In the exemplary embodiment, the coupling signal K the output stage in a corresponding state 15b switch to a blocking state in which the output stage 15b No electrical energy to the bus line on the output side 12 gives.

The operating circuit 10 also has a control device 22nd . The control device 22nd is set up to do this, the transmission circuit 20th to drive to the transmission circuit 20th to cause a message to be sent. By means of the control device 22nd is generating the transmit signal TX in the transmission circuit 20th caused. The control device 22nd has a volatile memory in the exemplary embodiment 23 as well as a non-volatile memory 24 . The operating circuit 10 can alternatively or in addition to the control device 22nd other components or assemblies 25th have volatile memory 23 and / or a non-volatile memory 24 exhibit. The control device 22nd or the one or more assemblies 25th the operating circuit 10 One or more input signals E can be transmitted in each case, for example user inputs, sensor values or the like.

The control device 22nd the operating circuit 10 is also set up to control the supply voltage UV or the supply voltage UV monitor descriptive electrical variable and the transmission circuit when a supply voltage error occurs 20th to control in such a way that the transmission signal TX assumes an error signal state or switches to an error signal mode. In the exemplary embodiment, the bus signal is UD in the error signal state of the transmit signal TX constant digital LOW. This error signal state is maintained as long as the control device 22nd the supply voltage error of the supply voltage UV recognizes. In the error signal state or error signal mode, a predetermined time-variant transmission signal could also be generated which is characteristic of the error signal state or error signal mode, for example having a specific bit sequence and / or frequency.

For monitoring the supply voltage UV can the control device 22nd via a measuring circuit 26th one for the supply voltage UV characteristic voltage reading AROUND record or another for the supply voltage UV characteristic monitoring signal SV determine. For example, the control device 22nd also with the external voltage source 27 or the intermediate circuit 14th be connected. As an alternative or in addition, it is also possible to adjust the converter output voltage UW to monitor.

Detects the control device 22nd a supply voltage fault via the monitoring signal SV , causes the control device 22nd by controlling the transmission circuit 20th generating a transmission signal TX according to the error signal state. The coupling signal K becomes according to the error signal state of the transmission signal TX via the coupling circuit 21st changed so that it is used for switching the output stage 15b in the locking state. The output stage 15b then does not provide any operating voltage UB for the bus line 12 ready. A leakage of electrical energy from the converter circuitry 13 in the bus line 12 is then prevented.

Like it in 1 is illustrated, the controller 22nd not about the operating voltage UB or the bus line 12 supplied with electrical energy. The control device 22nd is to the converter circuitry 13 and especially the intermediate circuit 14th and / or the converter stage 15a the converter circuit 15th connected so that in at least one memory device 17th the converter circuitry 13 electrical energy still available for supplying energy to the control device 22nd can be used. Optionally, the at least one further assembly can also 25th for power supply to the converter circuit arrangement 13 be connected.

The connection of the control device 22nd to the converter circuitry 13 can for example via a secondary winding of a transformer of the converter stage 15a respectively. For example, the converter stage 15a have a flyback converter, with an additional secondary winding to supply the control device 22nd and / or the further assembly 25th is coupled to the primary winding. The coupling can be implemented with or without galvanic isolation.

This allows the control device 22nd and / or any other assembly 25th the operating circuit 10 that are used to supply power to the converter circuitry 13 is connected, which in the case of a supply voltage fault still in the at least one memory component 17th Use existing electrical energy to react to this fault with appropriate measures. In particular, at least parts of the data can be stored in one of the volatile memories 23 into a correspondingly allocated non-volatile memory 24 transmitted and stored there before the operational switching 10 fails due to a lack of electrical energy. These data are then available for resuming operations. Such data can be operator settings, sensor information or other information about the current status of the operating circuit 10 or one to the bus line 12 connected device 11 be characterizing data.

In 2 is an embodiment of the operating circuit 10 illustrated. For simplification, the external voltage source is 27 (please refer 1 ) not shown, only the intermediate circuit 14th with the intermediate circuit capacitor 19z at which the supply voltage, at least in error-free operation UV is applied. The converter stage 15a has a first output port 15c and a second output terminal 15d , being between the output terminals 15c , 15d the converter output voltage UW is applied. The second output port 15d the converter stage 15a is with a reference potential and according to the example with the ground M. connected.

The output stage 15b has a first transistor 35 on whose collector to the first output terminal 15c the converter stage 15a connected is. The collector of the first transistor 35 is also made up of a first resistor via a series circuit 36 and a zener diode 37 with mass M. connected. The connection point between the first resistor 36 and the cathode of the zener diode 37 is to the base of the first transistor 35 connected. The emitter of the first transistor 35 forms an output connection 15e the output stage 15b , at the opposite mass M. the operating voltage UB is applied. At an input port 16a the current limiting circuit 16 is the operating voltage UB the output stage 15b on. This input port 16a is via a series connection of a first diode 38 , a second diode 39 and a second resistor 40 with mass M. connected. The anode of the first diode 38 is with the input connector 16a the current limiting circuit 16 connected. The cathode of the second diode 39 is with the second resistance 40 and the base of a second transistor 41 connected. The second transistor 41 is designed as a pnp biopolar transistor. The emitter of the second transistor 41 is about a third resistance 42 with the input connector 16a the current limiting circuit 16 connected. The collector of the second transistor 41 forms an output connection 16b the current limiting circuit 16 . The anode of a third diode 43 is with the output connector 16b the current limiting circuit 16 connected. The cathode of the third diode 43 is on the one hand with one wire of the bus line 12 and on the other hand via a fourth diode 44 with mass M. connected. The cathode of the fourth diode 44 is with the cathode of the third diode 43 connected and the anode of the fourth diode 44 is with crowd M. and the other wire of the bus line 12 connected. The fourth diode 44 thus connects the two wires of the bus line 12 and is with respect to the bus signal UD or the bus voltage switched in reverse direction.

The transmission circuit 20th has a controllable transmission switch 45 , which in the embodiment by a field effect transistor 46 is formed. The switching path of the transmission switch 45 is between the wires of the bus line 12 switched. According to the example, the drain connection of the field effect transistor is connected to one wire of the bus line 12 and the source connection of the field effect transistor 46 with the other wire and, according to the example, with ground M. connected. Between the gate connection of the field effect transistor 46 and the source terminal is a fourth resistor 47 switched.

The transmission circuit 20th also has a series connection of a fifth resistor 48 and a first capacitor 49 on, being the fifth resistance 48 the series connection at the converter output voltage UW and the opposite connection of this series connection to ground M. is applied. The connection point between the fifth resistor 48 and the first capacitor 49 is with the collector of an optocoupler transistor 50 connected. The emitter of the optocoupler transistor 50 is to the gate of the field effect transistor 46 or a control connection of the transmission switch 45 as well as the fourth resistance 47 with mass M. connected. Via a signal generation circuit 51 generates the transmission circuit 20th the broadcast signal TX connected to an optocoupler diode 52 is created. The optocoupler diode 52 and the optocoupler transistor 50 are part of the same optocoupler. The signal generation circuit 51 is via the control device 22nd controlled. Instead of the optocoupler 50 , 52 Another galvanically separating component could also be used for signal transmission.

The coupling circuit 21st has a voltage divider in which a sixth resistor 53 and a seventh resistance 54 are connected in series. The sixth resistance 53 is with the control connection of the transmitter switch 45 or the gate of the field effect transistor 46 connected while the seventh resistance 54 with mass M. connected is. The connection point between the sixth resistor 53 and the seventh resistance 54 the voltage divider is connected to the base of a third transistor 55 connected. The collector of the third transistor 55 is to the base of the first transistor 35 connected. At the collector of the third transistor 55 and the base of the first transistor 35 is the coupling signal K on. The emitter of the third transistor 55 is via a fifth diode 56 with mass M. connected, the cathode of the fifth diode 56 with mass M. connected is. The base of the third transistor 55 is through a second capacitor 57 with mass M. connected. On the second capacitor 57 there is a capacitor voltage UC on.

The measuring circuit 26th has in this embodiment a voltage divider from an eighth resistor 58 and a ninth resistance 59 on, with this voltage divider between the supply voltage UV and mass M. is switched. The connection point between the eighth resistor 58 and the ninth resistance 59 is with the control device 22nd connected and forwards the voltage reading AROUND who is here the monitoring signal SV corresponds to the control device 22nd further.

It is pointed out at this point that when a resistor is mentioned, an ohmic resistor is meant.

With reference to the in 3 The time waveforms shown are the functionality of the Operating circuit 10 according to 2 explained below.

In 3 are the timing of the bus signal in the upper diagram UD and a stream ID through the send switch 45 or the drain-source connection of the field effect transistor 46 illustrated. The middle diagram in 3 shows an exemplary time profile of the transmission signal TX what qualitatively also the coupling signal K corresponds, whereby only the amounts can differ from each other. In addition, in the middle diagram in 3 the capacitor voltage UC illustrates that at the base of the third transistor 55 is applied. The lower diagram shows the operating voltage over time UB illustrated. These schematic time courses are only exemplary and serve to illustrate the functionality of the operating circuit 10 .

From the first time t1 requests the control device 22nd sending a message over the bus line 12 on. The bus signal UD therefore changes alternately between digital HIGH and digital LOW and, according to the example, has a duty cycle of 50%. This means that there is still sufficient electrical energy for the bus line 12 connected device 11 provided. It can be seen that during the transmission circuit 20th the broadcast signal TX generates the capacitor voltage UC increases to a value that is insufficient to the third transistor 55 to switch from its blocking to the conductive state. About the fifth diode 56 and the base-emitter junction of the third transistor 55 becomes the switching threshold of the third transistor 55 defined and thereby ensures that during a duty cycle of the bus signal UD of 50% no charging of the second capacitor 57 takes place on a capacitor voltage value, the conduction of the third transistor 55 could cause.

At a second point in time t2 the sending process ends. The second capacitor 57 discharges through the seventh resistance 54 and the capacitor voltage UC decreases from the second point in time t2 down to about zero. During normal error-free operation, the bus signal is UD permanently digital HIGH if no transmission takes place, i.e. if the control device 22nd the transmission circuit 20th and, for example, the signal generation circuit 51 does not cause the transmit signal TX to create.

The in 3 In the illustrated example, it is assumed that a supply voltage error occurs which is triggered by the control device 22nd via the monitoring signal SV and according to the example the measured voltage value AROUND is captured. The control device 22nd arranged for a third time t3 the transmission circuit 20th and, for example, the signal generation circuit 51 a broadcast signal TX to generate, which indicates this supply voltage error and in the exemplary embodiment, the transmission signal TX permanently set to digital HIGH. As a result, it increases due to the charging of the second capacitor 57 the capacitor voltage UC except for a voltage value that causes the third transistor 55 switches to its conductive state and the zener diode 37 shorts. The voltage at the base of the first transistor 35 decreases and the first transistor 35 goes into its blocking state. This takes the output stage 15b a locking state. The bus current ID and the operating voltage UB sink and at a fourth point in time t4 is the one in the bus line 12 outgoing electrical power essentially zero. Those still in the at least one memory device 17th stored electrical energy can through the control device 22nd or another assembly 25th can be used to take the necessary measures in this error state and, for example, data in a volatile memory 23 in a non-volatile memory 24 to write before the electrical energy is used up and the operating circuit 10 is completely disabled. This can ensure that when the operating circuit is restarted 10 required data is available and is not deleted by the supply voltage error.

The in 3 illustrated exemplary temporal course, it is assumed that at a fifth point in time t5 the supply voltage error is eliminated and the supply voltage UV is provided again in sufficient height. The operating circuit 10 then goes back to its error-free normal operation and as long as there is no send request, the bus signal is UD digital HIGH and the transmission signal TX digital LOW. The second capacitor 57 discharges and the capacitor voltage UC decreases from the fifth point in time t5 back down to zero. The operating voltage UB stands from or shortly after the fifth point in time t5 available again.

The invention relates to an operating circuit 10 and a method for operating at least one device 11 on a bus line 12 , especially on a DALI bus. The operating circuit has converter circuitry 13 that have at least one converter circuit 15th and at least one memory device 17th which can store electrical energy, in particular at least one inductor 18th and / or at least one capacitor 19th , 19z . One on the output side at a converter stage 15a the converter circuit 15th provided converter output voltage UW becomes an output stage 15b the converter circuit 15th made available and on the output side at the Output stage 15b a voltage to form the operating voltage UB for the bus line 12 provided. With the bus line 12 is also a transmission circuit 20th connected. A control device 22nd controls the transmission circuit 20th on, so that the transmission circuit at the instigation of the control device 22nd a broadcast signal TX can generate, depending on which a bus signal UD on the bus line 12 changes. In doing so, the operating voltage becomes so to speak UB educated and on the bus line 12 applied voltage modulates and forms the bus signal UD . A coupling circuit 21st couples the transmission circuit 20th with the output stage 15b and transmits a coupling signal K to the output stage 15b . The control device 22nd monitors one on the input side at the converter stage 15a applied supply voltage UV or a related electrical quantity and causes the transmission circuit 20th a transmit signal when a supply voltage fault occurs TX which assumes an error signal state. The broadcast signal TX on the one hand determines the bus signal UD and on the other hand the coupling signal K . By the error signal state of the transmission signal TX switches the coupling signal K the output stage 15b to the locking state. Subsequently, electrical power is drawn from the converter circuit arrangement 13 via the bus line 12 prevented. Electrical energy in the at least one storage component 17th is still saved, stands for the implementation of emergency measures in the operating circuit 10 ready, for example, to save important data that has not yet been saved in a non-volatile memory 24 .

List of reference symbols

10

Operating circuit

11

device

12

Bus line

13

Converter circuitry

14th

Intermediate circuit

15th

Converter circuit

15a

Converter stage

15b

Output stage

15c

first output connection of the converter stage

15d

second output connection of the converter stage

15e

Output connection of the output stage

16

Current limiting circuit

16a

Input terminal of the current limiting circuit

16b

Output terminal of the current limiting circuit

17th

Memory device

18th

Inductance of the converter circuitry

19th

Capacitor of the converter circuit arrangement

19z

DC link capacitor

20th

Transmission circuit

21st

Coupling circuit

22nd

Control device

23

volatile memory

24

non-volatile memory

25th

module

26th

Measuring circuit

27

external voltage source

35

first transistor

36

first resistance

37

Zener diode

38

first diode

39

second diode

40

second resistance

41

second transistor

42

third resistance

43

third diode

44

fourth diode

45

Send switch

46

Field effect transistor

47

fourth resistance

48

fifth resistance

49

first capacitor

50

Optocoupler transistor

51

Signal generation circuit

52

Optocoupler diode

53

sixth resistance

54

seventh resistance

55

third transistor

56

fifth diode

57

second capacitor

58

eighth resistance

59

ninth resistance

ID

Bus power

K

Coupling signal

M.

Dimensions

SV

Monitoring signal

t1

first point in time

t2

second point in time

t3

third point in time

t4

fourth point in time

t5

fifth point in time

TX

Transmission signal

UB

Operating voltage

UD

Bus signal

AROUND

Voltage reading

UV

Supply voltage

UW

Converter output voltage

UC

Capacitor voltage

Claims (12)

Operating circuit (10) for operating at least one device (11) on a bus line (12), with a converter circuit arrangement (13) having at least one storage component (17) storing electrical energy, the converter circuit arrangement (13) having at least one converter circuit (15) which is set up to convert a supply voltage (UV) into an operating voltage (UB), which is provided to the bus line (12), with a transmission circuit (20) connected to the bus line (12), which is set up to generate a transmission signal (TX) specifying a bus signal (UD) and the bus signal (UD) containing a message via the bus line (12) to the at least to transmit a device (11) connected to the bus line (12), the at least one connected device (11) being supplied with electrical energy via the bus line (12) by means of the bus signal (UD), with a coupling circuit (21) which is connected to the transmission circuit (20) and which transmits a coupling signal (K) characterizing the transmission signal (TX) to an output stage (15b) of the converter circuit arrangement (13), with a control device (22) which is set up to monitor the supply voltage (UV) and, if a supply voltage error occurs in the supply voltage (UV), to control the transmission circuit (20) in such a way that the transmission signal (TX) assumes an error signal state, whereby the The output stage (15b) of the converter circuit arrangement (13) is switched into a blocking state by means of the coupling signal (K) in which the operating voltage (UB) for the bus line (12) is switched off. Operational switching after Claim 1 , characterized in that each memory component (17) is either an inductance (18) or a capacitor (18). Operational switching after Claim 2 , characterized in that the converter circuit arrangement (13) has an intermediate circuit (14) with an intermediate circuit capacitor (19z), the intermediate circuit capacitor (19z) forming a storage component (17). Operating circuit according to one of the preceding claims, characterized in that the converter circuit arrangement (13) has a converter stage (15a). Operational switching after Claim 4 , characterized in that the output stage (15b) is set up to smooth the converter output voltage (UW) provided by the converter stage (15a). Operational switching after Claim 4 or 5 , characterized in that the control device (22) for energy supply is coupled to the input and / or the output of the converter stage (15a). Operational switching after Claim 6 , characterized in that the control device (22) is coupled to a primary winding of the converter stage (15a) via a secondary winding. Operating circuit according to one of the preceding claims, characterized in that the control device (22) is connected to a volatile memory (23) and a non-volatile memory (24) and is set up to store at least one when a supply voltage error occurs in the supply voltage (UV) To write part of the data contained in the volatile memory (23) in the non-volatile memory (24). Operating circuit according to one of the preceding claims, characterized in that the output stage (15b) has at least one control component (35) which can be controlled via a control input and which can be switched to a blocking state. Operational switching after Claim 9 , characterized in that the coupling circuit (21) is connected to the control input of the control component (35) of the output stage (15b). Operating circuit according to one of the preceding claims, characterized in that a current limiting circuit (16) is connected between the output stage (15b) of the converter circuit arrangement (13) and the bus line (12). A method for operating at least one device (11) on a bus line (12) using an operating circuit (10) having a converter circuit arrangement (13) having at least one storage component (17) storing electrical energy and at least one converter circuit (15), one to the The transmission circuit (20) connected to the bus line (12), which is set up to generate a transmission signal (TX) that specifies the bus signal (UD) and the bus signal (UD) containing a message via the bus line (12) to the at least one device (11 ), the at least one connected device (11) being supplied with electrical energy by means of the bus signal (UD), a coupling circuit (21) which sends a coupling signal (K) characterizing the transmission signal (TX) to an output stage (15b) of the Transmitted converter circuit arrangement (13), and a control device (22), wherein the method comprises the following steps: - Conversion of a supply voltage (UV) into an operating voltage (UB) by means of the converter circuit arrangement (13) and providing the operating voltage (UB) for the bus line (12) when a sufficiently large supply voltage (UV) is provided on the converter circuit arrangement (13), - Monitoring of the supply voltage (UV) by the control device (22) and control of the transmission circuit (20) when a supply voltage error occurs in the supply voltage (UV) in such a way that the transmission signal (TX) assumes an error signal state, whereby the output stage (15b) of the converter circuit arrangement (13) is switched into a blocking state by means of the coupling signal (K), in which the operating voltage (UB) for the bus line (12) is switched off.

Images