DE102018106754A1 - IMAGE SENSOR WITH ABSORPTION IMPROVEMENT SEMICONDUCTOR LAYER - Google Patents

Abstract

An image sensor with an absorption enhancement semiconductor layer is provided. In some embodiments, the image sensor includes a front side semiconductor layer, an absorption enhancement semiconductor layer, and a backside semiconductor layer that are stacked. The absorption enhancing semiconductor layer is stacked between the front side and back side semiconductor layers. The absorption enhancement semiconductor layer has an energy band gap lower than that of the front side semiconductor layer. Further, the image sensor includes a plurality of protrusions and a photodetector. The protrusions are defined by the backside semiconductor layer, and the photodetector is defined by the front side semiconductor layer, the absorption enhancement semiconductor layer, and the backside semiconductor layer.

Description

REFERENCE TO RELATED APPLICATION

This application claims the priority of the provisional U.S. Application No. 62 / 585,044 , filed on 13 November 2017, the content of which is hereby incorporated by reference in its entirety.

STATE OF THE ART

Integrated circuits (ICs) with image sensors are used in a wide range of modern electronic devices, such as in cameras and cell phones. More recently, complementary metal oxide semiconductor (CMOS) image sensors have come into widespread use largely replacing charged-coupled device (PIC) image sensors. Compared to CCD image sensors, CMOS image sensors are preferred because of lower power consumption, smaller size, faster data processing, direct data output, and lower manufacturing costs. Some types of CMOS image sensors include Front-Side Illuminated (FSI) and back-side Illuminated (PIC) image sensors.

list of figures

• 1 veranschaulicht eine Querschnittansicht einiger Ausführungsformen eines Bildsensors, der eine Absorptionsverbesserungshalbleiterschicht umfasst.
• Die 2A bis 2D veranschaulichen Querschnittansichten diverser ausführlicherer Ausführungsformen des Bildsensors der 1.
• 3 veranschaulicht eine Layout-Draufsicht einiger Ausführungsformen des Bildsensors der 1 und 2A bis 2D.
• Die 4A bis 4B veranschaulichen Querschnittansichten diverser ausführlicherer Ausführungsformen des Bildsensors der 3.
• Die 5 bis 12 veranschaulichen eine Reihe von Querschnittansichten einiger Ausführungsformen eines Verfahrens zum Bilden eines vorderseitenbeleuchteten (BSI)-Bildsensors mit einer Absorptionsverbesserungshalbleiterschicht.
• 13 veranschaulicht ein Ablaufdiagramm einiger Ausführungsformen des Verfahrens der 5 bis 12.
• Die 14 bis 21 veranschaulichen eine Reihe von Querschnittansichten einiger Ausführungsformen eines Verfahrens zum Bilden eines rückseitenbeleuchteten (BSI)-Bildsensors mit einer Absorptionsverbesserungshalbleiterschicht.
• 22 veranschaulicht ein Ablaufdiagramm einiger Ausführungsformen des Verfahrens der 14 bis 21.

Aspects of the present disclosure are best understood from the following detailed description with reference to the accompanying figures. It is emphasized that various elements are not drawn to scale in accordance with industry standard practice. Namely, the dimensions of the various elements may be arbitrarily increased or decreased for the sake of clarity of the discussion.

• 1 FIG. 12 illustrates a cross-sectional view of some embodiments of an image sensor including an absorption enhancement semiconductor layer. FIG.
• The 2A to 2D 12 illustrate cross-sectional views of various more detailed embodiments of the image sensor of FIG 1 ,
• 3 FIG. 12 illustrates a top layout view of some embodiments of the image sensor of FIG 1 and 2A to 2D ,
• The 4A to 4B 12 illustrate cross-sectional views of various more detailed embodiments of the image sensor of FIG 3 ,
• The 5 to 12 12 illustrate a series of cross-sectional views of some embodiments of a method of forming a side-lit (BSI) image sensor having an absorption enhancement semiconductor layer.
• 13 FIG. 12 illustrates a flowchart of some embodiments of the method of FIG 5 to 12 ,
• The 14 to 21 illustrate a series of cross-sectional views of some embodiments of a method of forming a backlit (BSI) image sensor having an absorption enhancement semiconductor layer.
• 22 FIG. 12 illustrates a flowchart of some embodiments of the method of FIG 14 to 21 ,

DETAILED DESCRIPTION

The present disclosure provides many different embodiments or examples for implementing various features of this disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are just examples and are not intended to be limiting. Forming a first feature over or on a second feature in the following description, for example, may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are interposed between the first and second features second feature may be formed so that the first and the second feature may not be in direct contact. In addition, the present disclosure may repeat reference numerals and / or reference characters in the various examples. This repetition is intended to be for simplicity and clarity and does not itself provide any relationship between the various embodiments and / or configurations discussed.

Further, spatial reference terms such as "below,""below,""lower,""above,""upper," and the like may be used herein for ease of description to describe the relationship of a feature or feature to one or more other features or features , as illustrated in the figures, to describe. The spatial terms may be intended to include different orientations of the device or device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatial reference descriptors used herein may be construed accordingly. Moreover, the terms "first,""second,""third,""fourth," and the like are merely generic identifiers and therefore may be referred to in US Pat various embodiments are exchanged. For example, while an element (eg, an etch, a dielectric layer, or a substrate) may be called a "first" element in some embodiments, in other embodiments, the element may be called an initial character on the second element.

A complementary metal oxide semiconductor (CMOS) image sensor may comprise a monocrystalline silicon semiconductor substrate and an array of pixel sensors arranged in the semiconductor substrate. The pixel sensors include respective photodetectors embedded in the semiconductor substrate, and further include respective pixel transistors arranged on a surface of the semiconductor substrate. The photodetectors are configured to absorb incident radiation and generate an electrical signal corresponding to the incident radiation.

A challenge with CMOS image sensors is that the CMOS image sensor is not used outdoors for radiation with a wavelength around 850 nanometers (called 850 nanometer radiation below). While the indoor CMOS image can be used for 850 nanometer radiation, outdoor solar radiation induces noise which reduces the sensitivity of the CMOS image sensor to the 850 nanometer radiation. Furthermore, the CMOS image sensor lacks sufficient sensitivity for the 850 nanometer radiation to compensate for the noise. Another challenge with the CMOS image sensor is that the monocrystalline silicon has a high energy bandgap and consequently a low absorption coefficient for high wavelength radiation. For example, the high wavelength radiation has radiation having a wavelength greater than about 900 nanometers. The CMOS image sensor therefore has poor quantum efficiency for high wavelength radiation, if not improved. Quantum efficiency (QE) is the fraction of incident photons contributing to the electrical signal. For example, the CMOS image sensor may have a quantum efficiency below 10% for radiation having a wavelength of about 940 nanometers, and / or may have a quantum efficiency of o% for radiation having a wavelength greater than about 1100 nanometers.

One approach to improving the CMOS image sensor is to increase a thickness of the semiconductor substrate, and the depth to which the photodetectors extend into the semiconductor substrate. The higher the wavelength of the incident radiation, the higher the absorption depth. However, this is difficult with existing CMOS processes and adds costs to fabricating the CMOS image sensor. Further, increasing the depth to which the photodetectors extend into the semiconductor substrate increases crosstalk and die size.

In view of the above, various embodiments of the present applications relate to an image sensor having an absorption enhancement semiconductor layer. In some embodiments, the image sensor includes a front side semiconductor layer, an absorption enhancement semiconductor layer, and a backside semiconductor layer that are stacked. The absorption enhancement semiconductor layer is stacked between the front side and back side semiconductor layers and has an energy band gap lower than that of the front side semiconductor layer. In some embodiments, the image sensor further includes a plurality of protrusions and a photodetector. The protrusions are defined by the backside semiconductor layer. The photodetector is defined by the front and back semiconductor layers as well as the absorption enhancement semiconductor layer.

Since the absorption enhancement semiconductor layer has a low energy band gap as compared with the front side semiconductor layer, the absorption enhancement semiconductor layer has a high absorption coefficient as compared with the front side semiconductor layer. This in turn improves the absorption of incident radiation by the photodetector, so that the photodetector has a high QE. The high QE allows the photodetector to be used for high wavelength radiation greater than about 800 nanometers. For example, the photodetector may be used for radiation having a wavelength greater than about 900, 940, 1100, or 1375 nanometers. As another example, the photodetector may be used outdoors for radiation having a wavelength between about 840 and 860 nanometers, regardless of noise from solar radiation. Further, the high QE allows the photodetector to be used for high wavelength radiation without a great strength. Cost, size, crosstalk or any combination of these is / are therefore low.

With reference to 1 is a cross-sectional view 100 some embodiments of an image sensor comprising a pixel sensor 102 provided with improved absorption. The image sensor may be front-lit (FSI) or backlit (BSI), for example. Further, the image sensor may be, for example, a CMOS image sensor, and / or may be, for example, an integrated circuit (IC) die or chip. The pixel sensor 102 with improved absorption is configured to absorb incident radiation 104 (For example, light) with a high wavelength absorb, and is by a composite substrate 106 and a passivation 108 Are defined. For example, the high wavelength may be greater than about 800 . 850 . 940 , 1100 or 1375 nanometers, and / or may be, for example, between about 1.0 and 2.5 microns, between about 0.8 and 2.5 microns, or about 0.8 and 3.0 microns.

The passivation layer 108 is located on a backside surface 106b of the composite substrate 106 around the back surface 106b to protect. The passivation layer 108 For example, it may include silicon dioxide, silicon nitride, a high-k dielectric, any other dielectric, or any combination of the foregoing. For example, as used herein, a high κ dielectric may include a dielectric having a dielectric constant κ greater than about 3 . 9 . 5 . 10 or 20 his. The composite substrate 106 includes a front side semiconductor layer 110 , an absorption enhancing semiconductor layer 112 and a backside semiconductor layer 114 ,

The front-side semiconductor layer 110 extends along a front surface 106f of the composite substrate 106 that along the back surface 106b of the composite substrate 106 lies, and defines it. The backside semiconductor layer 114 lies along the back surface 106b of the composite substrate 106 and defines them. In some embodiments, the backside semiconductor layer contacts 114 directly the passivation layer 108 , The front-side semiconductor layer 110 and the backside semiconductor layer 114 For example, silicon, other semiconductor material, or any combination of these, may include or include silicon. In some embodiments, the front side semiconductor layer is / are located 110 and / or the backside semiconductor layer 114 no semiconductor atoms other than silicon atoms.

In some embodiments, the backside semiconductor layer is 114 a semiconductor material having a systematic pore structure (ie, a porous semiconductor material) or comprises this. The backside semiconductor layer 114 may be made of or include nanoporous silicon, another porous silicon or other porous semiconductor material. The pores may be, for example, pores in micrometer size, nanometer size, pores of smaller size, or combinations of the foregoing. In some embodiments, the pores serve as a light trap for the incident radiation 104 , which improves absorption. For example, angled pore sidewalls can make it difficult for radiation to enter the pore to subsequently reflect out of the pores. Instead, it is more likely that the radiation will reflect within the pore until it is absorbed.

The absorption enhancement semiconductor layer 112 is vertical between the front side semiconductor layer 110 and the backside semiconductor layer 114 stacked. In some embodiments, the absorption enhancement semiconductor layer contacts 112 directly the front side semiconductor layer 110 at the front side heterojunction 116 and / or directly contacts the backside semiconductor layer 114 at the backside heterojunction 118 , The absorption enhancement semiconductor layer 112 has a low energy band gap to absorb the incident radiation 104 to improve. In some embodiments, the low energy bandgap is an energy band gap that is less than about 1.00, 0.80, 0.60, 0.66, or 0.40 electron volts (eV). Further, in some embodiments, the low energy bandgap is an energy band gap that is lower than that of the front side semiconductor layer 110 and / or the backside semiconductor layer 114 , The absorption enhancement semiconductor layer 112 For example, it may have an energy bandgap lower than about 1.0 eV while the front side semiconductor layer 110 may have an energy gap higher than about 1.1, 1.5, 2.0 or 5.0 eV. In some embodiments, there is a difference between an energy bandgap of the absorption enhancement semiconductor layer 112 and an energetic bandgap of the front side semiconductor layer 110 about 0.46 eV or less, about 0.5 eV or lower, is between about 0.2 and 0.5 eV or is between about 0.4 and 0.5 eV. The absorption enhancement semiconductor layer 112 For example, such a difference from the front side semiconductor layer 110 when the absorption enhancing semiconductor layer 112 Silicon germanium is or comprises and the front side semiconductor layer 110 Silicon is or includes. In some embodiments, the absorption enhancement semiconductor layer 112 also a direct energy band gap to the absorption of incident radiation 104 continue to improve. For example, the direct energy band gap can be photons 104p from the incident radiation 104 allow to be absorbed without dependence on phonons (for example crystal vibrations). The absorption enhancement semiconductor layer 112 For example, it may be or include germanium, silicon germanium, silicon (eg, monocrystalline silicon) doped with a chalcogen, another low energy bandgap semiconductor material, or any combination of the foregoing. The chalcogen may, for example, be or include sulfur (for example S), selenium (for example Se), tellurium (for example Te), another chalcogen or any combination of those mentioned above. In some embodiments, wherein the absorption enhancement semiconductor layer 112 is made of silicon doped with or comprises the chalcogen, the Absorption improving semiconductor layer 112 no semiconductor atoms other than silicon atoms. Further, in some embodiments, the absorption enhancement semiconductor layer 112 of silicon doped with or comprising the chalcogen, the absorption enhancing semiconductor layer 112 doped beyond the solubility limit of the chalcogen (i.e., supersaturated) to the subband gap absorption of the incident radiation 104 to facilitate.

In some embodiments, the absorption enhancement semiconductor layer 112 a strength T of about 10 to 3000 angstroms, 100 to 1500 angstroms, 1500 to 3000 angstroms, or a combination of the foregoing. In some such embodiments, the absorption enhancement semiconductor layer is 112 Si _0.8 Ge _0.2 or includes it. In some embodiments, the absorption enhancement semiconductor layer is 112 Si _0.8 Ge _0.2 or includes it, and / or has a thickness of about 950 to 1050 angstroms, about 975 to 1005 and 20 Ångström or about 1000 angstroms. In some embodiments, the front side semiconductor layer 110 same crystalline orientation as the backside semiconductor layer 114 ,

A photodetector 120 is from the composite substrate 106 containing the absorption enhancing semiconductor layer 112 has defined. The photodetector 120 For example, a p-type semiconductor region (not shown), an n-type semiconductor region (not shown), and a photo junction (not shown) may be included. The p-type semiconductor region and the n-type semiconductor region are formed by the composite substrate 106 and the photo transition is defined by the p-type semiconductor region and the n-type semiconductor region. The photo transition may include, for example, a PN junction or a PIN transition. The photodetector 120 is configured to detect the incident radiation 104 to convert into an electrical signal. The electrical signal may, for example, be electron-hole pairs 122 result in response to the composite substrate 106 photons 104p the incident radiation 104 absorbed, generated. The photodetector 120 For example, it may be a photodiode or any other photodetector.

Since the absorption enhancing semiconductor layer 112 has a low energy bandgap, has the absorption enhancement semiconductor layer 112 a high absorption coefficient. This in turn improves the absorption of the incident radiation 104 through the photodetector 120 so that the photodetector 120 has a high QE. The high QE allows the photodetector 120 , for radiation of high wavelength greater than about 800 Nanometer to be used. The photodetector 120 For example, for radiation having a wavelength greater than about 900, 940 . 1100 or 1375 nanometers can be used. As another example, the photodetector 120 used outdoors for radiation having a wavelength between about 840 and 860 nanometers, regardless of noise from solar radiation. Furthermore, the high QE allows the photodetector 120 to be used for the high wavelength radiation without the composite substrate 106 has a great strength. Cost, size, crosstalk or any combination of these is / are therefore low.

In some embodiments, a plurality of protrusions 124 from the composite substrate 106 that the backside semiconductor layer 114 includes, defined. For ease of illustration, only one of the protrusions 124 named with 124. The projections 124 are located along the back surface 106b of the composite substrate 106 and at least partially define an absorption enhancement structure 126 , The projections 124 are configured to prevent incident radiation from the photodetector 120 is reflected away. The projections 124 For example, they may have angled sidewalls to have such a reflectance. By preventing incident radiation from the photodetector 120 is reflected off, increase the tabs 124 the amount of radiation coming from the photodetector 120 is absorbed, indicating the sensitivity of the photodetector 120 elevated.

In some embodiments, the projections are 124 in a periodic structuring or a periodic arrangement. In some embodiments, the protrusions 124 each a cone shape, a pyramidal shape or any other shape. In some embodiments, the protrusions define a sawtooth profile. In some embodiments, the protrusions 124 a distance P of about 0.01 to 8.0 microns, about 0.2 to 5.0 microns, about 1.0 to 3.0 microns, or any combination of the foregoing. In some embodiments, the protrusions 124 a height H of about 0.2 to 20.0 microns, about 1.0 to 15.0 microns, about 5.0 to 10.0 microns, or any combination of the foregoing.

In some embodiments, wherein the backside semiconductor layer 114 is made of or comprises porous semiconductor material, the projections 124 and hence the absorption improvement structure 126 completely or partially defined by the porous semiconductor material. In some embodiments, the combination of the porous semiconductor material and the protrusions results 124 in that the absorption enhancement structure 126 a direct energy band gap has the quantum efficiency of the photodetector 120 elevated.

With reference to 2A , is a cross-sectional view 200A some more detailed embodiments of the image sensor of 1 provided. As illustrated, the first front side semiconductor layer comprises 110 a Front Charge Collection Area (CCR) 110c, a Floating Diffusion Region (FDR) 110f, and a Front Side Bulk Area 110b , The front side bulk area 110b surrounds the front side CCR 110c and lies on opposite sides of the front side CCR 110c , Further, the front bulk area encloses 110b a bottom of the FDR 110f , The FDR 110f and the front-side CCR 110c have a first doping type, and the front side bulk area 110b has a second doping type over the first doping type. The first doping type and the second doping type may each be, for example, n-type and p-type, or vice versa. The front-side semiconductor layer 110 For example, it may consist of or include monocrystalline silicon, any other crystalline semiconductor material, or any other semiconductor material.

The absorption enhancement semiconductor layer 112 includes an absorption enhancement CCR 112c and an absorption enhancing bulk area 112C , and the backside semiconductor area 114 includes a backside CCR 114c and a backside bulk area 114b , The absorption enhancement bulk area 112c surrounds the absorption enhancement CCR 112c and lies on opposite sides of the absorption enhancement CCR 112c , The backside bulk area 114b surrounds the backside CCR 114c and lies on opposite sides of the backside CCR 110c , The Absorption Enhancement CCR 112c and the backside CCR 114c have a first doping type, and the absorption enhancing bulk region 112b and the backside bulk area 114b have the second doping type. The absorption enhancement semiconductor layer 112 is a semiconductor material with a low energy band gap compared to the front side semiconductor layer 110 and / or the backside semiconductor layer 114 , The backside semiconductor layer 114 For example, it may be or include germanium, silicon germanium, crystalline silicon doped with a chalcogen, or any other semiconductor material. The backside semiconductor area 114 For example, it may be made of or include silicon or any other semiconductor material. In some embodiments, the backside semiconductor region is 114 made of nanoporous silicon or any other porous semiconductor material.

The photodetector 120 is from the front side semiconductor layer 110 , the absorption enhancing semiconductor layer 112 and the backside semiconductor layer 114 Are defined. The photodetector 120 includes a first semiconductor region 120f , a second semiconductor region (not named) and a photo transition 120p , The first semiconductor area 120f has an opposite doping to the second semiconductor region. The first semiconductor area 120f is used by the front, absorption enhancement and backside CCRs 110c . 112C . 114c the defined. In some embodiments, the first semiconductor region extends 120f continuous with a single doping type from the front surface 106f of the composite substrate 106 to the back surface 106b of the composite substrate 106 , The second semiconductor region becomes of the front side, absorption enhancement, and back side bulk regions 110b . 112b . 114b defines and surrounds the first semiconductor region 120f , In some embodiments, the second semiconductor region extends continuously with a single doping type from the first semiconductor region, from the front surface 106f of the composite substrate 106 to the back surface 106b of the composite substrate 106 , The photo transition 120p is from the first semiconductor region 120f and the second semiconductor region.

During use of the image sensor, radiation is directed to the photodetector 120 is incident from the first semiconductor region 120f and the second semiconductor region. As discussed above, the absorption enhancement semiconductor layer improves 112 and the absorption enhancement structure 126 such absorption. In response to absorbing a photon of the radiations, an electron hole pair is generated. When the electron hole pair is within a depletion region 120p of the photo transition 120 or a diffusion area of the photo transition 120p is generated, the electron of the pair diffuses, and the hole of the pair diffuses and / or drifts respectively to the first semiconductor region 120f and the second semiconductor region apart. For example, the electron of the pair diffuses and / or drifts to the first semiconductor region 120f and the hole of the pair diffuses and / or drifts to the second semiconductor region or vice versa. Such drift may be caused, for example, by an electric field of the photo transition 120p caused. Since the second semiconductor region is the first semiconductor region 120f surrounds an electron or a hole leading to the first semiconductor region 120f diffuses and / or drifts in the first semiconductor region 120f caught, which accumulates charge.

One or more pixel transistors are located on the front surface 106f of the composite substrate 106 to the output of the photodetector 120 to facilitate. The one or more pixel transistors may include a transfer transistor 202 , a source follower transistor (not shown), a row select transistor (not shown), a reset transistor (not shown), any other pixel transistor, or any combination of the foregoing. The transfer transistor 202 is configured to selectively charge, located in the first semiconductor region 120f of the photodetector 120 has accumulated to the FDR 110f to transfer. In some embodiments, the transfer transistor comprises 202 a first source-drain region (not named), a gate electrode 204 , a gate dielectric layer 206 and a second source-drain region. For example, the first source-drain region may be wholly or partially from the front-side, absorption-enhancement, and back-side CCRs 110c . 112C . 114c To be defined. The second source-drain region may be wholly or partially from, for example, the FDR 110f To be defined.

The gate electrode 204 is located between and adjacent to the first and second source-drain regions and is vertically above the composite substrate 106 through the gate dielectric layer 206 spaced. The gate electrode 204 For example, copper, aluminum-copper, any other metal, doped polysilicon, any other conductive material, or a combination of the foregoing may be included. The gate dielectric layer 206 For example, it may include silicon dioxide, a high-K dielectric, any other dielectric, or any combination of the foregoing. The first and second source-drain regions are doped semiconductor regions of the composite substrate 106 , the opposite doping types as surrounding regions of the composite substrate 106 to have. The first and second source-drain regions may be, for example, n-type or p-type.

In some embodiments, an isolation structure extends 208 in the front surface 106f of the composite substrate 106 and laterally surrounds the absorption enhanced pixel sensor 102 to the absorption-enhanced pixel sensor 102 from electrical components (not shown). Such surrounding components may include, for example, other pixel sensors, logic devices or memory devices. Furthermore, in some embodiments, the isolation structure extends 208 laterally into a closed path to the absorption enhanced pixel sensor 102 completely included. The isolation structure 208 For example, it may have a planar top layout that is annular. It should be noted that this is not within the cross-sectional view 200A the 2A is visible. The isolation structure 208 For example, it may be or include a shallow trench isolation (STI) structure, a deep trench isolation (DTI) structure, an implant isolation region, or any combination of the foregoing.

An interconnect structure 210 lies above the composite substrate 106 and the one or more pixel transistors (eg, the transfer transistor 202 ). Furthermore, where the insulation structure 208 is present, is the interconnect structure 210 over the isolation structure 208 , The interconnect structure 210 includes a dielectric barrier layer (ILD) 212 , a variety of wires 214 and a plurality of vias 216 , For ease of illustration, only a few of the wires are 214 named with 214, and only some of the vias 216 are named with 216. The wires 214 and the vias 216 are alternately in the ILD layer 212 stacked and define conductive paths that the absorption enhanced pixel sensor 102 and surrounding components (not shown). The vias 216 provide vertical guidance for the conductive paths, and the wires 214 provide lateral guidance for the conductive paths. The wires 214 For example, aluminum oxide, copper, aluminum, any other conductive material, or any combination of the foregoing may be or include. The vias 216 For example, copper, tungsten may be or include any other conductive material, or any combination of the foregoing. The ILD layer 212 For example, silicon dioxide, silicon nitride, a low-K dielectric (eg, fluorosilicate glass - FSG), any other dielectric, or any combination of the foregoing. For example, as used herein, a low-K dielectric may be a dielectric having a dielectric constant κ greater than about 3.9, 3.0, 2.0, or 1.0.

With reference to 2 B , is a cross-sectional view 200B of some other more detailed embodiments of the image sensor of 1 provided. As illustrated, is 2 B a variant of 2A containing a front side buffer layer 218 and a backside buffer layer 220 Has.

The front side buffer layer 218 separates the front side semiconductor layer 110 from the absorption enhancing semiconductor layer 112 and reduces the effects of lattice mismatch between the absorption enhancement semiconductor layer 112 and the front side semiconductor layer 110 , Such effects may include, for example, physical stress resulting in dark current and white pixels. The front side buffer layer 218 For example, it may be the same semiconductor material as the absorption enhancement semiconductor layer 112 or comprise the same semiconductor material as the front side semiconductor layer 110 , any other semiconductor material or a combination of previously mentioned. Furthermore, the front side buffer layer 218 For example, an increased carbon concentration compared to the absorption enhancement semiconductor layer 112 and / or the front-side semiconductor layer 110 include.

The backside buffer layer 220 separates the backside semiconductor layer 114 from the absorption enhancing semiconductor layer 112 and reduces the effects of lattice mismatch between the absorption enhancement semiconductor layer 112 and the backside semiconductor layer 114 , The backside buffer layer 220 For example, it may be the same semiconductor material as the absorption enhancement semiconductor layer 112 , the same semiconductor material as the front-side semiconductor layer 114 , any other semiconductor material, or a combination of the foregoing. Furthermore, the backside buffer layer 220 For example, an increased carbon concentration compared to the absorption enhancement semiconductor layer 112 and / or the backside semiconductor layer 114 include.

The photodetector 120 is from the front side semiconductor layer 110 , the absorption enhancing semiconductor layer 112 and the backside semiconductor layer 114 defines, and gets further from the front side buffer layer 218 and the backside buffer layer 220 Are defined. The first semiconductor area 120f of the photodetector 120 is used by the front, absorption enhancement and backside CCRs 110c . 112C . 114c which defines and continues from the first areas (not named) of the front and back buffer layers 218 . 220 next to the CCRs 110c . 112C . 114c the front, absorption improvement and back are defined. The second semiconductor region (not named) of the photodetector 120 is from the front, absorption enhancement and backside bulk areas 110b . 112b . 114b is defined, and continues from second areas (not named) of the front and back buffer layers 218 . 220 defined adjacent to the front, absorption enhancement, and backside bulk areas 110b . 112b . 114b lie.

With reference to 2C , is a cross-sectional view 200C of some other more detailed embodiments of the image sensor of 1 provided. As illustrated, is 2C a variant of 2A in which the backside semiconductor layer 114 a porous semiconductor layer 222 and a crystalline semiconductor layer 224 includes.

The porous semiconductor layer 222 lies below the crystalline semiconductor layer 224 and defines the back surface 106b of the composite substrate 106 , The porous semiconductor layer 222 includes a porous CCR 222c and a porous bulk area 222b , The porous bulk area 222b surrounds the porous CCR 222c and lies on opposite sides of the porous CCR 222C , Furthermore, the porous bulk area has 222b an opposite doping type to the porous CCR 222c , The porous bulk area 222b has the same doping type as the front-side and absorption-improving bulk regions 110b . 112b , and the porous CCR 222c has the same doping type as the front-side and absorption-enhancing CCR 110c . 112c , The porous semiconductor layer 222 is nanoporous silicon or comprises this or any other semiconductor material having a systematic pore structure. The pores may be, for example, pores in micrometer size, nanometer size, smaller size, or combinations of the foregoing.

The crystalline semiconductor layer 224 separates the porous semiconductor layer 222 from the absorption enhancing semiconductor layer 112 and has no systematic pore structure. The crystalline semiconductor layer 224 For example, it may be free of a systematic structure of nanometric and / or micrometric pores. Furthermore, the crystalline semiconductor layer comprises 224 a crystalline CCR 224c and a crystalline bulk area 224b , The crystalline bulk area 224b surrounds the crystalline CCR 224c and lies on opposite sides of the crystalline CCR 224c , Furthermore, the crystalline bulk area has 224b an opposite doping type to the crystalline CCR 224c , The crystalline bulk area 224b has the same doping type as the front-side and absorption-improving bulk regions 110b . 112b , and the crystalline CCR 224c has the same doping type as the front-side and absorption-enhancing CCR 110c . 112c , The crystalline semiconductor layer 224 For example, it may be monocrystalline silicon, polycrystalline silicon, or any other crystalline semiconductor material. Further, the crystalline semiconductor layer 224 for example, have an indirect energy band gap.

The projections 124 and hence the absorption improvement structure 126 be at least partially from the porous semiconductor layer 222 Are defined. In some embodiments, the pore size of the porous semiconductor layer decreases 222 gradually from the tips of the projections 124 to the crystalline semiconductor layer 224 to or from. For example, the pore size may range from an average size of about 40 nanometers at the tips to an average size of about 8 nanometers at the interface where the porous semiconductor layer 222 and the crystalline semiconductor layer 224 contact each other directly, gradually decrease. In some embodiments, the absorption enhancement structure 126 a direct energy band gap due to the combination of the protrusions 124 and the porous semiconductor layer 222 , That allows turn, that the absorption enhancement structure 126 incident radiation without phonons (for example crystal vibrations) absorbed.

The photodetector 120 is from the front side semiconductor layer 110 , the absorption enhancing semiconductor layer 112 and the backside semiconductor layer 222 , the porous semiconductor layer 222 and the crystalline semiconductor layer 224 Are defined. The first semiconductor area 120f of the photodetector 120 is used by the porous and crystalline front-side, absorption enhancement CCR 110c . 112c . 114c Are defined. The second semiconductor region (not named) of the photodetector becomes of the porous and crystalline front side, absorption enhancing bulk regions 110b . 112C . 222b . 224b Are defined. Furthermore, the photodetector overlaps 120 the absorption enhancement structure 126 , Because the photodetector 120 the absorption enhancement structure 126 overlaps, becomes the quantum efficiency of the photodetector 120 through the absorption enhancement structure 126 improved. The direct band gap of the absorption enhancement structure 126 For example, it improves the quantum efficiency of the photodetector 120 ,

Even though 2C the backside semiconductor layer 114 as both the porous semiconductor layer 222 as well as the crystalline semiconductor layer 224 comprehensively illustrated, the crystalline semiconductor layer 224 omitted in other embodiments. In some such other embodiments, the porous semiconductor layer 222 occupy the space currently occupied by the crystalline semiconductor layer 224 in 2C is occupied.

With reference to 2D , is a cross-sectional view 200D of some other more detailed embodiments of the image sensor of 1 provided. As illustrated, is 2D a variant of 2A in which the backside semiconductor layer 114 the porous semiconductor layer 222 and the crystalline semiconductor layer 224 and in which the front side buffer layer 218 and the backside buffer layer 220 the absorption enhancing semiconductor layer 112 each from the front-side semiconductor layer 110 and the backside semiconductor layer 114 separate. The porous semiconductor layer 222 and the crystalline semiconductor layer 224 For example, as with reference to 2C and the front side buffer layer 218 and the backside buffer layer 220 For example, as with reference to 2 B be described.

With reference to 3 becomes a layout top view 300 some embodiments of the image sensor of 1 and 2A to 2D provided. As illustrated, a logic area surrounds 302 laterally a pixel sensor arrangement 304 , The logic area 302 includes, for example, logic and / or memory devices (not shown) that are configured to receive data from the pixel sensor array 304 generated in response to incident radiation, read and / or store.

The pixel sensor arrangement 304 consists of a variety of absorption-enhanced pixel sensors 306 that are set up in X rows and Y columns. For ease of illustration, these are just a few of the absorption enhanced pixel sensors 306 named 306. X and Y are integers greater than zero and may be the same or different, for example. For example, X and Y can both 128 . 256 . 512 . 1024 . 2048 or 4096 his. As another example, X and Y may respectively 768 and 1024 . 1024 and 2048 . 256 and 1024 . 512 and 128 or 4096 and 1024 his. The absorption enhanced pixel sensors 306 each are individually configured like the absorption enhanced pixel sensor 102 in any of the 1 and 2A to 2D is configured.

An isolation structure 208 surrounds the pixel sensor array 304 laterally about the pixel sensor array 304 from the logic area 302 electrically isolate. It also surrounds the isolation structure 208 laterally each of the absorption enhanced pixel sensors 306 to the absorption-enhanced pixel sensors 306 electrically isolate each other.

With reference to the 4A and 4B , are cross-sectional views 400A . 400B various embodiments of the image sensor of 3 provided. The cross-sectional views 400A . 400B for example, along the line A in 3 be taken.

As from the cross-sectional view 400A the 4A 1, the image sensor is FSI and includes a plurality of absorption-enhanced pixel sensors 306a to 306c , The absorption enhanced pixel sensors 306a to 306c are individual according to the absorption enhanced pixel sensor 102 the 2A but may alternatively be configured individually according to the absorption enhanced pixel sensor 102 any one of 1 and 2 B to 2D be configured. Further, the absorption-enhanced pixel sensors become 306a to 306c from the interconnect structure 210 covered, and are each configured to receive incident radiation 104 through the front surface 106f and the interconnect structure 210 to recieve. In some embodiments, the wires are 214 the interconnect structure 210 and the vias 216 the interconnect structure 210 be on the side of the photodetector 120 the absorption enhanced pixel sensors 306a to 306c limited (that is, they are not directly above the photodetectors 120 are), so that Radiation is not hindered on the photodetectors 120 bounce. For ease of illustration, only a few of the wires are 214 named with 214, just some of the vias 216 are named with 216, and only some of the photodetectors 120 are with 120 named.

In some embodiments, a carrier substrate is located 402 under the passivation layer 108 and is bonded to it. The carrier substrate 402 For example, it may be a bulk silicon substrate, any other bulk semiconductor substrate, or any other substrate. In some embodiments, color filters cover 404 each of the absorption-enhanced pixel sensors 306a to 306c from. The color filters 404 are configured to pass assigned radiation wavelengths while blocking unassigned radiation wavelengths. For example, a color filter may be configured to transmit red radiation wavelengths while blocking blue radiation wavelengths, while another color filter may be configured to transmit blue radiation wavelengths while blocking red radiation wavelengths. In some embodiments, the color filters are 404 each by microlenses 406 covered, which are configured to receive incident radiation respectively on the photodetectors 120 the absorption enhanced pixel sensors 306a to 306c to focus. For ease of illustration, only a few of the color filters are shown 404 With 404 named, and only some of the microlenses 406 are with 406 named.

As from the cross-sectional view 400B the 4B is a variant of the 4A provided that the image sensor is BSI. In contrast to 4A , lie the absorption-enhanced pixel sensors 306a to 306c above the interconnect structure 210 , Further, the absorption enhanced pixel sensors are 306a to 306c each configured to receive incident radiation 104 through the back surface 106b and the passivation layer 108 to recieve. As in 2A , are the absorption enhanced pixel sensors 306a to 306c individually according to the absorption-enhanced pixel sensor 102 the 2A but may alternatively be configured individually according to the absorption enhanced pixel sensor 102 any one of 1 and 2 B to 2D be configured.

With reference to the 5 to 12 , will take a series of cross-sectional views 500 to 1200 of some embodiments of a method of forming an FSI image sensor with absorption enhanced pixel sensors. The method can be used, for example, to control the image sensor of the 4A to build. As noted above, the image sensor is the 4A with respect to an embodiment of the 2A but may alternatively be combined with the embodiments of any of 1 and 2 B to 2D be used. It must therefore be understood that the method also with the embodiments of any of 1 and 2 B to 2D can be used.

As from the cross-sectional view 500 the 5 illustrates a front side semiconductor layer 110 provided. In some embodiments, the front side semiconductor layer is 110 a bulk silicon substrate, a bulk semiconductor substrate, or any other semiconductor substrate. In some embodiments, the front side semiconductor layer is 110 monocrystalline silicon, any other silicon, or any other porous semiconductor material or comprises it. In some embodiments, the front side semiconductor layer 110 a single material. In some embodiments, the front side semiconductor layer 110 an n- or p-type doping. In some embodiments, the front side semiconductor layer 110 a single doping type.

An absorption enhancing semiconductor layer 112 comprising a front side semiconductor layer 110 Covering is also made from the cross-sectional view 500 the 5 illustrated. This absorption enhancement semiconductor layer 112 has a low energy band gap. In some embodiments, the low energy band gap is an energy band gap that is less than about 1.00 eV, 0.80 eV, 0.60 eV, 0.66 eV, or 0.40 eV. Further, in some embodiments, the low energy bandgap is an energy band gap that is smaller than that of the front side semiconductor layer 110 , In some embodiments, the absorption enhancement semiconductor layer 112 also a direct energy band gap. As a result of the low energy band gap and / or the direct energy band gap, the absorption enhancement semiconductor layer has 112 a high absorption coefficient, which improves the QE of photodetectors formed thereafter. In some embodiments, the absorption enhancement semiconductor layer 112 an n- or p-type doping. In some embodiments, the absorption enhancement semiconductor layer 112 the same doping type as the front side semiconductor layer 110 and / or has a single doping type. The absorption enhancement semiconductor layer 112 For example, it may consist of or include germanium, silicon germanium, silicon, crystalline silicon doped with a chalcogen, another low energy bandgap semiconductor material, or a combination of the foregoing. The chalcogen may, for example, sulfur (for example S), selenium (for example Se), tellurium (for example, Te), another chalcogen or any combination of the foregoing.

In some embodiments, the absorption enhancement semiconductor layer becomes 112 by doping a bulk semiconductor substrate with the chalcogen. In such embodiments, the absorption enhancement semiconductor layer is 112 a chalcogen-doped region of the bulk semiconductor substrate, and the front-side semiconductor layer 110 is a remainder of the bulk semiconductor substrate. The doping may also be carried out, for example, by ion implantation or any other doping process. Further, in some embodiments, the absorption enhancement semiconductor layer 112 doped with the chalcogen, the absorption enhancement semiconductor layer 112 doped beyond the solubility limit of the chalcogen (i.e., supersaturated) to facilitate the sub-band gap absorption of the photons. The supersaturation may be performed, for example, by ion implantation followed by Pulsed Laser Melting (for example, 1 to 7, 2 to 6, 3 to 5 or 4 laser shots).

In other embodiments, the absorption enhancement semiconductor layer becomes 112 formed by epitaxy. For example, epitaxy may be performed by chemical vapor deposition (CVD), physical vapor deposition (PVD), any other deposition process, molecular beam epitaxy, or any other epitaxial process. In some of the epitaxial embodiments, the absorption enhancement semiconductor layer is 112 silicon germanium or germanium or includes this. Alternatively, in some of the epitaxial embodiments, the absorption enhancement semiconductor layer 112 of crystalline silicon doped with the chalcogen or includes this. The doping may also be carried out, for example, by ion implantation or any other doping process. Further, in some of the epitaxial embodiments, the absorption enhancement semiconductor layer is 112 supersaturated with the chalcogen as described above.

As of the cross section 500 the 5 Illustrated is a backside semiconductor layer 114 the absorption enhancing semiconductor layer 112 covering formed. In some embodiments, the backside semiconductor layer has 114 an n- or p-type doping. In some embodiments, the backside semiconductor layer has 114 a single doping type. In some embodiments, the backside semiconductor layer has 114 the same doping type as the front side semiconductor layer 110 and / or the absorption enhancing semiconductor layer 112 , In some embodiments, the backside semiconductor layer has 114 a higher energy bandgap than the absorption enhancement semiconductor layer 112 , The backside semiconductor layer 114 For example, monocrystalline silicon, porous silicon, any other semiconductor material, the same semiconductor material as the front side semiconductor layer 110 or any combination of the foregoing. In some embodiments, the backside semiconductor layer has 114 a single material. The backside semiconductor layer 114 can be formed, for example, by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process.

In some embodiments, the strength becomes T the absorption enhancing semiconductor layer 112 controlled such that the backside semiconductor layer 114 has the same crystalline direction as the front side semiconductor layer 110 , If the strength T the absorption enhancing semiconductor layer 112 For example, the backside semiconductor layer may be large 114 have a different crystalline direction than the front side semiconductor layer 110 , In addition, in some embodiments, the absorption enhancement semiconductor layer 112 Silicon germanium is or includes a germanium concentration in the absorption enhancement semiconductor layer 112 controlled such that the backside semiconductor layer 114 has the same crystalline direction as the front side semiconductor layer 110 , In some embodiments, absorption enhancement semiconductor layer is 112 Si _0.8 Ge _0.2 or includes it, and has a thickness T between about 1000 to 3000 angstroms, by about 900 to 1100 Ångström or about 500 to 1500 angstroms, so that the backside semiconductor layer 114 has the same crystalline direction as the front side semiconductor layer 110 ,

The backside semiconductor layer 114 , the absorption enhancing semiconductor layer 112 and the front side semiconductor layer 110 define a composite substrate 106 , The front-side semiconductor layer 110 extends along a front surface 106f of the composite substrate 106 and defines it, and the backside semiconductor layer 114 extends along a backside surface 106b of the composite substrate 106 and defines them. The back surface 106b and the front surface 106f lie on opposite sides of the composite substrate 106 ,

As from the cross-sectional view 600 the 6 illustrates is a plurality of protrusions 124 in the composite substrate 106 formed, including the backside semiconductor layer 114 , For ease of illustration, only one of the protrusions 124 named with 124. The projections 124 at least partially define an absorption enhancement structure 126 and prevent incident radiation therefrom from the composite substrate 106 to reflect away. The projections 124 For example, they may have angled sidewalls to have such a reflectance. As a result, the tabs improve 124 the sensitivity of the photodetectors thereafter in the composite substrate 106 be formed. In some embodiments, the projections are 124 in a periodic structuring or a periodic arrangement. In some embodiments, the protrusions 124 each a cone shape, a pyramidal shape or any other shape. In some embodiments, the protrusions define a sawtooth profile.

In some embodiments, a process includes forming the protrusions 124 the dry etching of the backside semiconductor layer 114 , For example, a photoresist layer 602 on the backside semiconductor layer 114 formed and with a structure of the protrusions 124 be structured. A dry etchant may then be applied to the backside semiconductor layer 114 with the photoresist layer 602 applied in place to the projections 124 to form, and the photoresist layer 602 can then be stripped. In some embodiments, the dry etchant damages the backside semiconductor layer 114 , resulting in electron traps along the back surface 106b of the composite substrate 106 results. The electron traps can in turn lead to leakage current, dark current and white pixels. In some embodiments, the process includes forming the protrusions 124 therefore, further, the wet etching of the backside semiconductor layer 114 to remove the damage. For example, a wet etchant may be applied to the backside semiconductor layer 114 before or after stripping the photoresist layer 602 be applied. The wet etchant may be, for example, tetramethylammonium hydroxide (TMAH) or any other wet etchant.

In some embodiments, a systematic pore structure is formed in the backside semiconductor layer 114 educated. The pores may be, for example, pores in micrometer size, nanometer size, smaller size, or combinations of the foregoing. The pores serve as a light trap for the incident radiation, thereby improving the QE of the photodetectors formed thereafter. Further, in some embodiments, the combination of the systematic pore structure and the protrusions results 124 in that the absorption enhancement structure 126 has a direct energy band gap, which also improves the QE of the photodetectors. In some embodiments, a process of forming the systematic pore structure includes performing an etch in the backside semiconductor layer 114 , The etching may be performed, for example, by applying a solution of hydrofluoric acid to the backside semiconductor layer 114 and then activating the hydrofluoric acid. The hydrofluoric acid may be activated, for example, electrochemically by applying sufficient voltage to the solution (anodic etching), electrochemically by adding an oxidant having a sufficient standard electrode potential to the solution (stain-etching), or photoelectrochemically by irradiating the solution with a solution Laser or a lamp with a sufficiently short wavelength to excite electrons in the solution to the conduction band. In some embodiments, the solution further comprises iron nitride. The process of forming the systematic pore structure may be before, during or after the process of forming the protrusions 124 be executed.

As from the cross-sectional view 700 the 7 illustrates a passivation layer 108 that the back surface 106b of the composite substrate 106 covers, formed. The passivation layer 108 has an inner surface 108i leading to the back surface 106b of the composite substrate 106 is directed, and further has an outer surface 1080 opposite the inner surface 108i , In some embodiments, the inner surface is 108i the passivation layer 108 formally matches and / or directly touches the back surface 106b of the composite substrate 106 , In some embodiments, the outer surface is 1080 the passivation layer 108 substantially flat and / or substantially planar. The passivation layer 108 For example, it may include silicon dioxide, silicon nitride, a high k dielectric, any other dielectric, or any combination of the foregoing.

In some embodiments, a process for forming the passivation layer includes 108 the deposition of the passivation layer 108 on the back surface 106b of the composite substrate 106 and then performing a planarization in the outer surface 1080 the passivation layer 108 , The deposition may be performed by, for example, thermal oxidation, CVD, PVD, sputtering, or any other deposition process. The planarization can be performed, for example, by chemical mechanical polishing (CMP) or any other planarization process.

As from the cross-sectional view 800 the 8th illustrates, in some embodiments, the backside surface 106b of the composite substrate 106 to a carrier substrate 402 through the passivation 108 bonded. The carrier substrate 402 For example, it may be a monocrystalline bulk silicon substrate, any other silicon substrate, an SOI substrate, any other semiconductor substrate, or any other substrate. In some embodiments, the bonding is performed by a fusion bonding process or any other bonding process.

As from the cross-sectional view 900 the 9 illustrates the structure of the 8th turned vertically. Further, the composite substrate is 106 on the front side surface 106f of the composite substrate 106 diluted, reducing the strength of the composite substrate 106 and a thickness of the front side semiconductor layer 110 be reduced. The dilution reduces a strength of the composite substrate 106 from a first strength T ₁ on a second strength T ₂ , The second strength T ₂ may be smaller than a third strength, for example T ₃ of the carrier substrate 402 , In some embodiments, the composite substrate becomes 106 by performing etching and / or planarization in the front side semiconductor layer 110 diluted. For example, the planarization may be performed by a CMP or any other planarization process.

As from the cross-sectional view 1000 the 10 Illustrated is a variety of absorption enhanced pixel sensors 306a to 306c on the front side surface 106f of the composite substrate 106 educated. Each of the absorption enhanced pixel sensors 306a to 306c includes a photodetector 120 that of the front-side semiconductor layer 110 , the absorption enhancing semiconductor layer 112 and the backside semiconductor layer 114 is defined. For ease of illustration, only a few of the photodetectors 120 With 120 named. The photodetector 120 the absorption enhanced pixel sensors 306a to 306c includes a first semiconductor region 120f , a second semiconductor region (not named) and a photo transition 120p , For ease of illustration, only a few of the first semiconductor regions are 120f named with 120f, and just a few of the photo transitions 120p are with 120p named. The first semiconductor area 120f has a first doping type and the second semiconductor region has a second doping type opposite to the first doping type. The first semiconductor area 120f is surrounded by the second semiconductor region, and the first semiconductor region 120f and the second semiconductor region partially or completely define the photo transition 120p , The photo transition 120p may be, for example, a PN junction, a PIN transition, or any other photo transition.

In some embodiments, the first semiconductor region is 120f the absorption enhanced pixel sensors 306a to 306c completely or partially through a front-side CCR 110c the front side semiconductor layer 110 , an absorption enhancement CCR 112c the absorption enhancing semiconductor layer 112 and a backside CCR 114c the backside semiconductor layer 114 Are defined. For ease of illustration, these are just a few of the front-side CCRs 110c With 110c named, just some of the absorption-enhanced CCR 112c are with 112c named, and only some of the backside CCR 114c are with 114c named. In some embodiments, the second semiconductor regions are the absorption enhanced pixel sensors 306a to 306c completely or partially through a front bulk area 110b the front side semiconductor layer 110 , an absorption enhancing bulk range 112b the absorption enhancing semiconductor layer 112 and a backside bulk area 114b the backside semiconductor layer 114 Are defined.

In some embodiments, a process includes forming the photodetector 120 implanting dopants into the composite substrate 106 to the first semiconductor areas 120f to build. In some embodiments, the semiconductor substrate 106 initially a single doping type such that doping is performed using dopants of opposite doping type. The doping may be performed, for example, using ion implantation or any other doping process, and / or may, for example, use a photoresist mask to selectively implant the dopants.

Each of the absorption enhanced pixel sensors 306a to 306c further comprises a transfer transistor 202 , For ease of illustration, only a few of the transfer transistors 202 With 202 named. Each transfer transistor 202 the absorption enhanced pixel sensors 306a to 306c includes a gate electrode 204 , a gate dielectric layer 206 , a first source-drain region (not designated) and a second source-drain region (not mentioned). For ease of illustration, only a few of the gate electrodes are shown 204 With 204 named, and only some of the gate dielectric layers 206 are with 206 named. The gate dielectric layer 206 lies above the front-side semiconductor layer 110 , and the gate electrode 204 lies above the gate dielectric layer 206 , The first and second source-drain regions are at least partially through the front-side semiconductor layer 110 and have the same doping type as that of the front bulk area 110b is opposite. Further, the first and second source-drain regions are respectively on opposite sides of the gate electrode 204 so that the gate electrode 204 between the first and second source-drain regions taken to the sandwich. The first source-drain region may be formed, for example, by a respective one of the first semiconductor regions 120f the photodetectors 120 be defined. The second source-drain region may be formed, for example, by a floating diffusion region (FDR). 110f the front side semiconductor layer 110 be defined.

In some embodiments, a process of forming the transfer transistors 202 before forming the photodetectors 120 executed. In other embodiments, the process of forming the transfer transistors 202 while making the photodetectors 120 executed. Further, in some embodiments, the process includes forming the transfer transistors 202 forming a dielectric layer and an electrode layer disposed on the front side semiconductor layer 110 are stacked. The dielectric layer may be formed, for example, by thermal oxidation, PVD, CVD, sputtering, any other deposition process, or any combination of the foregoing. The electrode layer may be formed, for example, by electrochemical plating, electroless plating, PVD, CVD, sputtering, any other deposition or plating process, or any combination of the foregoing. Further, in some embodiments, the process includes forming the transfer transistors 202 performing an etching in the dielectric layer and in the electrode layer around the gate electrodes 204 and the gate dielectric layers 206 and then implanting dopants into the front side semiconductor layer 110 to define the first and second source-drain regions.

Also from the cross-sectional view 1000 the 10 also illustrates an isolation structure 208 formed in the front side semiconductor layer 110 extends to the absorption-enhanced pixel sensors 306a to 306c to separate and surround. In some embodiments, the isolation structure becomes 208 before forming the absorption enhanced pixel sensors 306a to 306c educated. The isolation structure 208 For example, it may be formed as an STI structure, a DTI structure, an implant isolation region, or any other isolation structure. In some embodiments, the process includes forming the isolation structure 208 the etching of the front-side semiconductor layer 110 to form trenches and then to fill the trenches with a dielectric material.

As from the cross-sectional view 1100 the 11 illustrates an interconnect structure 210 formed the absorption-enhanced pixel sensors 306a to 306c and the composite substrate 106 covers. The interconnect structure 210 includes an ILD layer 212 , a variety of wires 214 and a plurality of vias 216 , For ease of illustration, only a few of the wires are 214 With 214 named, and only some of the vias 216 are with 216 named. The wires 214 be alternating with the vias 216 in the ILD layer 212 stacked to define electrically conductive paths that the absorption enhanced pixel sensors 306a to 306c Pair with each other and / or other components.

In some embodiments, a process includes forming the interconnect structure 210 repeatedly forming an ILD sub-layer (ie, a sub-layer of the ILD layer 212 ) over the composite substrate 106 , performing a planarization into an upper surface of the ILD sublayer, selectively etching the ILD sublayer to form a via opening and / or a wire opening, and filling the via opening and / or the wire opening with a conductive material. The ILD sublayer can be formed by, for example, thermal oxidation, PVD, CVD, sputtering, any other deposition process, or any combination of the foregoing. For example, the planarization may be performed by a CMP or any other planarization process. The selective etching may be carried out, for example, "selectively" by using photolithography. The filling may be performed, for example, by CVD, PVD, electroplating, electroless plating, any other deposition or plating process, or any combination of the foregoing. In some embodiments, the process includes forming the interconnect structure 210 Repeatedly performing a dual damascene process or a single damascene process around the wires 214 and the vias 216 to build. The dual damascene process simultaneously forms two conductive features (eg, a wire and a via), while the single damascene process forms a single conductive feature (eg, a wire or a via) at one time.

As from the cross-sectional view 1200 the 12 illustrates a variety of color filters 404 on the interconnect structure 210 educated. For ease of illustration, only a few of the color filters are shown 404 With 404 named. The color filters 404 are each above the absorption-enhanced pixel sensors 306a to 306c and each passes through associated radiation wavelengths while blocking unassigned radiation wavelengths. In some embodiments, the color filters become 404 by making a color filter layer for first radiation wavelengths, structuring the color filter layer and then repeating formed for different radiation wavelengths.

As also from the cross-sectional view 1200 the 12 illustrates a variety of microlenses 406 on the color filters 404 educated. For ease of illustration, only a few of the microlenses 406 With 406 named. The microlenses 406 are each above the color filters 404 and focus incident radiation onto the absorption enhanced pixel sensors, respectively 306a to 306c , In some embodiments, a process includes forming the microlenses 406 forming a microlens layer over the color filters 404 and then structuring the microlens layer into microlens templates that are for the microlenses 406 are individual.

Although not illustrated, in other embodiments, an additional absorption enhancement semiconductor layer may be conformed to the protrusions 124 between the passivation layer 108 and the backside semiconductor layer are formed. The additional absorption enhancement semiconductor layer may, for example, be like the absorption enhancement semiconductor layer 112 as for 5 and / or may, for example, be like the absorption enhancement semiconductor layer 112 in terms of 5 is described. A challenge with these other embodiments is that other components on the composite substrate ( 106 (see for example Logic area 302 the 3 ) Can limit temperatures used during formation of the additional absorption enhancement semiconductor layer. Exceeding the temperature limit can damage these other components. As a result of the temperature limit, the additional absorption enhancement semiconductor layer may have poor crystalline quality and / or dopants that are not fully activated, which may lead to leakage current, dark current, and white pixels. It should be noted that, since the absorption enhancement semiconductor layer 112 early in the process, the absorption enhancement semiconductor layer 112 is not subject to a temperature limit.

With reference to 13 , is a flowchart 1300 some embodiments of the method of 5 to 12 provided.

at 1302 For example, an absorption-improving semiconductor layer is formed on a front-side semiconductor layer. The absorption enhancement semiconductor layer has an energy band gap lower than that of the front side semiconductor layer. See for example 5 , The high absorption layer may be, for example, germanium, silicon germanium or monocrystalline silicon doped with a chalcogen. The high absorption layer may further have, for example, a direct energy band gap or an indirect energy band gap.

at 1302 Also, a backside semiconductor layer is formed on the absorption enhancement semiconductor layer. The front-side semiconductor layer, the absorption-enhancing semiconductor layer, and the back-side semiconductor layer jointly define a composite substrate. See for example 5 ,

at 1304 For example, a plurality of protrusions in the backside semiconductor layer are formed along a back surface of the composite substrate. The protrusions at least partially define an absorption enhancement structure. See for example 6 ,

at 1306 a passivation layer is formed on the back surface of the composite substrate. See for example 7 ,

at 1308 For example, a carrier substrate is bonded to the back surface of the composite substrate through the passivation layer. See for example 8th ,

at 1310 For example, the composite substrate is thinned on a front surface of the composite substrate, whereby a thickness of the composite substrate and a thickness of the front side semiconductor layer are thinned. See for example 9 ,

at 1312 On the front surface of the composite substrate, a pixel sensor is formed. The pixel sensor includes a photodetector partially defined by the absorption enhancement semiconductor layer and the absorption enhancement structure. See for example 10 , Since the absorption enhancement semiconductor layer has a low energy bandgap, the absorption enhancement semiconductor layer has a high absorption coefficient. This, in turn, improves the absorption of incident radiation by the photodetector, so that the photodetector is high QE Has. The height QE allows the photodetector to be larger than about for high wavelength radiation 800 Nanometer to be used. Furthermore, it allows the high QE the photodetector, to be used for high wavelength radiation without a great strength. Cost, size, crosstalk or any combination of these is / are therefore low.

at 1314 an interconnection structure is formed that covers the pixel sensor on the front surface of the composite substrate. The The interconnect structure has an ILD layer, wires, and vias, and the wires and vias are stacked alternately in the ILD layer. See for example 11 ,

at 1316 For example, a color filter and a microlens are stacked on the interconnect structure. See for example 12 ,

Although the flowchart 1300 As illustrated and described herein as a series of acts or events, it will be appreciated that the illustrated sequence of such acts or events should not be construed in a limiting sense. For example, some acts may occur in different orders and / or concurrently with other acts or events separate from those illustrated and / or described herein. Furthermore, not all illustrated acts may be required to implement one or more aspects or embodiments of the description, and one or more of the acts depicted herein may be performed in one or more separate acts and / or phases.

With reference to the 14 to 21 , will take a series of cross-sectional views 1400 to 2100 of some embodiments of a method for forming a BSI image sensor with absorption enhanced pixel sensors. The method can be used, for example, to control the image sensor of the 4B to build. As noted above, the image sensor is the 4B with respect to an embodiment of the 2A but may alternatively be combined with the embodiments of any of 1 and 2 B to 2D be used. It must therefore be understood that the method also with the embodiments of any of 1 and 2 B to 2D can be used.

As from the cross-sectional view 1400 the 14 Illustrated is a backside semiconductor layer 114 provided or formed. In some embodiments, the backside semiconductor layer is 114 a bulk silicon substrate, any other bulk semiconductor substrate, or any other semiconductor substrate. The backside semiconductor layer 114 For example, it may be or include monocrystalline silicon, nanoporous silicon, any other silicon, any other semiconductor material, or any combination of the foregoing. Furthermore, the backside semiconductor layer 114 for example, have an n-type or p-type doping.

In some embodiments, the backside semiconductor layer comprises 114 a first backside semiconductor sublayer 114f and a second backside semiconductor sublayer 114s containing the first backside semiconductor sublayer 114f covers. The first backside semiconductor sublayer 114f For example, it may be or include a bulk silicon substrate, a bulk semiconductor substrate, or any other substrate. The first backside semiconductor sublayer 114f and the second backside semiconductor sublayer 114s For example, they may be or include monocrystalline silicon, nanoporous silicon, any other semiconductor material, or any combination of the foregoing. Furthermore, the first backside semiconductor sublayer 114f and the second backside semiconductor sublayer 114s for example, have an n-type or p-type doping. In some embodiments, the first backside semiconductor sublayers are 114f and the second backside semiconductor sublayer 114s the same semiconductor material and have the same doping type. Further, in some such embodiments, the first backside semiconductor sublayer has 114f a higher doping concentration than the second backside semiconductor sublayer 114s or the other way around.

In some embodiments, the backside semiconductor layer becomes 114 by providing a first backside semiconductor sublayer 114f and then depositing the second backside semiconductor sublayer 114s on the first backside semiconductor sublayer 114f educated. The deposition can be carried out, for example, by CVD, PVD, molecular beam epitaxy, or any other deposition process. In other embodiments, the backside semiconductor layer becomes 114 by providing a bulk semiconductor substrate and then doping the bulk semiconductor substrate. In such embodiments, the backside semiconductor sublayer is 114s the doped portion of the bulk semiconductor substrate, and the first backside semiconductor sublayer 114f is a remainder of the bulk semiconductor substrate. The doping may also be carried out, for example, by ion implantation or any other doping process.

As from the cross-sectional view 1400 the 14 illustrates an absorption enhancement semiconductor layer 112 formed the backside semiconductor layer 114 covers. The absorption enhancement semiconductor layer 112 has a low energy bandgap, which improves the quantum efficiency of the photodetectors that are formed thereafter. In some embodiments, the low energy band gap is an energy band gap that is less than about 1.00 eV, 0.80 eV, 0.60 eV, 0.66 eV, or 0.40 eV. Further, in some embodiments, the low energy band gap is an energy band gap smaller than that of the backside semiconductor layer 114 , In some embodiments, the absorption enhancement semiconductor layer 112 also a direct energy band gap. The absorption enhancement semiconductor layer 112 For example, it may be comprised of or include germanium, silicon germanium, crystalline silicon doped with a chalcogen, or any other low energy bandgap semiconductor material. Further, the absorption enhancing semiconductor layer 112 for example as with reference to 5 be described.

In some embodiments, the absorption enhancement semiconductor layer becomes 112 formed by epitaxy. For example, epitaxy may be performed by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process. In some embodiments, the absorption enhancement semiconductor layer becomes 112 doped with the chalcogen by ion implantation or any other doping process. Further, the absorption enhancing semiconductor layer becomes 112 in some embodiments, supersaturated with the chalcogen. The supersaturation may be carried out, for example, by ion implantation followed by pulsed laser melting (for example 1 to 7, 2 to 6, 3 to 5 or 4 laser shots).

Like also from the cross section 1400 the 14 illustrates a front side semiconductor layer 110 the absorption enhancing semiconductor layer 112 covering formed. The front-side semiconductor layer 110 For example, it may be or include monocrystalline silicon, any other semiconductor material, or any combination of the foregoing. Furthermore, the front side semiconductor layer 110 for example, by CVD, PVD, any other deposition process, molecular beam epitaxy, or any other epitaxial process.

In some embodiments, a power becomes T the absorption enhancing semiconductor layer 112 controlled such that the front side semiconductor layer 110 the same crystalline direction as the backside semiconductor layer 114 Has. If the strength T the absorption enhancing semiconductor layer 112 For example, if the front side semiconductor layer is large 110 have a different crystalline direction than the backside semiconductor layer 114 , In addition, in some embodiments, the absorption enhancement semiconductor layer 112 Silicon germanium is or includes a germanium concentration in the absorption enhancement semiconductor layer 112 controlled such that the front side semiconductor layer 110 has the same crystalline direction as the backside semiconductor layer 114 , In some embodiments, absorption enhancement semiconductor layer is 112 Si _0.8 Ge _0.2 or includes it, and has a thickness T between about 1000 to 3000 angstroms, to about 900 to 1100 Ängström or about 500 to 1500 angstrom, so that the front-side semiconductor layer 110 has the same crystalline direction as the backside semiconductor layer 114 ,

The backside semiconductor layer 114 , the absorption enhancing semiconductor layer 112 and the front side semiconductor layer 110 define a composite substrate 106 , The front-side semiconductor layer 110 extends along a front surface 106f of the composite substrate 106 and defines it, and the backside semiconductor layer 114 extends along a backside surface 106b of the composite substrate 106 and defines them. The back surface 106b and the front surface 106f lie on opposite sides of the composite substrate 106 ,

As from the cross-sectional view 1500 the 15 Illustrated is a variety of absorption enhanced pixel sensors 306a to 306c on the front side surface 106f of the composite substrate 106 educated. Each of the absorption enhanced pixel sensors 306a to 306c includes a photodetector 120 that of the front-side semiconductor layer 110 , the absorption enhancing semiconductor layer 112 and the backside semiconductor layer 114 is defined. For ease of illustration, only a few of the photodetectors 120 With 120 named.

The photodetector 120 the absorption enhanced pixel sensors 306a to 306c includes a first semiconductor region 120f , a second semiconductor region (not named) and a photo transition 120p , For ease of illustration, only a few of the first semiconductor regions are 120f With 120f named, and just a few of the photo transitions 120p are with 120p named. In some embodiments, the first semiconductor region is 120f the absorption enhanced pixel sensors 306a to 306c completely or partially through a front-side CCR 110c the front side semiconductor layer 110 , an absorption enhancement CCR 112c the absorption enhancing semiconductor layer 112 and a backside CCR 114c the backside semiconductor layer 114 Are defined. For ease of illustration, these are just a few of the front-side CCRs 110c With 110c named, just a few of the absorption enhancement CCR 112c are with 112c named, are just a few of the first backside CCRs 114c ' With 114c 'named, and only some of the second back CCR 114c are with 114c named. In some embodiments, the second semiconductor regions are the absorption enhanced pixel sensors 306a to 306c completely or partially through a front bulk area 110b the front side semiconductor layer 110 , one Absorption Enhancement bulk region 112b the absorption enhancing semiconductor layer 112 , a first backside bonding area 114b ' the backside semiconductor layer 114 and a second backside bulk area 114b the backside semiconductor layer 114 Are defined. For ease of illustration, only a few segments of the front bulk area are shown 110b With 110b and only a few segments of the absorption enhancement bulk area 112b With 112b named, and only a few segments of the second back bulk area 114b are with 114b named.

In some embodiments, a process includes forming the photodetectors 120 implanting dopants into the composite substrate 106 to the first semiconductor areas 120f to build. In some embodiments, the semiconductor substrate 106 initially a single doping type such that doping is performed using dopants of opposite doping type. The doping may be performed, for example, using ion implantation or any other doping process, and / or may, for example, use a photoresist mask to selectively implant the dopants.

Each of the absorption enhanced pixel sensors 306a to 306c further comprises a transfer transistor 202 , For ease of illustration, only a few of the transfer transistors 202 With 202 named. Each transfer transistor 202 the absorption enhanced pixel sensors 306a to 306c includes a gate electrode 204 , a gate dielectric layer 206 , a first source-drain region (not named) and a second source-drain region (not named). For ease of illustration, only a few of the gate electrodes are shown 204 With 204 named, and only some of the gate dielectric layers 206 are with 206 named. The first source-drain region may be formed, for example, by a respective one of the first semiconductor regions 120f the photodetectors 120 be defined. The second source-drain region may be, for example, an FDR 110f the front side semiconductor layer 110 be defined. The transfer transistors 202 For example, as with reference to 10 be described. Furthermore, the transfer transistors 202 For example, as with reference to 10 be described.

From the cross-sectional view 1000 the 10 also becomes an isolation structure 208 illustrated in the front side semiconductor layer 110 extending to the absorption enhanced pixel sensors 306a to 306c to separate and surround. The isolation structure 208 For example, as with reference to 10 be described and / or as with reference to 10 be shaped described.

As from the cross-sectional view 1600 the 16 illustrates an interconnect structure 210 formed the absorption-enhanced pixel sensors 306a to 306c and the composite substrate 106 covers. The interconnect structure 210 includes an ILD layer 212 , a variety of wires 214 and a plurality of vias 216 , For ease of illustration, only a few of the wires are 214 With 214 named, and only some of the vias 216 are with 216 named. The interconnect structure 210 For example, as with reference to 11 be described. Furthermore, the interconnect structure 210 for example as with reference to 11 be described.

As from the cross-sectional view 1700 the 17 illustrates, in some embodiments, the front surface 106f of the composite substrate 106 to a carrier substrate 402 through the ILD layer 212 bonded. The carrier substrate 402 For example, it may be a monocrystalline bulk silicon substrate, any other silicon substrate, an SOI substrate, any other semiconductor substrate, or any other substrate. In some embodiments, the bonding is performed by a fusion bonding process or any other bonding process.

As from the cross-sectional view 1800 the 18 illustrates the structure of the 17 turned vertically. Further, the composite substrate is 106 at the back surface 106b of the composite substrate 106 diluted, reducing the strength of the composite substrate 106 and a thickness of the front side semiconductor layer 114 be reduced. In some embodiments, the thinning also removes the first backside semiconductor sublayer 114f , The thinning reduces a thinned strength of the composite substrate 106 from a first strength T ₁ on a second strength T2 , In some embodiments, the composite substrate becomes 106 by performing etching and / or planarization in the backside semiconductor layer 114 diluted. For example, the planarization may be performed by a CMP or any other planarization process.

In some embodiments, the first and second backside semiconductor sublayers are 114f . 114s the same semiconductor material and have the same doping type. Further, in some such embodiments, the first and second backside semiconductor sublayers 114f . 114s different doping concentrations. The different doping concentrations define a transition at an interface between the first and second backside semiconductor sublayers 114f . 114s that uses as a stop for thinning out which allows a high degree of control over thinning. For example, etching may be performed as part of the thinning, wherein the etching uses an etchant that has a high selectivity for the first backside semiconductor sublayer 114f compared to the second backside semiconductor sublayer 114s so that the transition serves as an etch stop. Such a high selectivity can be, for example, between about 3 :1 to 10 : 1,10: 1 to 20 :1, 20 : 1 to 50: 1 or about 3 : 1 to 50: 1 are.

As from the cross-sectional view 1900 the 19 illustrates is a plurality of protrusions 124 in the composite substrate 106 formed, including the backside semiconductor layer 114 , For ease of illustration, only one of the protrusions 124 named with 124. The projections 124 at least partially define an absorption enhancement structure 126 , The projections 124 and the absorption enhancing semiconductor layer 126 For example, as with reference to 6 be described. Further, a process of forming the protrusions 124 for example as with reference to 6 be executed described. In some embodiments, the process includes forming the protrusions 124 an etching in the back surface 106b with a photoresist layer 602 in place and then removing the photoresist layer 602 ,

In some embodiments, a systematic pore structure is formed in the backside semiconductor layer 114 educated. The pores may be, for example, pores in micrometer size, nanometer size, smaller size, or combinations of the foregoing. In some embodiments, a process of forming the systematic pore structure includes performing an etch in the backside semiconductor layer 114 , The process of forming the systematic pore structure may be before, during or after the process of forming the protrusions 124 be executed.

As from the cross-sectional view 2000 the 20 illustrates a passivation layer 108 that the back surface 106b of the composite substrate 106 covers, formed. The passivation layer 108 For example, as with reference to 7 be described, and / or a process for forming the passivation layer 108 For example, as with reference to 7 be described.

As from the cross-sectional view 2100 the 21 illustrates a variety of color filters 404 and a variety of microlenses 406 on the passivation layer 108 educated. The color filters 404 are each above the absorption-enhanced pixel sensors 306a to 306c and the microlenses 406 are each above the color filters 404 , The color filters 404 For example, as with reference to 12 be described, and / or can, for example, as with reference to 12 be shaped described. The microlenses 406 For example, as with reference to 12 be described, and / or can, for example, as with reference to 12 be shaped described.

With reference to 22 , is a flowchart 2200 some embodiments of the method of 14 to 21 provided.

at 2202 For example, a backside semiconductor layer is formed on a semiconductor substrate. See for example 14 ,

at 2202 For example, the absorption enhancement semiconductor layer is formed on a backside semiconductor layer. See for example 14 ,

at 2202 For example, a front-side semiconductor layer is formed on the absorption-enhancing semiconductor layer. The front-side semiconductor layer has a high energy band gap as compared with the absorption-enhancing semiconductor layer. The semiconductor substrate, the backside semiconductor layer, the absorption enhancement semiconductor layer 112 and the front-side semiconductor layer define a composite substrate. See for example 14 ,

at 2204 For example, a pixel sensor is formed on a front surface of the composite substrate. The pixel sensor includes a photodetector partially defined by the absorption enhancement semiconductor layer. See for example 15 ,

at 2206 an interconnection structure is formed that covers the pixel sensor on the front surface of the composite substrate. The interconnect structure includes an ILD layer, wires, and vias. The wires and the vias are stacked alternately in the ILD layer. See for example 16 ,

at 2208 For example, a carrier substrate is bonded to a front surface of the composite substrate through the ILD layer. See for example 17 ,

at 2210 For example, the composite substrate is thinned on a back surface of the composite substrate. The thinning removes the semiconductor substrate. See for example 18 ,

at 2212 A plurality of protrusions are formed along the back surface of the composite substrate. Define the projections at least partially an absorption enhancement structure. See for example 19 ,

at 2214 a passivation layer is formed on the back surface of the composite substrate. See for example 20 ,

at 2216 For example, a color filter and a microlens are stacked on the interconnect structure. See for example 21 ,

Although the flowchart 2200 the 22 As illustrated and described herein as a series of acts or events, it will be appreciated that the illustrated sequence of such acts or events is not to be construed in a limiting sense. For example, some acts may occur in different orders and / or concurrently with other acts or events separate from those illustrated and / or described herein. Furthermore, not all illustrated acts may be required to implement one or more aspects or embodiments of the description, and one or more of the acts depicted herein may be performed in one or more separate acts and / or phases.

In some embodiments, the present application provides an image sensor comprising: a front side semiconductor layer, an absorption enhancement semiconductor layer and a backside semiconductor layer stacked, the absorption enhancement semiconductor layer being stacked between the front side and back side semiconductor layers, and the absorption enhancement semiconductor layer having an energy band gap; which is lower than that of the front-side semiconductor layer; a plurality of protrusions defined by the backside semiconductor layer, and a photodetector defined by the front side semiconductor layer, the absorption enhancement semiconductor layer, and the backside semiconductor layer. In some embodiments, the front side semiconductor layer comprises silicon, the absorption enhancement semiconductor layer comprising germanium or silicon germanium. In some embodiments, the front side semiconductor layer comprises silicon, the absorption enhancement semiconductor layer having silicon doped with a chalcogen. In some embodiments, the energy band gap of the absorption enhancement semiconductor layer is less than about 1 electron volt (eV), and the energy bandgap of the front side semiconductor layer is greater than about 1 eV. In some embodiments, the front side semiconductor layer directly contacts the absorption enhancement semiconductor layer at a front side heterojunction, the back side semiconductor layer directly contacting the absorption enhancement semiconductor layer at a backside heterojunction. In some embodiments, the image sensor further includes: a front-side buffer layer between the front-side semiconductor layer and the absorption-enhancing semiconductor layer, and a back-side buffer layer between the back-side semiconductor layer and the absorption-enhancing semiconductor layer; wherein the front-side and back-side buffer layers comprise semiconductor material having an increased carbon concentration as compared with the front-side semiconductor layer, the absorption-enhancing semiconductor layer, and the back-side semiconductor layer. In some embodiments, the plurality of protrusions has a sawtooth profile. In some embodiments, the backside semiconductor layer comprises nanoporous silicon, wherein the protrusions and the nanoporous silicon define an absorption enhancement structure with a direct energy bandgap. In some embodiments, the image sensor further comprises a transfer transistor on and partially defined by the front-side semiconductor layer, wherein the transfer transistor is adjacent to and electrically coupled to the photodetector.

In some embodiments, the present application provides a method of fabricating an image sensor, the method comprising: providing a front side semiconductor layer, an absorption enhancement semiconductor layer, and a backside semiconductor layer stacked, the absorption enhancement semiconductor layer being stacked between the front side and back side semiconductor layers; the absorption enhancement semiconductor layer has an energy band gap lower than that of the front side semiconductor layer; Performing etching in the backside semiconductor layer to form a plurality of protrusions, and forming a photodetector in the front side semiconductor layer, the absorption enhancement semiconductor layer and the backside semiconductor layer. In some embodiments, the etching is performed prior to forming the photodetector. In some embodiments, the method further comprises thinning the front-side semiconductor layer to reduce a thickness of the front-side semiconductor layer and, after thinning, forming a pixel sensor on the front-side semiconductor layer, wherein the Pixelsensor having the photodetector and a transfer transistor, and wherein the transfer transistor is partially defined by the front-side semiconductor layer. In some embodiments, the etching is performed after forming the photodetector. In some embodiments, the method further comprises forming a pixel sensor on the front-side semiconductor layer, the pixel sensor comprising the photodetector and a transfer transistor, and wherein the transfer transistor is partially defined by the front-side semiconductor layer and, after forming the pixel sensor, thinning the back-side semiconductor layer; to reduce a thickness of the backside semiconductor layer, wherein the etching is carried out after thinning out. In some embodiments, the backside semiconductor layer comprises a first backside semiconductor sublayer and a second backside semiconductor sublayer, wherein the second backside semiconductor sublayer is stacked between the first backside semiconductor sublayer and the absorption enhancement semiconductor layer, and wherein the thinning removes the first backside semiconductor sublayer. In some embodiments, the first and second backside semiconductor layers have the same material and doping type, wherein the first and second semiconductor layers have different doping concentrations, and wherein the thinning comprises etching the first backside semiconductor sublayer until the first backside semiconductor sublayer is removed. In some embodiments, the front-side semiconductor layer comprises silicon, the absorption-enhancing semiconductor layer comprising: 1 ) Germanium; 2 ) Silicon germanium or 3 ) crystalline silicon doped with a chalcogen. In some embodiments, the energy band gap of the absorption enhancement semiconductor layer is less than about 1 electron volt (eV), wherein the energy bandgap of the front side semiconductor layer is greater than about 1 eV. In some embodiments, the protrusions are in a periodic pattern or a periodic arrangement.

In some embodiments, the present application provides an image sensor comprising: a composite substrate having a front side semiconductor layer, an absorption enhancement semiconductor layer, and a backside semiconductor layer stacked, the front side semiconductor layer forming a front surface of the composite substrate, the backside semiconductor layer being a back surface of the composite substrate wherein the absorption enhancement semiconductor layer is stacked between the front side and back side semiconductor layers, and wherein the absorption enhancement semiconductor layer has an energy band gap lower than that of the front side semiconductor layer; a periodic structure of protrusions defined by the backside semiconductor layer and along the backside surface of the composite substrate; a passivation layer directly on the backside surface of the composite substrate, wherein the passivation layer is conformed to the protrusions, and a pixel sensor directly on the front surface of the composite substrate, the pixel sensor having a photodetector defined by the front side semiconductor layer, the absorption enhancement semiconductor layer, and the backside semiconductor layer; Pixelsensor has a transfer transistor, which is partially defined by the front side semiconductor layer, and wherein the transfer transistor is adjacent to the photodetector and is electrically coupled thereto.

The above outlines the features of several embodiments such that those skilled in the art will better understand the aspects of the present disclosure. One skilled in the art should appreciate that he may readily use the present disclosure as a basis for designing or changing other processes and structures for carrying out the same purposes and / or achieving the same advantages of the embodiments introduced herein. One skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that it can make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US 62585044 [0001]

Claims (20)

An image sensor comprising: a front-side semiconductor layer, an absorption-enhancing semiconductor layer, and a back-side semiconductor layer stacked, the absorption-enhancing semiconductor layer being stacked between the front-side and back-side semiconductor layers, and wherein the absorption-enhancing semiconductor layer has an energy band gap lower than that of the front-side semiconductor layer; a plurality of protrusions defined by the backside semiconductor layer, and a photodetector defined by the front-side semiconductor layer, the absorption-enhancing semiconductor layer, and the back-side semiconductor layer. Image sensor after Claim 1 wherein the front-side semiconductor layer comprises silicon, and wherein the absorption-enhancing semiconductor layer comprises germanium or silicon germanium. Image sensor after Claim 1 wherein the front-side semiconductor layer comprises silicon, and wherein the absorption-enhancing semiconductor layer comprises silicon doped with a chalcogen. An image sensor according to any preceding claim, wherein the energy bandgap of the absorption enhancement semiconductor layer is less than about 1 eV and wherein the energy bandgap of the front side semiconductor layer is greater than about 1 eV. An image sensor according to any one of the preceding claims, wherein the front-side semiconductor layer directly contacts the absorption-enhancing semiconductor layer at a front-side heterojunction, and wherein the back-side semiconductor layer directly contacts the absorption-enhancement-type semiconductor layer at a backside heterojunction. An image sensor according to any one of the preceding claims, further comprising: a front-side buffer layer between the front-side semiconductor layer and the absorption-enhancing semiconductor layer, and a backside buffer layer between the backside semiconductor layer and the absorption enhancement semiconductor layer; wherein the front-side and back-side buffer layers comprise semiconductor material having an increased carbon concentration in comparison with the front-side semiconductor layer, the absorption-enhancing semiconductor layer, and the back-side semiconductor layer. An image sensor according to any preceding claim, wherein the plurality of protrusions has a sawtooth profile. An image sensor according to any one of the preceding claims, wherein the backside semiconductor layer comprises nanoporous silicon, and wherein the protrusions and the nanoporous silicon define an absorption enhancement structure with a direct energy bandgap. An image sensor according to any one of the preceding claims, further comprising: a transfer transistor on and partially defined by the front-side semiconductor layer, wherein the transfer transistor is adjacent to and electrically coupled to the photodetector. A method of manufacturing an image sensor, the method comprising: Providing a front side semiconductor layer, an absorption enhancement semiconductor layer and a back side semiconductor layer stacked, the absorption enhancement semiconductor layer being stacked between the front side and back side semiconductor layers, and wherein the absorption enhancement semiconductor layer has an energy band gap lower than that of the front side semiconductor layer; Performing etching in the backside semiconductor layer to form a plurality of protrusions, and Forming a photodetector in the front-side semiconductor layer, the absorption-enhancing semiconductor layer and the back-side semiconductor layer. Method according to Claim 10 wherein the etching is performed prior to forming the photodetector. Method according to the Claims 10 or 11 further comprising: thinning the front-side semiconductor layer to reduce a thickness of the front-side semiconductor layer and thinning a pixel sensor on the front-side semiconductor layer, the pixel sensor comprising the photodetector and a transfer transistor, and wherein the transfer transistor is partially defined by the front-side semiconductor layer , Method according to one of Claims 10 to 12 wherein the etching is performed after the formation of the photodetector. Method according to one of Claims 10 to 13 method further comprising: forming a pixel sensor on the front-side semiconductor layer, the pixel sensor comprising the photodetector and a transfer transistor, and wherein the transfer transistor is partially defined by the front-side semiconductor layer, and after forming the pixel sensor, thinning the back-side semiconductor layer to reduce a thickness of the back-side semiconductor layer, wherein the etching is performed after thinning. Method according to Claim 14 wherein the backside semiconductor layer has a first backside semiconductor sublayer and a second backside semiconductor sublayer, wherein the second backside semiconductor sublayer is stacked between the first backside semiconductor sublayer and the absorption enhancement semiconductor layer, and wherein the thinning removes the first backside semiconductor sublayer. Method according to Claim 15 wherein the first and second backside semiconductor layers have the same material and doping type, wherein the first and second backside semiconductor layers have different doping concentrations, and wherein the thinning comprises etching the first backside semiconductor sublayer until the first backside semiconductor sublayer is removed. Method according to one of Claims 10 to 16 wherein the front-side semiconductor layer comprises silicon, and wherein the absorption-enhancing semiconductor layer comprises: 1) germanium; 2) silicon germanium or 3) crystalline silicon doped with a chalcogen. Method according to one of Claims 10 to 17 wherein the energy bandgap of the absorption enhancement semiconductor layer is less than about 1 eV and wherein the energy bandgap of the front side semiconductor layer is greater than about 1 eV. Method according to one of Claims 10 to 18 , wherein the projections are formed in a periodic patterning. An image sensor comprising: a composite substrate comprising a front side semiconductor layer, an absorption enhancing semiconductor layer and a backside semiconductor layer stacked, wherein the backside semiconductor layer defines a front surface of the composite substrate, the backside semiconductor layer defining a back surface of the composite substrate opposite the front surface of the composite substrate, wherein the absorption enhancement semiconductor layer interposes the front side and back side semiconductor layers are stacked, and wherein the absorption enhancement semiconductor layer has an energy bandgap lower than that of the front side semiconductor layer; a periodic structure of protrusions defined by the backside semiconductor layer and along the backside surface of the composite substrate; a passivation layer directly on the back surface of the composite substrate, wherein the passivation layer is conformed to the protrusions, and a pixel sensor directly on the front surface of the composite substrate, the pixel sensor comprising a photodetector defined by the front side semiconductor layer, the absorption enhancement semiconductor layer and the backside semiconductor layer, the pixel sensor comprising a transfer transistor partially defined by the front side semiconductor layer and the transfer transistor borders the photodetector and is electrically coupled with it.

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