DE102018105273A1 - Electronic ultra-low-leakage circuit for fast charging - Google Patents

Abstract

For charging high-capacity charge accumulators from a charge source, a device is proposed, with a first regulator (4) for regulating a charging current with a first operational amplifier (8) and a first actuator (7), and with a second regulator (5) for regulating a charging voltage with a second operational amplifier (10) and a second actuator (9), wherein the first actuator (7) and the second actuator (9) are arranged in cascade; and wherein the second controller (5) is adapted to control the charging current through the second regulator (9) based on a difference between a target voltage (Uf) and a charge voltage (VCC) of the charge storage means by the second operational amplifier (10).

Description

Field of the invention

The invention relates to a device and a method for fast and low-loss charging of high-capacity charge storage.

background

When loading high-capacity memories, there is the problem that the memory can be overloaded or the voltage source can be overloaded. In addition, with fully charged memory leakage currents and thus losses through the charging circuit are possible.

Known charging circuits use Z-diodes for voltage regulation (voltage-dependent charge) and, for example, Schottky diodes to prevent backflow of current from the memory into the charging circuit. The maximum charging current is limited to 500 mA in known voltage source circuits, but this can not be achieved in reality, since the voltage limitation with the Zener diode does not lead to a constant charging current.

The invention has the object to mitigate these disadvantages.

Brief description of the invention

This object is achieved by the invention specified in the independent claims. Advantageous embodiments can be taken from the subclaims.

According to the invention, a device is provided for charging high-capacity charge accumulators from at least one charge source, with a first regulator for regulating a charging current with a first operational amplifier and a first actuator; and a second regulator for regulating a charging voltage with a second operational amplifier and a second actuator; wherein the first actuator and the second actuator are arranged in cascade. The second operational amplifier is designed to regulate the charging current based on a difference between a desired value of the charging voltage and an actual value of the charging voltage by means of the second actuator.

To regulate the charging current, the difference between a nominal value of the charging voltage (nominal voltage) and the actual value of the charging voltage is preferably integrated by the second operational amplifier.

Furthermore, it is preferred that the difference between the desired value of the charging voltage and the actual value of the charging voltage is integrated inversely by the second operational amplifier. The second operational amplifier can thus be an inverting operational amplifier.

Preferably, the first regulator regulates the charging current based on a constant input voltage provided by a voltage source and a desired voltage, in particular based on the difference between the desired voltage and the input voltage.

In some embodiments of the invention, the first actuator comprises a first MOSFET and / or the second actuator comprises a second MOSFET. The first and / or the second MOSFET may be formed, for example, as a p-channel MOSFET, in particular as a self-blocking p-channel MOSFETs.

The first and second controllers carry out a current control (first controller) and a voltage controller (second controller). The first regulator impresses the charging current. The second controller regulates and limits the maximum charging voltage. The regulators are preferably realized with operational amplifiers. The first and second controllers can be realized as MOSFETs. In particular, the respective actuators of the two control circuits are arranged in cascade. Thus, the output of the controller belonging to the first control circuit can provide the input variable of the controller belonging to the second control circuit. This can be implemented, for example, such that the drain terminal of the first MOSFET is connected to the source terminal of the second MOSFET. In some embodiments of the invention, the output of the first actuator is connected directly to the input of the second actuator. The first MOSFET and / or the second MOSFET are preferably operated in linear operation.

Both controllers work in parallel over the entire controlled system. In particular, both controllers use the same reference variable, for example, a desired voltage provided by the charging circuit. The entire controlled system is thereby subdivided into smaller, more easily adjustable sections. The desired voltage can be stabilized and / or adjusted, for example, by means of a Zener diode and / or a guide filter. Furthermore, the controllers can be analog, continuous controllers. Analog, continuous controllers are simple and proven and have well-known control laws.

In one embodiment of the invention, the first controller comprises a third switch, in particular a third MOSFET. The first regulator is then configured to connect in parallel through the third MOSFET, at least one second resistor to a first resistor. The charging current is initially statically preset by the first controller by one or more additional resistors (parallel) can be added or disconnected by the third MOSFET. This can also be done via a microcontroller. This makes it possible to use several different voltage sources for charging or to set different sized charging currents. The second controller (voltage regulator) limits the charging voltage on the basis of the difference between the setpoint and actual value of the charging voltage by reducing the charging current through the second regulator. Preferably, the second controller integrates over the difference between the setpoint and actual value of the charging voltage. It is likewise preferred if the second regulator integrates inversely over the difference between the nominal and actual values of the charging voltage. This can be advantageous in particular in the case of a device whose second actuator comprises a second MOSFET, in particular a p-channel MOSFET. By integrating the second regulator, it is possible to supply the charging circuit with a connected device without having to charge a charge storage device to be charged. In addition, the charging current is kept constant over time by the arrangement of the controller, in particular by the cascaded controller and does not depend on the charging voltage. As a result, a constant high current can be provided without overloading the voltage source (s). This shortens the loading time.

In one embodiment of the invention, the first regulator is designed to adapt the charging current through the first regulator / first MOSFET, wherein the first regulator / first MOSFET is controlled by an output signal of the first operational amplifier. In this way, the first operational amplifier directly intervenes in the charging current. In particular, it can be provided that an output signal of the first operational amplifier is applied to a gate terminal of the first MOSFET in order to control it.

In one embodiment of the invention, the device comprises a high-impedance feedback from the charge storage to the second controller, wherein the high-impedance feedback is applied to a positive input of the second operational amplifier. The feedback ensures that there is always an accurate actual value of the charging voltage at the non-inverting input of the second operational amplifier. In this way can be regulated to the actual setpoint.

In one embodiment of the invention, an output signal of the second operational amplifier controls the second regulator / second MOSFET. The second controller in this way automatically and directly intervenes in the charging current flow and is thus able to prevent overcharging of the memory.

In one embodiment of the invention, the inverting input of the second operational amplifier is applied to the non-inverting input of the first operational amplifier. As a result, the controlled systems of the first and the second controller interlock. The control accuracy is thereby increased. In this case, both controllers preferably use the same reference variable and interpret it as a setpoint voltage or setpoint current.

In one embodiment of the invention, the second regulator comprises an ultra-low leakage diode, in particular a Schottky diode, for preventing self-discharge of the memory. if no voltage source is connected to the charging circuit, or too low an input voltage is provided. Thus, a "backflow" of charge carriers from the memory into the circuit and associated losses due to leakage currents through the ultra-low leakage diode is prevented.

In one embodiment of the invention, the device comprises a voltage tap for supplying a connected device, wherein a supply voltage of the device is equal to the charging voltage of the high-capacitive memory. By implementing a voltage tap parallel to the charge storage, the circuit may also power a connected device, such as an actuator. This is possible both during the charging process, when the memory is connected, and when no memory to be charged is connected and the device is to be operated normally. The device is replaced by a double function.

In one embodiment of the invention, the first controller comprises a further voltage input for connecting a further voltage source and a fourth switch, in particular a fourth MOSFET, for parallel switching at least one third resistor to the first and / or the second resistor. Thereby it is possible to use several voltage sources, e.g. different USB ports, either simultaneously or alternatively to use. By adding or removing further parallel resistors, the charging current can be adjusted accordingly.

According to another aspect of the invention, there is provided a method of controlling a charging of a high capacitive memory from at least one voltage source, the method comprising receiving a first input voltage from a first voltage source; Providing a desired voltage through the charging circuit, determining the difference between the desired voltage and the input voltage through the first regulator, adjusting the charging current based on the difference between the desired voltage and Input voltage; Providing a charge voltage of the charge storage at the second regulator, determining the difference between charge voltage and target voltage by the second regulator, adjusting the charge current based on the difference between charge voltage and target voltage. In particular, the voltage source can provide a constant input voltage.

In one embodiment of the method, adjusting the charging current by the first regulator comprises switching at least one second resistor in parallel with a first resistor. This allows the static adjustment of the charging current. The parallel connection of the second resistor to the first resistor preferably takes place by the switching of the third switch, in particular of the third MOSFET.

In some embodiments, the method further comprises receiving a switching signal by the first controller, the first controller switching the third switch in response to the switching signal. The switching signal can be provided, for example, by a microcontroller.

The switching signal may, for example, be connected to a control input of the fourth switch, for example of the fourth MOSFET, wherein the fourth switch is coupled to the third switch such that the third switch is turned on as soon as the fourth switch is turned on. In particular, it can be provided that the gate of the fourth MOSFET is turned on as soon as a high level of the switching signal is applied, whereby finally the third MOSFET becomes conductive and thus the second resistor is connected in parallel to the first resistor.

In some embodiments of the method, the difference is received on the basis of a feedback from the charge store to the second regulator, in particular to the second operational amplifier. The feedback ensures that there is always an accurate actual value of the charging voltage at the non-inverting input of the second operational amplifier. In this way can be regulated to the actual setpoint. Preferably, the feedback is a high-impedance feedback. Alternatively, the feedback can be implemented with low resistance, wherein a diode, in particular an ultra-low leakage diode, is arranged between the feedback and the voltage output, so that a backflow of charge carriers into the charging circuit is prevented or kept negligibly small.

According to another aspect of the invention, there is provided a system comprising a voltage source, a charge storage device and a device according to the invention.

In one embodiment, the system includes a device. The device may, for example, be a valvetrain in a Thermostatic Radiator Valve (TRV), in particular in an automatic heater valve which is powered by an energy harvesting device. In particular, the energy harvesting device can be a thermoelectric generator (TEG), which generates an electrical voltage from a temperature difference. The warm side of the TEG can be supplied with heat by a heating pipe or by another component through which heating water flows while the cold side is exposed to the ambient air.

Hereinafter, an embodiment of the invention is described in more detail with reference to the drawings. Show it:

list of figures

• The 1 a charging circuit of the prior art;
• the 2 Fig. 12 is an equivalent circuit diagram of an exemplary embodiment according to the invention;
• the 3 a voltage-time diagram of a charging process of a memory by means of an exemplary device according to the invention;
• the 4 , a voltage-time diagram of an output voltage of a device according to 3 when no memory is loaded;
• the 5 FIG. 10 is another equivalent circuit diagram of an exemplary embodiment according to the invention.

figure description

The 1 shows a charging circuit of the prior art. The charging circuit includes a Z -Diode D5 for voltage regulation and another diode D9 For example, a Schottky diode for preventing the backflow of charge carriers from the charge storage in the charging circuit. The diode D5 is between the output voltage VCC and ground connected, the diode D9 between VCC and the diode D5 is arranged. The further the memory is charged, ie the higher the charging voltage, the greater the current through the diode D5 , This leads to larger dissipative losses and finally to a lower effective charging current. Due to the reduced charging current, consequently, the charging time is increased. In this and the following figures crossed-out components are to be understood in the illustrated circuits as "not equipped". The crossed out Components refer to alternative or optional configurations of the particular circuit.

The 2 shows an equivalent circuit diagram of an exemplary embodiment of a device according to the invention 1 for charging a high-capacity memory 2 from at least a first charge source 3 (Voltage source). The device 1 includes a first regulator 4 and a second regulator 5 , The first controller 4 includes a first MOSFET 7 , a third MOSFET 6 and a first operational amplifier 8th , The second controller 5 includes a second MOSFET 9 , as well as a second operational amplifier 10 , Parallel to the memory 2 is a voltage tap 11 for powering a device 12 implemented. A high-impedance feedback 13 is between the charging voltage and an inverting input of the second operational amplifier 10 , The second operational amplifier 10 compares the charging voltage from the high-impedance feedback 13 with a setpoint voltage Uf , The setpoint voltage Uf gets out of the voltage source 3 powered and in the example of a zener diode Q2 and one with the zener diode Q2 connected guide filter FF1 posed. The guide filter FF1 is implemented in the example as an RC element, consisting of a resistor R13 and a capacity C10 , Based on the difference between the input voltages, the second operational amplifier integrates 10 inverted and gives a signal 14 from which the second MOSFET 9 controls. The second MOSFET 9 interrupts, reduces or increases the flow of current to the store 2 when he is switched. In particular, the second MOSFET 9 be operated in linear mode, so that the current flow to the memory 2 can be adjusted accordingly. The inverting input of the second operational amplifier 10 is connected to the non-inverting input of the first operational amplifier 8th coupled. In particular, as shown in the example, it may be provided that the inverting input of the second operational amplifier 10 via a guide filter (in the example of the guide filter FF1 ) to the non-inverting input of the first operational amplifier 8th is coupled. In addition, in the example, a resistor R55 between the inverting input of the second operational amplifier 10 and the guide filter FF1 arranged. The first operational amplifier 8th switches depending on the voltage from the charge source 3 and a voltage behind possibly through the first MOSFET 6 switched on second resistors 15 drops, the first MOSFET 7 and thus regulates the charging current. By connecting the second resistors 15 to the first resistance 16 the charging current is through the first regulator 4 from one or more voltage sources 3 according to the voltage source 3 supplied current adjusted and statically impressed. In particular, this allows a faster charging of the charge storage device, if a more powerful voltage / current source is available. An ultra-low leakage diode 17 lies between the charging circuit and the memory 2 and prevents the return of charge carriers from the memory 2 in the charging circuit.

The 3 shows a voltage-time diagram 18 a load of a memory 2 by means of an exemplary device according to the invention 1 , The graph 19 represents the increase of the charging voltage (LicVoltage) over time, while the graph 20 shows the charging current as a function of time and the voltage source. The charging current is through the device 1 adapted to the current / voltage source and then kept constant. In the example, the charging process starts with a USB voltage source that provides an input voltage of 5V to the charging circuit and allows a charge current of approximately 0.1A. To 100s is switched to a USB power source, which also provides 5V a charging current of 0.5A. Accordingly, the charging circuit switches the second resistor 15 by turning on the third switch 6 parallel to the first resistor 16 , so that the charging current increases and the charge storage 2 is loaded faster. The charging voltage 19 forms in both sections (sections 0s <t <100s and t ≥ 100s) a straight line whose slope depends on the charging current. The slope is until shortly before reaching the maximum charging voltage 21 constant (until about t = 410s) and then asymptotically approaches a maximum value 21 the charging voltage 19 on.

The 4 shows a voltage-time diagram 22 an output voltage 23 a device 1 according to 2 if no memory 2 is loaded. This is constant over time. The 5 shows a further equivalent circuit diagram of an exemplary embodiment of the device according to the invention 1 , The 5 shows an embodiment of the in 2 shown principle circuit. The in the 5 shown circuit of the device 1 includes a signal input 24 and a fourth MOSFET 25 , The signal input is connected to a gate terminal of the fourth MOSFET 25 and about a resistance 26 to ground GND and to a source terminal of the fourth MOSFET 25 connected. Is now at the signal input 24 a high level becomes the fourth MOSFET 25 switched on. A drain terminal of the fourth MOSFET 25 is in turn connected to a gate terminal of the third MOSFET 6 connected so that it is turned on, as soon as the fourth MOSFET 25 is conductive. Will be the third MOSFET 6 conducting, thereby becomes the second resistor 15 parallel to the first 16 Resistor connected to statically set the charge current.

In the example is the second resistor 15 by a parallel connection of a resistor R36 with a resistance R40 realized. Analogously, further resistors connected in parallel can be provided. This also allows more than two load modes to be implemented. For example, a third charging mode of the device can be implemented by a further resistor which can be connected in parallel with the first and / or second resistor.

The voltage input is via a resistor R42 and a resistance R43 with the cathode of a zener diode D11 connected to the voltage stabilization, wherein the anode of the Zener diode D11 to mass GND lies. Thus, the stabilized input voltage minus the voltage drop across the zener diode D11 and the voltage drops of the relevant resistors as a stabilized input voltage Ux at an output of the parallel-connected resistors 15 . 16 on.

At the voltage output becomes the charging voltage VCC provided for loading a charge storage. Directly at the voltage output is a high-impedance feedback 13 provided with an input of the second operational amplifier 10 connected is. The high-impedance feedback 13 connects the voltage output VCC via a high-impedance resistor, in the example as a series connection of a resistor R60 with a resistance R61 realized with an input of the second operational amplifier 10 , Alternatively, a return 13` from the voltage output VCC to the input of the second operational amplifier 10 be provided, which is not executed high impedance. The return 13` But then it is not directly with the voltage output VCC connected but via a diode 17 , in particular an ultra-low leakage diode, with the voltage output VCC coupled. As a result, in this variant, a return flow of charge carriers from the voltage output VCC prevented in the charging circuit or kept at least negligible small. The return 13` has a resistance R47 and a resistance R53 on, in the example of the 5 crossed out, so not equipped, are shown.

LIST OF REFERENCE NUMBERS

1

device

2

Storage

3

charge source

4

first controller

5

second controller

6

third MOSFET

7

first MOSFET

8th

first operational amplifier

9

second MOSFET

10

second operational amplifier

11

voltage tap

12

device

13

return

13`

return

14

signal

15

second resistance

16

first resistance

17

Ultra-low-leakage diode

18

Voltage-time diagram during a charging process

19

Charging voltage at the memory (U LIC) during a charging process

20

Course of the charging current during a charging process

21

maximum achievable charging voltage of the memory

22

Voltage-time diagram without connected memory

23

output voltage

24

additional voltage source

25

fourth MOSFET

26

third resistance

Uf

Target voltage

Ux

stabilized input voltage

FF1

feedthrough filter

Claims (22)

Device for charging high-capacity charge accumulators from at least one charge source, comprising: a first controller (4) with a first operational amplifier (8) and a first controller (7) for controlling a charging current, and with a second controller (5) with a second operational amplifier (10) and a second controller (9) for controlling a Charging voltage, wherein the first actuator (7) and the second actuator (9) are arranged in cascade; and wherein the second regulator (5) is adapted to control the charging current through the second actuator (9) based on a difference between a target voltage (Uf) and a charge voltage (VCC) of the charge storage means by the second operational amplifier (10). Device after Claim 1 , characterized in that for controlling the charging current, the difference between the desired value of the charging voltage and the actual value of the charging voltage (VCC) is integrated by the second operational amplifier (10). Device after Claim 1 or 2 , characterized in that the difference between the desired value of the charging voltage and the actual value of the charging voltage (VCC) by the second operational amplifier (10) is integrated inverted. Device according to one of Claims 1 to 3 wherein the first controller (4) has at least one third switch (6, Q11), in particular a third MOSFET, and is configured to connect at least one second resistor (15, R36, R40) to a first one by means of the third switch (6) Resistor (16, R37) in parallel. Device after Claim 4 wherein the first controller (4) comprises a signal input (HIGHLOAD_EN) for receiving a control signal, the first controller (4) comprising a fourth switch (25, Q12), and the fourth switch (25, Q12) based on the control signal third switch (6, Q11) switches to switch the second resistor (15, R36, R40) in parallel with the first resistor (16, R37). Device according to one of Claims 1 to 5 wherein the first controller (4) is adapted to adjust the charging current by the first actuator (7, Q9), wherein the first actuator (7, Q9) is controlled by an output signal of the first operational amplifier (8). Device after Claim 6 wherein the first operational amplifier (8) drives the first first regulator (7, Q9) based on a difference between an input voltage (+ 5V_USB, Ux) of the charging circuit and a target voltage (Uf) provided by the charging circuit. Device according to one of the preceding claims, comprising a high-impedance feedback (13) from the charge storage device to the second regulator (5), the high-impedance feedback (13) being applied to a positive input of the second operational amplifier (10). Device according to one of Claims 1 to 7 , characterized in that the device comprises a return (13 ') from an anode of a charge storage arranged diode (D4, 17) to the second controller (5), wherein the feedback (13') at an input of the second operational amplifier (10 ) is present. Device according to one of the preceding claims, wherein an output signal of the second operational amplifier (10) controls the second actuator (9). Device according to one of the preceding claims, characterized in that the same control signal is applied to the first controller (4) and the second controller (5). Device according to one of the preceding claims, wherein an inverting input of the second operational amplifier (10) at a non-inverting input of the first operational amplifier (8) is applied. Device according to one of the preceding claims, wherein the second controller (5) comprises an ultra-low leakage diode, in particular a Schottky diode for preventing leakage when the memory is loaded. Device according to one of the preceding claims, comprising a voltage tap for supplying a connected device, wherein a supply voltage of the device is equal to the charging voltage (VCC) of the high-capacitive memory. A method for controlling a charging process of a high-capacitive memory from at least one voltage source, the method comprising Receiving a first input voltage (+ 5V_USB) from a first voltage source; Providing a desired voltage (Uf) through the charging circuit to a first regulator (4), Determining the difference between the setpoint voltage (Uf) and the input voltage (+ 5V_USB, Ux) by the first controller (4), Adjusting the charging current based on the difference between the target voltage (Uf) and the input voltage (+ 5V_USB, Ux) by the first regulator; Providing the desired voltage (Uf) and a charging voltage (VCC) of the charge storage device to a second regulator (5), Determining the difference between the charging voltage (VCC) and the setpoint voltage (Uf) by the second regulator (5), Adjusting the charging current by the second regulator (5) based on the difference between the charging voltage (VCC) and the target voltage (Uf). Method according to Claim 15 wherein adjusting the charging current by the second regulator (5) comprises integrating the difference between the charging voltage (VCC) and the target voltage (Uf). Method according to Claim 16 wherein the integrating by the second controller (5) comprises inverting the difference between the charging voltage (VCC) and the target voltage (Uf). Method according to one of Claims 15 to 17 wherein adjusting the charging current by the first regulator (4) comprises: switching, in particular by a MOSFET, at least one second resistor (15, R36, R40) in parallel with a first resistor (16, R37). Method according to one of Claims 15 to 18 wherein the receiving of the difference between the charging voltage (VCC) and the target voltage (Uf) by the second regulator (5) based on a high-impedance feedback (13) from the charge storage to the second controller (5). Method according to one of Claims 15 to 19 comprising: receiving by the first controller (4) a control signal (HIGHLOAD_EN), the first controller (4) switching the third switch (6) based on the control signal to parallel the at least one second resistor (15, R36, R40) to switch to the first resistor (16, R37). A system comprising a voltage source, a charge storage device and a device according to the Claims 1 - 14 , System after Claim 21 comprising an electrically powered device.

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