DE102017213339A1 - Circuit arrangement and method for producing a circuit arrangement - Google Patents

Abstract

Disclosed is a circuit arrangement (SA) comprising printed conductors (LB1, LB2), which are thermally spray-coated and subsequently formed in accordance with the circuit layout of the circuit arrangement (SA) by selective laser ablation. Furthermore, a method for producing a circuit arrangement is shown.

Description

Technical area:

The present invention relates to a circuit arrangement, in particular for power electronics. Furthermore, the invention relates to a method for producing a circuit arrangement.

State of the art and object of the invention:

Circuit arrangements, in particular power electronic circuit arrangements, are used in technical apparatus of almost all technical fields, in particular in the automotive sector, where signals are processed or controls or arrangements are made for the technical devices.

There is the general requirement to build the technical devices and thus also the circuit arrangements as lightweight and compact as possible.

Thus, the object of the present invention is to provide a way in which a circuit arrangement can be built easily and compactly.

Description of the invention:

This object is solved by subject matters of the independent claims. Advantageous embodiments are the subject of the dependent claims.

According to one aspect of the invention, a circuit arrangement, in particular for power electronics, is provided.

The circuit arrangement comprises strip conductors which are formed by thermal spraying and subsequent selective laser ablation, in particular in accordance with the circuit layout of the circuit arrangement.

The conductor tracks are formed by selective removal of at least one conductor track layer under a laser irradiation, wherein the at least one conductor track layer per se is formed by thermal spray coating.

The invention is based on the finding that, in the case of a circuit arrangement, the interconnects, in particular their web width and spatial distances, are responsible, inter alia, decisively for the dimensioning and thus for the size and weight of the circuit arrangement.

By reducing the web width and the spatial distances of the tracks, a circuit arrangement can be built easily and compact.

Within the scope of the invention, it has been recognized that thermal spraying is a promising method for producing conductor tracks with narrow track widths and spacings of about 1 millimeter.

In this case, the web widths and the spatial distances of about 1 millimeter still proved insufficiently low, especially if with the tracks light and compact fine-pitch devices without additional wiring level, such. As bonding wires to be contacted directly electrically, which requires a pitch of less than 1 millimeter, in particular of about 0.5 millimeters.

However, the openings in masks used in thermal spraying to form the wiring pattern restrict the making of traces having a narrow width of less than 1 millimeter.

In order to further reduce the web widths and the spatial distances of the interconnects and thus to enable direct electrical contacting of fine pitch components, the thermally spray-coated interconnect layer was removed by subsequent selective laser ablation in accordance with the circuit layout until a trace structure was obtained is produced with conductor tracks, which meet the above grid.

During the selective laser ablation, the conductor track material is removed from the thermally spray-coated conductor track layer by bombardment with, for example, pulsed laser radiation with, for example, CO2 or laser lasers, until the track structure is formed with the above-mentioned grid dimension.

This provides a possibility with which a circuit arrangement can be built easily and compactly.

In this case, the interconnects can be cut free either by the end of the thermal spraying process of the entire interconnect layer by laser ablation.

Alternatively and in particular in the case of multilayer interconnects and when covering some of the interconnect layers with insulating layers, the interconnects can still be cut free during the thermal spraying process by means of laser ablation.

For example, the interconnects have a track width of and less than 0.75 millimeters, in particular of and less than 0.5 millimeters, on.

For example, the interconnect spacing between the interconnects, which are adjacent to each other, of and less than 0.75 millimeters, in particular of and less than 0.5 millimeters, on.

For example, the circuit arrangement further comprises at least one electrically insulating and thermally conductive insulating layer, which is formed by thermal spraying. The conductor tracks are arranged on the at least one insulating layer.

For example, the circuit arrangement further comprises a heat sink for cooling the circuit arrangement. The at least one insulating layer is formed, for example, on a surface of the heat sink. The interconnects are formed, for example, on a surface remote from the heat sink surface of the at least one insulating layer.

For example, the circuit arrangement further comprises at least two insulating layers, which are arranged one above the other. Between the at least two insulating layers at least one of the conductor tracks is arranged, which is electrically insulated from the remaining conductor tracks and the heat sink by the at least two insulating layers.

According to a further aspect of the invention, a method for producing a circuit arrangement with interconnects is provided.

According to the method, at least one conductor track layer is formed by thermal spraying. By selective laser ablation of the at least one conductor track layer, in particular according to the circuit layout of the circuit arrangement, the conductor tracks are then formed.

For example, the at least one conductor track layer is thermally spray-coated on at least one insulating layer.

In this case, the at least one insulating layer is thermally spray-coated, for example, on a heat sink of the circuit arrangement, that is formed by a further thermal spraying.

Advantageous embodiments of the circuit arrangement described above are, as far as possible, transferable to the above-mentioned method, to be regarded as advantageous embodiments of the method.

Description of the drawing:

In the following, an exemplary embodiment of the invention with reference to the accompanying drawings is explained in more detail. In this case, a single figure shows a schematic side sectional view of a circuit arrangement SA according to an embodiment of the invention.

The circuit arrangement SA comprises a heat sink KK made of aluminum for cooling the circuit arrangement SA.

The circuit arrangement SA further comprises a plurality of electrical insulating layers IS of a thermally conductive and electrically insulating ceramic, which are arranged on a surface OF1 of the heat sink KK in several layers at least partially directly or indirectly overlapping each other.

The insulating layers IS are formed by thermal spraying of the ceramic. Thanks to thermal spraying, the individual insulating layers IS have a layer thickness of less than 200 micrometers and thus a very good thermal conductivity.

The circuit arrangement SA further comprises a plurality of first conductor tracks LB1 made of aluminum, which are formed on a plurality of layers at least partially indirectly overlapping. In this case, the first interconnects LB1 are disposed between the insulating layers IS or on surfaces OF2 of the respective insulating layers IS facing away from the cooling body KK and thus electrically insulated from one another and from the cooling body KK by the insulating layers IS.

The circuit arrangement SA furthermore comprises a plurality of second conductor tracks LB2 made of copper, which are formed on surfaces OF3 of the outer first conductor tracks LB1 facing away from the heat sink KK and form solderable conductor track connections for electrical contacting of fine-pitch components.

Like the insulating layers IS, the first and second conductor tracks LB1, LB2 are also formed by thermal spraying. In this case, conductor track structures or traces of the first and second conductor tracks LB1, LB2 are formed by selective laser ablation following the thermal spray coating, wherein trace layers formed by thermal spray coating on the respective insulating layers IS partially corresponding to the circuit layout of the circuit SA by selective laser ablation removed and thus formed to the respective conductor tracks LB1, LB2.

To produce the circuit arrangement SA, the heat sink KK made of aluminum is first produced in a casting or extrusion process in a manner known to the person skilled in the art.

On the surface OF1 of the heat sink KK, a first insulating layer IS of the thermally conductive and electrically insulating ceramic is first formed by thermal spraying.

Subsequently, a first conductor layer of aluminum is formed on the surface OF2 of the first insulating layer IS by a further thermal spraying.

Subsequently, the aluminum material is ablated (laser ablation) by bombardment with pulsed laser radiation from the first interconnect layer, and thus a first interconnect structure is formed with the first interconnects LB1 in accordance with the circuit layout.

Alternatively, the conductor track layer is removed during its production by thermal spraying the aluminum material by the laser ablation.

In order to form the further insulating layers IS and the further first printed conductors LB1, the steps of thermal spraying of the respective further insulating layers IS, the thermal spraying and the laser ablation of the respective further interconnect layers are repeated in the manner described above until a desired multilayer interconnect structure with the first interconnects LB1 is produced.

By alternately running process operations of the thermal spraying of the insulating layers IS, the thermal spraying of the various interconnect layers and the laser ablation of the interconnect layers thus a multilayer interconnect structure with the partially overlapping first interconnects LB1 and inset between the first interconnects LB1 insulative layers IS can be produced.

Subsequently, the second conductor tracks LB1 made of copper are formed on the free surfaces OF3 of the outer first conductor tracks LB1 by further thermal spraying and subsequent laser ablation.

The insulating layers IS and the conductor tracks LB1, LB2 are preferably formed under the masking.

During thermal spray coating of the insulating layers IS, openings are formed at locations where electrical connections between two interconnects LB1, LB2 that are electrically and spatially separated from the respective insulating layers IS are to be produced, at which the interconnects LB1, LB2 can be electrically contacted with one another.

Contact surfaces are then formed on the second interconnects LB2, at which electrical or electronic components, in particular fine-pitch components, are electrically and physically contacted, for example by soldering.

The required widths of the interconnects LB1, LB2 and the distances between the interconnects LB1, LB2 and the required contact surfaces of the second interconnects LB2 by means of a laser, such as. B. a C02 or chamfer laser, cut free, wherein the laser energy is adjusted so that the insulating layers IS are not cut through. This serves to avoid unwanted electrical short-circuits between the interconnects LB1, LB2.

It can be formed conductor tracks LB1, LB2 with a track width of and less than 0.5 millimeters or a track spacing of less than and 0.5 mm. In particular, the second conductor tracks LB2 can be produced with soldering surfaces having a surface width of approximately 0.3 millimeter and spacings between the soldering surfaces of approximately 0.2 millimeter. Thus, the second tracks LB2 allow a pitch of about 0.5 millimeters and thus for the production of electrical solder joints of fine-pitch components.

In addition, areas of the interconnects LB1, LB2 can be removed by the selective laser ablation, so that recesses AN or interconnect structure are formed with interruptions in accordance with the circuit layout in these areas.

Claims (9)

Circuit arrangement (SA) comprising printed conductors (LB1, LB2), which are formed by thermal spraying and subsequent selective laser ablation. Circuit arrangement (SA) according to Claim 1 , wherein the conductor tracks (LB1, LB2) have a track width of and less than 0.75 millimeters, in particular of and less than 0.5 millimeters. Circuit arrangement (SA) according to Claim 1 or 2 , wherein the track spacing between the tracks (LB1, LB2) of and less than 0.75 millimeters, in particular of and less than 0.5 millimeters, has. Circuit arrangement (SA) according to one of the preceding claims, further comprising at least one electrically insulating and thermally conductive insulating layer (IS), which is formed by thermal spraying, wherein the conductor tracks (LB1, LB2) are arranged on the at least one insulating layer (IS). Circuit arrangement (SA) according to Claim 4 , further comprising a heat sink (KK) for cooling the circuit arrangement (SA), wherein the at least one insulating layer (IS) is formed on a surface (OF1) of the heat sink (KK), and the conductor tracks (LB1, LB2) on one of the Heat sink (KK) facing away from surface (OF2) of at least one insulating layer (IS) are formed. Circuit arrangement (SA) according to Claim 4 or 5 , further comprising at least two insulating layers (IS), which are arranged one above the other, wherein between the at least two insulating layers (IS) at least one of the conductor tracks (LB1) is arranged, which by the at least two insulating layers (IS) of the remaining conductor tracks (LB1, LB2) is electrically isolated. Method for producing a circuit arrangement (SA) with interconnects (LB1, LB2), comprising the following steps: - Forming of at least one conductor layer by thermal spraying; - Forming conductor tracks (LB1, LB2) by selective laser ablation of the at least one conductor track layer. Method according to Claim 7 wherein the at least one conductor track layer is thermally spray-coated on at least one insulating layer (IS). Method according to Claim 8 wherein the at least one insulating layer (IS) is thermally spray-coated on a heat sink (KK).

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