DE102017118105B3 - Safety-relevant ultrasonic sensor system with transformer for self-test and monitoring of this ultrasonic sensor system by monitoring the amplitude component of a fundamental or harmonic wave - Google Patents

Abstract

A self-testable sensor system (SS) is proposed which can have four states, one operating state and three test states. In the third test state, digital signal generation (DSO) directly stimulates the digital input circuit (DSI) with test signals, allowing this signal chain to be tested. In the second test state, digital signal generation (DSO) stimulates the analog signal chain (DR, AS) and the digital input circuit (DSI) with test signals, whereby the signal chain can then be tested. In the third test state, digital signal generation (DSO) stimulates the analog signal chain (DR, AS), the sensor subdevice (TR) (typically an ultrasound transducer) and the digital input circuit (DSI) with test signals whereby this signal chain can be tested and monitored for parameter compliance. In operation, digital signal generation (DSO) stimulates the analog signal chain (DR, AS), the sensor subdevice (TR) (typically an ultrasound transducer) and the digital input circuit (DSI) with measurement signals, where the signal chain can be monitored for parameter compliance. There is a monitoring of the amplitude value of a fundamental or harmonic.

Description

preamble

A self-testable sensor system, in particular an ultrasonic sensor measuring system for use in the automobile, and a method for its operation are proposed.

General introduction

With the introduction of functional safety in accordance with ISO 26262 in the automotive sector, ultrasonic sensor systems must also meet such functional safety requirements. These requirements are particularly high when it comes to such autonomous functions, such as automatic parking. In order to better detect hidden defects, a self-diagnostic capability is also and especially necessary during operation. One problem is that the measurement results of such ultrasonic measuring systems are used, for example, for the autonomous parking of motor vehicles. A detection of hidden errors is therefore indispensable. This document deals with the typical errors and the necessary sub-devices and methods for their detection.

This object is achieved by a device according to claim 1.

State of the art

From the published patent application DE 10 2008 042 820 A1, a sensor device with an ultrasonic sensor and a function monitoring device for determining the impedance by means of a voltage level which is determined by amplifiers, filters and microcontrollers on the sound transducer is known. In DE 10 2008 042 820 A1, an evaluation of the voltage signal at a comparator, in which a monitoring signal with respect to the voltage or impedance is formed, is disclosed.

Solution of the task

1. 1. Digitale Signalverarbeitungsüberprüfung; VORTEIL: Stimuli und Erwartungswerte der Systemantwort der digitalen Signalverarbeitung können exakt festgelegt werden.
2. 2. Interne Signalpfad Überprüfung; (Anregen des Burstgenerators, Nutzen eines heruntergeteilten Treiberstroms, Einkopplung hinter der ersten Verstärkerstufe, Auswertung nach der Echoevaluierung). VORTEIL: Diese Methode ist schnell und umfassend.
3. 3. Impedanz-Wert Überprüfungen der Impedanz der Senosorteilvorrichtung(TR), also des Ultraschalltranducers (TR); (Durchführen eines Frequenzsweeps und Auswerten der Resonanzkurve) VORTEIL: Die Methode prüft den kompletten Signalpfad inklusive der externen Elemente. Die Auswertung der Resonanzkurve der Sensorteilvorrichtung (TR), also des Ultraschalltransducers (TR), die die Systemantwort der Sensorteilvorrichtung (TR) auf den Stimulus in Form des Frequenzsweeps ist, kann in der nach Methodik 1 bereits geprüften digitalen Signalverarbeitung erfolgen. Der Frequenzsweep selbst kann ebenfalls in der bereits nach der Methode 1 geprüften digitalen Signalverarbeitung erzeugt werden.
4. 4. Komparatoren an der Sensoransteuerung zur Überwachung der externen Komponenten und der Treibertransistoren ; VORTEIL: Kontinuierliche Prüfung der Sensoranregung auch während des Betriebs.
5. 5. Symmetrieprüfung durch Symmetrieprüfungsvorrichtungen auch während des Betriebs; VORTEIL: Betriebsrelevante, symmetriebrechende Störungen der Symmetrie der Sensorteilvorrichtung (z.B. des Ultraschall / Übertrager Systems) können erkannt werden.
6. 6. Oberwellenprüfung auch während des Betriebs; VORTEIL: Betriebsrelevante, nicht symmetriebrechende, aber das Schwingungsspektrum verändernde Störungen der Sensorteilvorrichtung (z.B. des Ultraschalltransducer / Übertrager Teilsystems) können erkannt werden.

During the initial self-test of the proposed sensor system (SS) or in the context of customer-specific diagnostic measures, various tests of the proposed sensor system (SS) for system diagnostics can be carried out:

1. 1. Digital signal processing check; ADVANTAGE: Stimuli and expected values of the system response of digital signal processing can be specified exactly.
2. 2. Internal signal path verification; (Excitation of the burst generator, use of a divided driver current, coupling behind the first amplifier stage, evaluation after the echo evaluation). ADVANTAGE: This method is fast and comprehensive.
3. 3. Impedance value Checks of the impedance of the senosor device (TR), ie the ultrasonic transducer (TR); (Performing a sweep of frequency and evaluating the resonance curve) ADVANTAGE: The method checks the complete signal path including the external elements. The evaluation of the resonance curve of the sensor subdevice (TR), ie of the ultrasound transducer (TR), which is the system response of the sensor subdevice (TR) to the stimulus in the form of the frequency sweep, can be carried out in the digital signal processing already tested according to methodology 1. The frequency sweep itself can also be generated in the already tested by the method 1 digital signal processing.
4. 4. comparators on the sensor driver for monitoring the external components and the driver transistors; ADVANTAGE: Continuous testing of sensor excitation even during operation.
5. 5. Symmetry testing by symmetry testing devices also during operation; ADVANTAGE: Operational, symmetry-breaking disturbances of the symmetry of the sensor subdevice (eg of the ultrasound / transducer system) can be detected.
6. 6. Harmonic testing also during operation; ADVANTAGE: Operational, non-symmetrical, but the vibration spectrum changing disturbances of the sensor subdevice (eg the ultrasonic transducer / transmitter subsystem) can be detected.

Digital signal processing verification

The digital signal processing check is performed by feeding at least one test signal corresponding to a critical possible signal of the ultrasonic transducer. This feeding takes place in the signal path of the ultrasonic sensor system in a third test state of the sensor system according to the analog-to-digital converter (ADC) or in a second test state of the sensor system before the analog-to-digital converter (ADC). It then follows an evaluation in the form that would be done in normal operation for a real ultrasonic echo signal. Since the test signal is known and its expected result is also known, the signal path can be checked very quickly for continuity and functionality in operation. This can During operation without performance, losses occur, for example, during non-operating times or when the system is started or restarted or when the ultrasonic sensor system is switched off. A feed into the signal path before the analog-to-digital converter (ADC) takes place analogously via an analog multiplexer (AMX). A feed into the signal path after the analog-to-digital converter (ADC) takes place digitally, for example via a digital multiplexer (DMX). For digital injection, the response of the system at the end of the signal path must be EXACTLY as specified, whereas an analog signal must be given a TOLERANCE RANGE, or the analog signals are generated with such a bias that a misjudgment is excluded, taking into account process variations and operating parameter variations , The advantage of this method is that it is particularly fast and accurate.

As a result, a fairly high functional test coverage can be maintained during normal operation of the ultrasonic sensor system. However, these principles can be generalized to similar sensor systems.

PRINCIPLE:

The principle of the self-test method proposed here comprises feeding a test signal after or before the analog-to-digital converter (ADC) in the analog input circuit (AS) and the evaluation after the echo evaluation in the subsequent digital input circuit (DSI). It is possible to go through different paths in the analog input circuit (AS) and in the subsequent digital input circuit (DSI) in order to adapt the tests as closely as possible to the respective application of the sensor system (SS).

The excitation with a defined input signal through a digital input circuit (DSO) bypassing the non-digital signal path components leads to a fixed, reproducible echo information (eg with respect to timing, echo height, correlation with an expected, exactly known waveform, etc.) at the output of the signal chain in the digital Input circuit (DSI).

This predictability should be used for a self-test with one operating state and three test states of the sensor system.

A self-testable sensor system (SS) is therefore proposed, which includes digital signal generation (DSO) for generating the stimuli, a driver stage (DR) for power amplification and analog signal shaping of the digitally present stimuli, a sensor subdevice (TR) or an ultrasound transducer (TR). for converting the power amplified stimuli into measurement signals in the measurement medium (eg air in the case of ultrasound) and for receiving the channel response from the measurement channel (CH) in the form of a received signal, an analog input circuit (AS) for amplifying, preprocessing and digitizing the received signal, a digital signal Input circuit (DSI) for processing the digitized received signal. These components are found in the prior art in typical ultrasonic measuring systems, for example for use in automotive parking assistance systems.

In order to enable an efficient self-test of the sensor system (SS), it is proposed that the self-testable sensor system is additionally provided with an analog channel simulation unit (ACS). This analog channel simulation unit (ACS) should be able to emulate the chain of sensor subdevice (TR) (or ultrasound transducer (TR)) and measurement channel (CN). To make this possible, the signal path must be separated by an analog multiplexer (AMX) in front of the analog input circuit (AS) and the output of the analog channel simulation unit (ACS) are fed there and the output signal of the sensor subdevice (TR) (or the ultrasonic transducer (or TR)) are capped. Of course, it is also conceivable to feed the output signal of the analog channel simulation unit (ACS) within the analog input circuit (AS) through a corresponding multiplexer structure within the analog input circuit (AS) or elements of the analog channel simulation within the driver stage (DR), which also here acts as a digital-to-analog converter to implement with. This is expressly claimed. For example, it is conceivable that the driver stage (DR) is reduced in its output amplitude in a test configuration and the analog input circuit (AS) is driven directly by the output of the driver stage (TR). The control of the configuration of the driver stage (DR) is preferably carried out by the control unit (CTR). The attenuation then serves to generate near-operational levels at the input of the analog input circuit (AS). Thus, critical, allowed and faulty test and test cases can be simulated. The response of the sensor system (SS) must be within a predeterminable range of values. Error cases and permitted operating states can be emulated as test cases. Thus, excluding the measurement channel (CN) and the sensor subdevice (TR) (e.g., an ultrasound transducer) preceding and following this measurement channel (CN), the signal chain can be checked for compliance with predetermined specification ranges for important operating parameters and operational cases.

Analogously, a digital channel simulation unit (DCS) with one with a digital multiplexer (DMX) can be provided. The digital channel simulation unit (DCS) preferably emulates in a precisely reproducible manner a predetermined behavior of the signal sequence comprising driver stage (DR), sensor subdevice (TR), measuring channel (CN), and analog input circuit (AS). Thus, critical allowed and faulty operating cases can be simulated as test and test cases. Thus, excluding the measurement channel (CN) and the sensor subdevice (TR) (eg an ultrasound transducer) preceding and following the measurement channel (CN), the signal circuit can be checked for EXACT compliance with specified specification values for important operating parameters and operating cases.

Thus, several, preferably four states of the proposed sensor system (SS) can be distinguished:

First, the proposed sensor system (SS) has a state hereinafter referred to as "operating state", which corresponds to the measuring normal operation.

Secondly, the sensor system (SS) has a state, referred to below as the first test state, in which the sensor subdevice (TR), for example an ultrasound transducer, is checked for correct function. This can be done for example by an impedance measurement of the exemplary ultrasonic transducer (TR).

Thirdly, the sensor system (SS) has a state referred to below as the second test state, in which the sensor subdevice (TR) itself is no longer part of the signal path. Rather, the sensor subdevice (TR) and thus also the measurement channel (CN) is bridged by an analog channel simulation unit (ACS) and an analog multiplexer (AMX). The advantage is that thus the behavior of the signal path no longer depends on the conditions in the measurement channel (CN) or on the state of the sensor subdevice (TR), for example, on the state of the sensor subdevice (TR), e.g. an ultrasound transducer (TR), and thus is predictable. If the response of the signal path in this second test state to a given stimulus does not correspond to an expected response within certain limits, then there is an error. In this case, the expected response must allow a certain tolerance in order to compensate for production fluctuations, which experience has shown to have an effect, in particular, in the analog circuit parts and the sensor subdevice (TR).

The stimulus and the simulation of the channel can be chosen so that both stimulus and channel response correspond to a real allowable according to specification case. In that case, the response of the system must therefore correspond to an expected response within certain predictable limits.

The simulations of the channel can also be chosen so that the channel response corresponds to a real specification-permitted case, but the stimulus itself should lead to an error event in the reception chain. If this error event is not detected by the digital input circuit (DSI) and analog input circuit (AS) receive chain, the receive chain is faulty, which can be signaled. In that case, the response of the sensor system (SS) must correspond to an expected response within certain predictable limits. If this is not the case, there is an error.

The stimulus can also be chosen so that the stimulus corresponds to a real specification-permitted case. The simulation of the channel can then be selected such that the channel response corresponds to a specification that is not allowed. Also in this case, the error must be detected by the subsequent receive chain.

Of course, it is conceivable that both the stimulus and the simulation of the channel lead to an error. This must also be recognized by the subsequent chain of reception.

Fourth, the proposed sensor system (SS) may assume a state referred to below as the third test state, in which the sensor subdevice (TR), in particular in the form of an ultrasound transducer, and the analog signal path portions are no longer part of the remaining signal path. The remaining signal path is then purely digital. Therefore, in contrast to the second test state of the sensor system (SS), responses of the remaining signal path in this third test state to predefined stimuli must EXACTLY coincide with predefinable expected values.

The stimulus and the simulation of the channel can be selected so that both the stimulus and the channel response now correspond exactly to a real case permitted by the specification. In that case, the system response must match exactly with an associated expected answer. If this is not the case, there is an error.

The simulation of the channel can again be chosen such that the channel response corresponds to a real specification-permitted case, but the stimulus itself should lead to an error event in the reception chain. will this Error event not detected by the digital receive chain consisting only of the digital input circuit (DSI), the digital receive chain is faulty, which can be signaled. In that case, the answer of the system must exactly match the expected answer.

The stimulus can also be chosen so that the stimulus corresponds to a real specification-permitted case. The simulation of the channel can then be selected such that the channel response corresponds to a specification that is not allowed. Also in this case, the error must be detected by the subsequent digital receive chain.

Of course, it is conceivable that both the stimulus and the simulation of the channel lead to an error. Again, this must be detected by the subsequent digital receive chain in the third test state.

In the following, the four states will be discussed in more detail. Other states can be provided.

operating condition

In operation, digital signal generation (DSO) generates a first digital signal (S1) comprising said stimuli. The driver stage (DR) converts this first digital signal (S1) of digital signal generation (DSO) into a second analog signal (S2), typically performing said digital-to-analog conversion and power amplification. The driver stage (DR) controls with this second analog signal (S2) the sensor subdevice (TR), for example an ultrasound transducer (TR), and thus causes it by means of the second analog signal (S2) to emit a measurement signal (MS) into one Measuring channel (CN) in an outdoor area (ASS) outside the sensor system (SS) into it. For example, by the driver stage (DR) an ultrasonic transducer (TR) for emitting an ultrasonic measurement signal (MS) in an air gap as a measuring channel (CN) can be caused. The sensor subdevice (TR), for example the said ultrasound transducer (TR), then receives from the measuring channel at certain times, which in the case of an ultrasound transducer (TR) preferably coincide with the times of emission of the ultrasound measurement signal, the transmission phases (SP). CN) a received signal (ES) as a function of the measuring signal (MS). In the case of an ultrasonic transducer (TR), these are preferably echoes of the previously emitted ultrasonic measurement signal (MS) which reach the ultrasound transducer (TR) from the measurement channel (CN). Depending on the received received signal (ES), the sensor subdevice (TR) generates a third analog signal (S3), which depends on the received signal (ES) received from the measuring channel (CN). For example, the exemplary ultrasound transducer (TR) generates the third analog signal (S3) in response to the ultrasound receive signal (ES) to echo from the ultrasound measurement channel (CN) the ultrasound measurement signal (MS) previously emitted by it.

The analog multiplexer (AMX) passes this third analog signal (S3) as the fourth analog signal (S4) on to the analog input circuit (AS).

The analog input circuit (AS) converts the fourth analog signal (S4) into a fifth digital signal (S5). So he works on the one hand as an analog-to-digital converter (ADC). On the other hand, however, the analog input circuit may also include, for example, filters and amplifiers and other analog circuits that preprocess and process the received signal. In the operating state, the digital multiplexer (DMX) forwards the fifth digital signal (S5) as the sixth digital signal (S6).

The digital input circuit (DSI) receives the sixth digital signal (S6) and generates a seventh response signal (S7). For example, the Digital Input Circuit (DSI) may include digital filters and signal processor systems. Particularly preferred is the use of matched filters whose filter function corresponds to expected signal forms from the preceding signal chain. It is conceivable, for example, that further permitted operating configurations are permissible, which are limited only by the signal path in the digital input circuit (DSI) and / or by the signal path in the analog input circuit (AS) and the associated stimulation generation in the digital signal generation (DSO) and / or in the configuration of the driver stage (DR). These configurations are preferably set and controlled by the system controller (CTR) whose control lines are not shown in the attached figures for simplicity. For simplicity, a single configuration of the sensor system (SS) is assumed here, but this is not intended to be limiting in this regard. Since the operating state is the normal state, the output signal of the digital input circuit, the seventh response signal (S7) is taken as a signal for the measurement result and further processed as such and / or signaled to other system components such as a system control (CTR). In the subsequent test states, on the other hand, the seventh response signal (S7) is interpreted and used as the test result of the sensor system (SS). This does not happen in the operating state if the values are plausible. It is conceivable before using the seventh response signal (S7) as a measurement result or before the use of the values of the seventh response signal (S7) as a measurement result or as measurement results of these signals or the values represented by them for plausibility even in the operating state to check and so recognize errors during operation.

First test condition

In the first test state, digital signal generation (DSO) generates a first digital signal (S1). This includes predetermined stimuli that should lead to predictable signal chain responses that can then be tested. These stimuli may include normal cases of operation, errors and stimuli for measurements. For example, in the case of the ultrasonic transducer as already mentioned several times as a sensor subdevice (TR), it is conceivable to excite the ultrasound transducer (TR) to oscillate at a first oscillation frequency and then change the oscillation frequency in a predeterminable manner to a second oscillation frequency, preferably monotonically increasing or monotonically decreasing , Such a method of oscillation frequency change is referred to as sweep in this disclosure.

As in the operating state, the driver stage (DR) converts this first digital signal (S1) of the digital signal generation (DSO) into a second analog signal (S2) which drives the sensor subdevice (TR). This second analog signal (S2) then causes the sensor subdevice (TR), for example the said ultrasonic transducer (TR), to emit a measurement signal (MS), for example an ultrasound measurement signal, into a measurement channel (CN), for example an ultrasound measurement channel an outdoor area (ASS) outside the sensor system (SS). As before in the operating state, the sensor subdevice (TR), for example the ultrasound transducer (TR), receives from the measuring channel (CN) a received signal (ES) as a function of the previously transmitted measuring signal (MS). For example, the received received signal (ES) may be an ultrasonic echo (ES). The sensor subdevice (TR), for example the ultrasound transducer (TR), generates a third analog signal (S3) as before as a function of the received received signal (ES). The analog multiplexer (AMX) in this first test state, as previously in the operating state, forwards this third analog signal (S3) as the fourth analog signal (S4). The analog input circuit (AS) converts the fourth analog signal (S4) into a fifth digital signal (S5). However, in contrast to the operating state, this can also be measured values. For example, it is conceivable to determine the impedance of an ultrasound transducer (TR), which serves as a sensor subdevice (TR). This impedance determination is preferably done in the analog input circuit (AS) and possibly in conjunction with the subsequent digital input circuit (DSI). Here, special circuit parts of the analog input circuit (AS) and the digital input circuit (DSI) can be used, which are used only in the first test state. For this to happen, the digital multiplexer (DMX) forwards the fifth digital signal (S5) as the sixth digital signal (S6). The digital input circuit (DSI) receives the sixth digital signal (S6) and generates a seventh response signal (S7). Now, however, the seventh response signal (S7) is used as a test result of the sensor system and not as a measurement result. The check for excited harmonics and symmetry of the control and system response can also be done in this first test state and will be explained later.

Second test state

In the second test state, digital signal generation (DSO) again generates a first digital signal (S1) as a stimulus of the subsequent signal chain. The driver stage (DR) again converts this first digital signal (S1) of the digital signal generation (DSO) into a second analog signal (S2) as described above. The analog channel simulation unit (ACS) now modifies this second analog signal (S2) into a third analog test signal (S3t). In this case, preferably predefined states of the measuring channel (CN) and the sensor sub-device (TR) are simulated. The analog multiplexer (AMX) forwards this third analog test signal (S3t) as the fourth analog signal (S4) in place of the third analog signal (S3). The sensor sub-device (TR), that is, for example, the ultrasound transducer (TR), and the measuring channel (CN) are thus defined and bridged in a predetermined manner. Since this happens in the analog part of the sensor system (SS), this bridging does not take place in an exactly predictable manner, since manufacturing fluctuations and other operating parameters which can not be completely influenced, such as, for example, the circuit temperature, lead to behavioral fluctuations of the signal chain within the sensor system (SS) in spite of this analog bypass by the analog channel simulation unit (ACS) and the analog multiplexer (AMX). The Analog Multiplexer (AMX) can also be designed so that the Analog Input Circuit (AS) has two inputs to switch between. In that case, the analog multiplexer (AMX) is then integrated into the analog input circuit (AS). The claims should also cover this case. However, the behavior of the signal chain to predetermined stimuli, which are generated by digital signal generation (DSO), can already be checked within predefinable limits. As in the operating state, the analog input circuit (AS) converts the fourth analog signal (S4) into a fifth digital signal (S5) again. The digital multiplexer (DMX) forwards the fifth digital signal (S5) as the sixth digital signal (S6) to the digital input circuit (DSI). The digital input circuit (DSI) receives the sixth digital signal (S6) and generates a seventh response signal (S7). The digital multiplexer (DMX) may also be implemented in such a way that the digital input circuit (DSI) has two inputs to switch between. The digital multiplexer (DMX) is then part of the digital input circuit (DSI). The digital input circuit (DSI) receives the sixth digital signal (S6) and generates a seventh response signal (S7). Now again, as in the first test state, the seventh response signal (S7) is used as the test result of the sensor system and not as the measurement result.

Third test condition

In the third test state, digital signal generation (DSO) again generates a first digital signal (S1) as a predefined stimulus for checking the subsequent signal sequence. Now, however, both the analog parts of the signal chain and the sensor sub-device (TR) and the measuring channel are bridged. This bridging happens digitally. Therefore, stimuli and the responses of the signal chain to these stimuli are accurate and predictable. The digital channel simulation unit (DCS) emulates the bridged portions of the signal path through preferably multiple emulation states within this third test state. For this purpose, the digital channel channel simulation unit (DCS) preferably has a plurality of configurations which are set and configured by the control unit (CTR). The digital channel simulation unit (DCS) converts the first digital signal (S1) into a fifth digital test signal (S5t). The digital multiplexer (DMX) passes the fifth digital test signal (S5t) instead of the fifth digital signal (S5) in this third test state of the sensor system (SS) as the sixth digital signal (S6). The digital input circuit (DSI) receives the sixth digital signal (S6) and generates a seventh response signal (S7) corresponding to the stimulus. Now again, as in the first and second test states, the seventh response signal (S7) is used as the test result of the sensor system and not as the measurement result. In contrast to the first and second test state, however, now the seventh response signal (S7) must exactly meet predeterminable responses, since all circuit parts in the active signal path in this third test state of the sensor system (SS) are digital and all other parts are bridged.

version 1

In a further embodiment of the proposal, which preferably relates to an ultrasound measuring system, a transmitter (UEB) is inserted between the sensor subdevice (TR), that is to say the ultrasound transducer (TR), and the driver stage (DR). In the example of 2 the transmitter (UEB) by the third analog signal (S3) with the sensor sub-device (TR), so here for example the ultrasonic transducer, connected. Thus, in the example of 2 the third analog signal (S3) from both the output signal of the transmitter (UEB) and the input behavior of the sensor sub-device (TR) and thus in the case of an ultrasonic transducer from the received signal (ES). In the operating state and in the first test state, therefore, the sensor subdevice (TR) is not directly but via a transformer (UEB) by means of the second analog signal (S2) for emitting a measurement signal (MS) in a measurement channel (CN) in the outer space (ASS) outside the sensor system (SS). The sensor subdevice (TR) thus generates the third analogue signal (S3) as a function of the received received signal (ES) and in cooperation with the transmitter (UEB), the third analogue signal (S3) being dependent on the second analogue signal (S2) and to which the receive signal (ES) received by the sensor subdevice (TR) depends.

Variant 2

Variant 2 relates to a proposed sensor system (SS) according to variant 1, wherein in the operating state at least one comparison device, in particular a comparator (C2, C3), a parameter value of the third analog signal (S3a, S3b) with at least one reference value (Ref2, Ref3) compares and generates depending on the comparison result at least one comparison result signal (v2, v3). This parameter value may be, for example, a voltage or current level.

Variant 3

Variant 3 relates to a proposed sensor system (SS) according to variant 1, wherein in the operating state at least one comparison device, in particular a differential amplifier (D1), two parameter values of the third analog signal (S3a, S3b) with each other, in particular by subtraction, compares and a difference signal ( d1) and by comparing the difference signal (d1) with at least one reference value (Ref1) produces a comparison result signal (v1), in particular by means of a comparator (C1) separate from the comparison device. These parameter values may be, for example, voltage or current levels.

Variant 4

Variant 4 relates to a proposed sensor system (SS) according to variant 1, wherein in the operating state at least one comparison device, in particular a comparator (C4, C5, C6), a parameter value of the second analog signal (S2a, S2b, S2c) with a reference value (Ref4 , Ref5, Ref6) and generates a comparison result signal (v4, v5, v6) as a function of the comparison result. This parameter value may be, for example, a voltage or current level.

Variant 5

Variant 5 relates to a proposed sensor system (SS) according to variant 1, wherein in the operating state at least one comparison device, in particular a differential amplifier (D7, D6, D8), two parameter values of the second analog signal (S2a, S2b, S2c) with each other, in particular by subtraction and compares the difference signal (d6, d7, d8) with a reference value (Ref6, Ref7, Ref8), a comparison result signal (v10, v11, v12), in particular by means of one of Comparator separate comparator (C10, C11, C12) generated.

Variant 6

The variant 6 relates to a proposed sensor system according to the variants 2, 3, 4, or 5 or the following variants, which also produce comparison result signals or comparison results from a target-actual comparison, the sensor system (SS) is designed to operate in the operating state Generate or fail to generate an error message depending on at least one comparison result signal (v1, v2, v3, v4, v5, v6, v10, v11, v12, v13, v14, v15, v16, v17, v18, v19).

Variant 7

Variant 7 relates to a proposed sensor system (SS) according to variant 6, wherein it has a control device (CTR) which contains the comparison result signal (v1, v2, v3, v4, v5, v6, v10, v11, v12, v13, v14, v15 , v16, v17, v18, v19) and generates the error message.

Variant 8

In variant 8, the sensor subdevice (TR) is an ultrasound transducer (TR) which emits an ultrasound measurement signal as measurement signal (MS) in an ultrasound measurement channel as a measurement channel (CN) and as a receive signal (ES) on an object in the ultrasound transducer Ultrasound measuring channel (CN) receiving reflected ultrasonic signal.

Variant 9

In variant 9, the proposed sensor system (SS) has a control device (CTR) which, in the first or second or third test state, compares the seventh response signal (S7) of the digital input circuit (DSI) with a predetermined response and determines a comparison result.

Variant 10

In variant 10, the proposed sensor system (SS) has a control device (CTR) which controls the digital signal generation (DSO) in the first or second or third test state with a zeroth signal (S0) and which in the first or second or third test state 7) compares the seventh response signal (S7) of the digital input circuit (DSI) with a predetermined response and determines a comparison result. In the process, these predetermined responses and the zeroth signal (S0) depend on each other.

Variant 11

In variant 11, the proposed sensor system (SS) has a control device (CTR) which controls the analog channel simulation unit (ACS) in the second test state, so that the analog channel simulation unit (ACS) depends on this control, as does the analog channel simulation unit (ACS) second analog signal (S2) into the third analog test signal (S3t) and wherein the control means (CTR) in the second test state, the seventh response signal (S7) of the digital input circuit (DSI) compares with a predetermined response and determines a comparison result. In the process, these predetermined responses and the control of the analog channel simulation unit (ACS) depend on each other.

Variant 12

In variant 12, the proposed sensor system (SS) comprises a control device (CTR), which controls the digital channel simulation unit (DCS) in the third test state, so that the control of the digital channel simulation unit (DCS) depends on the digital channel simulation unit (DCS) first digital signal (S1) is converted into the fifth digital test signal (S5t) and wherein the control device (CTR) in the third test state compares the seventh response signal (S7) of the digital input circuit (DSI) with a predetermined response and determines a comparison result. These depend on the given answers and the control of the digital channel simulation unit (DCS) from each other.

Variant 13

In the thirteenth variant of the proposed sensor system (SS), the digital input circuit (DSI) has a device for measuring the oscillation frequency of the sixth digital signal (S6) in the transmission phase (SP). This measurement of the oscillation frequency makes it possible to detect damages of various types on the resonant circuit of an ultrasonic transducer (TR) when it is used as a sensor subdevice (TR).

Variant 14

In the fourteenth variant of the proposed sensor system (SS), the digital input circuit (DSI) has a device for measuring the settling time of the sixth digital signal (S6) in the decay phase (AP). This measurement of the settling time makes it possible to detect damages of various types on the resonant circuit of an ultrasonic transducer (TR) when it is used as a sensor subdevice (TR). For the measurement of the settling time, an envelope signal from the signal level profile of the third analog signal (S3) or the value profile of the sixth digital signal (S6) is preferably formed in the analog input circuit (AS) or the digital input circuit. If this falls below a reference value for the value of this envelope signal in the decay phase (AP), the decay of the sensor subdevice (TR) or of the ultrasound transducer (TR) can be declared terminated. Typically, then also the decay phase (AP) ends. The time between the end of the transmission phase (SP) and the so defined end of the swinging is then the release time.

Variant 15

In the fifteenth variant of the proposed sensor system (SS), which is based on the thirteenth and fourteenth variants, the digital input circuit (DSI) or a control unit (CTR) compares the measured oscillation frequency with a setpoint or setpoint range for that oscillation frequency and the measured settling time a setpoint or setpoint range for the settling time. The subdevice concerned then optionally includes a short circuit of the sensor subdevice (TR), in particular an internal ultrasound transducer (TRi) or a non-present part of the sensor subdevice (TR), in particular a non-connected internal ultrasound transducer (TRi), or a secondary side not on first sub-signal (S3a) of the third analogue signal (S3) connected to the transmitter (UEB) or another general error. This occurs when the determined oscillation frequency is higher than the nominal value of the oscillation frequency or valuewise above the nominal value range of the oscillation frequency and if the determined decay time is shorter than the nominal value of the decay time or valuewise below the target value range of the decay time. The digital input circuit (DSI) or the control unit (CTR) then generate an error message.

Variant 16

In the sixteenth variant of the proposed sensor system (SS), which builds on the thirteenth and fourteenth variants, the digital input circuit (DSI) or control unit (CTR) compares the measured settling time to a setpoint or setpoint range for that settling time and eventually closes a non-existing part of the sensor sub-device (TR), in particular an unconnected internal ultrasonic transducer (TRi), or an error closes. This occurs when the determined settling time is shorter than the setpoint of the decay time or valuewise below the setpoint range of the decay time. In that case, the digital input circuit (DSI) or a control unit (CTR) generates an error message.

Variant 17

In the seventeenth variant of the proposed sensor system (SS), the sensor system (SS) has a device for determining the amplitude value of an even signal component (A2c_b) in a second signal (S2) or in a component signal (S2c) of the second signal (S2) and via a device for determining the amplitude value of an odd signal component (A2c_a) in a second signal (S2) or a component signal (S2c) of the second signal (S2).

A comparison device (arctan, C18), which is part of the sensor system (SS), is provided to compare the amplitude value (s3b) of the even signal component with a threshold value (A2c_b) for this even amplitude value (s3b) and a corresponding comparison result signal (v18 ) for the even signal component (s3b).

A further comparison device, which is part of the sensor system (SS), is provided for comparing the amplitude value (s3a) of the odd signal component (A2c_a) with a threshold value for this odd amplitude value and generating a corresponding comparison signal for the odd signal component. A subsystem of the sensor system (SS) then generates an error message or outputs an error signal if the corresponding comparison result signal for the odd signal component and the corresponding comparison result signal for the even signal component do not correspond to an allowed value combination.

Variant 18

In the eighteenth variant of the proposed sensor system (SS), the second analog signal (S2) comprises at least a first sub-signal (S2a) and a second sub-signal (S2b). The sensor system (SS) is designed by symmetrizing the sensor subdevice (TR) or the ultrasound transducer (TR) and possibly the existing transmitter (UEB) so that the first sub-signal (S2a) of the second analog signal (S2) and the second sub-signal (S2b) of the second analog signal (S2) in the error-free case are the same except for a phase shift of 180 ° in the time course. The phase shift can deviate by up to ± 10 °. However, smaller deviations are preferred. The sensor system has a sub-device in this eighteenth variant, which is provided to measure the equality of the first sub-signal (S2a) of the second analog signal (S2) and the second sub-signal (S2b) of the second analog signal (S2) and a measured value to determine this equality. In this case, a phase compensation is performed before the comparison. For this purpose, preferably one of the two signals is delayed by 180 ° by suitable intermediate storage in the control unit (CTR) or the digital input circuit (DSI). It is now proposed in this variant that the sensor system (SS) has a comparison device which compares this measured value for equality with a reference value and generates an error signal if the value of equality determined in this way is below the reference value for this equality. This measuring method of this eighteenth variant has the advantage that the smallest disturbances of the symmetry of an ultrasonic transducer circuit can be detected.

Variant 19

In the nineteenth variant of the proposed sensor system (SS), the sensor system (SS) can be configured so that in the first test state the impedance value of the impedance of the sensor subdevice (TR) or the impedance of an internal ultrasonic transducer (TRi), the part of the ultrasound transducer ( TR) as a sensor sub-device can be determined. This impedance value determination is preferably carried out in the analog input circuit (AS) or in the digital input circuit (DSI). The digital input circuit (DSI) or the system controller (CTR) compares the detected impedance value with an impedance setpoint or an impedance setpoint range. The sensor system (SS) generates or provides an error message if the detected impedance value deviates from the impedance setpoint or is outside the impedance setpoint range. This is also preferably done in the control unit (CTR) or the digital input circuit (DSI).

Variant 20

In the twentieth variant of the proposed sensor system (SS), the sensor system (SS) can be configured so that in the operating state the value profile and / or the values of the seventh response signal (S7), in particular in the form of measurement results and measured values, for plausibility, in particular by the comparison with setpoints and setpoint ranges, through the digital receive circuit (DSI) and / or the controller (CTR). For example, it can be taken into account during the construction of the proposed sensor system (SS) that certain measured values are physically impossible under certain conditions. The occurrence of such measurements under these conditions can therefore be interpreted as an indication of an error. It can therefore be provided that the digital receiving circuit (DSI) and / or the control device (CTR) generate or provide an error message in this case.

Variant 21

In the twenty-first variant of the proposed sensor system (SS), the value course and / or the values of the seventh response signal (S7) are passed on, which can be present in particular in the form of measurement results and measured values, in the operating state by the control unit (CTR) and / or the digital input circuit (DSI) only if the plausibility check of the value course and / or the values of the seventh response signal (S7) was successful. For example, if the plausibility check of the value history and / or the values of the seventh response signal (S7) was unsuccessful, an error message can be generated or provided by the control unit (CTR) and / or the digital input circuit (DSI).

Variant 22

In the twenty-second variant of the proposed sensor system (SS), the digital receiving circuit (DSI) and / or the analog receiving circuit (AS) are provided and set up the DC component and / or the amplitude and / or the phase and / or other signal parameters of the third analog Signal (S3) at different signal frequencies of the digital Signal generation (DSO) generated first digital signal (S1) or at different temporal waveform patterns of the digital signal generation (DSO) generated by the first digital signal (S1). Of course, in this case, digital signal generation (DSO) is capable of producing different signal frequencies of the first digital signal (S1) and / or different temporal signal patterns of the first digital signal (S1). Particularly suitable are frequency sweeps, phase-shift signals and phase-modulated signals that can be generated by digital signal generation (DSO).

Variant 23

In the twenty-third variant of the proposed sensor system (SS), a usable waveform pattern of the first digital signal (S1) generated by the digital signal generation (DSO) has a signal frequency and a phase jump in its course.

Method of operation

It is proposed to operate the device described above and possibly its variants as follows:

First, the third test state is taken by the sensor system (SS) and the simulation of at least one test case by the generation of a zeroth signal (S0) corresponding to this test case by the control unit (CTR) and the detection of the seventh response signal (S7) Control unit (CTR) and a comparison of the seventh response signal (S7) with a predetermined pattern of the seventh response signal (S7). In this case, predetermined patterns of the seventh response signal (S7) are used, which correspond to the zeroth signal generated (S0). It should be noted that digital signal generation (DSO), digital channel simulation unit (DCS) and digital input circuitry (DSI) may be configured differently. These configurations are also preferably made by the control unit (CTR). The zeroed signal (S0) used then depends on these used configurations, which are preferably set by the control unit by means of corresponding control lines, not drawn in the figures, and the respective test purpose. Accordingly, the predetermined pattern of the seventh response signal (S7) also depends on the zeroed signal (S0) used, these configurations, which are preferably controlled by the control unit (CTR), and the test purpose. An error is detected when the seventh response signal (S7) does not exactly correspond to the predetermined pattern of the seventh response signal (S7). This determination is preferably made by the control unit (CTR) and signaled to a predetermined location in a predetermined manner. For example, a flag at such an error may be set by the control unit (CTR). The control unit (CTR) compares the seventh response signal (S7) with the predetermined pattern of the seventh response signal (S7) for this check. This is preferably done by bit-wise checking. If no further measurements are required, the third test state can then be left and another test state or the operating state can be assumed. In the error-free case, the checking of all test cases in the third test state is particularly preferably followed by checking all test cases (test cases) in the second test condition, since then the digital logic of the digital part of the signal string is rated as working properly.

The tests in the second test state thus preferably follow the tests in the third test state. The second test state can also be taken directly from the operating state or the other test states.

For this purpose, the second test state is taken by the sensor system (SS) and the simulation of at least one test case by generating a zeroth signal (S0) corresponding to this test case by the control unit (CTR) as a stimulus for the subsequent signal sequence and the detection of the seventh response signal (S7 ) by the control unit (CTR) and the comparison of the seventh response signal (S7) with a predetermined pattern corridor of the seventh response signal (S7). In contrast to the third test state, the reaction of the signal chain, which now also includes analog circuit parts (DR, AS), can no longer be predicted accurately. Therefore, a signal corridor (pattern corridor) for the permitted course of the allowed values of the seventh response signal (S7) must be specified. The seventh response signal (S7) can be a one-dimensional, but also a multi-dimensional signal. In the multi-dimensional state space, therefore, regions must be specified for each time step or each parameter of the seventh response signal (S7) to be tested, within which the seventh response signal (S7) may move in terms of value. Particularly preferred are simple tolerance intervals for each parameter that must not be left. The pattern corridor should preferably be a simple linear tube. However, considerably more complex topologies are also conceivable for the permitted value / parameter combinations of the seventh response signal (S7). If a value / parameter combination of the seventh response signal (S7) leaves the allowed pattern corridor, the control unit (CTR) can detect and signal an error. This occurs when the seventh response signal (S7) is not within the predetermined pattern corridor of the seventh response signal (S7). As soon as all test cases (test cases) have been processed, it is preferable to leave the second test state.

In the error-free case, the checking of all test cases in the third and second test states is particularly preferably followed by the checking of all test cases in the first test condition, since then the digital logic of the digital part of the signal chain and the analog circuit parts of the signal string are rated as working properly.

The tests in the first test state thus preferably follow the tests in the second test state. The first test state can also be taken directly from the operating state or the other test states.

For this purpose, the first test state is taken by the sensor system (SS) and the simulation of at least one test case by the control unit (CTR) generating a zeroth signal (S0) corresponding to this test case and the control unit (CTR) detecting the seventh response signal (S7) ) and the comparison of the seventh response signal (S7) with a predetermined pattern corridor of the seventh response signal (S7). In this test case, it is of particular importance that further parameters of the sensor subdevice (TR) are preferably measured here. In this respect, the generation of the zeroth signal (S0) preferably relates to the generation of suitable stimuli for the measurement of the sensor subdevice (TR), ie of the ultrasound transducer (TR), and the transfer of the determined measured values for the parameters of the sensor subdevice (TR), ie of the ultrasound transducer ( TR), in the form of a seventh response signal (S7) to the control unit (CTR). The control unit (CTR) preferably detects an error when the seventh response signal (S7) is not within a predetermined pattern corridor of the seventh response signal (S7). For example, if the impedance of the exemplary ultrasound transducer is not within a predetermined range of values or if there is asymmetry in expected symmetry. For this purpose, the control device (CTR) and / or the digital input circuit (DSI) typically also evaluate comparison result signals from comparison devices.

In the error-free case, it is particularly preferable to check all test cases in the third, second and first test state to return to the operating state, since then the digital logic of the digital part of the signal chain and the analog circuit parts of the signal chain and the sensor sub-device, ie the ultrasonic transducer (TR) , are considered properly working. Thus, then, the sensor system as such can be rated as working properly. This can also be determined by the control unit (CTR) and possibly further signaled.

Thus, the tests in the third test state are preferably followed by the assumption of the operating state. The operating state can also be taken directly from all test conditions out.

Even in the operating state, the monitoring of amplitude levels, differences of such amplitude levels with and without phase shifts and the monitoring of whether there is an asymmetry in expected symmetry, take place. For this purpose, the control device (CTR) and / or the digital input circuit (DSI) typically also evaluate comparison result signals from corresponding comparison devices even during normal operation in the operating state.

It is also a selbstestfähiges ultrasonic sensor system (SS) is proposed, which may be an inner ultrasound transducer (TR i), a transmitter (UEB) and a transducer resistance (R _TR), the part of the inner ultrasound transducer (TRi), and a transducer Capacitance (C _TR ), which may be part of the internal ultrasonic transducer (TRi) comprises. A first sub-signal (S2a) of the second analog signal (S2) and a second sub-signal (S2b) of the second analog signal (S2) and a first sub-signal (S3a) of the third analog signal (S3) and a second sub-signal (S3b) of the third analog signal (S3) are the minimum electrical nodes of this proposed subsystem. The temporal operation of the ultrasonic measuring system (SS) then typically has at least the transmission phase (SP). The first sub-signal (S2a) of the second analog signal (S2) is connected to a first primary-side terminal of the transmitter (UEB). The second sub-signal (S2b) of the second analog signal (S2) is connected to a second primary-side terminal of the transmitter (UEB). The first sub-signal (S3a) of the third analog signal (S3) is connected to a first secondary-side terminal of the transformer (UEB) and a first terminal of the transducer resistor (R _TR ) and to a first terminal of the transducer capacitance (C _TR ) and connected to a first terminal of the internal ultrasonic transducer (TRi). The second sub-signal (S3b) of the third analog signal (S3) is connected to a second secondary-side terminal of the transformer (UEB) and a second terminal of the transducer resistor (R _TR ) and to the second terminal of the transducer capacitance (C _TR ) and connected to a second terminal of the internal ultrasonic transducer (TRi). The topology of the circuit network of internal ultrasonic transducer (TRi) and transducer resistance (R _TR ) and transducer capacitance (C _TR ) and transformer (UEB) and the characteristics of these components and their control are selected so that in normal operation of a transmission phase (SP ) the first sub-signal (S2a) of the second analog signal (S2) a phase-shifted by 180 ° +/- 10 ° second partial signal (S2b) of the second analog signal (S2) corresponds to an amplitude deviation of less than 10% and that during normal operation of a transmission phase (SP), the first partial signal (S3a) of the third analog signal (S3) to a 180 ° +/- 10 ° phase-shifted second partial signal (S2b) of the second analog signal (S2) corresponds to an amplitude deviation of less than 10%. At least these sub-signals (S2a, S2b, S3a, S3b) have a common periodicity with the period T in the transmission phase (SP). The ultrasonic sensor device (SS) comprises at least one coefficient monitoring subdevice (KUE). The coefficient monitoring subdevice (KUE) analyzes for distortion at least a sub-signal, the signal to be analyzed (ZA) selected from the sub-signals (S2a, S2b, S3a, S3b) and forms an associated comparison result signal (v15, v16, v17, v18 , v19) (the comparison result signal v_X).

An exemplary embodiment of the coefficient monitoring subdevice (KUE) comprises a first subdevice (M1, s1a, F1, s2a, S & H_Ca) of the coefficient monitoring subdevice (KUE) which generates a scalar product in the form of a first internal coefficient signal (s3a) from a first analysis signal (A_a) and the signal (ZA) to be analyzed, and a second sub-device (M2, s1b, F2, s2b, S & H_Cb) comprising a scalar product in the form of a second internal coefficient signal (s3b) of a second analysis signal (A_b) and the signal to be analyzed (ZA ). The first analysis signal (A_a) and the second analysis signal (A_b) have the same period (T) as the signal to be analyzed (ZA). The first analysis signal (A_a) and the second analysis signal (A_b) are different from each other. The ratio of the determined value of the first internal coefficient signal (s3a) to the determined value of the second internal coefficient signal (s3b) for normal operation in the transmission phase (SP) differs from the ratio of the determined value of the first internal coefficient signal (s3a) to the determined value of second internal Koeffizentensignals (s3b) for operation in at least one error case in the transmission phase (SP). The difference between the two coefficient signals (s3a, s3b) is used to generate the comparison result signal (v_X).

Advantage of the invention

Such an ultrasonic sensor measuring system enables, at least in some implementations, the efficient and effective test of this system in normal operation. The advantages are not limited to this.

list of figures

• 1 shows schematically simplified the basic structure of the proposed self-testable sensor system (SS).
• 2 equals to 1 , wherein a transformer (UEB) between sensor subdevice (TR) and driver stage (DR) is inserted.
• 3 equals to 2 with the active signal path marked in bold in the operating state and in the first test state.
• 4 equals to 2 with the bold labeled active signal path in the second test state.
• 5 equals to 2 with the bold labeled active signal path in the third test state.
• 6 equals to 2 with the difference that the second analog signal (S2) is monitored by means of a comparison unit in the form of a second comparator (C2) and the third analog signal (S3) by means of a comparison unit in the form of a third comparator (C3) in operation.
• 7 shows schematically a possible implementation of the transformer (UEB) with a three-phase primary side with three primary connections (S2a, S2b, S2c) and two secondary connections (S3a, S3b) on the secondary side and a connected ultrasonic transducer (TR) on the secondary side.
• 8th equals to 2 with the difference that the second analog signal (S2) is designed to be three-phase and the third analog signal (S3) to be two-phase, wherein the third analog signal (S3) is monitored in operation by means of comparison units.
• 9 equals to 2 with the difference that the second analog signal (S2) has a three-phase configuration and is monitored during operation by means of comparator units in a star configuration and the third analog signal (S3) has a two-phase design.
• 10 equals to 2 with the difference that the second analogue signal (S2) has a three-phase design and is monitored in operation by means of comparison units in triangular configuration, and the third analogue signal (S3) has a two-phase design.
• 11 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state.
• 12 corresponds to a temporal enlargement of the 11 in the broadcast phase (SP).
• 13 13 shows important signals (S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein now a short circuit on the inner ultrasonic transducer (TRi) between the first part signal (S3a) of the third analog signal (S3) and the second part signal (S3b) of the third analog signal (S3) is present.
• 14 corresponds to a temporal enlargement of the 13 in the broadcast phase (SP).
• 15 15 shows important signals (S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state wherein now the inner ultrasonic transducer (Tri) is not connected, so the first part signal (S3a) of the third analog signal (S3) or the second partial signal (S3b) of the third analog signal (S3) is not connected to the ultrasonic transducer (TR).
• 16 corresponds to a temporal enlargement of the 15 in the broadcast phase (SP).
• 17 17 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state wherein now the transmitter (UEB) with a connection on the secondary side is not connected to the first part signal (S3a) of the third analog signal (S3) ,
• 18 corresponds to a temporal enlargement of the 17 in the broadcast phase (SP).
• 19 19 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, in which case the transmitter (UEB) with a connection on the secondary side is not connected to the second partial signal (S3b) of the third analog signal (S3) is.
• 20 corresponds to a temporal enlargement of the 19 in the broadcast phase (SP).
• 21 21 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein the transmitter (UEB) with a connection on the primary side is not connected to the first part signal (S2a) of the second analog signal (S2) ,
• 22 corresponds to a temporal enlargement of the 21 in the broadcast phase (SP).
• 23 23 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein the transmitter (UEB) with a connection on the primary side is not connected to the second part signal (S2b) of the second analog signal (S2) ,
• 24 corresponds to a temporal enlargement of the 23 in the broadcast phase (SP).
• 25 25 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, the transmitter (UEB) with its center terminal on the primary side is not connected to the third sub-signal (S2c) of the second analog signal (S2) ,
• 26 corresponds to a temporal enlargement of the 25 in the broadcast phase (SP).
• 27 27 shows important signals (d1, S2c, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein primary side two terminals of the transformer (UEB) and that the third partial signal (S2c) of the second analog signal (S2) and first partial signal (S2a ) of the second analog signal (S2) are short-circuited.
• 28 corresponds to a temporal enlargement of the 27 in the broadcast phase (SP).
• 29 29 shows important signals (d1, S2c, S2a, S5) when emitting an ultrasonic burst in the operating state, wherein primary side two terminals of the transformer (UEB) and that the third part signal (S2c) of the second analog signal (S2) and second part signal (S2b ) of the second analog signal (S2) are short-circuited.
• 30 30 corresponds to a temporal enlargement of the 29 in the broadcast phase (SP).
• 31 31 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, on the secondary side, the transducer resistor (R _TR ) not is connected, so either to the first sub-signal (S3a) of the third analog signal (S3) or to the second sub-signal (S3b) of the third analog signal (S3) is not connected to the transducer resistor (R _TR ).
• 32 32 corresponds to a temporal enlargement of the 31 in the broadcast phase (SP).
• 33 33 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, where the secondary side, the transducer capacitance (C _TR ) is not connected, either to the first part signal (S3a) of the third analog signal ( S3) or to the second sub-signal (S3b) of the third analog signal (S3) is not connected to the transducer capacitance (C _TR ).
• 34 34 corresponds to a temporal enlargement of the 33 in the broadcast phase (SP).
• 35 35 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein on the primary side there is no control of the driver for the first sub-signal (S2a) of the second analog signal (S2) in the driver stage (DR) ,
• 36 36 corresponds to a temporal enlargement of the 35 in the broadcast phase (SP).
• 37 37 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein the primary shorted the driver for the first sub-signal (S2a) of the second analog signal (S2) in the driver stage (DR) to ground is.
• 38 38 corresponds to a temporal enlargement of the 37 in the broadcast phase (SP).
• 39 39 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein on the primary side there is no control of the driver for the second sub-signal (S2b) of the second analog signal (S2) in the driver stage (DR) ,
• 40 40 corresponds to a temporal enlargement of the 39 in the broadcast phase (SP).
• 41 41 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein the primary shorted the driver for the second sub-signal (S2b) of the second analog signal (S2) in the driver stage (DR) to ground is.
• 42 42 corresponds to a temporal enlargement of the 41 in the broadcast phase (SP).
• 43 43 shows important signals (d1, S2c, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein on the primary side there is no control of the driver for the third sub-signal (S2c) of the second analog signal (S2) in the driver stage (DR) ,
• 44 44 corresponds to a temporal enlargement of the 43 in the broadcast phase (SP).
• 45 45 shows important signals (d1, S2a, S2b, S5) when emitting an ultrasonic burst in the operating state, wherein the primary side of the driver for the third sub-signal (S2c) of the second analog signal (S2) in the driver stage (DR) is shorted to ground.
• 46 46 corresponds to a temporal enlargement of the 45 in the broadcast phase (SP).
• 47 47 shows the preferred test procedure.
• 48 48 shows the device using a symmetry test.
• 49 49 shows the device accordingly 48 with concrete execution of a symmetry test for the secondary side of the transformer (UEB).
• 50 50 shows the device accordingly 48 with concrete execution of a symmetry test for the primary side of the transformer (UEB).
• 51 51 compares, for example, the undisturbed third partial signal (S2c) of the second analog signal (S2) (see also FIG 11 ) with the disturbed third partial signal (S2c) of the second analog signal (S2) in the event of a capacitor breakdown of the transducer capacitor (C _TR ) (see 34 ) and branches exemplary analysis signals.
• 52 52 shows by way of example a possible internal structure of an analog coefficient monitoring subdevice (KUE).
• 53 53 equals to 8th , where the level monitors are not drawn. Instead, possible coefficient monitoring sub-devices are shown.
• 54 54 equals to 52 , where now two comparators are provided for additional monitoring of the two internal coefficient signals.
• 55 55 equals to 54 , where now the ratio of the two internal coefficient signals is not monitored.
• 56 56 equals to 55 , where now only an internal coefficient signal is monitored.

Description of the figures

1
1 schematically shows a simplified basic structure of the proposed self-testable sensor system ( SS ) using an exemplary ultrasonic sensor system. The control device ( CTR ) receives via a data interface ( IO ) Data and / programs and / or commands from other, typically higher-level computers. These higher-ranking computers may, for example, be a control unit of a motor vehicle which has the proposed sensor system ( SS ) controls and controls. The control device ( CTR ) transmits measured values, error messages and test results from the self-test of the sensor system determined on this higher-order computer ( SS ). The control device ( CTR ) controls via a zeroth signal ( S0 ) the digital signal generation ( DSO ). In addition, the controller configures ( CTR ) preferably from all other configurable subsystems of the sensor system ( SS ). The corresponding control lines and signals are for a better overview in the 1 and the corresponding following figures are not drawn.

The zeroth signal ( S0 ) is preferably a data bus of a plurality of digital signals.

Depending on the history and the zeroth signal ( S0 ) generates the digital signal generation ( DSO ) Stimuli and useful, measuring and test signals for the subsequent signal path chain from the subsystems of the sensor system which follow in the signal path ( SS ). It is therefore proposed that digital signal generation ( DSO ) so that it can serve both as a measurement signal generator, as well as a test signal generator and as a test pattern generator. The digital signal generation ( DSO ) generates the stimuli, useful, measuring and test signals for the subsequent signal path chain as the first digital signal ( S1 ). The first digital signal ( S1 ) is preferably a digital data bus. It may be that in some states of the allowed states of the sensor system ( SS ) some lines of the first digital signal ( S1 ) show no activity, but in other allowed states of the sensor system ( SS ) are active.

The driver stage ( DR ) is generated in dependence on the first digital signal ( S1 ) the second analog signal ( S2 ). The driver stage ( DR ) thus results in a conversion of the first digital signal ( S1 ) into an analog second signal ( S2 ) around. The second analog signal ( S2 ) can consist of several second analog partial signals ( S2a . S2b . S 2 c ) consist. Again, not all sub-signals of the second analog signal ( S2 ) in all states of the sensor system ( SS ) active. In the example disclosed here, the first sub-signal ( S2a ) of the second analog signal ( S2 ) by 180 ° with respect to the second sub-signal ( S2b ) of the second analog signal ( S2 ) phase-shifted. However, this is not an inversion. The third sub-signal ( S 2 c ) of the second analog signal ( S2 ) is the sum of the first sub-signal ( S2a ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) in said example.

It does not necessarily have to be just a digital-to-analogue conversion of a digital value that is determined by means of the first digital signal ( S1 ) to the driver stage ( DR ). Rather, the driver stage may also include more complex, possibly feedback circuits, which their active topology depending on the state of the sensor system ( SS ) and possibly from the current time within a send / receive sequence changes. For example, it is possible to use such a transmission / reception sequence for an ultrasonic sensor system as an exemplary sensor system ( SS ), in three phases. In the first phase of the exemplary transmission sequence (ultrasound sequence), in the following transmission phase ( SP ), the exemplary ultrasonic transducer ( TR ) for mechanical oscillation and thus for emitting an ultrasonic pulse as a measurement signal ( MS ) in the exemplary ultrasonic measuring channel ( CN ). In this first phase, the sending phase, the driver stage ( DR ) the ultrasonic transducer ( TR ) with a measuring stimulus corresponding to the ultrasonic transmitting frequency. The driver stage ( DR ) then transports energy into the ultrasound transducer ( TR ).

In a second, temporally subsequent phase, the decay phase ( AP ), loads the driver stage ( DR ) the ultrasonic transducer ( TR ) with a measuring stimulus, which is opposite to the oscillation frequency of the still oscillating ultrasonic transducer. This will cause the oscillation of the ultrasound transducer ( TR ) damped. The driver stage ( DR ) then takes energy from the Ultrasonic transducer ( TR ). In this phase the ultrasonic transducer ( TR ) an ultrasonic measurement signal ( MS ) in the ultrasonic measuring channel ( CN ) in the outdoor area ( ASS ) outside the sensor system ( SS ) with decreasing radiation amplitude into it. In the ultrasonic channel ( CN ) outside ( ASS ) outside the sensor system ( SS ) typically include one or more objects that typically generate a heavily attenuated, delayed, and distorted echo of the ultrasound measurement signal. IT ) designated.

In the third phase, the reception phase ( EP ), the ultrasonic transducer ( TR ) by the driver stage ( DR ) not driven. The driver stage ( DR ) does not remove energy from the ultrasound transducer ( TR ), but also does not transport any energy into the ultrasound transducer ( TR ) into it. At this stage, the receiving phase ( EP ), the ultrasonic transducer ( TR ) very well an ultrasonic echo as received signal (ultrasonic signal received) ( IT ) received. The ultrasound transducer ( TR ) is detected by the ultrasonic signal ( IT ) vibrates and, due to its piezoelectric properties, generates the third analogue signal ( S3 ). The third analogue signal ( S3 ) can consist of several analog partial signals ( S3a . s3b ) consist.

An analogue multiplexer ( AMX ) switches the third analogue signal ( S3 ) as the fourth analogue signal ( S4 ) in a predetermined state of the sensor system ( SS ) by. Which signal through the analog multiplexer ( AMX ) depends on the condition of the sensor system ( SS ). Typically, the analog multiplexer ( AMX ) by the control unit ( CTR ), which preferably control the state and configuration of the sensor system ( SS ) controls and controls. Again, not all sub-signals of the fourth analog signal ( S4 ) in all states of the sensor system ( SS ) active.

The analog input circuit ( AS ) receives the fourth analogue signal ( S4 ). This reception can be from the zeroth signal ( S0 ) and the state of the sensor system ( SS ) and other factors. As the reception by the analog input circuit ( AS ) is performed exactly by the control unit ( CTR ) predetermined by means of corresponding, not shown control signals. Preferably, the reception methodology in the analog input circuit ( AS ) with the stimulus used or measurement or test signal generated by digital signal generation ( DSO ) and the driver stage ( DR ) and with the configuration of the sensor system ( SS ) preferred by the control unit ( CTR ) is set. For example, it is conceivable to adapt analog filters, levels, gains, etc. to the given stimuli, useful, measuring and test signals in a case-specific manner. This adaptation is preferred by the control unit ( CTR ) controlled. The analog input circuit ( AS ) is generated in response to the fourth analog signal ( S4 ) the fifth digital signal ( S5 ). The analog input circuit ( AS ) thus preferably also has the function of an analog-to-digital converter ( ADC ). The fifth digital signal ( S5 ) may include multiple partial digital signals. Again, not all sub-signals of the fifth digital signal ( S5 ) is active in all states of the sensor system.

A digital multiplexer ( DMX ) passes the fifth digital signal ( S5 ) as the sixth digital signal ( S6 ) in a predetermined state of the sensor system ( SS ) by. Which signal through the digital multiplexer ( DMX ) as the sixth signal ( S6 ) is again dependent on the state of the sensor system ( SS ). Typically, the digital multiplexer ( DMX ) by the control unit ( CTR ), which preferably control the state of the sensor system ( SS ) and its configuration controls and controls. Again, not all sub-signals of the sixth digital signal ( S6 ) in all states of the sensor system ( SS ) active.

The digital input circuit ( DSI ) receives the sixth digital signal ( S6 ) and processes the sixth digital signal ( S6 ) depending on the state of the sensor system ( SS ). As the reception by the digital input circuit ( DSI ) is performed exactly by the control unit ( CTR ) predetermined by means of corresponding, not shown control signals. Preferably, the reception methodology in the digital input circuit ( DSI ) with the stimulus used or measurement or test signal generated by digital signal generation ( DSO ) and the driver stage ( DR ) and with the selected reception methodology in the analog input circuit ( AS ) and the configuration of the sensor system ( SS ). For example, it is conceivable to use digital filters - in particular matched filters, digital signal processing methods for the given stimuli, useful, measuring and test signals and the selected reception method in the analog input circuit ( AS ) if necessary. This adaptation is preferred by the control unit ( CTR ) controlled. The digital input circuit ( DSI ) is generated in response to the sixth digital signal ( S6 ) thus the seventh digital signal ( S7 ) that should already include the measurement test or other result. For example, another result can also send an error message to the control unit ( CTR ) be. The control unit ( CTR ) can also compare measurement and test results with setpoints or tolerance intervals for these setpoints and, if necessary, generate error messages. The digital input circuit ( DSI ) thus has in predetermined states of the sensor system not only the function of a signal conditioning, but may also represent the function of a test device for the pending verification that the signal processing chain of the sensor system ( SS ) an answer to stimuli of digital signal generation ( DSO ), which corresponds to a predetermined value or a predetermined signal sequence in the known system configuration or deviates from such no more than predetermined. Again, not all sub-signals of the seventh digital signal ( S7 ) is active in all states of the sensor system.

Order the sensor system ( SS ), the proposed sensor system ( SS ) via two bypass paths in the signal path.

The first bypass signal path closes the sensor subdevice ( TR ), ie the ultrasonic transducer ( TR ), from the signal path. This allows the electronics to test themselves. For this second test state of the sensor system ( SS ) (The first test state indeed closes the sensor subdevice ( TR ), ie the ultrasonic transducer ( TR ), the second analogue signal ( S2 ) preferably in front of the sensor subdevice ( TR ), ie the ultrasonic transducer ( TR ), and by means of the analog multiplexer ( AMX ) instead of the third analog signal ( S3 ) in the analog input circuit ( AS ) phased. However, this does not happen directly. It would usually lead to an overload of the input of the analog input circuit ( AS ). Therefore, the second analog signal ( S2 ) before being fed into the analog input circuit ( AS ) as the fourth analogue signal ( S4 ) through the analog multiplexer ( AMX ) in an additionally proposed analog channel simulation unit ( ACS ) At least damped. The output signal of the analog channel simulation unit ( ACS ) is the third analog test signal ( S3T ). In the second test state of the sensor system ( SS ), the third analog test signal ( S3T ) instead of the third analog signal ( S3 ) through the analog multiplexer ( AMX ) as the fourth analogue signal ( S4 ) the analog input circuit ( AS ). It is preferred as an analog channel simulation unit ( ACS ) implements a configurable signal model as an electronic analog circuit, which contains important configuration cases of the signal path via the ultrasound transducer ( TR ) and the ultrasonic channel ( CN ) can simulate. This has the advantage that on this basis the following signal path, which is not exactly defined by nature, can be simulated and the function of the digital and analog circuit parts can be simulated by a simulated sensor subdevice ( TR ) or by a simulated ultrasonic transducer ( TR ) and a simulated ultrasonic measuring channel ( CN ) can be simulated for important, predefined cases. The various cases to be simulated are thereby, inter alia, by different configurations of the analog channel simulation unit ( ACS ) generated. For example, it is conceivable to use different attenuations in the analog channel simulation unit ( ACS ) to allow for different attenuations in the measurement channel ( CN ), the ultrasonic transmission channel ( CN ). Different distances to objects in the ultrasonic transmission channel ( CN ) can, for example, by appropriately delayed signals by means of digital signal generation ( DSO ) are simulated. Other simulation goals are of course conceivable. The exact configuration of the analog channel simulation unit ( ACS ) is dependent on the state of the sensor system ( SS ) and the intended test purpose preferably by the control device ( CTR ) specified by means of not marked signals. In the measurements for tests in the second test state of the sensor system ( SS ), the measurement results are subject to a certain blurring, since the analog circuit parts are provided on the one hand with manufacturing fluctuations in their parameters and secondly to fluctuating environmental parameters such as an unpredictable operating temperature are exposed, which leads to fluctuations in the measurement results. In the second test state, therefore, a target / actual comparison in the evaluation of the signal response of the sensor system ( SS ) preferably always take place against a tolerance interval for characteristic values of the signal response and not against a precise individual value.

The second bypass closes the analog parts of the sensor system ( SS ) from the signal chain. This allows the digital electronics to test themselves. For this third test state of the sensor system ( SS ), the first digital signal ( S1 ) preferably immediately before the driver stage ( DR ), ie the digital-to-analog converter, tapped and by means of the digital multiplexer ( DMX ) instead of the fifth digital signal ( S5 ) into the digital input circuit ( DSI ) phased. However, this also typically does not happen directly here. Similar to the second test state, the first digital signal ( S1 ) before being fed into the digital input circuit ( DSI ) as the sixth digital signal ( S6 ) by the digital multiplexer ( DMX ) in an additionally proposed digital channel simulation unit ( DCS ) suitably modified. The output signal of the digital channel simulation unit ( DCS ) is the fifth digital test signal ( S5t ). In the third test state of the sensor system ( SS ), the fifth digital test signal ( S5t ) instead of the fifth digital signal ( S5 ) by the digital multiplexer ( DMX ) as the sixth digital signal ( S6 ) the digital input circuit ( DSI ). However, it is expressly conceivable here, in predetermined configurations of the sensor system ( SS ) in the third test state, the first digital signal ( S1 ) by looping through the first digital signal ( S1 ) through the digital channel simulation unit ( DCS ) as the fifth digital test signal ( S5t ) to the sixth digital signal ( S6 ) to copy. In this respect, the digital channel simulation unit ( DSI ) also only from wire bridges - ie a direct connection between the first digital signal ( S1 ) and fifth digital test signal ( S5t ) consist. It is preferred as a digital channel simulation unit ( DCS ) again implements a configurable signal model as an electronic digital circuit, the important configuration cases of the signal path which are transmitted via the driver stage ( DR ), the ultrasonic transducer ( TR ), the ultrasonic channel (CH) and the analog input circuit ( AS ) and the other auxiliary circuits runs, can simulate. The exact configuration of the digital channel simulation unit ( DCS ) is dependent on the state of the sensor system ( SS ) and the intended test purpose preferably by the control device ( CTR ) specified by means of not marked signals. This simulation capability has the advantage that on this basis the subsequent signal path, which is not precisely defined by nature, can be simulated again and the function of the digital circuit parts can be simulated by a simulated ultrasound transducer (FIG. TR ) and a simulated ultrasonic measurement channel (CH) and simulated analog parts can be EXACTLY simulated for important, given cases. The different cases to be simulated are determined by different configurations of the digital channel simulation unit ( DCS ) generated. For example, it is conceivable to simulate various erroneous and non-erroneous signal responses of the subsequent signal path and to check the correct response of the digital input circuit. Other simulation goals are of course conceivable. In the measurements for tests in the third test state of the sensor system, the measurement results are not blurred and therefore accurate. The digital circuit parts are relatively immune to said manufacturing variations and said variations in environmental parameters. In the third test state, therefore, a nominal / actual comparison in the evaluation of the signal response of the sensor system is preferably always carried out against precise values.

The digital input circuit ( DSI ) signals by means of the seventh digital signal ( S7 ), which may include several digital sub-signals, the measurement and test results as well as the possibly generated error messages to the control unit ( CTR ).

2
equals to 1 , wherein a transformer ( UEB ) between sensor subdevice ( TR ), ie the ultrasonic measuring system, and the driver stage ( DR ) is inserted. The third analogue signal ( S3 ) is in this example on the secondary side of the transformer ( UEB ), while the second analog signal ( S2 ) in this example on the primary side of the transformer ( UEB ) connected. In the operating state and in the first test state, by means of the analog input circuit ( AS ) and the digital input switching cries ( DSI ) the interaction of transformers ( UEB ) and ultrasonic transducer ( TR ) are observed and evaluated.

3
equals to 2 with the active signal path marked in bold in the operating state and in the first test state. In the operating state, the measured values of the ultrasonic sensor system are obtained in this way according to the prior art. It thus shows the signal path when the sensor system ( SS ) does not test itself. This signal path is also selected in the first test state. In this first test state, the ultrasound transducer ( TR ) and the reaction of the ultrasonic transducer ( TR ). For this example, DC component, amplitude and phase of the third analog signal ( S3 ) at different stimulation frequencies and stimulation patterns. For example, the reaction to a phase jump can be detected. Particularly advantageous is the detection of the impedance of the ultrasonic transducer ( TR ), since this also depends on the properties of the ultrasonic measuring channel. For example, is the ultrasonic transducer ( TR ), its acoustic impedance and thus its electrical impedance change.

4
equals to 2 with the bold labeled active signal path in the second test state.

5
equals to 2 with the bold labeled active signal path in the third test state.

6
equals to 2 with the difference that the second analog signal ( S2 ) by means of a comparison unit in the form of a second comparator ( C2 ) and the third analog signal ( S3 ) by means of a comparison unit in the form of a third comparator ( C3 ) is monitored during operation. This monitoring can be such that the comparators ( C2 . C3 ) Maximum values or minimum values or amounts with their respective reference value ( Ref2 . Ref 3 ) to compare. Particularly preferred is the comparison of the value of the respective analog signal ( S2 . S3 ) with the corresponding reference value ( Ref2 . Ref 3 ). If this reference value ( Ref2 . Ref 3 ), the corresponding comparison result signal ( v2 . v3 ) generated. This comparison result signal ( v2 . v3 ) can, for example, directly to a higher-level unit or to the control unit ( CTR ) or to the digital receiving circuit ( DSI ). However, the evaluation of the relevant comparison result signal ( v2 . v3 ) through the control unit ( CTR ). This preferably evaluates the comparison result signals ( v2 . v3 ) and, if necessary, generates suitable status messages or error messages that are sent via the data interface ( IO ) to the higher-level unit (eg a control unit in a motor vehicle) forwards. In the example of 6 compares a second comparator ( C2 ) the value of the level of the second analog signal ( S2 ) with a second reference value ( Ref2 ) and, depending on this comparison, generates a second comparison result signal ( v2 ). The polarity of the comparison result signal, which is preferably a digital signal, is irrelevant in this case since it only depends on the logical significance here. For example, it makes sense in the first phase of the transmission sequence in which the ultrasound transducer ( TR ) Energy from the driver stage ( DR ), a minimum amplitude of the second analog signal ( S2 ) to consider.

The instantaneous value of the second analog signal ( S2 ), the second reference value ( Ref2 ) exceed. Because the second analog signal ( S2 ) but is usually a pulsed signal, this excess is to be expected only during the pulses and therefore only to be tested. In this respect, a suitable synchronization of the measured values is to be provided. Conversely, at times when there is no pulse on the second analog signal ( S2 ) is below a reference value. It may therefore be useful, instead of a single second reference value ( Ref2 ) provide a plurality of second reference values to enable correct activation of the ultrasound transducer ( TR ) or the transformer ( UEB ) by the driver stage ( TR ) to be able to check. The timing of this check can be either from a separate tester or, for example, from digital signal generation ( DSO ) or the control unit ( CTR ).

The instantaneous value of the third analog signal ( S3 ), the third reference value ( Ref 3 ) exceed. Since the third analog signal ( S3 ), however, is usually a sine wave, this excess is to be expected only during the maxima of the wave crests and therefore only to be tested. The third analogue signal ( S3 ) may, however, have an equal value. Therefore, it makes sense to check not only the maxima of the peaks, but also the minima of the troughs. The instantaneous value of the third analog signal ( S3 ) must then have another third reference value ( Ref 3 ). In this respect, it may be useful to have two third comparators ( C3 ) with two different third reference values ( Ref 3 ) in order to ensure the correct functioning of the ultrasound transducer ( TR ) in cooperation with the transformer ( UEB ) at predetermined times phasenlagenrichtig check. The timing of this check may again be either from a separate tester or, for example, from digital signal generation (FIG. DSO ) or the control unit ( CTR ).

7
shows schematically a possible realization of the transformer ( UEB ) with a three-phase primary side with three primary connections ( S2a . S2b . S 2 c ) and two secondary accounts ( S3a . s3b ) on the two-phase secondary side and a connected ultrasound transducer ( TR ) on the secondary side. The ultrasound transducer ( TR ) comprises as subcomponent a transducer resistance ( R _TR ), a transducer capacity ( C _TR ) and the inner ultrasonic transducer ( TRi ) comprising the piezoelectric vibrating element and the ultrasonic measuring signal ( MS ) and the ultrasonic signal ( IT ) receives. In the example, the transformer ( UEB ) on the primary side a symmetrical center tap, which with the third partial signal ( S 2 c ) of the second analog signal ( S2 ) is connected. One of the other primary-side connections of the transformer ( UEB ) with the first partial signal ( S2a ) of the second analog signal ( S2 ) connected. The third primary-side connection of the transformer ( UEB ) is used with the second partial signal ( S2b ) of the second analog signal ( S2 ) connected. Secondary are all components ( UEB . R _TR . C _TR . TRi ) between the first sub-signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) connected in parallel. The result is a resonant circuit whose natural frequency and quality depends on the secondary-side elements and the primary-side control. The vibration characteristics of this resonant circuit change in the event of short circuits and line breaks and can be detected.

8th
equals to 2 with the difference that the second analog signal ( S2 ) is three-phase and the third analog signal ( S3 ) two-phase with a first partial signal ( S3a ) and a second partial signal ( s3b ), wherein the third analog signal ( S3 ) is monitored by means of comparison units in operation. In this example, the third analog test signal ( S3T ) therefore also two-phase with a first partial signal ( S3ta ) and a second partial signal ( S3tb ). The analog channel simulation unit ( ACS ) then generates from the first partial signal ( S2a ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) the first sub-signal ( S3ta ) of the third analog test signal ( S3T ) and the second sub-signal ( S3tb ) of the third analog test signal ( S3T ), when the sensor system ( SS ) is in the second test state. Transformer ( UEB ) and ultrasonic transducer ( TR ) should here the 7 correspond and be connected accordingly.

A first differential amplifier ( D1 ) forms, for example, by subtraction from a parameter value of the first partial signal ( S3a ) of the third analog signal ( S3 ) and from a parameter value of the second partial signal ( s3b ) of the third analog signal ( S3 ) the first difference signal ( d1 ). For example, this may be a simple difference between the instantaneous values of the electrical potential of the first partial signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) to a reference potential. In that case, the first difference signal ( d1 ) the value of the voltage difference between the instantaneous values of the electrical reference potential of the first partial signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) relative to a reference potential. Instead of electrical potential values compared to a preferably common reference potential, current values can also be compared in other applications.

A first comparator ( C1 ) compares the instantaneous value of the first difference signal ( d1 ) with a first reference value ( Ref 1 ) and forms the first comparison result signal ( v1 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times within an ultrasound transmission sequence. Therefore, it may be useful to have several first reference values ( Ref 1 ) for these different times and times, which should preferably be different. Possibly. For each of these first reference values ( Ref 1 ) a first comparator ( C1 ), each of which has an associated first comparison result signal ( v1 ) generated. The first comparison result signals ( v1 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which first comparison result signal ( v1 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A second comparator ( C2 ) compares the instantaneous value of the first partial signal ( S3a ) of the third analog signal ( S3 ) with a second reference value ( Ref2 ) and forms the second comparison result signal ( v2 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times within an ultrasound transmission sequence. Therefore, it may be useful to use several second reference values ( Ref2 ) for these different times and times, which should preferably be different. Possibly. for each of these second reference values ( Ref2 ) an own second comparator ( C2 ), each of which has an associated second comparison result signal ( v2 ) generated. The second comparison result signals ( v2 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which second comparison result signal ( v2 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A third comparator ( C3 ) compares the instantaneous value of the second partial signal ( s3b ) of the third analog signal ( S3 ) with a third reference value ( Ref 3 ) and forms the third comparison result signal ( v3 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several third reference values ( Ref 3 ) for these different times and times, which should preferably be different. Possibly. for each of these third reference values ( Ref 3 ) a third comparator ( C3 ), each of which has an associated third comparison result signal ( v3 ) generated. The third comparison result signals ( v3 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which third comparison result signal ( v3 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

9
equals to 2 with the difference that the second analog signal ( S2 ) is three-phase and is monitored by comparison units in star configuration in operation and the third analog signal ( S3 ) is carried out in two phases.

A fourth comparator ( C4 ) compares the instantaneous value of the second partial signal ( S2b ) of the second analog signal ( S2 ) with a fourth reference value ( Ref4 ) and forms the fourth comparison result signal ( v4 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several fourth reference values ( Ref4 ) for these different times and times, which should preferably be different. Possibly. for each of these fourth reference values ( Ref4 ) a proprietary fourth comparator ( C4 ), each of which has an associated fourth comparison result signal ( v4 ) generated. The fourth comparison result signals ( v4 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which fourth comparison result signal ( v4 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A fifth comparator ( C5 ) compares the instantaneous value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) with a fifth reference value ( ref5 ) and forms the fifth comparison result signal ( v5 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several fifth reference values ( ref5 ) for these different times and times, which should preferably be different. Possibly. For each of these fifth reference values ( ref5 ) an own fifth comparator ( C5 ), each of which has an associated fifth comparison result signal ( v5 ) generated. The fifth comparison result signals ( v5 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which fifth comparison result signal ( v5 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A sixth comparator ( C6 ) compares the instantaneous value of the first partial signal ( S2a ) of the second analog signal ( S2 ) with a sixth reference value ( ref6 ) and forms the sixth comparison result signal ( v6 ). As before, it may be useful to detect overshoots at certain times and to detect underruns at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several sixth reference values ( ref6 ) for these different times and times, which should preferably be different. Possibly. for each of these sixth reference values ( ref6 ) an own sixth comparator ( C6 ), each of which has an associated sixth comparison result signal ( v6 ) generated. The sixth comparison result signals ( v6 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which sixth comparison result signal ( v6 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

10
equals to 6 with the difference that the second analog signal ( S2 ) is three-phase and is monitored by means of comparison units in triangular configuration in operation and the third analog signal ( S3 ) is carried out in two phases.

A second differential amplifier ( D2 ) forms, for example, by subtraction from a parameter value of the second partial signal ( S2b ) of the second analog signal ( S2 ) and from a parameter value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) the second difference signal ( d2 ). For example, this may be a simple difference between the instantaneous values of the electrical potential of the second partial signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) to a reference potential. In that case, the second difference signal ( d2 ) the value of the voltage difference between the instantaneous values of the electrical potential of the second partial signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) relative to a reference potential. Instead of electrical potential values compared to a preferably common reference potential, current values can also be compared in other applications.

A tenth comparator ( C10 ) compares the instantaneous value of the second difference signal ( d2 ) with a seventh reference value ( ref7 ) and forms the tenth comparison result signal ( v10 ). As before, it may be useful to detect overshoots at certain times and to detect undershoots at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several seventh reference values ( ref7 ) for these different times and times, which should preferably be different. Possibly. for each of these seventh reference values ( ref7 ) an own tenth comparator ( C10 ), each of which has an associated tenth comparison result signal ( v10 ) generated. The tenth comparison result signals ( v10 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which tenth comparison result signal ( v10 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A third differential amplifier ( D3 ) forms, for example, by subtraction from a parameter value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and from a parameter value of the first partial signal ( S2a ) of the second analog signal ( S2 ) the third difference signal ( d3 ). For example, this may be a simple difference between the instantaneous values of the electrical potential of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the first partial signal ( S2a ) of the second analog signal ( S2 ) to a reference potential. In that case, the third difference signal ( d3 ) the Value of the voltage difference between the instantaneous values of the electrical potential of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the first partial signal ( S2a ) of the second analog signal ( S2 ) relative to a reference potential. Instead of electrical potential values compared to a preferably common reference potential, current values can also be compared in other applications.

An eleventh comparator ( C11 ) compares the instantaneous value of the third difference signal ( d3 ) with an eighth reference value ( Ref8 ) and forms the eleventh comparison result signal (v1e). As before, it may be useful to detect overshoots at certain times and to detect underruns at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several eighth reference values ( Ref8 ) for these different times and times, which should preferably be different. Possibly. For each of these eighth reference values ( Ref8 ) an own eleventh comparator ( C11 ), each of which has an associated eleventh comparison result signal ( v11 ) generated. The eleventh comparison result signals ( v11 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times when which eleventh comparison result signal ( v11 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

A fourth differential amplifier ( D4 ) forms, for example, by subtraction from a parameter value of the first partial signal ( S2a ) of the second analog signal ( S2 ) and from a parameter value of the second partial signal ( S2b ) of the second analog signal ( S2 ) the fourth difference signal ( d4 ). For example, this may be a simple difference between the instantaneous values of the electrical potential of the first partial signal ( S2a ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) to a reference potential. In that case, the fourth difference signal ( d4 ) the value of the voltage difference between the instantaneous values of the electrical potential of the first partial signal ( S2a ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) versus a reference potential. Instead of potential values related to a preferably common reference potential, current values can also be compared in other applications.

A twelfth comparator ( C12 ) compares the instantaneous value of the fourth difference signal ( d4 ) with a ninth reference value ( Ref9 ) and forms the twelfth comparison result signal ( v12 ). As before, it may be useful to detect overshoots at certain times and to detect underruns at other times, for example within an ultrasound transmission sequence. Therefore, it may be useful to use several ninth reference values ( Ref9 ) for these different times and times, which should preferably be different. Possibly. for each of these ninth reference values ( Ref9 ) an own twelfth comparator ( C12 ), each of which has an associated twelfth comparison result signal ( v12 ) generated. The twelfth comparison result signals ( v12 ) are preferred by the control device ( CTR ) or the digital input circuit ( DSI ) evaluated. The times, when, which twelfth comparison result signal ( v12 ) is valid and is to be evaluated, is preferred by the digital signal generation ( DSO ) or the control device ( CTR ).

1. 1. die erste Phase der Sendefrequenz, die Sendephase (SP), in der die Treiberstufe den Ultraschalltransducer (TR) antreibt und ein Ultraschallmessignal (MS) durch den Ultraschalltransducer ausgesendet wird; und
2. 2. die zweite Phase der Sendesequenz, die Ausschwingphase, in der die Treiberstufe dem Ultraschalltransducer (TR) Energie entzieht und dessen mechanische Schwingung dämpft, und
3. 3. die Empfangsphase (EP) in der der Ultraschalltransducer (TR) ein Echo eines Ultraschallmesssignals (MS) empfangen kann.

11
shows the timing of important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state. Clearly recognizable are:

1. 1. the first phase of the transmission frequency, the transmission phase ( SP ), in which the driver stage the ultrasonic transducer ( TR ) and an ultrasonic measuring signal ( MS ) is emitted by the ultrasonic transducer; and
2. 2. the second phase of the transmission sequence, the decay phase, in which the driver stage the ultrasonic transducer ( TR ) Deprives energy and dampens its mechanical vibration, and
3. 3. the reception phase ( EP ) in which the ultrasound transducer ( TR ) an echo of an ultrasonic measurement signal ( MS ).

1. 1. das erste Unterschiedssignal (d1), das die differentielle Amplitude der elektrischen Potenzialdifferenz zwischen dem ersten Teilsignal (S3a) des dritten analogen Signals (S3) und dem zweiten Teilsignal (S3b) des dritten analogen Signals (S3), und.
2. 2. das dritte Teilsignal (S2c) des zweiten analogen Signals (S2), das den Pegel des elektrischen Potenzials an der Mittenanzapfung des Übertragers (UEB) widergibt und
3. 3. das erste Teilsignal (S2a) des zweiten analogen Signals (S2), das den Pegel des elektrischen Potenzials an einem ersten Anschluss des Übertragers (UEB) widergibt und
4. 4. das zweite Teilsignal (S2c) des zweiten analogen Signals (S2), das den Pegel des elektrischen Potenzials an einem zweiten Anschluss des Übertragers (UEB) widergibt und
5. 5. der digitalisierte Wert des fünften digitalen Signals (S5), das den analog verstärkten, gefilterten und digitalisierten Wert widergibt.

Furthermore are shown:

1. 1. the first difference signal ( d1 ), which determines the differential amplitude of the electric potential difference between the first partial signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ), and.
2. 2. the third sub-signal ( S 2 c ) of the second analog signal ( S2 ), which determines the level of the electrical potential at the center tap of the transformer ( UEB ) and
3. 3. the first sub-signal ( S2a ) of the second analog signal ( S2 ), which determines the level of the electrical potential at a first terminal of the transformer ( UEB ) and
4. 4. the second sub-signal ( S 2 c ) of the second analog signal ( S2 ), which is the level of the electrical potential at a second terminal of the transformer ( UEB ) and
5. 5. the digitized value of the fifth digital signal ( S5 ), which reflects the analogue amplified, filtered and digitized value.

12
corresponds to a temporal enlargement of the 11 , where the excerpt in the sending phase ( SP ) is temporally located.

13
13 shows important signals ( S 2 c . S2a . S2b . S5 ) upon transmission of an ultrasonic burst in the operating state, wherein now a short circuit at the inner ultrasonic transducer ( TRi ) between the first sub-signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) is present.

symptoms

The ultrasound transducer does not vibrate correctly. Therefore, a frequency measurement and a measurement of the settling time by the digital input circuit ( DSI ) respectively. With the proposed device can thus be the case of a short-circuited ultrasound transducer ( TR ), in which the second partial signal ( s3b ) of the third analog signal ( S3 ) with the first sub-signal ( S3a ) of the third analog signal ( S3 ) is detected.

14
corresponds to a temporal enlargement of the 13 ,

15
15 shows important signals ( S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, wherein now the inner ultrasonic transducer ( TRi ) is not connected, so the first part signal ( S3a ) of the third analog signal ( S3 ) or the second partial signal ( s3b ) of the third analog signal ( S3 ) not with the ultrasonic transducer ( TR ) connected is.

symptoms

The ultrasound transducer does not vibrate correctly. Therefore, a measurement of the settling time by the digital input circuit ( DSI ) respectively. With the proposed device can thus be the case of an unconnected internal ultrasonic transducer ( TRi ) be recognized.

16
corresponds to a temporal enlargement of the 15 ,

17
17 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, wherein now the transformer ( UEB ) with a connection secondary side not to the first part signal ( S3a ) of the third analog signal ( S3 ) connected.

symptoms

The disconnected first partial signal ( S3a ) of the third analog signal ( S3 ) has the consequence that the inner ultrasonic transducer ( TRi ) is not sufficiently supplied with energy. This error can therefore be detected by evaluating the settling time and the oscillation frequency.

18
corresponds to a temporal enlargement of the 17 ,

19
19 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when transmitting an ultrasonic burst in the operating state now where the transformer ( UEB ) with a connection on the secondary side not to the second partial signal ( s3b ) of the third analog signal ( S3 ) connected.

symptoms

The disconnected second partial signal ( s3b ) of the third analog signal ( S3 ) has the consequence that the inner ultrasonic transducer ( TRi ) is not sufficiently supplied with energy. This error can therefore be detected again with an evaluation of the decay time and the oscillation frequency.

20
corresponds to a temporal enlargement of the 19 ,

21
21 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when transmitting an ultrasonic burst in the operating state, wherein the transformer ( UEB ) with a connection on the primary side not to the first part signal ( S2a ) of the second analog signal ( S2 ) connected.

symptoms

The disconnected first partial signal ( S2a ) of the second analog signal ( S2 ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. However, this error can not be detected with an evaluation of the decay time and the oscillation frequency.

A sixth comparator ( C6 ) on the first sub-signal ( S2a ) of the second analog signal ( S2 ) (see also 9 ) can be permanently undershot by comparison with a sixth reference (Rref6) this sixth reference value ( ref6 ) in the broadcast phase ( SP ) and / or in the receiving phase ( EP ) and thus conclude that the transformer ( UEB ) with a connection secondary side not to the first part signal ( S2a ) of the second analog signal ( S2 ) connected. The setting of the corresponding sixth comparison signal ( v6 ) can be controlled by the Control Panel ( CTR ) or the digital input circuit ( DSI ) be recognized. These then set a corresponding error signal or a corresponding error message.

22
corresponds to a temporal enlargement of the 21 ,

23
23 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when transmitting an ultrasonic burst in the operating state, wherein the transformer ( UEB ) with a connection on the primary side not to the second partial signal ( S2b ) of the second analog signal ( S2 ) connected.

symptoms

The disconnected second partial signal ( S2b ) of the second analog signal ( S2 ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. However, this error can not be detected with an evaluation of the decay time and the oscillation frequency.

A fourth comparator ( C4 ) on the second sub-signal ( S2b ) of the second analog signal ( S2 ) (see also 9 ) can be compared with a fourth reference (Rref4), the permanent undershooting of this fourth reference value ( Ref4 ) in the broadcast phase ( SP ) and / or in the receiving phase ( EP ) so we conclude that the transformer ( UEB ) with a connection on the secondary side not to the second partial signal ( S2b ) of the second analog signal ( S2 ) connected. The setting of the corresponding fourth comparison signal ( v4 ) can be controlled by the Control Panel ( CTR ) or the digital input circuit ( DSI ) be recognized. These then preferably set a corresponding error signal or preferably set a corresponding error message.

24
corresponds to a temporal enlargement of the 23 ,

25
25 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when transmitting an ultrasonic burst in the operating state, wherein the transformer ( UEB ) with its central connection on the primary side not to the third partial signal ( S 2 c ) of the second analog signal ( S2 ) connected.

symptoms

The disconnected third partial signal ( S 2 c ) of the second analog signal ( S2 ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. This error can be detected with an evaluation of the decay time and the oscillation frequency.

26
corresponds to a temporal enlargement of the 25 ,

27
27 shows important signals ( d1 . S 2 c . S2b . S5 ) when emitting an ultrasonic burst in the operating state, with primary side two terminals of the transformer ( UEB ) and the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the first sub-signal ( S2a ) of the second analog signal ( S2 ) are shorted.

symptoms

The fact that this is the third partial signal ( S 2 c ) of the second analog signal ( S2 ) with the first sub-signal ( S2a ) of the second analog signal ( S2 ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. This error can be detected with an evaluation of the decay time and the oscillation frequency.

The amplitude at the second partial signal ( S2b ) of the second signal ( S2 ) is also reduced by this short circuit and can therefore be replaced by a fourth comparator ( C4 ) by comparison with a fourth reference ( Ref4 ) be recognized.

A fourth comparator ( C4 ) on the second sub-signal ( S2b ) of the second analog signal ( S2 ) (see also 9 ) can be compared with a fourth reference (Rref4), the permanent undershooting of this fourth reference value ( Ref4 ) in the broadcast phase ( SP ) and / or in the receiving phase ( EP ) and thus conclude that possibly the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the first sub-signal ( S2a ) of the second analog signal ( S2 ) are shorted. The setting of the corresponding fourth comparison signal ( v4 ) can be controlled by the Control Panel ( CTR ) or the digital input circuit ( DSI ) be recognized. These then set a corresponding error signal or issue a corresponding error message. It should be noted that several different fourth reference values ( Ref4 ) and possibly further fourth comparators ( C4 ) the different error cases can be separated better.

28
corresponds to a temporal enlargement of the 27 ,

29
29 shows important signals ( d1 . S 2 c . S2a . S5 ) when emitting an ultrasonic burst in the operating state, with primary side two terminals of the transformer ( UEB ) and the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and second partial signal ( S2b ) of the second analog signal ( S2 ) are shorted.

symptoms

That this is the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) are short-circuited with each other, has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. This error can be detected with an evaluation of the decay time and the oscillation frequency.

The amplitude at the first sub-signal ( S2a ) of the second signal ( S2 ) is also reduced by this short circuit and can therefore be replaced by a sixth comparator ( C6 ) by comparison with a sixth reference ( ref6 ) be recognized.

A sixth comparator ( C6 ) on the first sub-signal ( S2a ) of the second analog signal ( S2 ) (see also 9 ) can be compared with a sixth reference (Rref6) the permanent fall below this sixth reference value ( ref6 ) in the broadcast phase ( SP ) and / or in the receiving phase ( EP ) so we conclude that possibly the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) are shorted. The setting of the corresponding sixth comparison signal ( v6 ) can be controlled by the Control Panel ( CTR ) or the digital input circuit ( DSI ) be recognized. These then set a corresponding error signal or issue a corresponding error message. It should be noted that several different sixth reference values ( ref6 ) and possibly further sixth comparators ( C6 ) the different error cases can be separated better.

30
30 corresponds to a temporal enlargement of the 29 ,

31
31 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, on the secondary side the transducer resistance ( R _TR ) is not connected, either to the first sub-signal ( S3a ) of the third analog signal ( S3 ) or to the second partial signal ( s3b ) of the third analog signal ( S3 ) not on the transducer resistance ( R _TR ) connected.

The unconnected transducer resistor ( R _TR ) has the consequence that the ultrasonic transducer ( TR ) its stored vibrational energy with the beginning of the decay phase ( AP ) can not break down as soon as intended. This error is therefore easily detectable with an evaluation of the decay time.

32
32 corresponds to a temporal enlargement of the 31 ,

33
33 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, on the secondary side, the transducer capacity ( C _TR ) is not connected. This "not being connected" can prevent the connection of the transducer capacitance ( C _TR ) to the first sub-signal ( S3a ) of the third analog signal ( S3 ) or the connection of the transducer capacity ( C _TR ) to the second sub-signal ( s3b ) of the third analog signal ( S3 ) affect.

The unconnected transducer capacity ( C _TR ) has hardly detectable signal changes result. The oscillation frequency is slightly lowered. However, these changes are only so minimal that this error is therefore typically not reliably detectable with an evaluation of the settling time or the oscillation frequency.

A detectability can be achieved in other ways. For this the detailed consideration of the 34 necessary.

34
34 corresponds to a temporal enlargement of the 33 ,

The biggest difference between the normal case of 12 and the picture of 34 is that the signal at the center tap of the carry ( UEB ), ie the third partial signal ( S 2 c ) of the second analog signal ( S2 ) in contrast to the normal case (see 11 ) is no longer symmetrically triangular, but has a more sawtooth shape. For example, a transformation into another signal range makes sense for the detection of this error. Such a transformation can be, for example, a Fourier transformation, a discrete Fourier transformation, a Laplace transformation or a wavelet transformation, etc. For example, it is also conceivable to generate a sawtooth reference signal and a triangular signal of the same frequency by means of a PLL, and to generate the third component signal ( S 2 c ) of the second signal ( S2 ) with these two signals during the transmission phase multiply and then filter low-pass, so to form a scalar product of these two (see also 50 to 53 ). The multiplication with the sawtooth signal should, given the correct phase position of the generated sawtooth signal, be zero, while the multiplication with the triangular signal with the correct phase position of the generated sawtooth signal should result in a value other than zero. (For the sake of completeness only: A triangular signal is a signal with a temporal amplitude curve in which this temporal amplitude curve is characterized by an immediate succession of triangular voltage waveforms of the signal in question and these triangles should be approximately isosceles (see also Signal A2c_b of the 51 ). A sawtooth signal is to be understood as meaning a signal with a temporal amplitude characteristic, in which this temporal amplitude characteristic is characterized by an immediate succession of triangular voltage profiles of the relevant signal and in which a trough of such a triangle is substantially steeper than the other leg (see also Signal A2c_a of the 51 ). Preferably, this steeper leg is almost vertical to the time axis. This calculation can easily be done in the analog input circuit ( AS ) as an analog mixer or in the digital input circuit ( DSI ) will be realized.

In this way, a first value for the odd signal component in the third partial signal ( S 2 c ) of the second signal ( S2 ) and a second value for the even signal component in the third sub-signal ( S 2 c ) of the second signal ( S2 ) be determined.

A corresponding comparator may compare the first value with an associated reference value for the odd signal component and cause the output of an error signal if that first value is above the associated reference value for the odd signal component.

A further corresponding comparison device may compare the second value with an associated reference value for the even signal component and cause the output of an error signal if this second value lies below the assigned reference value for the even signal component. This concept is described in the descriptions of 50 to 53 be deepened.

35
35 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, with the primary side not driving the driver for the first sub-signal ( S2a ) of the second analog signal ( S2 ) in the driver stage ( DR ) is present.

This error can occur, for example, when the driver transistor for the first partial signal ( S2a ) of the second signal ( S2 ) in the driver unit ( DR ) does not work. This transistor is then unable to receive the first sub-signal ( S2a ) of the second analog signal ( S2 ) to ground.

One way to detect this error is, a few μs after turning on this transistor with the help of the sixth comparator ( C6 ) to check this "on ground pull" of the transistor in question. The sixth comparator compares ( C6 ) (please refer 9 ) the voltage level at the first sub-signal ( S2a ) of the second signal ( S2 ) with a sixth reference value ( ref6 ). If this is not undershot at this time shortly after switching on the transistor, there is an error.

Another possibility lies again in the analysis of the even and odd signal portion as in the description of 34 shown, but now the first partial signal ( S2a ) of the second analog signal ( S2 ).

A further possibility lies in the fact that due to the symmetry of the device the signal course of the first partial signal ( S2a ) of the second signal ( S2 ) and the waveform of the second sub-signal ( S2b ) of the second signal ( S2 ) must be equal to each other except for a phase shift of 180 ° (assuming a transformer ( UEB ) according to 7 ). It is therefore conceivable, in one or more periods, one or more values of the signal profile of the first partial signal ( S2a ) of the second signal ( S2 ) at certain times and by 180 ° to phase-shifted at the corresponding times one or more values of the waveform of the second partial signal ( S2b ) of the second signal ( S2 ) to detect at certain times and then the differences of the corresponding pairs of each one value of the waveform of the first partial signal ( S2a ) of the second signal ( S2 ) and a value of the signal profile of the second partial signal ( S2b ) of the second signal ( S2 ) at the corresponding times and to sum up. If the difference or the amount of the difference exceeds a predetermined value, the symmetry of the device is disturbed and an error signal can be triggered. This calculation is preferably used in the digital input circuit ( DSI ) or in the control device ( CTR ) carried out. Such a device is then suitable for the symmetry of two partial signals ( S2a . S2b ) of the second analog signal ( S2 ) capture. This concept is related to the 49 be explained in detail.

36
36 corresponds to a temporal enlargement of the 35 ,

37
37 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when transmitting an ultrasonic burst in the operating state, the primary side of the driver for the first sub-signal ( S2a ) of the second analog signal ( S2 ) in the driver stage ( DR ) is shorted to ground.

symptoms

The primary side to ground shorted driver for the first sub-signal ( S2a ) of the second analog signal ( S2 ) in the driver stage ( DR ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. This error can be detected with an evaluation of the decay time and the oscillation frequency.

38
38 corresponds to a temporal enlargement of the 37 ,

39
39 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, with primary side, no driver of the driver for the second sub-signal ( S2b ) of the second analog signal ( S2 ) in the driver stage ( DR ) is present.

This error can occur, for example, when the driver transistor for the second partial signal ( S2b ) of the second signal ( S2 ) in the driver unit ( DR ) does not work. This transistor is then unable to supply the second partial signal ( S2b ) of the second analog signal ( S2 ) to ground.

One possibility to determine this error is a few μs after switching on this transistor with the aid of the fourth comparator ( C4 ) to check this "on Masse-Zeihen" of the transistor in question. The fourth comparator compares ( C4 ) (please refer 9 ) the voltage level at the second sub-signal ( S2b ) of the second signal ( S2 ) with a fourth reference value ( Ref4 ). If this is not undershot at this time shortly after switching on the transistor, there is an error.

Another possibility lies again in the analysis of the even and odd signal portion as in the description of 34 shown, but now the second partial signal ( S2b ) of the second analog signal ( S2 ).

A further possibility lies in the fact that due to the symmetry of the device the signal course of the first partial signal ( S2a ) of the second signal ( S2 ) and the waveform of the second sub-signal ( S2b ) of the second signal ( S2 ) must be equal to each other except for a phase shift of 180 ° (assuming a transformer ( UEB ) according to 7 It is therefore conceivable, in one or more periods, one or more values of the signal profile of the first partial signal ( S2a ) of the second signal ( S2 ) at certain times and by 180 ° to phase-shifted at the corresponding times one or more values of the waveform of the second partial signal ( S2b ) of the second signal ( S2 ) to detect at certain times and then the differences of the corresponding pairs of each one value of the waveform of the first partial signal ( S2a ) of the second signal ( S2 ) and a value of the signal profile of the second partial signal ( S2b ) of the second signal ( S2 ) at the corresponding times and to sum up. If the difference or the amount of the difference exceeds a predetermined value, the symmetry of the device is disturbed and an error signal can be triggered. This calculation is preferably used in the digital input circuit ( DSI ) or in the control device ( CTR ) carried out. Such a device is then suitable for the symmetry of two partial signals ( S2a . S2b ) of the second analog signal ( S2 ) capture. This concept is related to the 49 be explained in detail.

40
40 corresponds to a temporal enlargement of the 39 ,

41
41 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, the primary side of the driver for the second partial signal ( S2b ) of the second analog signal ( S2 ) in the driver stage ( DR ) is shorted to ground.

symptoms

The primary side to ground shorted driver for the second sub-signal ( S2b ) of the second analog signal ( S2 ) in the driver stage ( DR ) has the consequence that the ultrasonic transducer ( TR ) is not sufficiently supplied with energy. This error can be detected with an evaluation of the decay time and the oscillation frequency.

42
42 corresponds to a temporal enlargement of the 41 ,

43
43 shows important signals ( d1 . S 2 c . S2a . S2b . S5 ) when emitting an ultrasonic burst in Operating state, whereby on the primary side no activation of the driver for the third partial signal ( S 2 c ) of the second analog signal ( S2 ) in the driver stage ( DR ) is present.

The resulting error image can be determined both by an evaluation of the settling time and by a measurement with the aid of a sixth comparator ( C6 ) on the first sub-signal ( S2a ) of the second analog signal ( S2 ).

44
44 corresponds to a temporal enlargement of the 43 ,

45
45 shows important signals ( d1 . S2a . S2b . S5 ) when emitting an ultrasonic burst in the operating state, the primary side of the driver for the third partial signal ( S 2 c ) of the second analog signal ( S2 ) in the driver stage ( DR ) is short-circuited to ground or is not driven.

In the case of a low-resistance short circuit of the driver transistor, the transmission current is significantly increased. This can be detected by the settling time.

However, the detection by a sixth comparator ( C6 ) by comparing the first partial signal ( S2a ) of the second signal ( S2 ) with a sixth reference value ( ref6 ) in the reception phase ( EP ). Normally, the level is zero there. In this case of error, the level is raised there. This can be done by evaluating the sixth comparison signal ( v6 ) are detected as a triggering event for the generation of an error signal by the digital input circuit ( DSI ) or the system control ( CTR ) be used.

Likewise advantageous is the detection by a fourth comparator ( C4 ) by comparing the second partial signal ( S2b ) of the second signal ( S2 ) with a fourth reference value ( Ref4 ) in the reception phase ( EP ). Normally, the level is zero there. In this case of error, the level is raised there. This can be done by evaluating the fourth comparison signal ( v4 ) are detected as a triggering event for the generation of an error signal by the digital input circuit ( DSI ) or the system control ( CTR ) be used.

46
46 corresponds to a temporal enlargement of the 45 ,

47
47 shows the preferred sequence of a self-test of the proposed sensor system ( SS ). After switching on or resetting the proposed sensor system ( SS ) is the proposed sensor system ( SS ) in an on state ( EZ ). In this switch-on state ( EZ ) gives the proposed sensor system ( SS ) prefers no measured values, but only status messages about the progress of the switch-on process via the data interface ( IO ) out.

The proposed sensor system ( SS ) then changes to the third test state ( 3.TZ ). In this the proposed sensor system ( SS ) the correct function of digital signal generation ( DSO ) and the digital input circuit ( DSI ). The signal run corresponds to the 5 , The digital signal generation ( DSO ) generates predetermined test patterns and test sequences. In particular, critical safety-relevant error cases can be simulated. In this connection, it can then be checked whether the digital input circuit ( DSI ) reacts correctly in a safety-relevant manner and correctly detects the pre-played safety-relevant errors. Conversely, the signal generation by the digital signal generation ( DSI ). Digital signal generation ( DSO ) and digital input circuit ( DSI ) check in this way preferably according to specification by the control device ( CTR ) all test cases for the digital signal path. If an error occurs, the proposed sensor system changes ( SS ) preferably in an error state ( FZ ), which can not be easily left and in which typically no measured values and measurement results are passed on to higher-level units without special marking.

In this respect, the switch-on state ( EZ ) by the way a special error condition ( FZ ). It is therefore also possible to provide a plurality of error states which are assumed after the detected error. The purely digital test has the advantage that here the gates can be checked precisely and thus the failure of individual gates is recognizable. The test coverage of the self-test of these circuit parts is increased.

However, are all tests in the third test condition ( 3.TZ ), the proposed sensor system changes to the second test state ( 2.TZ ). As a result, the internal signal path of the proposed sensor system ( SS ) modified so that he is the 4 equivalent. As a result, the internal signal path of the proposed sensor system ( SS ) now also the analog circuit parts. If an error occurs, this can be attributed to the analog circuit parts, since the digital circuit parts were previously rated as "error-free". Check as before again the digital signal generation ( DSO ) and the digital input circuit ( DSI ) in this way preferably according to specification by the control device ( CTR ) All test cases for the now combined analog and digital signal path. If an error occurs, the proposed sensor system changes ( SS ) preferably returns to an error state ( FZ ), which can not be easily left and in which typically no measured values and measurement results are passed on to higher-level units without special marking. The digital signal generation ( DSO ) again generates predetermined test patterns and test sequences tailored to this combined analog / digital signal path in the second test state. In particular, again critical safety-relevant error cases can be simulated. In this connection, it can then be checked whether the digital input circuit ( DSI ) in combination with the analog input circuit ( AS ) reacts correctly in a safety-relevant manner and correctly detects the pre-played safety-relevant errors. Conversely, the signal generation can check whether the digital signal generation ( DSI ) and the driver stage ( DR ) work properly. Furthermore, various safety-relevant configurations of a possible subsequent transmission channel can be simulated and the simulation results can be evaluated.

However, are all tests in the second test state ( 2.TZ ), the proposed sensor system changes ( SS ) in the first test state ( 1.TZ ). As a result, the internal signal path of the proposed sensor system ( SS ) modified so that he is the 3 equivalent. The signal path thus now also includes the sensor subdevice ( TR ), so typically the ultrasonic transducer ( TR ), and the measuring channel ( CN ).

The digital signal generation ( DSI ) now generates test signals and test patterns, which after passing through the signal path to the sensor subdevice ( TR ), ie the ultrasonic transducer ( TR ), interact with this. The response signal of the sensor subdevice ( TR ), ie the ultrasound transducer ( TR ), is fed into the returning signal path and after passing through this signal path through the digital input circuit ( DSO ) rated.

In addition, it makes sense, especially in this first test condition ( 1.TZ ), the signals of the sensor subdevice ( TR ), ie the ultrasound transducer ( TR ), for example by comparators or other devices. Again, the digital signal generation ( DSI ) generate particularly critical test signals and test patterns for particularly safety-relevant cases. If an error occurs, the proposed sensor system changes back into an error state ( FZ ). The tests may include, for example, amplitudes, amplitude differences (with and without phase shift) and signal components such as harmonic components.

48
48 largely corresponds to the 8th with the difference that 48 not the comparators ( C1 . C2 . C3 ) and the differential amplifier ( D1 ) having. But this could with the 48 be combined. In the 48 is exploited that usually the sensor subdevice ( TR ) So the ultrasonic transducer ( TR ), and the transformer ( UEB ) are executed symmetrically. This symmetry is not perfectly achieved in reality, which is why the symmetry comparison must be provided with a threshold value.

In the 48 Therefore, a first Symmetrieprüfvorrichtung (SPA) is provided, the symmetry of two or more partial signals (SPA) S2a . S2b . S 2 c ) of the second analog signal ( S2 ) and a corresponding thirteenth comparison result signal ( v13 ) depending on the result of this comparison. Preferably, the first symmetry checker (SPA) performs internal phase shifts in such a manner that the resulting shifted sub-signals should match.

Furthermore, in the 48 a second symmetry tester ( SPB ), the symmetry of two (or possibly not treated here several) sub-signals ( S3a . s3b ) of the third analog signal ( S3 ) and a corresponding fourteenth comparison result signal ( v14 ) depending on the result of this comparison. Preferably, the second symmetry test device ( SPB ) here also possibly internal phase shifts in such a way that the resulting shifted partial signals should match. This test is preferably only in the transmission phase ( SP ) instead of. A phase shift of 180 ° corresponds to an inversion eg by an inverting amplifier with gain -1. In this respect, such an inverting amplifier is also a phase shifter in the sense of this disclosure, if a phase shift of 180 ° is required.

49
49 shows the device accordingly 48 with concrete exemplary execution of a symmetry test for the secondary side of the transformer ( UEB ). The second symmetry tester ( SPB ) is with the first partial signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) connected. Prerequisite for the use of this second Symmetrieprüfvorrichtung ( SPB ) is that at first the signal path part from transformers ( UEB ), Ultrasound Transducer ( TR ) and ultrasonic channel ( CN ) is symmetrically constructed and second symmetrically by the analog multiplexer ( AMX ) and the analog input circuit ( AS ) and thirdly by the driver stage ( DR ) and the first sub-signal ( S2a ) of the second analog signal ( S2 ), the second sub-signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) is controlled symmetrically. A preferred exemplary symmetrical control by these sub-signals of the second analog signal ( S2 ) can he 12 be removed. The second symmetry tester ( SPB ) is with a dashed box in the 49 marked. It comprises a first phase shifter ( S & H_Ba ), which is preferably designed as a holding circuit, and at a first time ( Z1 ) the instantaneous value of the first partial signal ( S3a ) of the third analog signal ( S3 ) and stored as a first partial signal ( S3am ) of the third cached signal ( s3m ). It comprises a second phase shifter ( S & H_Bb ), which is also preferably designed as a holding circuit, and at a second time ( Z2 ) the instantaneous value of the second partial signal ( s3b ) of the third analog signal ( S3 ) and as a second partial signal ( S3bm ) of the third cached signal ( s3m ). It is now assumed that the first sub-signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 ) are periodic and one oscillation period ( T ), wherein the first sub-signal ( S3a ) of the third analog signal ( S3 ) with respect to the second partial signal ( s3b ) of the third analog signal ( S3 ) is phase-shifted by 180 ° (= π), ie its inversion. The time interval between the first time ( Z1 ) and the second time ( Z2 ) is chosen to be equal to (n + 0.5) * T, where n is an integer positive number or zero. A fifth differential amplifier ( D5 ) forms from the first partial signal ( S3am ) of the third cached signal ( s3m ) and the second sub-signal ( S3bm ) of the third cached signal ( s3m ) the fifth difference signal ( d5 ). A second integrator ( INT2 ), which can also be a low-pass filter, integrates the fifth difference signal ( d5 ) to an integrated fifth difference signal ( D5I ). Preferably, the second integrator ( INT2 ) after m clock periods ( T ) again, where m is a whole positive number. Preferably, the fifth difference signal ( d5 ) rectified so that only the amplitude of the fifth difference signal ( d5 ) is integrated. The integrated fifth difference signal ( D5I ) is then a measure of the asymmetry within the m clock periods ( T ). A fourteenth comparator ( C14 ) compares the integrated fifth difference signal ( D5I ) with a fourteenth reference value ( Ref14 ) and generates the fourteenth comparison result signal ( v14 ). This is typically done by the digital input circuit ( DSI ) and / or the control device ( CTR ), which may generate an error message. This test is preferably only in the transmission phase ( SP ) instead of.

If the integrated fifth difference signal ( D5I ) is to represent a minimum symmetry, the fifth difference signal ( D5I ) multiplied by -1 by the fifth differential amplifier ( D5 ) and the second integrator ( INT2 ) after m clock periods ( T ) are not deleted, but preloaded to a positive preload value. If the integrated fifth difference signal ( D5I ) the fourteenth reference value ( Ref14 ), the fourteenth comparator ( C14 ) the fourteenth comparison result signal ( v14 ) to signal inadequate symmetry.

50
50 shows the device accordingly 48 with concrete execution of a symmetry test for the primary side of the transformer ( UEB ). The first symmetry tester (SPA) is connected to the first sub-signal ( S2a ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) connected. Prerequisite for the use of this first Symmetrieprüfvorrichtung (SPA) is that at first the signal path part of transformer ( UEB ), Ultrasound transducers ( TR ) and ultrasonic channel ( CN ) is symmetrically constructed and second symmetrically by the analog multiplexer ( AMX ) and the analog input circuit ( AS ) and thirdly by the driver stage ( DR ) and the first sub-signal ( S2a ) of the second analog signal ( S2 ), the second sub-signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) is normally controlled symmetrically. A preferred exemplary symmetrical control by these sub-signals of the second analog signal ( S2 ) can he 12 be removed. The first symmetry tester (SPA) is shown with a dashed box in the 50 marked. It comprises a first phase shifter ( S & H_Aa ), which is preferably designed as a holding circuit, and at a first time ( Z1 ) the instantaneous value of the first partial signal ( S2a ) of the second analog signal ( S2 ) and stored as a first partial signal ( S2am ) of the second buffered signal ( S2m ). It comprises a second phase shifter ( S & H_Ab ), which is also preferably designed as a holding circuit, and at a second time ( Z2 ) the instantaneous value of the second partial signal ( S2b ) of the second analog signal ( S2 ) and as a second partial signal ( S2bm ) of the second buffered signal ( S2m ). It is now assumed that the first sub-signal ( S2a ) of the second analog signal ( S2 ) and the second sub-signal ( S2b ) of the second analog signal ( S2 ) are periodic and one oscillation period ( T ), wherein the first sub-signal ( S2a ) of the second analog signal ( S2 ) with respect to the second partial signal ( S2b ) of the second analog signal ( S2 ) is phase-shifted by 180 ° (= π), ie its inversion. The time interval between the first time ( Z1 ) and the second time ( Z2 ) is chosen to be equal to (n + 0.5) * T, where n is an integer positive number or zero. A sixth differential amplifier ( D6 ) forms from the first partial signal ( S2am ) of the second buffered signal ( S2m ) and the second sub-signal ( S2bm ) of the second buffered signal ( S2m ) the sixth difference signal ( d6 ). A first integrator ( INT1 ), which can also be a low-pass filter, integrates the sixth difference signal ( d6 ) to an integrated sixth difference signal ( D6i ). Preferably, the first integrator ( INT1 ) after m clock periods ( T ) again, where m is a whole positive number. Preferably, the sixth difference signal ( d6 ) rectified so that only the amplitude of the sixth difference signal ( d6 ) is integrated. The integrated sixth difference signal ( D6i ) is then a measure of the asymmetry within the m clock periods ( T ). A thirteenth comparator ( C13 ) compares the integrated sixth difference signal ( D6i ) with a thirteenth reference value ( Ref13 ) and generates the thirteenth comparison result signal ( v13 ). This is typically done by the digital input circuit ( DSI ) and / or the control device ( CTR ), which may generate an error message. This test is preferably only in the transmission phase ( SP ) instead of.

If the integrated sixth difference signal ( D6i ) is to represent a minimum symmetry, the sixth difference signal ( D6i ) multiplied by -1 by the sixth differential amplifier ( D6 ) and the first integrator ( INT1 ) after m clock periods ( T ) are not deleted, but preloaded to a positive preload value. Falls below the integrated sixth difference signal ( D6i ) the thirteenth reference value ( Ref13 ), the thirteenth comparator ( C13 ) the thirteenth comparison result signal ( v13 ) to signal inadequate symmetry.

51
51 compares the undisturbed third partial signal ( S 2 c ) of the second analog signal ( S2 ) (see also 11 ) with the disturbed third partial signal ( S2cLC ) of the second analog signal ( S2 ) (please refer 34 , there with reference numerals S 2 c ) at a capacitor break of the transducer capacitor ( C _TR ) and shows two exemplary pairs of analysis signals.

It can be seen that the symmetrical shape of the undisturbed third partial signal ( S 2 c ) of the second analog signal ( S2 ) into a more sawtooth shape in the form of the disturbed third sub-signal ( S2cLC ) of the second analog signal ( S2 ) by the demolition of the transducer capacitor ( C _TR ) converts. Obviously, the disturbed third partial signal ( S2cLC ) of the second analog signal ( S2 ) a harmonic. The basic idea for the detection of this error is therefore, two coefficients by time-wise formation of a first scalar product between a suitable first internal analysis signal ( a_a ) and the signal to be analyzed ( ZA on the one hand and by forming a second scalar product between a suitable second internal analysis signal ( a_a ) and the signal to be analyzed ( ZA ) On the other hand, a first internal coefficient signal ( s3a ) and a second internal coefficient signal ( s3b ) and to compare these with each other and in case of deviations from the expected value an internal comparison signal ( v_x ), which is then used for error message generation by the control unit ( CTR ) and / or the digital receiving circuit ( DSI ) can be evaluated. In the specific case of this 51 are two possible analysis signals for analyzing the second partial signal ( S 2 c ) of the second analog signal ( S2 ) proposed by way of example. The first pair of analysis signals consists of two digital signals which are preferred and particularly simple in digital signal generation (US Pat. DSO ) can be generated. It is a first exemplary analysis signal ( A2c_a ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) and a second exemplary analysis signal ( A2c_b ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ). The first exemplary analysis signal ( A2c_a ) is more similar in this example to the disturbed third partial signal ( S2cLC ) of the second analog signal ( S2 ). The second exemplary analysis signal ( A2c_b ) is more similar in this example to the undisturbed third partial signal ( S 2 c ) of the second analog signal ( S2 ). In this example, the first exemplary analysis signal ( A2c_a ) compared to the second exemplary analysis signal ( A2c_b ) phase-shifted by -90 °. In this example, therefore, these are sinusoidal and cosine-like signals. During the preparation of the proposal it was recognized that a demolition of the transducer capacitor ( C _TR ) the configuration of the natural vibration frequencies of the still symmetrical system of transformers ( UEB ), Transducer resistance ( R _TR ), "Transducer capacitor ( C _TR ) And inner transducer ( TRi ) changes so that not only the fundamental vibration is present, but that then other modes of vibration are excited. Would sinus and applied cosinus-shaped signals, the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b ) correspond to the Fourier coefficients.

Furthermore, the shows 52 an alternative pair of possible analysis signals. It is an alternative first exemplary analysis signal ( A2c_a ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) and an alternative second exemplary analysis signal ( A2c_b ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ). The alternative first exemplary analysis signal ( A2c_a ' ) is in this example a sawtooth signal and thus more closely resembles the disturbed third sub-signal ( S2cLC ) of the second analog signal ( S2 ). The alternative second exemplary analysis signal ( A2c_b ' ) is in this example a triangular signal and is therefore more similar in this example to the undisturbed third partial signal ( S 2 c ) of the second analog signal ( S2 ). In contrast to the previous example, however, with respect to the in 52 proposed implementation of the scalar products, the alternative first exemplary analysis signal ( A2c_a ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) and the alternative second exemplary analysis signal ( A2c_b ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) no longer orthogonal to each other. Rather, they contain parts of each other with respect to this scalar product. The analysis signals can also be understood as a sequence of analysis signal-specific wavelets.

The alternative first exemplary analysis signal ( A2c_a ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) then consists of a temporal juxtaposition of individual sawtooth-shaped wavelets, wherein a wavelet would include a tooth.

The alternative second exemplary analysis signal ( A2c_b ' ) for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) then consists of a temporal juxtaposition of individual triangular wavelets, wherein a wavelet would include an isosceles triangle.

Depending on the purpose of analysis, other wavelets may be chosen. Since errors on the transmitter ( UEB ), the transducer resistance ( R _TR ), the transducer capacity ( C _TR ) and the inner transducer ( TRi ) do not always destroy the symmetry, but in this way the change in the spectral properties of the composition of these components can be monitored.

Thus, it is possible, inter alia, largely symmetrical transmitter short circuits of the transformer ( UEB ), Deviations of the effective resistance of the transducer resistor ( R _TR ), Changes in the effective capacitance of the transducer capacitance ( C _TR ) and changes in the impedance of the inner ultrasonic transducer ( TRi ) to detect reliably if they affect relevant spectral properties of the composition of these components.

52
52 shows by way of example a possible internal structure of an analog coefficient monitoring subdevice ( KUE ). Other implementations are possible. The signal to be analyzed ( ZA ) is in this example by the first multiplier ( M1 ) with the first internal analysis signal ( a_a ) by the first filter input signal ( s 1a ) and in the second multiplier ( M2 ) to the second filter input signal ( s1b multiplied). The first analysis signal ( a_a ) may, for example, come close to normal operation, while the second analysis signal ( From ) can come close, for example, a faulty operating case. The first filter input signal ( s 1a ) is filtered by the first filter ( F1 ) to the first filter output ( s 2a ) filtered. The first filter ( F1 ) is preferably an integrator or low-pass filter. The second filter input signal ( s1b ) is filtered by the second filter ( F2 ) to the second filter output signal ( s2b ) filtered. The first filter ( F1 ) is preferably an integrator or low-pass filter. The first internal sample-and-hold unit ( S & H_Ca ) palpates at the end of time ( 51 : for example, times z1 , z2, z3, z4) of one or more complete periods T the signal to be analyzed ( ZA ) (please refer 51 ) the first internal filter output signal ( S2a ) and thus forms the first internal coefficient signal ( S3a ). The second internal sample and Hold unit ( S & H_Cb ) palpates at the end of time ( 51 : for example, times z1 . z2 . z3 . z4 ) one or more complete periods T the signal to be analyzed ( ZA ) (please refer 51 ) the second internal filter output signal ( S2b ) and thus forms the second internal coefficient signal ( s3b ).

These samples are preferably carried out only in the transmission phase ( SP ) or at selected time periods within the transmission phase ( SP ). The control of the first internal sample-and-hold unit ( S & H_Ca ) and the second internal sample-and-hold unit ( S & H_Cb ) is preferably carried out by the digital signal generation unit ( DSO ).

The angle calculation unit ( arctan ) is generated from the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b ) the angle signal ( sα ). Preferably, the angle signal ( sα ) the arctan or arccot of the ratio of the levels of the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b ) approximations and other evaluations (eg simple division etc.) are conceivable.

The internal comparator ( C_X ) compares the level of the angle signal ( sα ) with the internal reference value ( Ref_X ). Depending on the result of this comparison, the internal comparator ( C_X ) an internal comparison result signal ( v_x ).

The 52 Fig. 12 illustrates an exemplary structure for the realization of the corresponding coefficient monitoring sub-apparatuses by the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b in the 53 Other implementations, in particular partially and completely digital realizations, eg as a program in signal processors, are conceivable.

Of course, it is conceivable to use more than two analysis signals ( a_a Ab), and to generate more than two coefficient signals via corresponding more than two parallel signal paths and accordingly carry out more comparisons, which leads to substantially more comparison result signals which are again reproduced by the control device (FIG. CTR ) and / or the digital receiving circuit ( DSI ) can be evaluated and used for the generation of error messages.

53
53 equals to 8th , where the level monitors are not drawn. Instead, possible coefficient monitoring subdevices are denoted by the reference numerals KUE2a . KUE2b , KUE2c, KUE3a and KUE3b located. Depending on the monitored signal, different comparison result signals ( v15 . v16 . v17 . v18 . v19 ), preferably by the digital input circuit ( DSI ) and / or the system control ( CTR ), which may trigger an error message.

54
54 equals to 52 , where now two comparators for additional monitoring of the two internal coefficient signals, for the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b ) are provided. Three comparison result signals (V_X, V_Y, V_Z) are now generated instead of only one comparison result signal (V_X). 54 Thus, by way of example, another possible internal structure of an analog coefficient monitoring subdevice ( KUE ).

A second internal comparator ( C_Y ) compares the first internal coefficient signal ( s3a ) with a second internal reference value (R_Y). Depending on the comparison result, the second internal comparator generates ( C_Y ) a second internal comparison result signal (V_Y), which as before typically by the control device ( CTR ) and / or the digital input circuit ( DSI ) is evaluated to possibly generate an error message.

A third internal comparator ( C_Z ) compares the second internal coefficient signal ( s3b ) with a third internal reference value (R_Z). Depending on the result of the comparison, the third internal comparator ( C_Z ) a third internal comparison result signal (V_Z), which as before typically by the control device ( CTR ) and / or the digital input circuit ( DSI ) is evaluated to possibly generate an error message.

55
55 equals to 54 , where now the ratio of the two internal coefficient signals is not monitored. Only two comparison result signals (V_Y, V_Z) are now generated. 55 Thus, by way of example, another possible internal structure of an analog coefficient monitoring subdevice ( KUE ). The function of the remaining circuit parts was described in the descriptions of 52 and 54 already described.

56
56 equals to 55 , where now only an internal coefficient signal (here s3a) is monitored. Only one comparison result signal (V_Y) is generated. However, this second comparison result signal (V_Y) only monitors the absolute level of the first internal coefficient signal ( s3a ), which corresponds to monitoring the fundamental waves or harmonic amplitude. In 52 the ratio of two coefficient signals was monitored. 56 Thus, by way of example, another possible internal structure of an analog coefficient monitoring subdevice ( KUE ). The function of the remaining circuit parts was described in the descriptions of 52 and 54 already described.

57
The 57 equals to 2 with the difference that the third analog signal ( S3 ) in front of the analog multiplexer ( AMX ) by an analogue filter or an analogue amplifier ( AV ) into the third analogue signal ( S3 ) and the amplified third analog signal ( S3 ' ) is split. This has the advantage that an override is avoided. The disadvantage is that in the second test state, the third analog test signal ( S3T ) via the analog multiplexer ( AMX ) after the analogue filter or analogue amplifier ( AV ) is fed back into the signal path. As a result, the analogue filter or the analogue amplifier ( AV ) not be tested. Of course you can the whole of analog input circuit ( AS ), analogue multiplexer ( AMX ) and analogue filter or analogue amplifier ( AV ) as a common two-input analog input circuit as previously mentioned. Should the amplitude of the second analog signal ( S2 ) be small enough so that the input of the analog multiplexer ( AMX ) and the input of the analog input circuit ( AS ) by directly applying the second analog signal ( S2 ) can not be overridden, this may also affect the analogue channel simulation unit ( ACS be waived. This results in a total of at least three ways to prevent overdriving of the analog signal path in the second test state:

Reconfiguration of the driver stage ( DR ) in the second test state, preferably by the control unit ( CTR ) in such a way that the output amplitude of the driver stage ( DR ) to the maximum input amplitude of the analog multiplexer ( AMX ) and the maximum input amplitude of the analog input circuit ( AS ) and adjusted. In that case, the analog channel simulation unit may be replaced by wire bridges.

Attenuation of the second analogue signal ( S2 ) to the third analog test signal ( S3T ) in the analog channel simulation unit such that the output amplitude of the driver stage ( DR ) to the maximum input amplitude of the analog multiplexer ( AMX ) and the maximum input amplitude of the analog input circuit ( AS ) is adjusted.

Eliminating a pre-stage of the analog input circuit ( AS ) - in the example of 57 an analog filter or analog amplifier ( AV ) and feeding the third analog test signal ( S3T ) or even direct injection of the second analog signal ( S2 ) via the analog multiplexer ( AMX ) in the analog input circuit ( AS ). Here, again, make sure that the output amplitude of the driver stage ( DR ) to the maximum input amplitude of the analog multiplexer ( AMX ) and the maximum input amplitude of the analog input circuit ( AS ) and adjusted. In that case, the analog channel simulation unit may be replaced by wire bridges.

The corresponding configuration of the sensor system ( SS ) is preferably again by the control device ( CTR ) performed.

At the end of the description of the figures should be mentioned that in particular the measures of 6 . 8th . 9 . 10 . 48 . 49 . 50 and 53 can be combined with each other. Also, the skilled person will select from these measures in a concrete application, those that come closest to the intended application and do not perform all measures for error detection.

glossary

Frequency sweep

A frequency sweep in the sense of this disclosure means a process in which the frequency of a first digital signal ( S1 ) or the frequency of a second analog signal ( S2 ) or the frequency of a measurement signal ( MS ) has a start frequency at a first time and has a final frequency at a second time. Preferably, the frequency between the first and the second time point preferably passes through all frequencies lying between the start frequency and the end frequency strictly monotonically, but at least monotonically.

ultrasound transducer

An ultrasonic transducer in the sense of this disclosure is composed of the optional (but preferably present) transducer resistance ( R _TR ), the optional (but available) transducer capacity ( C _TR ) and the inner ultrasonic transducer ( TRi ), which comprises the actual vibrating element, its housing and the contacts. An ultrasound transducer is capable of transmitting and receiving ultrasound signals preferably in time division multiplex.

Test case / test case

For the purposes of this disclosure, a test case or test case is understood to mean a predetermined configuration of the signal path and of all its components. The configuration is preferably carried out by the control unit ( CTR ). The stimulation of this so predetermined signal path is essentially by predetermined signals of the digital signal generation ( DSI ) performed. In this case, predetermined signals within the signal path are monitored by predetermined monitoring devices (eg, differential amplifiers and / or comparators), and the response of the signal path to such a stimulus is preferred in a test case-specific manner through the digital receiving circuit ( DSO ) or the sensor system control ( CTR ) evaluated.

test condition

Under a test condition, a condition of the sensor system ( SS ), the verification of the sensor system ( SS ) and is not the operating state.

signal chain

Signal chain is the passing of a signal within a chain of device parts of the sensor system ( SS ) along the signal path. (see also 3 . 4 and 5 )

Digital part of the signal chain

The digital part of the signal chain is understood to mean the circuit parts which are predominantly implemented in digital circuit technology. In the example presented, these are the digital signal generation ( DSO ), the digital multiplexer ( DMX ) and the digital input circuit ( DSI ). The digital channel simulation unit ( DCS ) can be considered as part of the digital signal chain in the third test state.

Analog part of the signal chain

The analog part of the signal chain is understood to mean the circuit parts which are predominantly implemented in analog circuit technology. In the example presented, these are the driver stage ( DR ), the analog multiplexer ( AMX ) and the analog input circuit ( AS ). The analog channel simulation unit ( ACS ) can be considered as part of the analog signal chain in the second test state.

error messages

For the purposes of this disclosure, information about detected faults transmitted via corresponding device parts, e.g. Lines are transmitted or provided in predetermined or determinable places in device parts. The provision of such information is a generation within the meaning of this disclosure.

triangular wave

A triangular signal is to be understood as meaning a signal with a temporal amplitude characteristic in which this temporal amplitude characteristic is characterized by an immediate succession of triangular voltage profiles of the relevant signal and wherein these triangles should be approximately isosceles (see also Signal A2c_b of the 51 ).

sawtooth

A sawtooth signal is to be understood as meaning a signal with a temporal amplitude characteristic, in which this temporal amplitude characteristic is characterized by an immediate succession of triangular voltage profiles of the relevant signal and in which a trough of such a triangle is substantially steeper than the other leg (see also Signal A2c_a of the 51 ).

LIST OF REFERENCE NUMBERS

1.TZ

first test condition;

2.TZ

second test condition;

3.TZ

third test condition;

A2a_a

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2a ) for the first sub-signal ( S2a ) of the second analog signal ( S2 );

A2a_b

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2a ) for the first sub-signal ( S2a ) of the second analog signal ( S2 );

A2b_a

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2b ) for the second sub-signal ( S2b ) of the second analog signal ( S2 );

A2b_b

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2b ) for the second sub-signal ( S2b ) of the second analog signal ( S2 );

A2c_a

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

A2c_b

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

A2c_a '

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ), here in an alternative exemplary embodiment;

A2c_b '

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ), here in an alternative exemplary embodiment;

A3a_a

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE3a ) for the first sub-signal ( S3a ) of the third analog signal ( S3 );

A3a_b

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE3a ) for the first sub-signal ( S3a ) of the third analog signal ( S3 );

A3b_a

first exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE3b ) for the second sub-signal ( s3b ) of the third analog signal ( S3 );

A3b_b

second exemplary analysis signal for the coefficient monitoring in the coefficient monitoring subdevice ( KUE3b ) for the second sub-signal ( s3b ) of the third analog signal ( S3 );

a_a

first internal analysis signal of the relevant coefficient monitoring subdevice ( KUE ). This may, for example, be one of the following signals with the following reference symbols: A2a_a, A2b_a, A2c_a, A3a_a, A3b_a. Other internal symmetric signals can also be monitored. The first internal analysis signal must always match the existing temporal symmetry of the signal to be analyzed ( ZA ) and with the same period T like the signal to be analyzed ( ZA ) to get voted. For example, if the first sub-signal ( S2a ) of the second analog signal ( S2 ), the first internal analysis signal should not, as in FIG. 51, for the third partial signal (FIG. S 2 c ) of the second analog signal ( S2 ) for the corresponding first analysis signal ( A2c_a ), in each period T Pulse, but in-phase only in every other period. Preferably, the first internal analysis signal is digitally generated by digital signal generation ( DSO ) generated;

From

second internal analysis signal of the relevant coefficient monitoring subdevice ( KUE ). This may, for example, be one of the following signals with the following reference symbols: A2a_b, A2b_b, A2c_b, A3a_b, A3b_b. Other internal symmetric signals can also be monitored. The second internal analysis signal must always match the existing temporal symmetry of the signal to be analyzed ( ZA ) and with the same period T like the signal to be analyzed ( ZA ) to get voted. For example, if the first sub-signal ( S2a ) of the second analog signal ( S2 ), the second internal analysis signal should not, as in FIG. 51, for the third partial signal (FIG. S 2 c ) of the second analog signal ( S2 ) for the corresponding second analysis signal ( A2c_b ), in each period T Pulse, but in-phase only in every other period. Preferably, the second internal analysis signal is digitally generated by digital signal generation ( DSO ) generated;

ADC

Analog-to-digital converter;

ACS

analog channel simulation unit;

AMX

analog multiplexer;

AP

decay phase;

arctan

Angle calculation unit. Preferably, each coefficient monitoring subdevice ( KUE ) an angle calculation unit when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The angle calculation unit generates from the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b ) the angle signal ( sα ). Preferably, the angle signal sets the arctan or arccot of the ratio of the levels of the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b approximations and other evaluations (eg simple division etc.) are conceivable;

AS

analog input circuit (Has the function of an analog-to-digital converter ( ADC ));

ASS

Outside area outside the sensor system ( SS );

AV

analog filter or analog amplifier;

C_X

internal comparator. Preferably, coefficient monitoring subdevices ( KUE ) an internal comparator ( C_X ) when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. In particular, it may be based on the 53 to comparators with the reference numerals C15 . C16 . C17 . C18 and C19 act for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b should be located. The internal comparator compares the level of the angle signal ( sα ) with the internal reference value ( Ref_X ). For the internal reference value ( Ref_X ) It can be related to the 53 In particular reference values with reference numerals Ref15, Ref16, Ref17, Ref18 and Ref19 act, which for simplicity in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b should be located. Depending on the result of this comparison, the internal comparator generates an internal comparison result signal ( v_x ). In the internal comparison result signal ( v_x ). can it be relative to the 53 in particular to comparison result signals with the reference numerals v15 . v16 . v17 . v18 and v19 within the corresponding coefficient monitoring subdevices with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b be formed.

C_Y

second internal comparator. In one implementation form, coefficient monitoring subdevices ( KUE ) a second internal comparator ( C_Y ) when the coefficient monitoring subdevice ( KUE ) in the form of 54 is realized. In particular, it may be based on the 53 to act comparators, for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. The second internal comparator compares the level of the first internal coefficient signal ( s3a ) with the second internal reference value ( Ref_Y ). For the second internal reference value ( Ref_Y ) It can be related to the 53 In particular, reference values should be used for simplification purposes 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. Depending on the result of this comparison, the second internal comparator generates a second internal comparison result signal ( v_Y ). In the second internal comparison result signal ( v_Y ) It can be related to the 53 in particular to compare result signals within the corresponding coefficient monitoring subdevices with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b be formed and not in the simplification 53 are drawn.

C_Z

third internal comparator. In one implementation form, coefficient monitoring subdevices ( KUE ) a third internal comparator ( C_Z ) when the coefficient monitoring subdevice ( KUE ) in the form of 54 is realized. In particular, it may be based on the 53 to act comparators, for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. The third internal comparator compares the level of the second internal coefficient signal ( s3b ) with the third internal reference value ( REF_Z ). For the third internal reference value ( REF_Z ) It can be related to the 53 In particular, reference values should be used for simplification purposes 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. Depending on the result of this comparison, the third internal comparator generates a third internal comparison result signal ( V_Z ). In the third internal comparison result signal ( V_Z ) It can be related to the 53 in particular to compare result signals within the corresponding coefficient monitoring subdevices with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b be formed and not in the simplification 53 are drawn.

C1

first comparator. The first comparator compares the first difference signal ( d1 ) with the first reference value ( Ref 1 ) and generates the first comparison result signal ( v1 );

C2

second comparator. The second comparator compares the first sub-signal ( S3a ) of the third analog signal ( S3 ) with the second reference value ( Ref2 ) and generates the second comparison result signal ( v2 );

C3

third comparator. The third comparator compares the second sub-signal ( s3b ) of the third analog signal ( S3 ) with the third reference value ( Ref 3 ) and generates the third comparison result signal ( v3 );

C4

fourth comparator. The fourth comparator compares the second sub-signal ( S2b ) of the second analog signal ( S2 ) with the fourth reference value ( Ref4 ) and generates the fourth comparison result signal ( v4 );

C5

fifth comparator. The fifth comparator compares the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) with the fifth reference value ( ref5 ) and generates the fifth comparison result signal ( v5 );

C6

sixth comparator. The sixth comparator compares the first sub-signal ( S2a ) of the second analog signal ( S2 ) with the sixth reference value ( ref6 ) and generates the sixth comparison result signal ( v6 );

C10

tenth comparator. The tenth comparator compares the second difference signal ( d2 ) with the seventh reference value ( ref7 ) and generates the tenth comparison result signal ( v10 );

C11

eleventh comparator. The eleventh comparator compares the third difference signal ( d3 ) with the eighth reference value ( Ref8 ) and generates the eleventh comparison result signal ( v11 );

C12

twelfth comparator. The twelfth comparator compares the fourth difference signal ( d4 ) with the ninth reference value ( Ref9 ) and generates the twelfth comparison result signal ( v12 );

C13

thirteenth comparator. The thirteenth comparator compares the integrated fifth difference signal ( D5I ) with the thirteenth reference value ( Ref13 ) and generated the thirteenth comparison result signal ( v13 );

C14

Fourteenth comparator. The fourteenth comparator compares the integrated fifth difference signal ( D5I ) with the fourteenth reference value ( Ref14 ) and generates the fourteenth comparison result signal ( v14 );

C15

fifteenth comparator. The fifteenth comparator compares the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE3a ) of the first partial signal ( S3a ) of the third analog signal ( S3 ) with the fifteenth reference value ( Ref15 ) and generates the fifteenth comparison result signal ( v15 ). The fifteenth comparator ( C15 ) is within the coefficient monitoring subdevice ( KUE3a ) of the first partial signal ( S3a ) of the third analog signal ( S3 );

C16

sixteenth comparator. The sixteenth comparator compares the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE3b ) of the second partial signal ( s3b ) of the third analog signal ( S3 ) with the sixteenth reference value ( Ref16 ) and generates the sixteenth comparison result signal ( v16 ). The sixteenth comparator ( C16 ) is within the coefficient monitoring subdevice ( KUE3b ) of the second partial signal ( s3b ) of the third analog signal ( S3 );

C17

seventeenth comparator. The seventeenth comparator compares the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE2b ) of the second partial signal ( S2b ) of the second analog signal ( S2 ) with the seventeenth reference value ( Ref17 ) and generates the seventeenth comparison result signal ( v17 ). The seventeenth comparator ( C17 ) is within the coefficient monitoring subdevice ( KUE2b ) of the second partial signal ( S2b ) of the second analog signal ( S2 );

C18

eighteenth comparator. The eighteenth comparator compares the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE2c ) of the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) with the eighteenth reference value ( Ref18 ) and generates the eighteenth comparison result signal ( v18 ). The eighteenth comparator ( C18 ) is within the coefficient monitoring subdevice ( KUE2c ) of the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

C19

nineteenth comparator. The nineteenth comparator compares the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE2a ) of the first partial signal ( S2a ) of the second analog signal ( S2 ) with the nineteenth reference value ( Ref19 ) and generates the nineteenth comparison result signal ( v19 ). The nineteenth comparator ( C19 ) is within the coefficient monitoring subdevice ( KUE2a ) of the first partial signal ( S2a ) of the second analog signal ( S2 );

CN

Measuring channel, in particular an ultrasonic measuring channel;

CTR

Control means;

C _TR

Transducer capacitance;

d1

first difference signal. The first difference signal represents in the example of 3 the Difference of the values of the signal amplitudes (as exemplary parameter values) between the first part signal ( S3a ) of the third analog signal ( S3 ) and the second sub-signal ( s3b ) of the third analog signal ( S3 );

d2

second difference signal. The second difference signal represents in the example of 5 the difference between the values of the signal amplitudes (as exemplary parameter values) between the second partial signal ( S2b ) of the second analog signal ( S2 ) and the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

d3

third difference signal. The third difference signal represents in the example of 5 the difference of the values of the signal amplitudes (as exemplary parameter values) between the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the first sub-signal ( S2a ) of the second analog signal ( S2 );

d4

fourth difference signal. The fourth difference signal represents in the example of 5 the difference of the values of the signal amplitudes (as exemplary parameter values) between the first part signal ( S2a ) of the second analog signal ( S2 ) of the second partial signal ( S2b ) of the second analog signal ( S2 );

d5

fifth difference signal. The fifth difference signal represents in the example of 49 the difference of the values of the signal amplitudes (as exemplary parameter values) between the first part signal ( S3am ) of the third cached signal ( s3m ) and the second sub-signal ( S3bm ) of the third cached signal ( s3m );

D5I

integrated fifth difference signal. The integrated fifth difference signal represents in the example of 49 the output of the second integrator ( INT2 ), which is the fifth difference signal ( d5 ) over m clock periods T integrated before he is preferably reset again. Here m is a whole positive number. At the end of the m clock periods, the value of the integrated fifth difference signal is a measure of the asymmetry of the two partial signals of the third analog signal ( S3 );

d6

sixth difference signal. The sixth difference signal represents in the example of 50 the difference of the values of the signal amplitudes (as exemplary parameter values) between the first part signal ( S2am ) of the second buffered signal ( S2m ) and the second sub-signal ( S2bm ) of the second buffered signal ( S2m );

D6i

integrated sixth difference signal. The integrated sixth difference signal represents in the example of 50 the output of the first integrator ( INT1 ) representing the sixth difference signal ( d6 ) over m clock periods T integrated before he is preferably reset again. Here m is a whole positive number. At the end of the m clock periods, the value of the integrated sixth difference signal provides a measure of the asymmetry of the two partial signals of the second analog signal ( S3 );

D1

first differential amplifier. The first differential amplifier forms, for example, by subtraction from a parameter value of the first partial signal ( S3a ) of the third analog signal ( S3 ) and from a parameter value of the second partial signal ( s3b ) of the third analog signal ( S3 ) the first difference signal ( d1 );

D2

second differential amplifier. The second differential amplifier forms, for example, by subtraction from a parameter value of the second partial signal ( S2b ) of the second analog signal ( S2 ) and from a parameter value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) the second difference signal ( d2 );

D3

third differential amplifier. The third differential amplifier forms, for example, by subtraction from a parameter value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and from a parameter value of the first partial signal ( S2a ) of the second analog signal ( S2 ) the third difference signal ( d3 );

D4

fourth differential amplifier. The fourth differential amplifier forms, for example, by subtraction from a parameter value of the first partial signal ( S2a ) of the second analog signal ( S2 ) and from a parameter value of the second partial signal ( S2b ) of the second analog signal ( S2 ) the fourth difference signal ( d4 );

D5

fifth differential amplifier. The fifth differential amplifier forms, for example, by subtraction of a parameter value of the first partial signal ( S3am ) of the third cached signal ( s3m ) and from a parameter value of the second partial signal ( S3bm ) of the third cached signal ( s3m ) the fifth difference signal ( d5 );

D6

sixth differential amplifier. The sixth differential amplifier forms, for example, by subtraction from a parameter value of the first partial signal ( S2am ) of the second buffered signal ( S2m ) and from a parameter value of the second partial signal ( S2bm ) of the second buffered signal ( S2m ) the sixth difference signal ( d6 );

DCS

digital channel simulation unit;

DMX

digital multiplexer;

DR

Driver stage;

DSI

digital input circuit;

DSO

digital signal generation;

EP

Reception phase;

IT

Receive signal, in particular an ultrasonic receive signal;

EZ

ON;

F1

first filter. Preferably, each coefficient monitoring subdevice ( KUE ) a first filter when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The first filter filters the first internal filter input signal ( s 1a ) to a first filter output ( s 2a ). The first filter is preferably an integrator or at least a low pass. As a result, the first filter forms with the first multiplier ( M1 ) a first scalar product unit and thus forms together with the first multiplier ( M1 ) a scalar product from the signal to be analyzed ( ZA ) and the first analysis signal ( a_a ). The first filter output signal ( s 2a ) thus represents this scalar product thus determined. However, the limits of this first dot product are still undetermined. Therefore, the following first internal sample-and-hold unit ( S & H_Ca ) necessary to complete the first scalar product unit;

F2

second filter. Preferably, each coefficient monitoring subdevice ( KUE ) a second filter when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The second filter filters the second internal filter input signal ( s1b ) to second first filter output ( s2b ). The second filter is preferably an integrator or at least a low-pass filter. As a result, the second filter forms with the second multiplier ( M2 ) a second scalar product unit and thus forms together with the second multiplier ( M2 ) a scalar product from the signal to be analyzed ( ZA ) and the second analysis signal ( From ). The second filter output signal ( s2b ) thus represents this scalar product thus determined. However, the limits of this second scalar product are still undetermined. Therefore, the following second internal sample-and-hold unit ( S & H_Cb ) necessary to complete the scalar product unit;

FZ

Error condition;

INT1

first integrator;

INT2

second integrator;

IO

Data interface;

KUE

Coefficient monitoring part device;

KUE2a

Coefficient monitoring sub-device of the first sub-signal ( S2a ) of the second analog signal ( S2 );

KUE2b

Coefficient monitoring sub-device of the second sub-signal ( S2b ) of the second analog signal ( S2 );

KUE2c

Coefficient monitoring sub-device of the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

KUE3a

Coefficient monitoring sub-device of the first sub-signal ( S3a ) of the third analog signal ( S3 );

KUE3b

Coefficient monitoring sub-device of the second sub-signal ( S3a ) of the third analog signal ( S3 );

m

Number of clock periods over which is integrated;

M1

first multiplier. Preferably, each coefficient monitoring subdevice ( KUE ) comprises a first multiplier when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The first multiplier multiplies within the respective coefficient monitoring subdevice ( KUE ) for the relevant coefficient monitoring subdevice ( KUE ) true first internal analysis signal a_a with the coefficient monitoring subsystem ( KUE ) signal to be analyzed ( ZA ) by a first internal filter input signal ( s 1a ) to obtain;

M2

second multiplier. Preferably, each coefficient monitoring subdevice ( KUE ) a second multiplier when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The second multiplier multiplies within the relevant coefficient monitoring subdevice ( KUE ) for the relevant coefficient monitoring subdevice ( KUE ) true second internal analysis signal From with the coefficient monitoring subsystem ( KUE ) signal to be analyzed ( ZA ) by a second internal filter input signal ( s1b ) to obtain;

MS

Measuring signal, in particular an ultrasonic measuring signal;

Ref_X

internal reference value. Preferably, coefficient monitoring subdevices ( KUE ) an internal reference value, if they are in the form of 52 will be realized. For the internal reference value ( Ref_X ) It can be related to the 53 in particular by reference values with the reference numerals Ref15 . Ref16 . Ref17 . Ref18 and Ref19 act for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b should be located.

Ref_Y

second internal reference value. Preferably, coefficient monitoring subdevices ( KUE ) a second internal reference value ( Ref_Y ), if in the form of 54 . 55 or 56 will be realized. For the second internal reference value ( Ref_Y ) It can be related to the 53 to act as reference values for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b should be located.

REF_Z

third internal reference value. Preferably, coefficient monitoring subdevices ( KUE ) a third internal reference value ( REF_Z ), if in the form of 54 . 55 or 56 will be realized. For the third internal reference value ( REF_Z ) It can be related to the 53 to act as reference values for simplification in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b should be located.

Ref 1

first reference value. The first reference value serves as comparison value for the first difference signal ( d1 ) for generating the first comparison result signal ( v1 ) by the first comparator ( C1 );

Ref2

second reference value. The second reference value serves as comparison value for the first sub-signal ( S3a ) of the third analog signal ( S3 ) for generating the second Comparison result signal ( v2 ) by the second comparator ( C2 );

Ref 3

third reference value. The third reference value serves as comparison value for the second sub-signal ( s3b ) of the third analog signal ( S3 ) for generating the third comparison result signal ( v3 ) by the third comparator ( C3 );

Ref4

fourth reference value. The fourth reference value serves as comparison value for the second partial signal ( S2b ) of the second analog signal ( S2 ) for generating the fourth comparison result signal ( v4 ) by the fourth comparator ( C4 );

ref5

fifth reference value. The fifth reference value serves as comparison value for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) for generating the fifth comparison result signal ( v5 ) by the fifth comparator ( C5 );

ref6

sixth reference value. The sixth reference value serves as a comparison value for the first sub-signal ( S2a ) of the second analog signal ( S2 ) for generating the sixth comparison result signal ( v6 ) by the sixth comparator ( C6 );

ref7

seventh reference value. The seventh reference value serves as a comparison value for the second difference signal ( d2 ) for generating the tenth comparison result signal ( v10 ) by the tenth comparator ( C10 );

Ref8

eighth reference value. The eighth reference value serves as comparison value for the third difference signal ( d3 ) for generating the eleventh comparison result signal ( v11 ) by the eleventh comparator ( C11 );

Ref9

ninth reference value. The ninth reference value serves as comparison value for the fourth difference signal ( d4 ) for generating the twelfth comparison result signal ( v12 ) through the twelfth comparator ( C12 );

Ref13

thirteenth reference value. The thirteenth reference value serves as a comparison value for the integrated sixth difference signal ( D6i ) for generating the thirteenth comparison result signal ( v13 ) through the thirteenth comparator ( C13 );

Ref14

fourteenth reference value. The fourteenth reference value serves as a comparison value for the integrated fifth difference signal ( D5I ) for generating the fourteenth comparison result signal ( v14 ) by the fourteenth comparator ( C14 );

Ref15

fifteenth reference value. The fifteenth reference value serves as a comparison value for the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE3a ) of the first partial signal ( S3a ) of the third analog signal ( S3 ) for generating the fifteenth comparison result signal ( v15 ) by the fifteenth comparator ( C15 ) within the coefficient monitoring subdevice ( KUE3a ) of the first partial signal ( S3a ) of the third analog signal ( S3 );

Ref16

sixteenth reference value. The sixteenth reference value serves as a comparison value for the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE3b ) of the second partial signal ( s3b ) of the third analog signal ( S3 ) for generating the sixteenth comparison result signal ( v16 ) by the sixteenth comparator ( C16 ) within the coefficient monitoring subdevice ( KUE3b ) of the second partial signal ( s3b ) of the third analog signal ( S3 );

Ref17

seventeenth reference value. The seventeenth reference value serves as a comparison value for the angle signal ( sα ) within the Coefficient monitoring subdevice ( KUE2b ) of the second partial signal ( S2b ) of the second analog signal ( S2 ) for generating the seventeenth comparison result signal ( v17 ) by the seventeenth comparator ( C17 ) within the coefficient monitoring subdevice ( KUE2b ) of the second partial signal ( S2b ) of the second analog signal ( S2 );

Ref18

eighteenth reference value. The eighteenth reference value serves as a comparison value for the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE2c ) of the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) for generating the eighteenth comparison result signal ( v18 ) through the eighteenth comparator ( C18 ) within the coefficient monitoring subdevice ( KUE2c ) of the third sub-signal ( S 2 c ) of the second analog signal ( S2 );

Ref19

nineteenth reference value. The nineteenth reference value serves as a comparison value for the angle signal ( sα ) within the coefficient monitoring subdevice ( KUE2a ) of the first partial signal ( S2a ) of the second analog signal ( S2 ) for generating the nineteenth comparison result signal ( v19 ) by the nineteenth comparator ( C19 ) within the coefficient monitoring subdevice ( KUE2a ) of the first partial signal ( S2a ) of the second analog signal ( S2 );

R _TR

Transducer resistance;

sα

Angle signal. Preferably, each coefficient monitoring subdevice ( KUE ) an angle signal when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The angle signal is detected by the angle calculation unit of the coefficient monitoring subdevice ( KUE ) generated. Preferably, the angle signal sets the arctan or arccot of the ratio of the levels of the first internal coefficient signal ( s3a ) and the second internal coefficient signal ( s3b approximations and other evaluations (eg simple division etc.) are conceivable;

S & H_Aa

first phase shifter of the first symmetry tester (SPA);

S & H_Ab

second phase shifter of the first symmetry tester (SPA);

S & H_Ba

first phase shifter of the second symmetry tester ( SPB );

S & H_Bb

second phase shifter of the second symmetry tester ( SPB );

S & H_Ca

first internal sample-and-hold unit. Preferably, each coefficient monitoring subdevice ( KUE ) a first internal sample and hold unit when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. At the end of one or more complete periods T the signal to be analyzed ( ZA ), the first internal sample-and-hold unit samples the first internal filter output ( S2a ) and thus forms the first internal coefficient signal ( S3a ). The sampling preferably takes place only in the transmission phase ( SP ) or at selected time periods within the transmission phase ( SP ). The control of the first internal sample-and-hold unit is preferably carried out by the digital signal generation unit ( DSO );

S & H_Cb

second internal sample-and-hold unit. Preferably, each coefficient monitoring subdevice ( KUE ) a second internal sample and hold unit when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. At the end of one or more complete periods T the signal to be analyzed ( ZA ), the second internal sample-and-hold unit samples the second internal filter output ( S2b ) and thus forms the second internal coefficient signal ( s3b ). The sampling preferably takes place only in the transmission phase ( SP ) or at selected time periods within the transmission phase ( SP ). The control of the first internal sample-and-hold unit is preferably carried out by the digital signal generation unit ( DSO );

S0

zeroth signal;

S1

first digital signal;

s 1a

first internal filter input signal. Preferably, each coefficient monitoring subdevice ( KUE ) a first internal filter input signal when the coefficient monitoring sub-device ( KUE ) in the form of 52 is realized. The first filter input signal is used in the example of 52 by multiplying the signal to be analyzed ( ZA ) with the first internal analysis signal ( a_a ) by the first multiplier ( M1 ) generated;

s1b

second internal filter input signal. Preferably, each coefficient monitoring subdevice ( KUE ) a second internal filter input signal when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The second filter input signal is used in the example of 52 by multiplying the signal to be analyzed ( ZA ) with the second internal analysis signal ( a_a ) by the second multiplier ( M2 ) generated;

S2

second analog signal;

s 2a

first internal filter output signal. Preferably, each coefficient monitoring subdevice ( KUE ) a first internal filter output signal when the coefficient monitoring sub-device ( KUE ) in the form of 52 is realized. The first filter output is used in the example of 52 by filtering the first filter input signal ( s 1a ) in the first internal filter ( F1 ) generated;

S2a

first sub-signal of the second analog signal ( S2 );

S2am

first sub-signal of the second buffered signal ( S2m );

s2b

second internal filter output. Preferably, each coefficient monitoring subdevice ( KUE ) a second internal filter output signal when the coefficient monitoring subdevice ( KUE ) in the form of 52 is realized. The second filter output is used in the example of 52 by filtering the second filter input signal ( s1b ) in the second internal filter ( F2 ) generated.

S2b

second sub-signal of the second analog signal ( S2 );

S2bm

second sub-signal of the second buffered signal ( S2m );

S 2 c

third partial signal of the second analog signal ( S2 );

S2cLC

third partial signal of the second analog signal ( S2 ) upon demolition of the transducer capacity ( C _TR ) (disturbed third partial signal of the second analog signal ( S2 ));

S2m

second buffered signal;

S3

third analogue signal;

S3 '

amplified third analogue signal;

s3a

first internal coefficient signal. Preferably, each coefficient monitoring subdevice ( KUE ) first internal coefficient signal when the coefficient monitoring sub-device ( KUE ) in the form of 52 is realized. The first internal sample-and-hold unit ( S & H_Ca ) forms the first internal coefficient signal by sampling the first internal filter output signal ( s 2a ) at the end of one or more complete periods T the signal to be analyzed ( ZA ). This sampling is preferably carried out only in the transmission phase ( SP ) or at selected time periods within the transmission phase ( SP =. The control of the sampling is preferably carried out by the digital signal generation unit ( DSO ).

s3b

second internal coefficient signal. Preferably, each coefficient monitoring subdevice ( KUE ) second internal coefficient signal when the coefficient monitoring sub-device ( KUE ) in the form of 52 is realized. The second internal sample-and-hold unit ( S & H_Cb ) forms the first internal coefficient signal by sampling the second internal filter output ( s2b ) at the end of one or more complete periods T the signal to be analyzed ( ZA ). This sampling is preferably carried out only in the transmission phase ( SP ) or at selected time periods within the transmission phase ( SP ). The control of the sampling is preferably carried out by the digital signal generation unit ( DSO );

S3a

first sub-signal of the third analog signal ( S3 );

S3am

first sub-signal of the third buffered signal ( s3m );

s3b

second partial signal of the third analog signal ( S3 );

S3bm

second sub-signal of the third buffered signal ( s3m );

s3m

third buffered signal;

S3T

third analog test signal;

S3ta

first sub-signal of the third analog test signal;

S3tb

second sub-signal of the third analog test signal;

S4

fourth analog signal;

S5

fifth digital signal;

S5t

fifth digital test signal;

S6

sixth digital signal;

S7

seventh response signal;

SBA

first symmetry tester;

SPB

second symmetry tester;

SP

Transmission phase;

SS

Sensor system;

T

Clock period;

TR

Sensor sub-device, in particular an ultrasonic transducer;

TRi

internal ultrasonic transducer;

UEB

Exchangers;

v_x

internal comparison signal. Preferably, coefficient monitoring subdevice ( KUE ) an internal comparison signal ( v_x ) when the coefficient monitoring subdevices ( KUE ) in the form of 52 will be realized. In particular, it may be based on the 53 to comparison signals with the reference numerals v15 . v16 . v17 . v18 and v19 act for simplification in the 53 not output signals of the corresponding coefficient monitoring sub-apparatuses with the reference numerals KUE2a . KUE2b . KUE2c . KUE3a and KUE3b are. The respective internal comparator ( C_X ) of the respective coefficient monitoring subdevice ( KUE ) compares the level of the respective angle signal ( sα ) with the internal reference value ( Ref_X ) of the corresponding coefficient monitoring subdevice ( KUE ) (see also 52 ). For the internal reference value ( Ref_X ) It can be related to the 53 in particular by reference values with the reference numerals Ref15 . Ref16 , Ref17, Ref18 and Ref19, which are to simplify matters in the 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b should be located. They therefore constitute the internal reference value ( Ref_X ) the respective coefficient monitoring subdevice ( KUE Depending on the result of this comparison, the internal comparator ( C_X ) the internal comparison result signal ( v_x ). In the internal comparison result signal ( v_x ). can it be relative to the 53 in particular to comparison result signals with the reference numerals v15 . v16 . v17 , v18 and v19, those within the corresponding coefficient monitoring sub-apparatuses denoted by the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b be formed. Preferably, the control device ( CTR ) and / or the digital input circuit ( DSI ) the internal comparison result signal ( v_x ) and possibly generate an error message;

v_Y

second internal comparison signal. Preferably, coefficient monitoring subdevice ( KUE ) a second internal comparison signal ( v_Y ) when the coefficient monitoring subdevices ( KUE ) in the form of 54 . 55 or 56 will be realized. In particular, it may be based on the 53 to act comparison signals that simplify in the 53 not output signals of the corresponding coefficient monitoring sub-apparatuses with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b are. The respective second internal comparator ( C_Y ) of the respective coefficient monitoring subdevice ( KUE ) compares the level of the first internal coefficient signal ( s3a ) with the second internal reference value ( Ref_Y ) of the corresponding coefficient monitoring subdevice ( KUE ) (see also 54 . 55 or 56 ). For the second internal reference value ( Ref_Y ) It can be related to the 53 In particular, reference values should be used for simplification purposes 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. They therefore provide the second internal reference value ( Ref_Y ) of the respective coefficient monitoring subdevice ( KUE Depending on the result of this comparison, the second internal comparator ( C_Y ) the second internal comparison result signal ( v_Y ). For the second internal comparison result signals ( v_Y ) It can be related to the 53 in particular to compare result signals, which for simplicity in the 53 are not shown and within the corresponding coefficient monitoring subdevices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b be formed. Preferably, the control device ( CTR ) and / or the digital input circuit ( DSI ) the second internal comparison result signals ( v_Y ) and possibly generate corresponding error messages;

V_Z

third internal comparison signal. Preferably, coefficient monitoring subdevice ( KUE ) a third internal comparison signal ( V_Z ) when the coefficient monitoring subdevices ( KUE ) in the form of 54 . 55 or 56 will be realized. In particular, it may be based on the 53 to act comparison signals that simplify in the 53 not output signals of the corresponding coefficient monitoring sub-apparatuses with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b are. The respective third internal comparator ( C_Z ) of the respective coefficient monitoring subdevice ( KUE ) compares the level of the second internal coefficient signal ( s3b ) with the third internal reference value ( REF_Z ) of the corresponding coefficient monitoring subdevice ( KUE ) (see also 54 . 55 or 56 ). For the third internal reference value ( REF_Z ) It can be related to the 53 In particular, reference values should be used for simplification purposes 53 are not shown and within the corresponding coefficient monitoring sub-devices with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b can be located. They therefore constitute the third internal reference value ( REF_Z ) of the respective coefficient monitoring subdevice ( KUE Depending on the result of this comparison, the third internal comparator ( C_Z ) the third internal comparison result signal ( V_Z ). For the third internal comparison result signals ( V_Z ) It can be related to the 53 in particular to compare result signals, which for simplicity in the 53 are not shown and within the corresponding coefficient monitoring sub-apparatuses with the reference numerals KUE2a , KUE2b, KUE2c . KUE3a and KUE3b be formed. Preferably, the control device ( CTR ) and / or the digital input circuit ( DSI ) the third internal comparison result signals ( V_Z ) and possibly generate corresponding error messages;

v1

first comparison result signal. In the example of 3 the first comparison result signal represents the result of the comparison between the value of the first difference signal ( d1 ) and the first reference value ( Ref 1 ). The comparison can be made without or with regard to the sign. Preferably, a pure absolute comparison thus a comparison of the absolute values;

v2

second comparison result signal. In the example of 3 the second comparison result signal represents the result of the comparison between the value of the first partial signal ( S3a ) of the third analog signal ( S3 ) and the second reference value ( Ref2 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v3

third comparison result signal. In the example of 3 the third comparison result signal represents the result of the comparison between the value of the second partial signal ( s3b ) of the third analog signal ( S3 ) and the second reference value ( Ref2 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v4

fourth comparison result signal. In the example of 4 the fourth comparison result signal represents the result of the comparison between the value of the second partial signal ( S2b ) of the second analog signal ( S2 ) and the fourth reference value ( Ref4 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v5

fifth comparison result signal. In the example of 4 the fifth comparison result signal represents the result of the comparison between the value of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the fifth reference value ( ref5 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v6

sixth comparison result signal. In the example of 4 the sixth comparison result signal represents the result of the comparison between the value of the first partial signal ( S2a ) of the second analog signal ( S2 ) and the sixth reference value ( ref6 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v10

tenth comparison result signal. In the example of 8th the tenth comparison result signal represents the result of the comparison between the value of the second difference signal ( d2 ) and the seventh reference value ( ref7 ) by the tenth comparator ( C10 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v11

eleventh comparison result signal. In the example of 8th the eleventh comparison result signal represents the result of the comparison between the value of the third difference signal ( d3 ) and the eighth reference value ( Ref8 ) by the eleventh comparator ( C11 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v12

twelfth comparison result signal. In the example of 8th the twelfth comparison result signal represents the result of the comparison between the value of the fourth difference signal ( d4 ) and the ninth reference value ( Ref9 ) through the twelfth comparator ( C12 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v13

thirteenth comparison result signal. In the example of 50 the thirteenth comparison result signal represents the result of the comparison between the value of the integrated sixth difference signal ( D6i ) and the thirteenth reference value ( Ref13 ) through the thirteenth comparator ( C13 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v14

fourteenth comparison result signal. In the example of 49 the fourteenth comparison result signal represents the result of the comparison between the value of the integrated fifth difference signal ( D5I ) and the fourteenth reference value ( Ref14 ) by the fourteenth comparator ( C14 ). The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v15

fifteenth comparison result signal. In the example of 53 the fifteenth comparison result signal preferably represents the result of the comparison between the determined angle (eg arctan (α)) of the two coefficients of the first partial signal ( S3a ) of the third analog signal ( S3 ) and the fifteenth reference value ( Ref15 ) by the fifteenth comparator ( C15 ), preferably within the coefficient monitoring subdevice ( KUE3a ) for the first sub-signal ( S3a ) of the third analog signal ( S3 ) is located. The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values.

v16

sixteenth comparison result signal. In the example of 53 the sixteenth comparison result signal preferably represents the result of the comparison between the determined angle (eg arctan (α)) of the two coefficients of the second partial signal ( s3b ) of the third analog signal ( S3 ) and the sixteenth reference value ( Ref16 ) by the sixteenth comparator ( C16 ), preferably within the coefficient monitoring subdevice ( KUE3b ) for the second sub-signal ( s3b ) of the third analog signal ( S3 ) is located. The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v17

seventeenth comparison result signal. In the example of 53 the seventeenth comparison result signal preferably represents the result of the comparison between the determined angle (eg arctan (α)) of the two coefficients of the first part signal ( S2a ) of the second analog signal ( S2 ) and the seventeenth reference value ( Ref17 ) by the seventeenth comparator ( C17 ), preferably within the coefficient monitoring subdevice ( KUE2a ) for the first sub-signal ( S2a ) of the second analog signal ( S2 ) is located. The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v18

eighteenth comparison result signal. In the example of 53 the eighteenth comparison result signal preferably represents the result of the comparison between the determined angle (eg arctan (α)) of the two coefficients of the second partial signal ( S2b ) of the second analog signal ( S2 ) and the eighteenth reference value ( Ref18 ) through the eighteenth comparator ( C18 ), preferably within the coefficient monitoring subdevice ( KUE2b ) for the second sub-signal ( S2b ) of the second analog signal ( S2 ) is located. The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

v19

Nineteenth comparison result signal. In the example of 53 the nineteenth comparison result signal preferably represents the result of the comparison between the determined angle (eg arctan (α)) of the two coefficients of the third partial signal ( S 2 c ) of the second analog signal ( S2 ) and the nineteenth reference value ( Ref19 ) by the nineteenth comparator ( C19 ), preferably within the coefficient monitoring subdevice ( KUE2c ) for the third sub-signal ( S 2 c ) of the second analog signal ( S2 ) is located. The comparison can be made without or with regard to the sign. Preferably, a purely absolute comparison is thus a comparison of the absolute values;

Z1

first time;

Z2

second time;

z1

first time for storing the coefficients determined;

z2

second time for storing the coefficients determined;

z3

third time for storing the coefficients determined;

z4

fourth time for storing the coefficients determined;

ZA

by the relevant coefficient monitoring subdevice ( KUE ) signal to be analyzed. This may be, for example, one of the following signals with the following reference numerals: S2a, S2b, S2c, S3a, S3b. Other internal symmetric signals can thus also be monitored;

zn

nth time for storing the coefficients determined;

Claims (1)

Self-standing ultrasonic sensor system (SS) - with an ultrasonic transducer (TR) and - with a transformer (UEB) and - with a first sub-signal (S2a) of a second analog signal (S2) and - with a second sub-signal (S2b) of the second analog signal ( S2) and - with a first partial signal (S3a) of a third analog signal (S3) and - with a second partial signal (S3b) of the third analog signal (S3) and - wherein the temporal operation of the ultrasonic measuring system (SS) at least one transmission phase (SP ) - wherein the first sub-signal (S2a) of the second analog signal (S2) is connected to a first primary-side terminal of the transformer (UEB) and - wherein the second sub-signal (S2b) of the second analog signal (S2) with a second primary-side Connection of the transmitter (UEB) is connected and - wherein the first part signal (S3a) of the third analog signal (S3) with a first secondary-side terminal of the transformer (UEB) and with a first Ans the second sub-signal (S3b) of the third analog signal (S3) is connected to a second secondary-side terminal of the transformer (UEB) and to a second terminal of the ultrasound transducer (TR), and wherein the Topology of the circuit network of the ultrasonic transducer (TR) and the transmitter (UEB) and the characteristics of these components and their control are selected so that during normal operation of a transmission phase (SP), the first part signal (S2a) of the second analog signal (S2) a by 180 ° +/- 10 ° phase-shifted second partial signal (S2b) of the second analog signal (S2) corresponds to an amplitude deviation of less than 10% and • that during normal operation of a transmission phase (SP), the first part signal (S3a) of the third analog signal (S3) a phase-shifted by 180 ° +/- 10 ° second partial signal (S2b) of the second analog signal (S2) with an amplitude deviation of less than 10% ent speaks, and - wherein at least these sub-signals (S2a, S2b, S3a, S3b) have a common periodicity with the period T in the transmission phase (SP) and - wherein the ultrasonic sensor device (SS) has at least one coefficient monitoring subdevice (KUE), which is used as the signal to be analyzed ( ZA) monitors at least a sub-signal of these sub-signals (S2a, S2b, S3a, S3b) to the minimum amplitude of a fundamental or harmonic wave and an associated comparison result signal (v15, v16, v17, v18, v19) as a comparison result signal (v_X) forms and • the a first sub-device (M1, s1a, F1, s2a, S & H_Ca) of the coefficient monitoring subdevice (KUE) comprising a scalar product in the form of a first internal coefficient signal (s3a) of a first analysis signal (A_a) and the signal (ZA) to be analyzed is one of the sub-signals (S2a, S2b, S3a, S3b) forms, and - wherein the first analysis signal (A_a) the same period (T) as the signal to be analyzed (ZA), the one of the sub-signals (S2a, S2b, S3a, S3b) is, and - wherein in normal operation in the transmitting phase (SP) a second internal comparator (C_Y) compares the first internal coefficient signal (s3a) with a second internal reference value (Ref_Y) and - wherein the second internal comparator (C_Y) forms a second internal comparison signal (v_Y) depending on the result of this comparison.

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