DE102015108721A1 - Examination method and examination device for a semiconductor element - Google Patents

Abstract

An inspection method for a semiconductor element includes the steps of: applying (S101) a voltage to the semiconductor element; Causing (S102) an electrical conduction state of the semiconductor element for a first predetermined time period to allow a short-circuit current to flow in the semiconductor element due to the application of the voltage; Continuing (S103) the application of the voltage to the semiconductor element for a second predetermined period of time from one end of the first predetermined time period and measuring the leakage current flowing in the semiconductor element; and finding (S105, S106) a short-circuiting capacity of the semiconductor element based on the leakage current. The first predetermined time period is set as a period in which the semiconductor element is not destroyed by the short-circuit current, and the second predetermined time period is set as a period in which the semiconductor element is not destroyed by the leakage current.

Description

Background of the invention

Field of the invention

The present invention relates to an inspection of a semiconductor element, in particular, an inspection method and an inspection device for the short-circuit capacity of a semiconductor element used as a power device.

Description of the Prior Art

A "short-circuit capacity" is one of the parameters that indicate performance limits of semiconductor devices, such as. Of transistors used as power devices (hereinafter also referred to as "transistors"). The short-circuit capacitance is determined by a maximum short-circuit duration in which the transistor can spontaneously return to an interruption state without being destroyed when the transistor is brought into the short-circuited state.

The short-circuit capacity can be determined by measuring the maximum short-circuit duration which causes no destruction, in the following manner (test for destruction): a short-circuit current is allowed to flow in the transistor for a predetermined period of time; the transistor is brought into the interruption state, and it is confirmed that it is not destroyed; the predetermined period is gradually lengthened to repeat the test; and the test continues until the transistor is destroyed during the short circuit or after the break.

In this case, however, to measure the short-circuit capacity under various conditions, the test for destruction must be performed for at least as many transistors as there are number of conditions, resulting in an increase in time, effort, and cost. If the short-circuit capacity is measured by considering variations, then the test for destruction must be performed many times, resulting in a further increase in time, cost and cost.

Japanese Patent Laid-Open Publication JP 2009-069 058 A discloses a method for examining the short-circuit capacitance without destroying the transistor. For this method, based on the difference in voltage between a gate threshold voltage before heat generation and a gate threshold voltage after heat generation, it is determined whether or not the transistor is the short-circuit capacity examination.

Summary of the invention

The method disclosed in Japanese Patent Laid-Open Publication JP 2009-069 058 A is based on the assumption that there is a correlation between the short-circuit capacitance and the fluctuation of the gate threshold voltage. However, in the method, the determination as to whether or not to pass may be made erroneously (a wrong determination may be made) even if the assumption is correct. For example, if the variation of the transistors is large, then it is most likely that a wrong determination is made.

This is because, in the method, the size of the short-circuit capacity is not directly measured, and the determination of whether or not the short-circuit capacity test is passed is made on the basis of a factor different from the short-circuit capacity. Accordingly, the short-circuit capacity can not be precisely measured by the method.

The present invention has been conceived to solve the above problems. The present invention has an object to precisely measure the short-circuiting capacity without destroying the semiconductor element.

An inspection method for a semiconductor element according to the present invention comprises the steps of: applying a voltage to the semiconductor element; Providing an electrical conduction state of the semiconductor element for a first predetermined period of time to allow a short circuit current to flow in the semiconductor element due to the application of the voltage; Continuing to apply the voltage to the semiconductor element for a second predetermined period of time from one end of the first predetermined time period and measuring the leakage current flowing in the semiconductor element; and determining a short-circuit capacitance of the semiconductor element based on the leakage current.

The first predetermined period of time is set as a period in which the semiconductor element is not destroyed by the short-circuit current. The second predetermined time period is set as a period in which the semiconductor element is not destroyed by the leakage current.

In the inspection method of the semiconductor element, the semiconductor element is electrically conductive during the first one predetermined period of time to allow the short-circuit current flows. Here, the first predetermined period is set as a period in which the semiconductor element is not destroyed even when the short-circuit current flows. Therefore, the semiconductor element is not destroyed by the short-circuit current.

After the first predetermined period of time has ended and the short-circuit current no longer flows, the leakage current can flow in the semiconductor element. According to the inspection method described above, the short-circuiting capacity of the semiconductor element is found based on the leakage current by measuring the leakage current flowing in the semiconductor element during the second predetermined time period.

Here, the second predetermined period is set as a period in which the semiconductor element is not destroyed by the leakage current, and then the application of the voltage to the semiconductor element is interrupted. Therefore, the semiconductor element is not destroyed by the leakage current. A method of finding the short-circuit capacity based on the leakage current will be described in detail in the embodiments.

An inspection apparatus for a semiconductor element according to the present invention is configured such that the inspection apparatus inspects the semiconductor element by causing a control unit to perform the inspection method described above.

According to the present invention, the short-circuit capacity can be measured without destroying the semiconductor element.

The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.

Brief description of the drawings

In the drawings show:

1 an inspection method and apparatus for a semiconductor element according to an embodiment of the present invention.

2 a flowchart illustrating a process that is performed in the inspection of the semiconductor element.

3 an example of the current in the semiconductor element according to the flowchart in 2 flows.

4 an example of the inspection device for finding the maximum short-circuit duration.

5 a flowchart for illustrating a process, the of the examination device according to 4 is carried out.

6 an example of the current, which according to the flowchart in 5 is measured.

Description of the Preferred Embodiments

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. It should be noted that the same or corresponding parts of the drawings are assigned the same reference numerals, and that they will not be repeatedly described unless otherwise specified.

1 FIG. 12 illustrates an inspection method and apparatus for a semiconductor element according to the embodiment. FIG. With reference to 1 becomes a semiconductor element 1 by means of an examination device 20 according to the embodiment examined.

The semiconductor element 1 is a power device. In the in 1 The example shown is the semiconductor element 1 as an IGBT (Insulated Gate Bipolar Transistor), but the type of the semiconductor element is not limited thereto. As a semiconductor element 1 For example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) may also be used.

The examination device 20 has a switch 2 , a voltage source 3 , a current sensor 4 and a control unit 5 on.

The desk 2 is between the semiconductor element 1 and the voltage source 3 intended. The desk 2 interrupts the voltage applied to the semiconductor element 1 is applied, and the current flowing to the semiconductor element 1 flows. For example, if the switch 2 is brought into the ON state, then a voltage from the voltage source 3 to the semiconductor element 1 created (created between its emitter and its collector).

When the switch 2 is brought into the non-conducting state (OFF), then the application of the voltage from the voltage source 3 to the Semiconductor element 1 interrupted. It should be noted that in the in 1 shown example of the switch 2 shown as an IGBT; the type of switch 2 but is not limited to this. As a switch 2 For example, a MOSFET can also be used.

The voltage source 3 are z. B. a high DC voltage of about 1200 V from. The positive electrode side of the power source 3 is connected to the collector of the semiconductor element 1 over the switch 2 connected. The negative electrode side of the power source 3 is with the emitter of the semiconductor element 1 connected. It should be noted that in the in 1 shown example, the side of the negative electrode of the voltage source 3 and the emitter of the semiconductor element 1 each connected to earth.

The current sensor 4 is arranged so as to be capable of measuring the current flowing in the semiconductor element 1 flows. The position of the current sensor 4 is not particularly limited. In the in 1 The example shown is the current sensor 4 in a path between the emitter of the semiconductor element 1 and the negative electrode side of the power source 3 intended.

The control unit 5 controls each element in the examination device 20 is included. The control may be performed using a control signal that is unidirectional from the control unit 5 is transmitted to each element, or it may be made using a communication signal bidirectionally between the control unit 5 and transmitted to each element.

Further, the control unit controls 5 the semiconductor element 1 to the semiconductor element 1 in the ON state and the OFF state. In the in 1 The example shown has the semiconductor element 1 a control port (gate) connected to the control unit 5 connected is.

If, for example, the control unit 5 a high voltage control signal to the control terminal of the semiconductor element 1 transmits, then becomes the semiconductor element 1 switched on. When the control unit 5 a control signal at low voltage to the control terminal of the semiconductor element 1 transmits, then becomes the semiconductor element 1 switched off. It should be noted that the control unit 5 detailed below with reference to 4 is explained.

2 FIG. 10 is a flowchart illustrating a process involved in inspecting the semiconductor element. FIG 1 ( 1 ) is carried out. The process of this flowchart is performed by the control unit 5 according to 1 carried out.

With reference to 1 and 2 the following applies: The control unit 5 applies the voltage to the semiconductor element 1 in step S101 (hereinafter, "step S" will also be referred to simply as "S"). In particular, the switch 2 from the control unit 5 switched on, and a voltage (high voltage) from the voltage source 3 is applied to the semiconductor element 1 created.

In step S102, the control unit stops 5 the semiconductor element 1 in the on state (in the conducting state) for a first predetermined period of time to allow the short-circuit current in the semiconductor element 1 flows. In particular, the semiconductor element becomes 1 from the control unit 5 turned on, and the current (here: the short-circuit current) flows in the semiconductor element 1 due to the application of the voltage from the voltage source 3 , This first predetermined period of time is set as a period in which the semiconductor element 1 not destroyed by the short-circuit current.

Such a period can z. On the basis of design data, experimental data or the like of the semiconductor element 1 be set. In particular - as with reference to 5 The first predetermined period of time is initially set as a sufficiently short period of time, and then it is gradually updated to become a longer period of time. It should be noted that the short-circuit current using the current sensor 4 can be measured.

When the first predetermined period of time has ended, then the control unit switches 5 the semiconductor element 1 from (brings the semiconductor element 1 in the non-conductive state), so that causes no short-circuit current in the semiconductor element 1 flows. On the other hand, the semiconductor element becomes 1 continuously with the voltage from the voltage source 3 applied. Accordingly, a leakage current in the semiconductor element 1 flow.

In step S103, the control unit measures 5 the leakage current for the second predetermined time period. In particular, that of the current sensor 4 Measured current is considered as the leakage current. This measurement has a measurement of the change in the leakage current (wave) over time.

In step S104, the control unit ends 5 the application of the voltage to the semiconductor element 1 , In particular, the control unit switches 5 the switch 2 out. Thereby it interrupts the application of the voltage from the voltage source 3 to the semiconductor element 1 , As a result, no leakage current flows. Here, the second predetermined period is set as a period in which the semiconductor element is not destroyed by the leakage current, so that the semiconductor element 1 not destroyed as a result of the divergence of the leakage current.

In step S105, the control unit finds 5 a vertex and a turning point of the leakage current. In particular, the control unit analyzes 5 the wave of the measured leakage current (the leakage current wave). Thereby it finds the vertex and the turning point of the leakage current. The vertex is such a point that the value obtained by the first-order derivative of the leakage current wave over time becomes zero. The inflection point is such a point that the value obtained by the second-order derivative of the leakage current wave over time becomes zero.

For example, if the leakage current wave is obtained as discrete data, the vertex may be found to be such a point that the value of change of the leakage current wave per unit time is minimum, and the inflection point may be found as such a point that the Value of the change of the leakage current wave per unit time in the value of the change of the leakage current wave per unit time is minimum.

In step S106, the control unit finds 5 a short circuit capacity based on the vertex and inflection point. The short-circuit capacity is provided by the control unit 5 found. A method of determining the short-circuiting capacity will be described in detail below.

According to the flowchart in FIG 2 the short-circuit current flows in the semiconductor element 1 only during the first predetermined period (S102). Although the short-circuit current flows here, the semiconductor element becomes 1 not destroyed within the first predetermined time period. In addition, the leakage current flows only during the second predetermined period (S104).

Although the leakage current flows here, the semiconductor element becomes 1 not destroyed within the second predetermined time period. In the second predetermined time period, the leakage current is measured (S103). On the basis of this leakage current, the short-circuiting capacity of the semiconductor element becomes 1 found out (S105 and S106).

The following describes the relationship between the leakage current and the short-circuit capacity.

3 illustrates an example of the current flowing in the semiconductor element 1 in the flowchart according to 2 flows. The horizontal axis of 3 represents the time, and the vertical axis represents (the size of) a stream (s). 3 shows four curves, which changes the current according to the turn-on of the various semiconductor elements 1 with the reference numbers "I1", "I2", "I3" and "I4" assigned to each of the curves. It should be noted that for the purpose of simplifying the description in 3 it is shown that t50 for each case shows a timing at which the semiconductor element 1 is off.

With reference to 1 and 3 The following applies: The short-circuit currents start to flow in the curves I4, I3, I2 and I1 at the times t10, t20, t30 and t40. At time t50, no short-circuit currents flow. The period of time (hereinafter referred to as "short-circuit duration") in which the short-circuit current flows in the curve I4 is a period (for example, 25 μs) from the time t10 to the time t50.

The short-circuit duration in the curve I3 is a period of time (eg 24 μs) from the time t20 to the time t50. The short-circuit duration in the curve I2 is a period of time (eg 23 μs) from the time t30 to the time t50. The short-circuit duration in the curve I1 is a period of time (eg 20 μs) from the time t40 to the time t50. Consequently, the short-circuit duration in the curve I4 is the longest, and the short-circuit duration in the curve I1 is the shortest.

It should be noted that each of the times t10, t20, t30 and t40 of the 3 corresponds to the start time of the first predetermined period, and that the time t50 corresponds to the end time of the first predetermined period.

If the short-circuit current does not flow at time t50, the leakage current starts in the semiconductor element 1 to flow. Although the leakage current is sufficiently smaller than the short circuit current, it should be noted that the ratio between the short circuit current and the leakage current in 3 is shown in different scales to simplify the description. It should also be noted that partly different scales are also used for the time axis.

The leakage current may be convergent or divergent. In the in 3 In the example shown, the leakage current in each of the curves I3 and I4 is divergent while the leakage current in each of the curves I1 and I2 is convergent.

Specifically, in each of the curves I3 and I4, the leakage current continuously increases (it increases monotonously) after time t50. In the Curve I4, the leakage current increases abruptly (it diverges) at time t60. In curve I3, the leakage current diverges at time t70. In the embodiment. In each of the curves I3 and I4, the leakage current diverges in a manner referred to as "abnormal break mode (break mode)". In the abnormal break mode (break mode), a very large current flows in the semiconductor element 1 , due to the divergence of the leakage current, with the result that the semiconductor element 1 can be destroyed by the leakage current.

On the other hand, in each of the curves I1 and I2, after the time t50, the leakage current is initially increased, and it is then decreased to approach zero (that it converges to zero). In the embodiment, the leakage current in each of the curves I1 and I2 converges in a manner called "normal interruption mode". In the normal interrupt mode, the leakage current converges, with the result that the semiconductor element 1 is not destroyed by the leakage current.

These modes are different from each other due to the generation of the leakage current. After the interruption of the short-circuit current, the leakage current is generated due to charge carriers that are thermally excited by the heat from the short-circuit current. The semiconductor element has a high resistance during the cut-off state, but it is fed with the high voltage, so that the leakage current flows due to the thermally excited carriers. Since the leakage current flows in the high-resistance semiconductor element due to the high voltage, this leakage current is also a larger factor for the generation of heat. Consequently, it causes a recursive. Effect of the repeated generation of thermally excited charge carriers.

If the short circuit duration is sufficiently short, then the amount of thermally excited carriers generated from the short circuit current is sufficiently small, the leakage current is also small, and the amount of heat generated by the leakage current is also small, with the result that the amount of thermally excited charge carriers, which are recursively generated, also become small. This ultimately results in a convergence of the leakage current to zero.

In this case, the waveform of the leakage current immediately after the short circuit increases, then it has a vertex, then it decreases, then it has a turning point to turn from the bell-shaped curve (curve with decreasing slope) in the V-shaped Curve (curve with increasing slope) to change, and finally it comes in contact with the axis of the current of zero. This is the normal interrupt mode.

On the other hand, if the short-circuit duration is equal to or longer than a certain threshold, then the leakage current becomes large because the amount of the thermally-excited carrier generated by the short-circuit current is large. As a result, a larger amount of thermally excited charge carriers is generated as a result of the heat generated by the leakage current.

The recursive effect is divergent in this case, and the leakage current and the generation of heat increase continuously without decreasing. In this case, the waveform of the leakage current represents a bell-shaped curve with a very slow slope rate immediately after the short circuit, but it has a turning point without having a vertex, and it is changed to a V-shaped curve, with the result that the Rate of increase also begins to increase to result in an abrupt increase in leakage current.

If the power supply is not interrupted without taking a countermeasure, the property of the breakdown voltage of the semiconductor is lost when the leakage current and the generation of heat become equal to or larger than certain limit values, with the result that the semiconductor element becomes one has low resistance to allow the current to flow unhindered. As a result, the semiconductor element is destroyed instantly. This is the abnormal interruption mode.

Here is in each of the curves that in 3 are shown, the vertex is displayed with a mark in the form of a black triangle, and the turning point is indicated with a mark in the form of a black circle.

In normal interrupt mode (I1 and I2), both the vertex (triangle mark) and the inflection point (circle mark) appear. The turning point appears after the vertex. That is, the vertex appears first.

As the short-circuit duration is longer, the period (delay time) from the appearance of the vertex until the point of inflection appears becomes shorter. In other words, since the short-circuit duration is longer, the vertex and the inflection point approach each other on the time axis. Further, since the short-circuit duration is longer, the timing at which the vertex appears is delayed.

In particular, in the comparison between the curves I1 and I2, the short-circuit duration (times t30 to t50) in the curve I2 is longer than the short-circuit duration (times t40 to t50) in the curve I1. The delay period (times t56 to t58) in The curve I2 is shorter than the delay period (times t55 to t67) in the curve I1. The vertex in curve I2 appears after the vertex in curve I1.

Consequently, the positional relationship between the vertex and the inflection point on the time axis is changed according to the short-circuit duration (the first predetermined period). Further, since the short-circuit duration is longer, the leakage current becomes larger. In particular, in comparison between the curves I1 and I2, the leakage current in the curve I2 is greater than the leakage current in the curve I1.

Specific examples of the numerical value of the duration in 3 are as follows. The short-circuit duration (times t10 to t50) in the curve I4 is for example 25 μs. The short-circuit duration (times t20 to t50) in the curve I3 is for example 24 μs. The short-circuit duration (times t30 to t50) in the curve I2 is for example 23 μs.

The short-circuit duration (times t40 to t50) in the curve I1 is, for example, 20 μs. The time t60 at which the leakage current diverges in the curve I4, z. For example, the time point after the lapse of 100 μs from the time t50 at which the short-circuit current starts does not flow (i.e., since the end of the first predetermined period).

The time t70 at which the leakage current diverges in the curve I3 is, for example, the time after the elapse of 300 μs from the time t50. The time t55 at which the vertex appears in the curve I1 is, for example, the time after the elapse of 20 μs from the time t50. The time t67 at which the inflection point appears in the curve I1 is, for example, the time after the elapse of 200 μs from the time t50.

In the normal interrupt mode, as indicated by the curves I1 and I2, the vertex appears first. This is a feature of the normal interrupt mode. Only on the basis of the fact that the vertex has occurred can it be determined that the mode is the normal interrupt mode without checking the distance of the inflection point which appears on the time axis after the vertex.

In contrast, in the abnormal interruption mode (the breakage mode), as indicated by the curves I3 and I4, no vertex appears, and only the inflection point appears. That is, the turning point appears first. This is a feature of the abnormal interrupt mode. Since the vertex can not appear after the inflection point, it can be immediately determined that the mode is the abnormal pause mode when the inflection point first appears.

Here, in the normal interrupt mode, as the short-circuit duration becomes longer, the vertex approaches closer to the inflection point, so that, for example, when the short-circuit duration is made longer than the short-circuit duration in the curve I2, the vertex and the inflection point become closer to each other finally, with respect to their position, with the result that the vertex disappears and only the turning point appears.

That is, the turning point appears first. This means a transition from the normal interrupt mode to the abnormal interrupt mode. Consequently, the longest short-circuit duration (the maximum short-circuit duration) allowed in the normal interrupt mode is represented by the short-circuit duration just before the vertex and the inflection point match, causing the vertex to disappear and the inflection point to appear first.

Here, the short-circuiting capacity of the semiconductor element becomes 1 ( 1 ) is determined by the maximum short-circuit duration in which the semiconductor element 1 not destroyed. That is, the short-circuit capacity corresponds to the maximum short-circuit duration. Thus, the short-circuit capacity can be quantitatively measured by estimating the maximum short-circuit duration based on which of vertex and inflection point appears first.

4 illustrates an example of an examination device for finding the maximum short-circuit duration. With reference to 4 The following applies: The examination device 20A has a switch 2A on, a voltage source 3 , a current sensor 4A and a control system 5A , The voltage source 3 referring to 1 has not been described repeatedly.

The nominal current value of the switch 2A ie the value of the current in the switch 2A in the normal state instead of in the short circuit state, is selected to be larger than the maximum value of the short-circuit current of the semiconductor element 1 , During the electrical conduction state of the semiconductor element 1 by the short circuit, ie while both the switch 2A , as well as the semiconductor element 1 are turned on, therefore, substantially all of the high voltage from the voltage source 3 to the semiconductor element 1 while essentially no high voltage to the switch 2A is created.

This is due to the following reason: The rated current of the switch 2A is greater than the maximum value of the short-circuit current of the semiconductor element 1 , and therefore the switch is located 2A in the normal conduction state and not in the short-circuit state. Consequently, the switch has 2A only a resistance value of at most a few mΩ during this electrical conduction state, whereas the semiconductor element 1 is in the short circuit state and serves to limit the current flow and has a resistance of a few ohms.

As a result, the measurement error of the thus provided switch 2A caused, not larger than 1/1000, which is negligible. It should be noted that, to indicate this conceptually, in 4 the desk 2A is shown larger than the semiconductor element 1 ,

The type of current sensor 4A is not particularly limited. 4 shows a type of current sensor that is always located in a path. Examples of the current sensor 4A may have a type of current sensor having an opening / closing mechanism and being arranged in the path at an appropriate time, such as, e.g. B. a current sensor of the terminal type.

The control system 5A has a calculation unit 6 , Driver circuits 7 and 8th , a signal generator 9 and an oscilloscope 10 on. The control system 5A serves as a control unit for an assay device 20A ,

For example, the calculation unit 6 a processor, such as. As a CPU (a central processing unit) and a memory element such. B. on a memory, both of which are not shown. A program for the operation of the calculation unit 6 and the like may be stored in the memory. As calculation unit 6 can z. As a general-purpose computer (PC) can be used. It should be noted that the calculation unit 6 can be implemented using dedicated hardware.

The calculation unit 6 controls each of the elements in the control system 5A are included. The control may be performed using a control signal, and may be performed using a communication signal.

The driver circuit 7 receives from the signal generator 9 a signal for controlling a semiconductor element 1 , and she drives the semiconductor element 1 , Accordingly, the on / off state of the semiconductor element becomes 1 controlled. The driver circuit 7 For example, sets a pulse voltage to the control terminal of the semiconductor element 1 at. As a result, it switches the semiconductor element 1 for the length of the pulse width. By using the driver circuit 7 may be a high-speed control of the semiconductor element 1 be achieved.

The driver circuit 8th receives from the signal generator 9 a signal to control the switch 2A and she drives the switch 2A , As a result, turning on / off the switch becomes 2A controlled. By using the driver circuit 8th can be a high-speed control of the switch 2A be achieved.

The signal generator 9 generates signals for controlling the semiconductor element 1 and the switch 2A , and transmits them to the driver circuits 7 and 8th , The signal generator 9 can independently generate the signal corresponding to the driver circuit 7 is transmitted, and the signal sent to the driver circuit 8th is transmitted. Accordingly, the control of the semiconductor element 1 and the control of the switch 2A be carried out independently.

The oscilloscope 10 takes a reading from the current sensor 4A , For example, at the time (the end time of the first predetermined period) at which the short-circuit current of the semiconductor element becomes 1 does not start to flow, the oscilloscope 10 triggered so that it can be used as current waveform data z. B. a change in the measured value of the current sensor 4A holds in the course of time. The oscilloscope 10 transmits the current waveform data to the calculation unit 6 , The oscilloscope 10 can also display the current waveform.

The calculation unit 6 analyzes the current waveform data and calculates the inflection point and the vertex. The calculation unit 6 calculates the short-circuit capacity of the semiconductor element 1 based on the inflection point / vertex found by the analysis of the stream waveform data.

With the above configuration, the assay device 20A the short-circuit capacity of the semiconductor element 1 measure and the semiconductor element 1 investigate. The investigation has z. For example, the following operations (a) to (f) occur.

(a) high voltage application

This process is used to turn on the switch 2A and applying high voltage from the voltage source 3 to the semiconductor element 1 ,

(b) Short circuit switching

This process serves to the semiconductor element 1 to turn on only for the short-circuit duration Ts and to allow the short-circuit current to flow. The short-circuit duration Ts corresponds to the length of the first predetermined period. For example, a pulse voltage having a pulse width corresponding to the short-circuit duration Ts is applied to the control terminal of the semiconductor element 1 applied as a control signal.

It should be noted that when the first predetermined period of time has ended, the semiconductor element 1 is turned off. As a result, the short-circuit current does not flow, whereas the leakage current flows in the semiconductor element 1 begins to flow. The leakage current is using the current sensor 4A measured.

(c) high voltage interruption

This process serves to apply high voltage from the voltage source 3 to the semiconductor element 1 to interrupt (stop). In particular, the switch 2A turned off when the interruption period Tx from the turning off of the semiconductor element 1 expires (the end of the first predetermined period). The interruption period Tx corresponds to the length of the second predetermined period of time.

With this process of high voltage interruption, the leakage current is immediately interrupted (for example, within 0.1 μs). Even if the mode is the abnormal interruption mode (curves I1 and I2 of FIG 3 ), the leakage current is interrupted before it diverges. Therefore, it can be prevented that the semiconductor element 1 is destroyed by the divergence of the leakage current.

(d) Obtain the leakage current waveform

This operation serves to obtain the current waveform (the leakage current waveform) measured in the second predetermined time period. In particular, the measured values of the leakage current using the current sensor 4A is measured as leakage current waveform data from the oscilloscope 10 measured. In addition, the leakage current waveform data is sent to the calculation unit 6 transfer.

(e) Current Waveform Analysis

This operation is to find the vertex and inflection point of the leakage current waveform. For example, the vertex and inflection point of the calculation unit 6 found on the basis of the leakage current waveform data.

(f) Measurement of short-circuit capacity

This process serves to quantitatively calculate the short-circuit capacity. The short-circuit capacity is z. From the calculation unit 6 determined, based on the positional relationship between the vertex and the inflection point.

5 FIG. 11 is a flow chart illustrating a process performed by the assay device. FIG 290A from 4 is carried out. The process of this flow chart is z. From the control system 5A according to 4 carried out.

With reference to 4 and 5 the following applies: First, the control system initializes in step S201 5A an inspection condition of the semiconductor element 1 (It initially sets it), ie, a condition for measuring the short-circuiting capacity of the semiconductor element 1 ,

This initial setting has z. For example, settings of the test voltage Vcc, the measurement interval Tw, the interruption duration Tx, the interruption period increment Txe, the interruption time upper limit value Txm, the short-circuit duration Ts, the short-circuit duration increment Tse, and the short-circuit duration upper limit value Tsm.

The test voltage Vcc is the output voltage of the voltage source 3 , The test voltage Vcc is z. B. set to 1200V.

The measuring interval Tw is set as a standby period (a waiting period) when the measuring process is executed in a loop. The measuring interval Tw is z. B. set to 10 s.

The interruption period Tx is z. B. set to 60 μs.

The interruption duration increment Txe is the minimum unit for increasing the interruption time Tx. The interruption duration increment Txe is z. B. set to 20 μs.

The upper limit value Txm of the interruption period is the upper limit value of the interruption period Tx. Txm is z. B. set to 160 μs.

The short-circuit duration Ts is z. B. set to 5 μs.

The short-circuit duration increment Tse is the minimum unit for increasing the short-circuit time Ts. The short-circuit duration increment Tse is e.g. B. set to 1 μs. The short-circuit duration increment Tse determines the resolution (measurement accuracy) of the short-circuit capacity measurement. If z. For example, if the short-circuit duration increment Tse is set to 1 μs, the short-circuit capacity can be measured with an accuracy of 1 μs.

The upper limit value Tsm of the short-circuit duration is the upper limit of the short-circuit duration Ts. B. set to 40 μs.

In step S202, the control system switches 5A the high voltage source. In particular, there is the voltage source 3 the test voltage Vcc off.

In step S203, the control system sets 5A set the number n of pulse width settings to 1. The number n of pulse width settings represents the number of times the short-circuit duration Ts is set (updated), including the initial setting (S201).

In step S204, the control system performs 5A the process (a) of the high voltage application described above.

In step S205, the control system performs 5A the process (b) of the short circuit switching described above.

In step S206, the control system executes 5A the process (c) of the high voltage interruption described above.

In step S207, the control system performs 5A the process (d) of obtaining the leakage current waveform described above.

In step S208, the control system performs 5A the process (e) of the current waveform analysis described above.

In step S209, the control system performs 5A the operation (f) of the short-circuit capacity measurement described above. More precisely, it drives the control system 5A with the processing in step S210.

In step S210, the control system determines 5A Whether or not there is a time (a vertex position) Tpn at which a vertex appears in the leakage current waveform. If there is a vertex position Tpn (YES in step S210), then the control system moves 5A with the processing in step S211. Otherwise (NO in step S210), the control system moves 5A with the processing in step S220.

In step S211, the control system determines 5A whether or not the number n of pulse width settings has a value of 1. If the number n of pulse width settings has a value of 1 (YES in step S211), then the control system runs 5A with the processing in step S212. Otherwise (NO in step S211), the control system moves 5A with the processing in step S215.

In step S212, the control system sets 5A the interruption period Tx to a value that is greater than Tpn, z. For example, to a value twice the size of Tpn. Tpn represents a period from the time of the end of the short-circuiting operation (S205) to the vertex position Tpn. For example, when Tpn 20 μs, then the interruption period Tx is set to 40 μs.

By updating the interruption period Tx in step S212, the second predetermined period is set appropriately. More specifically, the interruption period Tx is set to a value greater than the vertex position Tpn that was initially measured (with n = 1). Accordingly, even if the short-circuit duration Ts is updated (lengthened) by a subsequent process and the vertex position Tpn appears in a delayed manner (see the curves I1 and I2 in FIG 3 ), then the vertex position Tpn is included in the second predetermined period so that the vertex position Tpn can be measured.

Further, the second predetermined period of time does not become unnecessarily long, and the leakage current may be interrupted before the divergence of the leakage current, even if the leakage current may diverge in the abnormal break mode (in the break mode). In other words, in step S212, the second predetermined period is set as a period in which the semiconductor element 1 not destroyed by the leakage current.

In step S213, the control system determines 5A whether or not the interruption period Tx is greater than the upper limit value Txm of the interruption period. If Tx is larger than Txm (YES in step S213), then the control system goes 5A with the processing in step S214. Otherwise (NO in step S213), the control system moves 5A with the processing in step S215.

In step S214, the control system 5A the interruption period Tx to an upper limit value Txm of the interruption period. Accordingly, the interruption period Tx updated in step S212 can be prevented from becoming too large. Then the control system drives 5A with the processing in step S215.

In step S215, the control system increases 5A the short-circuit duration Ts by the short-circuit duration increment Tse.

In step S216, the control system determines 5A Whether or not the short-circuit duration Ts is greater than the short-circuit duration upper limit value Tsm. If Ts is larger than Tsm (YES in step S216), then the control system goes 5A with the processing in step S217. Otherwise (NO in step S216), the control system moves 5A with the processing in step S218.

In step S217, the control system determines 5A in that the short-circuit capacity is too large (the short-circuit capacity is excessively large) and can not be measured, and therefore measurement of the short-circuit capacity fails. This is because the mode is the normal interrupt mode in which the vertex position appears regardless of the short-circuiting time Ts exceeding the upper limit. Then the control system drives 5A with the processing in step S228.

In step S218, the control system performs 5A a standby process during the measuring interval Tw through. This readiness process is the semiconductor element 1 self-cooled (self-cooled). Accordingly, the temperature state of the semiconductor element 1 be reset. Then the control system drives 5A with the processing in step S219.

In step S219, the control system increases 5A This is because the number n of pulse width settings represents the number of updates of the short-circuit duration Ts as described above, and the short-circuit period Ts has previously been updated in step S215. Then the control system leaves 5A the processing returns to step S204 again.

In step S220, the control system determines 5A whether or not a turning point exists. If there is a turning point (YES in step S220), then the control system moves 5A with the processing in step S221. Otherwise (NO in step S220), the control system moves 5A with the processing in step S224.

In step S221, the control system determines 5A whether or not the number n of pulse width settings has a value of 1. If n is 1, then the examination condition is in the initial setting state, and the short-circuiting duration Ts is set to the initial value (eg, 5 μs), which is the shortest period.

In turn, if n is not equal to 1, then the short-circuit duration Ts has been updated by the process of S215 and has therefore become greater than the initial value. If n is 1 (YES in step S221), then the control system goes 5A with the processing in step S222. Otherwise (NO in step S221), the control system moves 5A with the processing in step S223.

In step S222, the control system determines 5A in that the short-circuit capacity is too small (the short-circuit capacity is excessively small) and can not be measured, and therefore measurement of the short-circuit capacity fails. This is because, although the number n of pulse width settings is 1, that is, the initial value at which the short-circuiting time Ts is the shortest, the mode is the abnormal interruption mode (the breakage mode) in which only the inflection point appears. Then the control system drives 5A with the processing in step S228.

In step S223, the control system calculates 5A as the short-circuiting capacity, a period (preliminarily updating the short-circuit duration (Ts-Tse)) obtained by reducing the instantaneous short-circuiting duration Ts by the short-circuit duration incrementing Tse. This is because at the instantaneous short-circuit time Ts, the mode is in the abnormal break mode (in the break mode), but the mode was in the normal break mode in the advance update of the short-circuit duration (Ts-Tse), so that the advance update the short-circuit duration corresponds to the short-circuit duration just before the vertex and the inflection point correspond to each other and the vertex disappears (the vertex and the inflection point overlap each other).

If the short-circuit capacity is calculated in this way, then the control system determines 5A in that the measurement of the short-circuit capacity has been successful. Then the control system drives 5A with the processing in step S228.

In step S224, the control system increases 5A the interruption period Tx by the increment Txe. This is done because there is no vertex and no turning point and therefore the Interruption period Tx (ie the second pre-determined period) is assumed to be too short. This is the case because if the measurement is performed again with unchanged short-circuit duration Ts and extended interruption time Tx, then the vertex or inflection point appears within the short-circuit duration Tx, so that it may be possible to determine whether the short-circuit duration Ts is normal Interrupt mode or in abnormal interrupt mode.

In other words, unless the vertex or inflection point appears, it is impossible to determine whether this short-circuit duration Ts is in the normal interrupt mode or in the abnormal interrupt mode. If the vertex appears first, then it can be determined that the short-circuit duration Ts is in the normal interrupt mode, whereas when the inflection point first appears, it can be determined that the short-circuit time Ts is in the abnormal interrupt mode.

Also, Txe should not be set to be too big. If this short circuit duration Ts is in the abnormal cutoff mode, then the updated cutoff duration Tx (i.e., the second predetermined time period) may abruptly exceed the time at which the leakage current diverges (the element is destroyed). However, if Txe is too small, then the number of measurements is unnecessarily increased, so that a suitable value should be chosen which is suitable for an element.

In step S225, the control system determines 5A whether or not the interruption period Tx is greater than the interruption duration upper limit value Txm. If Tx is larger than Txm (YES in step S225), then the control system goes 5A with the processing in step S226. Otherwise (NO in step S225), the control system moves 5A with the processing in step S227.

In step S226, since the peak and inflection point of the leakage current can not be confirmed (the leakage current does not converge) up to the upper limit value Txm of the interruption period, the control system determines 5A that the short-circuit capacity can not be measured, and the short-circuit capacity measurement fails.

This is for the following reason: If both the vertex and the inflection point do not appear up to the upper limit value Txm of the interruption period, it is impossible to determine whether this short-circuit period Ts is in the normal interrupt mode or the abnormal interrupt mode, and it is impossible to extend the interruption period Tx infinitely (since the measurement times for the devices are limited). Then the control system drives 5A with the processing in step S228.

In step S227, the control system performs 5A as in step S218, a standby process during the measurement interval Tw. Then, the processing returns to step S204 again.

In step S228, the control system switches 5A the high voltage source. More precisely: the voltage source 3 terminates the output of the test voltage Vcc. After the process of S228 has been performed, the process of the flowchart ends.

6 FIG. 4 illustrates an example of the flow shown in FIG 5 is measured. 6 shows curves "I3A", "I2A" and "I1A", which respectively show the changes of the current when the process according to the flowchart in FIG 5 in the case of the short-circuit durations for the curves I3, I2 and I1 in FIG 3 (ie for the times t20 to t50, the times t30 to t50 and the times t40 to t50),

With reference to 5 and 6 represents z. For example, curve I1A represents the current flowing in the first pass of the loop in the flowchart of FIG 5 to be measured. More specifically, the short-circuit duration Ts is set by the process in step S201 (times t40 to t50), and the interruption period Tx is set by the process in step S212 (times t50 to t69). In the curve I1A, the vertex appears first. Therefore, the curve I1A represents the normal interruption mode. If the vertex appears, then it can be determined that the mode is in the normal interruption mode without confirming the position of the inflection point existing after the vertex.

If the process in the flowchart according to 5 is repeated, then, for example, the current is measured, which is represented by the curve I2A. Through the process of S215, the short-circuiting duration Ts (times t30 to t50) in the curve I2A is set to be longer than the short-circuiting time Ts (times t40 to t50) in the curve I1A. In addition, by the process of S212, the interruption period Tx (times t50 to t59) in the curve I2A is set to be twice the vertex position in the curve I1A.

In the curve I2A also the vertex appears first. In the curve I2A, the inflection point does not appear until the interruption time Tx, but the vertex appears to be determined may be that the mode is the normal interrupt mode. Therefore, the curve I2A represents the normal interruption mode.

If the process in the flowchart of 5 is repeated, then, for example, the current is measured, which is represented by the curve I3A. In the curve I3A, the vertex does not appear until the interruption time Tx, and only the inflection point appears. That is, the turning point appears first. Therefore, the curve I3A represents the abnormal break mode (break mode).

A shift from the normal interrupt mode to the abnormal break mode (the break mode) is confirmed between the curve I2A and the curve I3A, so that the short-circuit capacity is measured by the process of S223. More specifically, a period from time t30 to time t50 in FIG 6 is measured as short-circuit capacity.

According to the flowchart in FIG 5 For example, the short-circuit duration Ts is changed from the process of S215 to update the first predetermined time period. In addition, the following is repeatedly performed until the vertex and the inflection point correspond to each other (overlap) on the time axis (or until the transition from the normal interrupt mode to the abnormal interrupt mode (in the break mode) has been confirmed): The process (S204) the application of the voltage to the semiconductor element 1 , the processes (S205) of providing an electric line of the semiconductor element 1 and measuring the leakage current, the process (S206) of stopping the application of the voltage, the process (S208) of finding the vertex and the inflection point, and the process (S215) of updating the first predetermined period.

Then, the first predetermined period immediately before the first predetermined period is updated to the period in which the vertex and the inflection point correspond to each other on the time axis (overlap each other) is found as a short-circuiting capacity (S223).

Consequently, the short-circuiting capacity of the semiconductor element 1 be measured. The accuracy of the short-circuit capacity to be measured is determined by the short-circuit duration increment Tse (S201, S215). Therefore, by reducing the short-circuit duration increment Tse, the measurement accuracy of the short-circuit capacity can be improved.

As described above, in the embodiment, the short-circuiting capacity of the semiconductor element used as the power device can be automatically measured in a non-destructive manner. Consequently, the short-circuit capacity of the same semiconductor element can be precisely (accurately) measured many times. Accordingly, z. B. the short-circuit capacitance of all mass-produced semiconductor elements are measured, with certain products can be examined. This guarantees precise short-circuit capacities for individual products.

With the investigation for all the semiconductor elements, defective products can be excluded, and the rest can be ranked based on their short-circuit capacities for the purpose of sale.

The short circuit capacities of a small number of samples at the development stage can be repeatedly measured under different conditions. The results of the measurement can be transmitted to the product development as useful knowledge.

Product design does not require an unnecessarily large margin for short-circuit capacity. As a result, semiconductor elements having a minimum short-circuit capacity can be designed and produced, saving resources and reducing costs. It should be noted that the margin here z. B. is set to the operating time of a protection circuit which is used in the semiconductor element (for example, a circuit for interrupting the short-circuit current).

It should be noted that specific numerical values are exemplary only in terms of the test voltage Vcc, the initial value of the short-circuit duration Ts, the short-circuit duration increment Tse, the short-circuit duration upper limit value Tsm, the measurement interval Tw (the cooling time of the semiconductor element), and The like, which in the embodiment with reference to the flowchart in 5 are illustrated.

These parameters are appropriately set to various values depending on the semiconductor elements for each of which the short-circuit capacity is measured. For example, if the rated voltage, the rated current, and the like of the semiconductor elements differ, then the parameters can also be set to different values.

A correlation between the short-circuit duration Ts and the measurement interval Tw can be provided, which represents the cooling period of the semiconductor element. If, for example, the Short-circuit duration Ts is extended, then the measuring interval Tw is extended. In this way, even if the short-circuit duration Ts is prolonged to cause a larger amount of heat to be generated from the semiconductor element, the semiconductor element is sufficiently cooled since the measurement interval Tw is lengthened. In turn, since the amount of heat generated by the semiconductor element is small before the short-circuit duration Ts is lengthened, the measuring interval Tw is short. As a result, the total measuring time (examination time) is reduced.

In the embodiment (for example, in the flowchart of FIG 5 A process may be included to vary the magnitude of the test voltage Vcc and repeatedly measure the short-circuit capacity. As a result, short-circuit capacities under various test voltages can be automatically measured.

Similarly, a process may be included to increase the size of the gate drive voltage (the voltage applied to the control terminal of the semiconductor element 1 from the driver circuit 7 of the 4 is applied) and repeatedly measure the short-circuit capacity. Accordingly, short circuit capacities under different gate drive voltages can be automatically measured.

Alternatively, a process may be included to change the ambient temperature (the temperature of the environment in which the semiconductor element 1 is arranged) and repeatedly measures the short-circuit capacity. Accordingly, short-circuit capacities under different ambient temperatures can be automatically measured.

For example, in the arrangement in 4 the ambient temperature can be changed by the semiconductor element 1 is arranged in a constant-temperature furnace, which is not shown in the drawings, and by the examination device 20A is adjusted so that the control system 5A (or the calculation unit 6 ) controls the constant-temperature oven.

Although the present invention has been described and illustrated in detail, it should be understood that this is provided by way of illustration and example only, and not by way of limitation. The scope of the present invention should be interpreted in accordance with the language of the appended claims.

LIST OF REFERENCE NUMBERS

1

Semiconductor element

2

switch

2A

switch

3

voltage source

4

current sensor

4A

current sensor

5

control unit

5A

control system

6

calculation unit

7

driver circuit

8th

driver circuit

9

signal generator

10

oscilloscope

20

inspection device

20A

inspection device

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• JP 2009-069058A [0005, 0006]

Claims (4)

Investigation method for a semiconductor element, comprising the following steps: - applying (S101) a voltage to the semiconductor element; - causing (S102) an electrical conduction state of the semiconductor element for a first predetermined period of time to allow a short-circuit current to flow in the semiconductor element due to the application of the voltage; - continuing (S103) the application of the voltage for a second predetermined period of time from one end of the first predetermined time period and measuring the leakage current flowing in the semiconductor element; and Finding (S105, S106) a short-circuiting capacity of the semiconductor element based on the leakage current, - wherein the first predetermined period of time is set as a period in which the semiconductor element is not destroyed by the short-circuit current, and - Wherein the second predetermined period is set as a period in which the semiconductor element is not destroyed by the leakage current. The semiconductor element inspection method according to claim 1, wherein the step of finding (S105, S106) the short-circuit capacitance of the semiconductor element based on the leakage current comprises the steps of: - finding (S105) a vertex and a turning point of the leakage current during a change over time; and Finding (S106) the short-circuit capacity based on the vertex and the inflection point. The semiconductor element inspection method according to claim 2, wherein a positional relationship between the vertex and the inflection point on the time axis is changed depending on the first predetermined period, and wherein the inspection method for the semiconductor element comprises the steps of: - updating (S215) the first predetermined time period; - terminating (S206) the application of the voltage when the second predetermined period has ended; and - repeating (S216, S225) until the inflection point corresponds to the vertex or appears before the vertex on the time axis, the step of applying (S204) the voltage, the step of providing (S205) the electrical conduction state of the semiconductor element, the step of measuring (S205) the leakage current, the step of terminating (S206) the application of the voltage, the step of finding (S208) the vertex and the inflection point, and the step of updating (S215), wherein in the step of finding (S208) the short-circuit capacity based on the vertex and the inflection point, the first predetermined period just before the first predetermined period is updated by the step of updating (S215) to a period in which the inflection point is the vertex corresponds to or appears before the vertex on the time axis, as short-circuit capacity is found. An inspection device for a semiconductor element, wherein the inspection device inspects the semiconductor element by causing a control unit to perform the inspection process for the semiconductor element according to any one of claims 1 to 3.

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