DE102014210529A1 - Method for operating a control unit - Google Patents

Abstract

The invention relates to a method for operating a control unit (100) for controlling a machine (130) and / or installation having a multicore processor (101) with at least two processor cores (102), wherein a first number (110) of processor cores (102 ) of the multicore processor (101) is associated with one or more real time capable first operating systems, wherein a second number (120) of processor cores (102) of the multicore processor (101) is associated with one or more second operating systems, wherein individual ones of the processor cores of the second Number (120) of processor cores (101) are operated in a power-saving mode as needed and wherein all processor cores of the first number (110) of processor cores are always actively operated and are not operated in a power-saving mode.

Description

The present invention relates to a method for operating a control unit for controlling a machine and / or system as well as a corresponding control unit.

State of the art

Modern control units or control devices such as a computerized numerical control (CNC), motion control (MC) logic or programmable logic controller (PLC) usually comprise a processor unit. Such a processor unit may comprise a suitable processor core or a multi-core processor. Multicore processors include multiple (at least two) processor cores. A processor core comprises an arithmetic logic unit (ALU), which represents the actual electronic arithmetic unit for performing arithmetic operations (e.g., processes, tasks, applications, programs, etc.), and also a local memory. Such a local memory is designed in particular as a register set of one or more registers.

Modern multicore processors can be operated in a so-called hypervisor mode. It can be set up and executed by a hypervisor several separate operating systems in a multicore processor. Individual cores of this multicore processor can be assigned to each of the operating systems. A respective operating system can execute different arithmetic operations on the processor cores assigned to it.

Control units such as CNC, MC or PLC with such multi-core processors are becoming increasingly important in automation technology, such as factory automation and process automation, and may be used to control machinery or equipment such as machine tools, printing machines or the like.

Such control units for controlling machines or systems are usually real-time systems. Real-time systems are characterized by performing computational operations such that a real-time condition is satisfied, i. E. that a result of an arithmetic operation is guaranteed calculated within a defined time interval, ie before a certain time limit exists. On a multicore processor of such a real-time system, one or more real-time operating systems are usually executed. Such a real-time operating system controls the different arithmetic operations and executes them in real time.

In a conventional multicore processor, which is not implemented in a real-time system, power management can be implemented to power the multicore processor. Individual processor cores of the multicore processor can be deactivated and reactivated at a later time.

However, such energy management does not lend itself to a multicore processor in a real-time system. If individual processor cores are deactivated as part of such energy management, it is no longer possible to guarantee that a real-time condition is fulfilled when performing arithmetic operations. Switching off processor cores in the course of such an energy management can lead to errors, damage or failure of the industrial machinery or plant. Furthermore, a security risk and a risk for both the industrial machinery or plant as well as for users or workers are considerably increased.

It is therefore desirable to provide a way to operate a multi-core processor of a control unit for controlling machinery or equipment energy-saving and yet to ensure safe control of the machinery or equipment.

Disclosure of the invention

According to the invention, a method for operating a control unit for controlling a machine and / or installation and a corresponding control unit with the features of the independent claims are proposed. Advantageous embodiments are the subject of the dependent claims and the following description.

The control unit comprises a multicore processor with at least two processor cores. At least two different operating systems are set up in the control unit and are executed. A first operating system is a real-time operating system or a real-time operating system (RTOS). In particular, a second operating system is a general purpose operating system (GPOS). This second operating system is in particular not real-time capable in terms of automation technology.

From the real-time operating system, arithmetic operation (eg, process, tasks, applications, etc.) may be performed such that a real-time condition is met. These arithmetic operations are guaranteed to be completed by the real-time capable operating system within a predetermined, defined time interval. One The result of this calculation operation is guaranteed to be calculated within this defined time interval and is therefore present before a certain time limit. Furthermore, a determinism or predictability of the arithmetic operations is given.

In particular, the real-time operating system complies with the Standard DIN 44300 defined real-time condition. Accordingly, in particular, programs for processing accumulating data are always operational, such that the results of these processes are available within a predetermined period of time. Depending on the application, the data may be generated randomly or at predetermined times.

The processor cores of the multicore processor are divided into at least two groups. A first group comprises a first number of processor cores, a second group comprises a second number of processor cores. Each of these two groups includes at least one processor core. This first number of processor cores is associated with the real-time operating system. The real-time capable operating system can execute arithmetic operations in real time on this first number of processor cores. The second number of processor cores is associated with the second operating system.

According to the invention, individual ones of the processor cores of the second number of processor cores are operated in an energy-saving mode as needed. In the course of such an energy-saving mode, the corresponding processor core is in particular switched off or put into an energy-saving operating mode and is furthermore in particular deactivated or inactive. The corresponding processor core does not execute any arithmetic operations in the energy-saving mode and in particular is not supplied with energy or only reduced. If necessary, processor cores are re-enabled from sleep mode and run normally again. By contrast, all processor cores of the first number of processor cores are always actively operated and are not operated in an energy-saving mode at any time. In particular, these processor cores are always operated when the control unit is operated.

By "on-demand" as used herein is meant that one or more of the processor cores are transitioned to and operating in the power-saving mode when little or no computational operations are performed by those processor cores and / or when those processor cores are not executing all of the second Operating system to be performed arithmetic operations. In particular, arithmetic operations assigned to a particular processor core may be assigned to and executed by another processor core, and that particular processor core may be put into power saving mode.

In addition to the first real-time-capable operating system, other real-time-capable operating systems in particular can also be executed in the control unit and, in addition to the second operating system, it is also possible to execute further non-real-time operating systems. In particular, the processor cores are subdivided into multiple groups with a respective number of processor cores. Each operating system is assigned a corresponding appropriate number of processor cores.

The control unit is a real-time system and is particularly suitable for controlling or regulating safety-critical applications of the machine or system, since it is guaranteed by the real-time systems that a result of an arithmetic operation is calculated within a defined time interval or a process within the defined time interval is performed. In particular, arithmetic operations which are involved in the secure operation of the machine or system are executed in the course of the method according to the invention by the real-time-capable operating system on the first number of processor cores.

Advantages of the invention

By the invention, an energy-saving operation of the control unit can be made possible and yet it can be ensured that the control unit is a real-time system and can perform arithmetic operations in real time. The invention reduces the energy required to operate the control unit. Thus, costs for the operation of the control unit and for the operation of the plant or machine can be reduced. A low-energy, environmentally friendly operation of the control unit is made possible. Nevertheless, the real-time capability of the control unit is ensured. This ensures that the machine or system is safely and optimally controlled by the control unit.

Furthermore, the invention reduces a number of components required for the control unit. In particular, the invention requires fewer or at least smaller cooling mechanisms (eg heat sinks, fans, etc.) for the control unit. For the control unit less maintenance-intensive, moving components are needed. A housing of the control unit can be reduced or reduced. A space requirement of the control unit, in particular a cabinet space requirement, is thus reduced. Furthermore, thus also the Reduced manufacturing costs for the control unit. Maintenance intervals can be increased and a lifetime of the control unit and the entire machine or system is increased.

The first group and thus the first number of processor cores are reserved in particular for arithmetic operations which have to be performed in real time. The first number of processor cores is operated permanently active for this purpose and therefore ensures a real-time capability of the control unit. The second group, and thus the second number of processor cores, is used in particular for all arithmetic operations which need not be performed in real time. Thus, there is no danger to the machine or system when operating these processor cores in the power saving mode.

Resources of the processor cores associated with the second operating system are used as energy efficiently as possible. In particular, an energy management is implemented in the second operating system. In the course of this energy management, it is determined which of the processor cores are transferred to the energy-saving mode at which times and reactivated again therefrom. In particular, an energy consumption of the second operating system or of the arithmetic operations to be carried out by the second operating system is determined. In particular, future energy consumption is extrapolated. Depending on this particular extrapolated power consumption, it is determined which processor cores are operated in the power saving mode.

Not all the processor cores of the multicore processor need to be permanently operated by the invention. Individual processor cores can be operated in the energy-saving mode without causing any errors, damage or failure of the machine or system. Thus, an energy management can be realized in the control unit, without there being a safety risk and a threat to the machine or plant or for users or workers.

In particular, the corresponding processor cores can be manually transferred, for example by a user or corresponding user inputs, into the energy-saving mode and reactivated again therefrom. Alternatively or additionally, this can also be done automatically in particular. In particular, it can be automatically determined which processor cores are deactivated or reactivated at which times in order to manage the resources of the multicore processor in the best possible most efficient manner and to save as much energy as possible.

The control unit is preferably designed as a computerized numerical control (CNC), motion control (MC) logic or programmable logic controller (PLC). More preferably, the control unit is used in the course of automation technology, factory automation, process automation and / or medical technology. Preferably, the controlled by the control unit machine or system is designed as a machine tool or a printing, packaging or milling machine.

The control unit will preferably be used to control a motor vehicle. For example, the control unit may control an internal combustion engine, an antilock brake system or an airbag of the motor vehicle. For example, the defined time interval within which arithmetic operations are performed in real time may be defined for the antilock brake system by a time in which brakes must be opened so that the wheel will not stall. For controlling the airbag, the control unit can process measured values from sensors within the defined time interval and decide whether and how strongly the airbag is triggered. For the engine control, for example, injection quantities and injection times are calculated within the defined time interval.

Preferably, an active-powered processor core of the second number of processor cores is transferred to and operated in the power-saving mode when an energy-saving condition is met. Such an energy-saving condition is fulfilled, for example, if no computing operations are performed by the corresponding processor core over a specific time interval. Another energy saving condition is, for example, when fewer than a certain maximum number of arithmetic operations are performed by the processor core. In this case, the processor core is put into power-saving mode, and these arithmetic operations are assigned to and continued by other processor cores. Furthermore, it can be checked as an energy-saving condition how many of the second number of processor cores are required to execute all the arithmetic operations to be performed by the second operating system. All processor cores that are not needed will be put into energy saving mode.

More preferably, a processor core of the second number of processor cores, which is operated in the energy-saving mode, is reactivated from this again and actively operated when this processor core fulfills a reactivation condition. A processor core is reactivated in particular by a wake-up command from the energy-saving mode. Such a reactivation condition is fulfilled in particular if the computing power of the active Processor cores is not sufficient to perform all of the second operating system to perform arithmetic operations.

Advantageously, the real-time operating system and the second operating system are set up and operated by a hypervisor in the control unit or in the multicore processor. In particular, the processor cores are assigned to the different operating systems by this hypervisor. In particular, the hypervisor performs the power management of the control unit. In particular, the hypervisor transfers corresponding processor cores into the energy-saving mode and reactivates processor cores.

Preferably, the control unit is set up so that individual ones of the processor cores can be assigned externally, in particular by user input, to the first and / or the second number of processor cores or that the first number and / or the second number of processor cores can be selected externally. In particular, this selection or assignment is performed by a user. For this purpose, a suitable software for configuring and / or visualizing the processor cores of the multicore processor is preferably executed, in particular a suitable configuration and / or visualization tool. With this software, the individual processor cores can be visualized to a user on a screen and the user can use the software to configure and / or monitor the individual processor cores. The software may be executed on the control unit or on a computing unit connected to the control unit (e.g., PC, laptop). In particular, the hypervisor is configured and / or monitored with this software. In particular, individual ones of the processor cores are associated with the software of the first and second numbers, respectively, and the hypervisor is thus configured. The hypervisor then executes the power management of the control unit and, in particular, puts corresponding processor cores into the power saving mode and reactivates processor cores. These processes are visualized by the software and can be monitored by a user.

Preferably, a plurality of the processor cores of the first number of processor cores have a common memory area. These processor cores use a so-called "shared memory" technology. The common memory area is in particular a cache memory ("shared cache"). The individual processor cores can access this common memory area comparatively quickly. Such a shared memory area further improves the real-time behavior of these processor cores or the real-time operating system.

An arithmetic unit according to the invention, e.g. a control unit of a tool, printing, packaging or milling machine is, in particular programmatically, adapted to carry out a method according to the invention.

Also, the implementation of the invention in the form of software is advantageous because this allows very low cost, especially if an executing processing unit is still used for other tasks and therefore already exists. Suitable data carriers for providing the computer program are, in particular, floppy disks, hard disks, flash memories, EEPROMs, CD-ROMs, DVDs and the like. It is also possible to download a program via computer networks (Internet, intranet, etc.).

Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawings.

It is understood that the features mentioned above and those yet to be explained below can be used not only in the particular combination indicated, but also in other combinations or in isolation, without departing from the scope of the present invention.

The invention is illustrated schematically by means of exemplary embodiments in the drawing and will be described in detail below with reference to the drawing.

figure description

1 schematically shows a preferred embodiment of a control unit according to the invention.

2 shows a preferred embodiment of a method according to the invention schematically as a block diagram.

Detailed description of the drawing

In 1 a preferred embodiment of a control unit according to the invention is shown schematically and with 100 designated. The control unit 100 controls an industrial machine in this particular example 130 , For example, a machine tool.

The control unit 100 is designed as a programmable logic controller PLC. The PLC 100 is used in the course of automation technology, in particular process automation. The PLC 100 controls the machine tool 130 in such a way that by the machine tool 130 workpieces are machined automatically.

The PLC 100 includes a multicore processor 101 , This multicore processor 101 includes a variety of processor cores 102 (16 processor cores in this example). The processor cores 102 are divided into two groups in this example. A first group 110 includes a first number of processor cores 102 (four cores in this example), a second group 120 includes a second number of processor cores 102 (in this example, twelve processor cores).

The PLC 100 is configured to perform a preferred embodiment of a method according to the invention, which schematically in 2 as a block diagram 200 is shown.

In particular, in the SPS 100 implemented a hypervisor, which is adapted to carry out the method according to the invention. This hypervisor can be designed as a separate hardware element, for example an additional arithmetic unit, which is connected to the multicore processor 101 or as software used by the multicore processor 101 is performed.

With the PLC 100 is still a screen or monitor 140 connected. In the example shown is on the PLC 100 a configuration and visualization tool is executed. With this configuration and visualization tool, the hypervisor can be configured and monitored by a user. A user interface 141 the configuration and visualization tool will be on the screen 140 shown. In particular, this interface is about this 141 the multicore processor 101 with the processor cores 102 visualized.

In step 201 the hypervisor shares the processor cores 102 autonomous in the two groups 110 and 120 one. Alternatively, the processor cores 102 also externally in the two groups 110 and 120 to be grouped. For this purpose, a user can perform this classification using the configuration and visualization tool and thus configure the hypervisor. The hypervisor targets in each of the two groups 110 and 120 one operating system each. The four processor cores of the first group 110 are assigned to a real-time capable operating system, the twelve processor cores of the second group 120 are assigned to a non-real-time, general-purpose operating system.

In step 202 becomes the multicore processor 101 operated by the hypervisor in a regular operating mode. There are all processor cores 102 of the multicore processor 101 active. From the general-purpose operating system, arithmetic operations on the twelve processor cores of the second group 120 be executed. From the real-time operating system, arithmetic operations which must be performed in real time are performed on the four processor cores of the first group 110 executed.

In step 203 The hypervisor checks to see if processor cores of the second group 120 fulfill an energy saving condition. In particular, the hypervisor checks whether on individual the processor cores of the second group 120 no arithmetic operations are performed.

Is this for one or more particular processor cores of the second group 120 In this case, the hypervisor moves this processor core or cores in step 204 in a power saving mode. The corresponding processor core or cores will be deactivated. The deactivation of this processor core is on the user interface 141 of the configuration and visualization tool is displayed accordingly and in particular logged. Such logging is particularly optional and can be switched off.

Alternatively or additionally, the hypervisor may have individual processor cores of the multicore processor 101 also configure such that these processor cores of the second group 120 be transferred autonomously into an energy-saving mode by processor-internal processes, without explicit intervention of the hypervisor.

Furthermore, individual processor cores of the second group 120 can also be transferred externally into energy-saving mode without the intervention of the hypervisor. In particular, a user can select via the configuration and visualization tool whether one of the processor cores of the second group 120 is transferred to the energy-saving mode.

In step 205 the hypervisor checks if a reactivation condition is met. In particular, the hypervisor checks whether the computing power of the remaining actively operated processor cores of the second group 120 is no longer sufficient to execute all the arithmetic operations to be performed by the general-purpose operating system. Alternatively or additionally, the multicore processor 101 Also check autonomously whether for appropriately configured processor cores of the multicore processor 101 a reactivation condition is met.

If a reactivation condition is met, the hypervisor sends in step 206 A wake-up command to the processor core, which is operated in the power saving mode, and reactivated. In the case of an autonomous reactivation by the appropriately configured multicore processor 101 This reactivation is logged in particular in the configuration and visualization tool. The reactivation of this processor core will be on the user interface 141 of the configuration and visualization tool.

The four processor cores of the first group 110 however, are always actively operated and operated at no time in the energy-saving mode. Thus, a real-time capability of the PLC 100 guaranteed.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited non-patent literature

• Standard DIN 44300 [0012]

Claims (14)

Method for operating a control unit ( 100 ) for controlling a machine ( 130 ) and / or installation with a multicore processor ( 101 ) with at least two processor cores ( 102 ), - where a first number ( 110 ) of processor cores ( 102 ) of the multicore processor ( 101 ) is assigned to a real-time capable first operating system, - wherein a second number ( 120 ) of processor cores ( 102 ) of the multicore processor ( 101 ) is assigned to a second operating system, - wherein individual of the processor cores of the second number ( 120 ) of processor cores ( 101 ) are operated in a power-saving mode when needed ( 204 ) and - all processor cores of the first number ( 110 ) are always actively operated by processor cores and are not operated in a power saving mode. The method of claim 1, wherein of the real-time capable first operating system in the processor cores of the first number ( 110 ) of processor cores ( 102 ) Computing operations are performed in real time. Method according to claim 1 or 2, wherein an actively operated processor core of the second number ( 120 ) of processor cores ( 102 ) is put into the energy saving mode when an energy saving condition is satisfied ( 203 ). Method according to one of the preceding claims, wherein a processor core of the second number ( 120 ) of processor cores ( 102 ) operated in the energy-saving mode is reactivated and actively operated when a reactivation condition is met ( 205 ).  Method according to one of the preceding claims, wherein the real-time capable first operating system and the second operating system are operated by a hypervisor. Method according to one of the preceding claims, wherein individual ones of the at least two processor cores ( 102 ) external to the first number ( 110 ) of processor cores ( 102 ) and / or the second number ( 120 ) of processor cores ( 102 ) be assigned. Method according to one of the preceding claims, wherein software for external assignment and / or visualization of the at least two processor cores ( 102 ) of the multicore processor ( 101 ) is performed. Method according to one of the preceding claims, wherein a plurality of the processor cores of the first number ( 110 ) of processor cores ( 102 ) have a shared memory area. Method according to one of the preceding claims, wherein the control unit ( 100 ) is designed as a computerized numerical control, motion control or programmable logic controller. Method according to one of the preceding claims, wherein the control unit ( 100 ) is used in the course of automation technology, factory automation, process automation and / or medical technology. Method according to one of the preceding claims, wherein the control unit ( 100 ) for controlling a machine tool ( 130 ), a printing machine, a packaging machine, a milling machine, an automation controller or a motor vehicle is used. Control unit ( 100 ) for controlling a machine ( 130 ) and / or installation adapted to carry out a method according to one of the preceding claims. Computer program comprising a control unit ( 130 ) to perform a method according to one of claims 1 to 11, when it on the control unit ( 130 ) is performed.  Machine-readable storage medium with a computer program stored thereon according to claim 13.

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