DE102014200311A1 - Method for Schellentladen a DC link of a semiconductor bridge circuit - Google Patents

Abstract

The invention relates to a method for charging a DC link of a semiconductor bridge circuit (10), wherein the DC link has an intermediate circuit energy store (3) and at least one half bridge (12) with a first controllable semiconductor element (1) and a second controllable semiconductor element (2), which are connected in series with each other and the series connection is connected in parallel to the DC link energy storage (3). Furthermore, the method has a recognition of a condition that requires a discharge of the DC link energy storage (3). In a first time interval, a simultaneous switching on of the first controllable semiconductor element (1) and the second controllable semiconductor element (2) is provided, wherein the first controllable semiconductor element (1) is switched on with a reduced drive voltage. After the first time interval, a simultaneous switching off of the first controllable semiconductor element (1) and the second controllable semiconductor element (2) is provided. In a second time interval, a simultaneous switching on of the first controllable semiconductor element (1) and the second controllable semiconductor element (2) is provided, wherein the second controllable semiconductor element (1) is switched on with a reduced drive voltage.

Description

The invention relates to a method for Schelltladen an intermediate circuit of a semiconductor bridge. Furthermore, the invention relates to a vehicle with a semiconductor bridge, which can provide a fast discharge.

For semiconductor bridges, it should be possible to discharge an intermediate circuit of the semiconductor bridge within a short time if necessary. One application is, for example, an inverter in a drive train of an electric or hybrid vehicle in which the intermediate circuit is to be discharged when the high-voltage battery (HV battery) is disconnected.

If necessary, for safety reasons, an inverter in the powertrain of an electric or hybrid vehicle must have discharged the intermediate circuit, with the HV battery disconnected, to less than 60 volts within one second, e.g. in a crash or at interlock.

There are currently different approaches to achieve this. A first approach is to allow discharge via a resistor in which the electrical energy of the DC link is converted to heat. This resistance is switched on, for example, by an auxiliary switch, for example a MOSFET. Disadvantages are the not inconsiderable space requirements and a safe, but often complicated control of the resistance. Another approach provides for a discharge by a field current. In this case, a pure field-forming current (only d-current flows, q-current = 0) is fed into the machine, whereby no torque is generated at the electric machine. The drive must supply this current, producing ohmic losses in the semiconductors and other components, discharging the link when the d-current is high enough. An advantage here is that no additional resistance is needed as in the approach described above. A disadvantage of the second approach, however, that the procedure can not be performed safely with rotating electrical machine. Even with small misalignments of the position sensor can at demand Iq = 0 nevertheless a small torque-generating current are generated, which, if it should be negative, the DC bus instead of to unload (recuperation). On the other hand, a current Iq that intentionally compensates for this effect could generate an excessive acceleration torque on the electric machine.

Out DE 10 2011 083 945 A1 a control device is known which provides an emergency discharge of a DC link capacitor of an inverter in an emergency situation. In this case, IGBTs are used as semiconductor elements. It is proposed to regulate a gate voltage which is less than 15 volts in dependence on a current measurement coupled to the IGBT. The other IGBT in the half bridge is fully open. Furthermore, the current measurement signal is fed back to a control unit of the gate voltage.

Furthermore, it is off US 2011/0221370 A1 a semiconductor bridge circuit and its drive known, are closed at the same time in the high-side switch and low-side switch to discharge an energy storage of the semiconductor bridge circuit.

It is an object of the present invention to provide a fast discharge of a semiconductor bridge circuit in a simple manner.

The object is achieved by a method having the features according to claim 1. Furthermore, the object is achieved by a vehicle having the features according to claim 9. It is thus proposed a method for Schelltladen an intermediate circuit of a semiconductor bridge circuit, wherein the intermediate circuit comprises a DC link energy storage and at least one half-bridge with a first controllable semiconductor element and a second controllable semiconductor element, which are connected in series with each other and the series connection parallel to the DC link Energy storage is switched. Furthermore, the method has a recognition of a condition that requires a discharge of the DC link energy storage. In a first time interval, a simultaneous switching on of the first controllable semiconductor element and the second controllable semiconductor element is provided, wherein the first controllable semiconductor element is switched on with a reduced drive voltage. The reduced drive voltage is a fixed preset voltage that is not readjusted. After the first time interval, a simultaneous switching off of the first controllable semiconductor element and the second controllable semiconductor element is provided. In a further time interval, a simultaneous switching on of the first controllable semiconductor element and the second controllable semiconductor element is provided, wherein the second controllable semiconductor element is switched on with a reduced drive voltage.

Furthermore, a vehicle is proposed which has a semiconductor bridge circuit and to which the method according to the invention is carried out. In a further exemplary embodiment it can be provided that in a fourth time interval simultaneous switching on of the first controllable semiconductor element and the second controllable semiconductor element, wherein the second controllable semiconductor element with reduced drive voltage is turned on. After the fourth time interval, a simultaneous switching off of the first controllable semiconductor element and the second controllable semiconductor element is provided. In a fifth time interval, a simultaneous switching on of the first controllable semiconductor element and the second controllable semiconductor element is provided, wherein the first controllable semiconductor element is switched on with a reduced drive voltage.

Furthermore, it can be provided that a third time interval lies between the first time interval and the second time interval and / or there is a sixth time interval between the fourth time interval and the fifth time interval in which the first controllable semiconductor element and the second controllable semiconductor element are switched off.

The third and sixth time intervals are wait intervals in which a transitional time is waited before another short circuit is initiated in one of the half bridges.

The method according to the invention is a driving method of voltage-controllable semiconductor elements. For example, IGBTs, MOSFETs or JFEFs are used here.

The detection of a condition can be detected, for example, with sensors, for example one or more acceleration sensors, which detect a collision of a vehicle. In this case, a recognition unit may be part of a board computer system of the vehicle.

Reducing a drive voltage of the first semiconductor element may be used to provide a slight short circuit. This slight short circuit differs from a regular short circuit in that in a regular short circuit, no reduced driving voltage is used, but a full drive voltage corresponding to an intended characteristic of the semiconductor element.

A simultaneous short-circuiting of the first controllable semiconductor element and the second controllable semiconductor element finally causes a short circuit of a half-bridge. The semiconductor bridge can be designed as a full bridge or as a half bridge.

In a preferred embodiment, it is provided that the simultaneous short-circuiting of the first controllable semiconductor element and of the second controllable semiconductor element is limited to a time span of less than 10 μs. This takes into account the load capacity of the controllable semiconductor elements and avoids thermal overload during a short circuit.

In a further embodiment it can be provided that a first simultaneous short-circuiting and at least a second simultaneous short-circuiting are carried out in a time sequence. In this case, a waiting time is provided between the first short-circuiting of a semiconductor bridge and the second short-circuiting of a second semiconductor bridge, so that not both parallel-connected semiconductor bridges are simultaneously short-circuited. Furthermore, a time sequence can be provided which defines the short-circuiting of the individual switchable semiconductor elements. Thus, for example, not only the semiconductor bridges can be alternately short-circuited, but also the switchable semiconductor elements are alternately slightly shorted, for example, first in time sequence all upper switchable semiconductor elements of the half-bridges and then all lower switchable semiconductor elements of the half-bridges, while the series-connected further switchable semiconductor elements the half bridge regularly shorted.

Furthermore, it is possible that the semiconductor bridge is formed in three phases. With such a three-phase semiconductor bridge, three-phase rotary electric machines such as a motor, a generator or a motor generator of a vehicle can be operated.

Depending on the desired number of phases of the half-bridges, provision can be made for a second half-bridge to have a third controllable semiconductor element and a fourth controllable semiconductor element, and a further simultaneous short-circuiting is also carried out there. Furthermore, further controllable Hableiterelemente can be provided in other half-bridges. It is advantageous if all built-in controllable semiconductor elements have an identical characteristic and are of the same type, for example, all are designed as IGBT.

It can be provided in one embodiment that the first controllable semiconductor element and the second controllable semiconductor element are each formed as IGBT and the drive voltage is the gate voltage of one of the semiconductor elements.

In a preferred embodiment, it may be provided that the reduced drive voltage is less than 15 volts. The magnitude of the drive voltage depends on the characteristic of the controllable semiconductor element used. In an IBGT, for example, are usually for a regular short circuit 15 volts used as drive voltage. Thus, with a slight short circuit, the drive voltage is well below 15 volts, so that the height of the short-circuit current is reduced compared to the control with 15 volts.

In a further embodiment it can be provided that the semiconductor bridge is connected to an electrical machine and the simultaneous short-circuiting is performed while the electrical machine is rotating.

This results in the advantage that even during driving a vehicle in a very short time, a bridge short circuit can be initiated without having to wait for a standstill of the otherwise rotating electric machine.

Furthermore, it is advantageous if the discharge of the DC link energy storage takes place within one second to less than 60 volts. This means that the intermediate circuit voltage is led in a short time to a safe voltage level of about less than 60 volts. Such requirements can play a role, especially in the field of vehicle technology, so that safety requirements can be met. It is proposed altogether to discharge the intermediate circuit of a semiconductor bridge by light bridge shorts. This enables fast discharge (Active Discharge) of the DC link. On the other hand, in the case of a regular bridge short circuit, the two series-connected controllable semiconductor elements, for example IGBTs, of a half-bridge go into the active region, i. they are operated in a short circuit, whereby undefined electrical states occur at the semiconductor elements. Further, with a regular short circuit (15 volts drive voltage), the short circuit current is undesirably high, possibly in a damaging area.

In the case of a "slight bridge short circuit", on the other hand, one of the semiconductor elements is driven with a reduced gate voltage, so that the magnitude of the occurring short-circuit current is significantly reduced and approximately the entire intermediate circuit voltage at this semiconductor element drops. In such a state, the thermal conditions can be calculated.

In the case of hard or regular bridge shots with, for example, a gate voltage VGE = + 15V at the gate of the IGBT, on the other hand very high currents of several kA occur. These high currents pose a safety hazard and can damage the IGBT in repetitive loading.

It is now provided according to the invention, a reduced gate voltage and generates bridge shorts. This bridge short circuit with reduced drive voltage, here the gate voltage, is understood in the following to be a "light bridge short circuit". The resulting short circuits are significantly lower than the usual or regular short circuits at VGE = 15V.

In a preferred embodiment, all controllable semiconductor elements, for example, six IGBTs of a three-phase full bridge as a semiconductor bridge circuit of the inverter, one after the other in very short intervals in the slight short circuit. Depending on the existing charge in the DC link, the individual IGBTs are operated several times in succession in the light bridge short circuit. With each pulse, part of the electrical energy of the intermediate circuit is converted into heat energy in the IGBTs and stored, for example, in a bottom plate of the semiconductor. At the same time, the DC link voltage decreases with each pulse.

It is therefore desirable to discharge the DC link with IGBT bridge short circuit at a reduced gate voltage, which is lower than the gate voltage during normal operation of an IGBT with VGE = + 15V. In this procedure, no discharge via the electrical machine is necessary. Also, the proposed self-discharge can be performed while the machine is rotating without the need for an external resistor. The quick discharge of the DC link to less than 60 V residual voltage can take place within one second.

In the following, the procedure according to the invention will be clarified with reference to a drawing. The features described here can be used alone and in combination and apply to a method as well as to a device for carrying out the method. Show it:

1 an embodiment of a semiconductor bridge with a DC link for supplying an electric machine of a vehicle;

2 an embodiment of a characteristic of a reduced gate voltage;

3 an embodiment of a time course of the DC link voltage when using the method according to the invention; and

4 a table with a fixed switching sequence of the individual switching elements.

1 shows an embodiment of a semiconductor bridge circuit 10 as a three-phase full bridge 11 an inverter formed. The full bridge 11 has a first half bridge 12 , a second half bridge 13 and a third half bridge 14 on. The first half bridge 12 has a first controllable semiconductor element 1 and a second controllable semiconductor element 2 on, which are connected to each other in series and are each driven via a control electronics. In the two other half bridges 13 . 14 are also each two series-connected controllable semiconductor elements 6 . 7 and 8th . 9 , All controllable semiconductor elements 1 . 2 . 6 . 7 . 8th . 9 are identical with the same characteristics and are each designed as IGBT.

The three half bridges 12 . 13 . 14 each have a Mittelabriff 15 . 16 . 17 on, each one of an electric machine 18 is supplied. The electric machine is a motor and / or generator. In the present embodiment, the electric machine 18 a drive motor of a vehicle, wherein the vehicle is a battery 21 and the semiconductor bridge circuit 10 Is part of an inverter installed in the vehicle.

In 1 is parallel to the half bridges 12 . 13 . 14 the three-phase full bridge 11 a DC link energy storage 3 connected, which is designed as an electrical capacitance and forms an energy storage of a DC link, which is to be discharged if necessary. The DC link energy storage 3 is in the present embodiment to be both terminals, each with a switch 22 . 23 connected, which are designed as contactors. The two shooters 22 . 23 lie in each case in series with one connection of the battery 21 ,

In a dangerous situation, such as a collision situation, the vehicle battery 21 through the two switches 22 . 23 from the DC link energy storage 3 separated. As the DC link energy storage 3 still has charge, a clamp charging the DC link is required, in particular the DC link energy storage 3 ,

Light quick bridge shorts are generated for fast discharge. In the case of a bridge short circuit, both IGBTs of a half bridge, eg IGBT, switch 1 , also TOP1 1 called, and IBGT 2 , also BOT1 2 called, at the same time. In this case, the DC link energy storage 3 over a resulting path 4 shorted. The light bridge short differs from the usual bridge short circuit in that at least one of the two IGBTs 1 or 2 is switched on with a reduced gate voltage, that is, driven with a reduced drive voltage.

2 shows an embodiment of a graphical representation 30 of characteristics of a gate voltage. This shows 2 a current IC (collector current) in response to a voltage UCE (voltage between collector and emitter). There are three characteristics 31 . 32 . 33 shown. Here is the characteristic 31 a characteristic with regular gate voltage and the other two characteristics 32 . 33 are characteristics with reduced gate voltage, as used in a light bridge circuit. An arrow 34 indicates a reduction of the gate voltage, so that the characteristic 31 represents a regular short while the two characteristics 32 . 33 Have desaturation areas, which are characteristic for driving an IGBT, or generally a controllable semiconductor element, for a light bridge short circuit. Thus shows 2 Saturation areas as rising branches in the characteristic curves 31 . 32 . 33 , A desaturation region is caused by the limitation of the current through the semiconductor element, each in the characteristics 32 . 33 is shown as a flatter course or as a horizontal course.

A bridge short-circuit is limited to a period of time, for example with dt1 = 8 μs, in order to protect the IGBTs by the resulting high thermal load. Such a pulse generally can not be enough to sufficiently discharge the DC link. Several light bridge short circuits are preferably generated one after the other in a short chronological sequence. It should be noted that preferably only one of the two IGBTs 1 or 2 respectively. 6 or 7 respectively. 8th or 9 operated with reduced gate voltage. The other IGBT of the half-bridge is fully open with, for example, VGE = + 15V for a regular short circuit. The IGBT with 15V carries a normal or regular current. For this IGBT, this current causes no short-circuit, since it is still in saturation, ie in the rising part of the characteristic. Would both IGBTs of the first half bridge 12 be driven with the same gate voltage, so this would lead to undefined states. In such a case, the voltage distribution of the DC link voltage between the two IGBTs scatters 1 . 2 in unknown height. On the other hand, if one of the IBGTs of the bridge branch is fully activated, IBGT assumes 1 with eg + 15V, the other IGBT 2 however, reduced by eg + 9V, only IGBT desaturates 2 , IGBT 1 is therefore negligibly low burden, whereas IGBT 2 is charged in a now calculable amount.

It is envisaged that in the same way further light bridge shorts will be performed in the other two half bridges. This will be in 3 illustrated with the switching states S1 to S8. Here is the DC link voltage 40 is plotted as a function of the time t, wherein at different time intervals dt1, dt2 each relate to a bridge branch.

In 4 are the switching states of steps S1 to S8 of 3 in a table and steps 9 to 12. The table shows the 3 at which time interval (dt1, dt2) of one of the IGBTs of the half-bridge 1 a non-conductive state (state "0"), a regular short circuit (state "1") or a slight short circuit (state "0.5"). The duration dt1 is the duration of a short circuit, for example a maximum of 10 μs, preferably 8 μs. The duration dt2 is a waiting time, which is maintained between two bridge short circuits, so that the individual half bridges 12 . 13 . 14 do not influence each other. At the slight short circuit, with "0,5" in the table of 4 denotes an IGBT is driven with 9 volts, for example, and thus turned on.

The sequence of initiated light bridge shorts is repeated until the DC link is sufficiently discharged. With every new pass (bridge branches 12 to 14 ) changes within a half-bridge of the IGBT driven with reduced gate voltage. This alternately turns into the upper IGBT 1 . 6 . 8th and the lower IGBT 2 . 7 . 9 loaded. An exemplary sequence can 4 are taken from the resulting temporal course of the DC link voltage 40 out 3 generated. Since the short-circuit current Ik is set by the gate voltage, but the voltage Uzk decreases when the intermediate circuit is discharged, the energy taken off per short-circuit pulse is reduced by Ik · Uzk · dt1. Therefore, the reduction of the DC link voltage decreases 40 with decreasing intermediate circuit voltage 40 from. Here the calculation Ik * Uzk * dt1 represents only an approximation, because one uses fixed values here, in particular for Uzk, but this value decreases with the short circuit.

Furthermore, it can also be provided that the introduction according to the invention of light bridge short circuits when the electric machine is rotating 18 he follows. This procedure can be used, for example, when a pulse block or ASC (active short circuit) is switched. The very large load inductance (several 10 or 100 μH) in comparison to the very small parasitic inductance of the half-bridge (about 10 nH) will not lead to an influence of the load current in case of a short circuit.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• DE 102011083945 A1 [0005]
• US 2011/0221370 A1 [0006]

Claims (10)

Method for charging a link of a semiconductor bridge circuit ( 10 ), wherein the intermediate circuit a DC link energy storage ( 3 ) and at least one half bridge ( 12 ) with a first controllable semiconductor element ( 1 ) and a second controllable semiconductor element ( 2 ), which are connected in series with each other and the series connection parallel to the intermediate circuit energy storage ( 3 ), wherein the method comprises: detecting a condition that is a discharge of the DC link energy storage ( 3 ) requires; simultaneous switching on of the first controllable semiconductor element in a first time interval ( 1 ) and the second controllable semiconductor element ( 2 ), wherein the first controllable semiconductor element ( 1 ) is turned on with reduced drive voltage; after the first time interval has elapsed, simultaneous switching off of the first controllable semiconductor element ( 1 ) and the second controllable semiconductor element ( 2 ); simultaneous switching on of the first controllable semiconductor element in a second time interval ( 1 ) and the second controllable semiconductor element ( 2 ), wherein the second controllable semiconductor element ( 1 ) is switched on with reduced drive voltage. Method according to claim 1, characterized in that the first time interval has a duration of less than 10 μs has. Method according to Claim 1 or Claim 2, characterized in that a third time interval lies between the first time interval and the second time interval, in which the first controllable semiconductor element ( 1 ) and the second controllable semiconductor element ( 2 ) are turned off. Method according to one of claims 1 to 3, further comprising simultaneously turning on the first controllable semiconductor element (4) in a fourth time interval. 1 ) and the second controllable semiconductor element ( 2 ), wherein the second controllable semiconductor element ( 1 ) is turned on with reduced drive voltage; after expiration of the fourth time interval simultaneous switching off of the first controllable semiconductor element ( 1 ) and the second controllable semiconductor element ( 2 ); simultaneous switching on of the first controllable semiconductor element in a fifth time interval ( 1 ) and the second controllable semiconductor element ( 2 ), wherein the first controllable semiconductor element ( 1 ) is switched on with reduced drive voltage. Method according to one of claims 1 to 4, characterized in that between the fourth time interval and the fifth time interval is a sixth time interval in which the first controllable semiconductor element ( 1 ) and the second controllable semiconductor element ( 2 ) are turned off. Method according to one of claims 1 to 5, characterized in that the first switchable semiconductor element ( 1 ) and the second switchable semiconductor element ( 2 ) is each formed as an IGBT and the drive voltage is the gate voltage of the IGBT, wherein the reduced drive voltage is less than 15 volts. Method according to one of claims 1 to 6, characterized in that the semiconductor bridge circuit ( 10 ) is a three-phase full bridge with three bridge branches ( 12 . 13 . 14 ), each bridge branch ( 12 . 13 . 14 ) each have a first controllable semiconductor element ( 1 ) and in each case a second controllable semiconductor element ( 2 ), which are each connected in series with each other and the series circuits in each case parallel to the intermediate circuit energy storage ( 3 ), alternating bridge short circuits in the three bridge branches ( 12 . 13 . 14 ) are generated by the two semiconductor elements in the first time interval ( 1 , 2) the first half-bridge ( 12 ), in the third time interval none of the semiconductor elements ( 1 . 2 . 6 . 7 . 8th . 9 ), in the second time interval semiconductor elements ( 6 . 7 . 8th . 9 ) of another bridge branch ( 13 . 14 ), while the semiconductor elements ( 1 . 2 ) of the first bridge branch ( 12 ) are turned off. Method according to one of claims 1 to 7, characterized in that the semiconductor bridge circuit ( 10 ) with an electric machine ( 18 ) and the simultaneous short-circuiting with rotating electrical machine ( 18 ) is carried out. Method according to one of claims 1 to 8, characterized in that the discharge of the DC link energy storage ( 3 ) within a second 60 Volt is done. Vehicle having a semiconductor bridge circuit ( 10 ), at which the method according to one of claims 1 to 9 is carried out.

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