DE102014119346A1 - DEVICE WITH SEVERAL DRIVER CIRCUITS FOR SUPPLYING A CURRENT TO SEVERAL LOADS AND METHOD FOR MANUFACTURING THE SAME - Google Patents

Abstract

 In various embodiments, a device (200) is provided. The device (200) has a substrate (202) with a first side (204) and a second side (206) opposite the first side (204). The substrate (202) has a plurality of drive circuits on the first side (204) of the substrate (202). Each of the plurality of drive circuits is configured to drive a current from the first side (204) of the substrate (202) to the second side (206) of the substrate (202). The device further includes at least one load interface on the second side (206) of the substrate (202). The at least one load interface is configured to supply the current from the plurality of driver circuits to a plurality of loads on the second side (206) of the substrate (202).

Description

Various embodiments generally relate to a device having a plurality of driver circuits for supplying a current to a plurality of loads and a method of manufacturing the device.

To provide large displays, today, a large number of hundreds or thousands of light emitting structures, such as light emitting diodes, are provided in a display matrix. To operate such a display, one or more driver circuitry (s) is usually provided to drive the light emitting structures. With an increasing number of light emitting structures, it is becoming an ever more demanding task to connect the light emitting structures to the one or more driver circuits to ensure reliable operation of the display matrix.

In a conventional display matrix, the one or more driver circuits are arranged below the light-emitting structures. However, with an increase in the surface area of the display matrix (which can be up to 240 mm ² or even more) based on a silicon substrate, such an arrangement nowadays leads to an insufficient yield. Further, it becomes increasingly difficult to test the one or more driver circuits.

In various embodiments, a device is provided. The device has a substrate with a first side and a second side opposite the first side. The substrate has a plurality of drive circuits on the first side of the substrate. Each of the plurality of drive circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further comprises at least one load interface on the second side of the substrate. The at least one load interface is configured to supply the current from the plurality of driver circuits to a plurality of loads on the second side of the substrate.

In various embodiments, the plurality of drive circuits may be embedded in the substrate on the first side of the substrate. Furthermore, the at least one load interface may be embedded in the substrate on the second side of the substrate. The plurality of loads may be embedded in the second side of the substrate via the at least one load interface. The at least one load interface may include a plurality of recesses on the second side of the substrate; wherein each of the plurality of wells may be configured to receive at least one of a plurality of loads. In various embodiments, at least one load of the plurality of loads comprises a light emitting diode. The multiple loads may comprise a matrix of light emitting diodes. The plurality of drive circuits may be electrically insulated from one another in a lateral direction across the first surface of the substrate, e.g. B. by provided in the substrate isolation trenches. The plurality of drive circuits may be electrically isolated from one another in the substrate by at least one trench. The at least one trench may extend through the substrate from the first side of the substrate to the second side of the substrate. In various embodiments, the substrate may include a semiconductor chip. At least one of the plurality of drive circuits may comprise a vertical transistor. The device may further include at least one control unit integrated with the substrate for controlling the plurality of drive circuits. The at least one control unit may be a plurality of control units integrated in the substrate, wherein each control unit may be configured to control at least one drive circuit of the plurality of drive circuits. The device may further include an electrically conductive interconnect structure on the first side of the substrate electrically coupled to the plurality of drive circuits, wherein electrical connection to the electrically conductive interconnect structure may be made from the first side of the substrate. The electrically conductive connection structure may have a plurality of contact surfaces on the first side of the substrate. In various embodiments, the substrate comprises at least a first semiconductor chip and a second semiconductor chip, and the plurality of driver circuits may be embedded in the first semiconductor chip; and the at least one load interface may be embedded in the second semiconductor chip. The first semiconductor chip may have a first side and a second side, and the plurality of drive circuits may be embedded in the first side of the first semiconductor chip; the second semiconductor chip may have a first side and a second side, and the at least one load interface may be embedded in the second side of the second semiconductor chip; and the plurality of driver circuits may be electrically connected to the at least one load interface via at least one electrical conductor between the second side of the first semiconductor chip and the first side of the second semiconductor chip. The at least one load may be configured to connect a test module thereto, the test module configured to test at least one of the plurality of loads via the at least one load interface based on the current corresponding to the plurality of loads on the second Side of the substrate is supplied from the plurality of driver circuits. The several Loads may include multiple LED elements, and the test module may be configured to test the plurality of LED elements via the at least one load interface. Further, the test module may be configured to test the plurality of LED elements to determine if the LED elements are functioning. In various embodiments, the test module may be configured to test the plurality of LED elements to determine the intensity of light emitted by the respective LED elements. Further, the test module may be configured to test the plurality of LED elements to determine the light color of the light emitted by the respective LED elements. Furthermore, the test module may be configured to test the plurality of LED elements to determine the luminous flux of the light emitted by the respective LED elements. Alternatively or additionally, the test module may be configured to test the plurality of LED elements to determine the directivity of the light emitted by the respective LED elements. Alternatively or additionally, the test module may be configured to test the plurality of LED elements to test the power consumption of the respective LED elements.

Furthermore, in various embodiments, a method for manufacturing a device is described here. The method includes providing a substrate having a first side and a second side opposite the first side, and forming a plurality of driver circuits on the first side of the substrate. Each of the plurality of drive circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. Furthermore, the method includes forming at least one load interface on the second side of the substrate. The at least one load interface is configured to supply the current from the plurality of driver circuits to a plurality of loads on the second side of the substrate.

In various embodiments, the multiple driver circuits on the first side of the substrate may be embedded in the substrate. The at least one load interface may be embedded in the substrate on the second side of the substrate. Furthermore, the plurality of loads may be embedded in the second side of the substrate via the at least one load interface. In various embodiments, forming at least one load interface may include forming a plurality of pits on the second side of the substrate; wherein each of the plurality of wells may be configured to receive at least one of a plurality of loads. At least one load of the plurality of loads may include a light emitting diode. The multiple loads may comprise a matrix of light emitting diodes. The plurality of driver circuits may be electrically insulated from one another in a lateral direction across the first surface of the substrate. The method may further include forming at least one trench in the substrate to electrically isolate the plurality of drive circuits in the substrate from each other. The at least one trench may be configured to extend through the substrate from the first side of the substrate to the second side of the substrate. The substrate may comprise a semiconductor chip. In various embodiments, at least one of the plurality of drive circuits may include a vertical transistor. The method may further include forming at least one control unit integrated with the substrate to control the plurality of driver circuits. In addition, forming the at least one control unit may include forming a plurality of control units integrated into the substrate, wherein each control unit may be configured to control at least one drive circuit of the plurality of drive circuits. Further, the method may further include forming an electrically conductive interconnect structure on the first side of the substrate that is electrically connected to the plurality of driver circuits, wherein electrical connection may be made to the electrically conductive interconnect structure from the first side of the substrate. The electrically conductive connection structure may have a plurality of contact surfaces on the first side of the substrate. The substrate may include at least a first semiconductor chip and a second semiconductor chip, wherein the plurality of driver circuits may be embedded in the first semiconductor chip; and the at least one load interface may be embedded in the second semiconductor chip. The first semiconductor chip may have a first side and a second side, and the plurality of drive circuits may be embedded in the first side of the first semiconductor chip; the second semiconductor chip may include a first side and a second side, wherein the at least one load interface is embedded in the second side of the second semiconductor chip; and the plurality of driver circuits may be electrically connected to the at least one load interface via at least one electrical conductor between the second side of the first semiconductor chip and the first side of the second semiconductor chip.

In various embodiments, a method of testing multiple loads is provided. The method includes driving, through a plurality of driver circuits embedded in a first side of a substrate, an electrical current from the first side of a substrate to a second side of the substrate opposite the first side of the substrate; and the electrical feeding, via at least one load interface on the second side of the substrate, the electrical current from the plurality of drive circuits to a plurality of loads on the second side of the substrate.

In various embodiments, driving the electrical current from the first side of the substrate to the second side of the substrate may include driving the current using a plurality of drive circuits disposed on the first side of the substrate. In various embodiments, at least one load of the plurality of loads may include a light emitting diode. In various embodiments, the plurality of driver circuits may be electrically insulated from one another in a lateral direction across the first surface of the substrate. The method may further include testing the plurality of loads based on the supplied electrical current. In various embodiments, testing the plurality of loads may include checking the operability of the multiple loads. In various embodiments, checking the operability of the plurality of loads may include checking at least one of the following parameters:
Light intensity of the light emitted by a respective load, light color of the light emitted by a respective load, luminous flux of the light emitted by a respective load, directivity of the light emitted by a respective load and / or power consumption of a respective load.

In the drawings, like reference characters generally indicate the same parts throughout the several views. The drawings are not necessarily to scale, rather the emphasis has been placed generally on the presentation of the principles of the invention. In the following description, various embodiments of the invention will be described with reference to the following drawings, wherein:

1A a light emitting diode array according to various embodiments;

1B shows a light-emitting diode sub-matrix, which is part of the light-emitting diode matrix of 1A is;

2A to 2D Sectional views showing a preparation of a driver substrate for receiving LED sub-matrices of 1A and 1B illustrate; and

3A 5 shows a sectional view of a portion of a driver substrate and a portion of an LED sub-array according to various embodiments;

3B shows a circuit diagram of a circuit containing an LED and a driver circuit as represented by a section like the one in FIG 3A are implemented illustrated;

4A 5 shows a sectional view of a portion of a driver substrate and a portion of an LED sub-array according to various embodiments;

4B shows a circuit diagram of a circuit containing an LED and a driver circuit as represented by a section like the one in FIG 4A are implemented illustrated;

5 an enlarged sectional view of a portion of a driver substrate, as in 3A shown, shows;

6 an LED sub-array and a corresponding portion of a driver substrate according to various embodiments;

7 multiple LED sub-matrices and corresponding sections of the driver substrates, as in 6 shown mounted on a support, according to various embodiments;

8th a flow chart illustrating a method of manufacturing a device; and

9 a flow chart illustrating a method for checking multiple loads.

In the following detailed description, reference is made to the accompanying drawings which show, by way of example, specific details and embodiments in which the invention may be practiced.

The word "exemplary" is used herein to mean that something serves as an example, as a case study, or as an illustration. Any embodiment or embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or embodiments.

The word "about" as used with respect to an applied material formed "over" a side or surface may be used herein to express that the applied material is "directly on," e.g. B. in direct contact with, the relevant page or surface may be formed. The word "about" as used with respect to an applied material formed "over" a side or surface may be used herein to express that which has been applied Material may be formed "indirectly on" the relevant side or surface, wherein one or more additional layer (s) between the relevant page or surface and the applied material is / are arranged.

As will be described in more detail below, an apparatus is provided which includes inspecting a large number of light-emitting structures, such as light emitting devices. B. a large number of light-emitting diodes, will simplify. For example, by arranging one or more drive circuits and at least one load interface (and thus, if connected, the multiple loads) on opposite sides of a substrate, the arrangement of the drive circuits and the at least one load interface is improved as regards the required surface area of the substrate. Furthermore, access to the driver circuits is possible in a simpler manner since they are freely accessible from one side of the substrate. This then simplifies the testing of the driver circuits. In addition, an improved yield can be achieved by the "more relaxed" structure with respect to the resolution of the driver circuits as well as the loads (eg, the light-emitting structures, such as the light-emitting diodes (LEDs)). In other words, in various embodiments, a more reliable interconnect structure is provided to drive driver circuits having a large number of loads, such as high voltage loads. B. a large number of light-emitting structures such. B. LEDs to connect. In general, various embodiments allow simplification of testing multiple LEDs, e.g. B. a large number of LEDs, which can be arranged in a large LED matrix.

In various embodiments, for example, a driver technology is provided, according to which one or more driver circuits are provided on or in a substrate. The one or more driver circuits ensure electrical current flow through the substrate from a first side of the substrate to a second side of the substrate, the first side of the substrate and the second side of the substrate facing each other. On the side of the substrate opposite to the side on which the one or more driver circuits are provided, one or more load interfaces are formed. The one or more load interfaces may feed the current flowing through the substrate (in other words, through the body of the substrate in this case) to a plurality of loads which may be disposed on the second side of the substrate. Thus, for example, a vertical flow of current through the substrate may be provided.

As will be described in more detail below, in various embodiments, the driver circuits on one side of the substrate may be connected to one or more loads (eg, one or more LED's) and on the other side to a suitable one Grid containing lines that may be designed to lead to the individual loads (eg to the individual LEDs). In various embodiments, the loads may include sensors and / or actuators of any desired type, if desired, in the same matrix or sub-matrix.

Although various embodiments using light emitting structures such as light emitting diodes are described as an example of loads, it should be noted that the embodiments are not limited to these. In various embodiments, the loads may include or be sensors and / or actuation structures, which should be provided in a dense matrix arrangement.

For example, as will be explained in more detail below, various embodiments provide for a modular system having on the one hand a substrate having a plurality of monolithically integrated (in other words, embedded) circuits such as e.g. B. driver circuits comprising one or more transistor (s) (eg., Power transistors) and a logic circuit, for. For example, a control circuit may be included and, on the other hand, a plurality of LED sub-arrays each having a plurality of LEDs, wherein each of the LEDs may be associated with a respective driver circuit (eg, each LED may be received in a respective recess in the substrate).

Various embodiments provide suitable driver and interconnect technology.

1A shows a light-emitting diode matrix 100 according to various embodiments. The light-emitting diode matrix (also referred to below as the LED matrix) 100 can use several light-emitting diode sub-matrices (also referred to below as LED sub-matrices) 102 have or be formed from these. 1B shows an enlarged view of one of the multiple LED sub-matrices 102 , Each LED sub-matrix 102 can have multiple pixels (each pixel can have one or more LED (s)) 104 in or over an LED submatrix substrate 106 are formed. It should be noted, however, that the division of the LED matrix 100 in several LED sub-matrices 102 is optional. In various embodiments, each pixel 104 a footprint in the range of about 10 μm x 10 μm to about 1000 μm x 1000 μm, e.g. In the range of about 50 μm x 50 μm to about 500 μm x 500 μm, e.g. B. of about 100 microns x 100 have μm. However, in different embodiments, other sizes of the footprint of each pixel may also be used 104 be provided. Furthermore, the pixels must 104 do not have a square footprint, but may also have a rectangular or other polygonal or even round (e.g., circular or elliptical) footprint. It should also be noted that the pixels 104 may be arranged in rows and columns, but this is optional; the pixels 104 can generally be arranged in any way, regularly or irregularly. In various embodiments, each LED sub-matrix 102 n · m pixels 104 (where n is, for example, in a range of 2 to 100, eg, in a range of 5 to 50, eg, in a range of 10 to 30, e.g., about 20; where m is, for example, in a range of 2 to 100, eg, in a range of 5 to 50, eg, in a range of 10 to 30, eg, about 20, where n and m can be the same number or different numbers). In various embodiments, each LED sub-matrix 102 20x20 pixels 104 exhibit. In various embodiments, each LED sub-matrix 102 a size in a range of about 2 mm x 2 mm to about 3 mm x 3 mm, e.g. B. of about 2 mm x 2 mm. In various embodiments, however, other sizes of LED sub-matrices may be used 102 be provided. Furthermore, the LED sub-matrices must 102 do not have a square footprint, but may also have a rectangular or other polygonal or even round (e.g., circular or elliptical) footprint. In various embodiments, the LED matrix 100 Hundreds or thousands of pixels 104 have, for. B. tens of thousands of pixels 104 , z. In the range of about 20,000 pixels to about 30,000 pixels, e.g. B. about 24,000 pixels.

2A to 2D show sectional views showing a preparation of a driver substrate for receiving LED sub-matrices of 1A and 1B illustrate. The embodiments that are in 2A to 2D Illustrated by way of example, a microstructuring of the semiconductor substrate of the driver circuit and the LEDs.

2A shows a first structure 200 that is a substrate 202 with a first page 204 and one of the first page 204 opposite second side 206 having. The substrate 202 may comprise a semiconductor material, for. Silicon or silicon germanium, or a compound semiconductor material (e.g., III-V compound semiconductor material or II-VI compound semiconductor material), such as silicon dioxide. Indium phosphide (InP) or gallium arsenide (GaAs) or the like, which may be doped with doping atoms, e.g. B. with doping p-type such. Boron (B). In various embodiments, any other suitable semiconductor material or any other dopant may be provided. The substrate 202 may comprise a solid silicon wafer or a silicon on insulator (SOI) wafer.

Furthermore, an epitaxial layer 208 , z. B. an epitaxial silicon layer 208 , above the substrate 202 applied, z. B. be bred on this. The epitaxial layer 208 may be doped with dopant atoms, e.g. B. with doping atoms of the n-type (n), such as. As phosphorus (P) or the like.

Furthermore, a buried electrically conductive structure 210 which z. B. a buried bit line 210 may be provided to supply electrical power to electronic components, as described in more detail below. The buried electrically conductive structure 210 may be highly doped with doping atoms, e.g. B. with doping atoms of the n-type (n +), such as. As phosphorus (P) or the like. In various embodiments, the buried electrically conductive structure 210 within the epitaxial layer 208 at the interface with the substrate 202 be educated. Different sections of the buried electrically conductive structure 210 on the first page 204 can make an electrical contact 232 between z. B. the material of the buried electrically conductive structure 210 (eg, silicon) and an electrode of a load, e.g. As a light emitting diode, ensure, as described in more detail below ..

In various embodiments, one or more electronic device (s) may be in the epitaxial layer 208 may be formed and may be electrically conductive with the buried electrically conductive structure 210 be connected. In order to implement the one or more electronic devices, one or more wells may be formed in the epitaxial layer, depending on the type of device 208 be provided, as well as different active areas or different diffusion areas to z. To form one or more transistors, such as one or more field effect transistor (s) (FET) (such as metal oxide semiconductor (MOS) FETs, e.g., complementary MOSFETs (Complementary MOSFET, CMOSFET) or double diffused MOSFET (DMOSFET), or one or more bipolar transistors or one or more insulated gate bipolar transistors (IGBTs), and the like a plurality of transistors may be configured as one or more power transistors.

In various embodiments, logic circuits of any type (eg, one or more driver circuit (s)) may be provided be. In various embodiments, the electronic components may comprise planar components and / or vertical components.

In the epitaxial layer 208 a plurality of individual component areas may be provided, which may be laterally insulated from each other. For example, a first component area 212 comprise one or more (eg, vertical) power transistors (which may be used as a load switching element in a driver circuit). Furthermore, a second component area 214 have logical components that z. B. implement a (eg, CMOS) regulator circuit which includes the power transistor (s) in the first device region 212 controls. In various embodiments, the individual component areas 212 . 214 be laterally insulated from each other, for example, by trench isolation (STI) structures 230 or by transitional isolation structures 230 each of which is between each two individual component areas 212 . 214 can be provided. This prevents the individual component areas 212 . 214 be electrically shorted.

Furthermore, a passivation layer (eg, silicon oxide or silicon nitride) may be used. 216 over the epitaxial layer 208 may be applied and may have openings for contact surface structures 218 exhibit to the electronic components in the epitaxial layer 208 electrically conductive contact. Further, the electronic component (s) may be in the first device region 212 over the contact surface structures 218 electrically conductive with one or more electronic component (s) in the second component area 214 be connected. Therefore, the top of the epitaxial layer 208 (eg, the top of the epitaxial silicon layer 208 ) in direct physical contact with the underside of the passivation layer 216 stand.

For example, multiple driver circuits may be on the first page 204 of the substrate 202 be provided, wherein each of the plurality of drive circuits is adapted to receive a current from the first side 204 of the substrate 202 to the second page 206 of the substrate 202 to drive.

2 B shows a second structure 250 in which several cavities (in other words, depressions) 220 in the substrate 202 from the second page 206 of the substrate 202 may be formed to at least a portion of the buried electrically conductive structure 210 or the epitaxial layer 208 expose. The multiple cavities 220 can be done by removing material from the substrate 202 be formed, for. By etching (eg, wet etching or dry etching). In various embodiments, at least a portion of the buried electrically conductive structure 210 or the epitaxial layer 208 of the first component area 212 are exposed to enable later electrical contact with the at least one electronic device (eg, the power transistor) located in the first device region 212 is provided.

After that, as in a third structure 260 in 2C shown, lot 222 or conductive adhesive 222 at every floor of the cavities 220 on the buried electrically conductive structure 210 be provided, for example, the LEDs of the LED sub-matrix 102 to fasten, as will be described in more detail below. For example, the buried electrically conductive structure 210 provide a load interface to supply power from the plurality of integrated circuits (eg, driver circuits) to a plurality of loads. An example of a load is a light emitting device such as an LED; however, any other load that consumes electrical power, such as a sensor device and the like, may be provided.

Further, as in 2D shown, the individual LEDs of the LED sub-matrix 102 inserted into the cavities (there may be exactly one LED in each cavity 220 can be used), and they can through the solder 222 (in this case by soldering) or the conductive adhesive 222 (in this case by gluing) are attached. Thus, both a mechanical attachment and an electrically conductive connection between the LEDs of the LED sub-matrix 102 and the electronic component, for. B. the transistor, in the first component area 212 guaranteed. Therefore, a current flow through the LED sub-matrix 102 (lateral flow of current, represented symbolically by means of a first arrow 224 ), by a respective LED (vertical current flow, shown symbolically by means of a second arrow 226 ) and through the contact surface structures 218 (lateral current flow, represented symbolically by means of a third arrow 228 ).

For example, in various embodiments, as described above, multiple cavities 220 from the second page 206 of the substrate 202 generates and electrically contact the buried electrically conductive structure 210 , The LEDs (each LED may have two electrodes) may have a shape associated with a respective cavity 220 is compatible, and at least one electrode having, with the buried electrically conductive structure 210 to contact. Alternatively, both electrodes of the LEDs may be within the respective cavity 220 be arranged, wherein they have two electrically isolated buried electrically conductive structures (not shown) contact, which can be electrically isolated from each other. These embodiments may be provided for transition isolated technologies as well as for SOI technologies.

In various embodiments, one or more control units may be incorporated in the substrate 202 integrated (in other words, embedded). The one or more control units may be configured to control the one or more driver circuits. An electrically conductive connection structure may also be on the first side 204 of the substrate 202 be provided and electrically connected to the plurality of driver circuits, wherein from the first page 204 of the substrate 202 from an electrical connection with the electrically conductive connection structure can be produced.

3A shows a sectional view 300 a section of a substrate 302 , z. B. a driver substrate 302 , and a portion of an LED sub-array 304 according to various embodiments. Further shows 3B a circuit diagram 350 a circuit comprising an LED and a driver circuit as represented by a section as in 3A is implemented illustrated.

As in 3A In various embodiments, the substrate may be illustrated 302 have multiple component areas, z. B. several first component areas 306 and a plurality of second component areas 308 , Exactly a first component area 306 and exactly a second component area 308 may form a component regions unit, each component regions unit being exactly one LED 310 the LED sub-matrix 304 can be assigned to the associated LED 310 head for. The first component areas 306 and the second component areas 308 can be inside the substrate 302 be arranged alternately next to each other. The component areas 306 . 308 can through isolation trenches 344 be electrically isolated from each other, the z. B. with oxide (eg., Silicon oxide) or with oxide (eg., Silica) and polysilicon are filled. If the isolation trenches 344 filled with oxide (eg, silicon oxide) and polysilicon, the bottom of this structure may in turn be formed by means of an oxide (eg, silicon oxide). 348 be isolated.

Every first component area 306 can at least one transistor 312 have, for. B. a vertical transistor 312 , z. B. a vertical power transistor 312 , z. B. a bipolar transistor 312 , z. B. a pnp bipolar transistor with a base region 314 (which may be n-doped), an emitter region 316 (which may be p-doped) and a collector region 318 (which may be p-doped). As in 3A shown, the pnp bipolar transistor 312 a vertical transistor, ie, a transistor that conducts current from an upper surface of the substrate 302 through the entire substrate 302 through to one of the top of the substrate 302 opposite bottom of the substrate 302 allows, as in 3A by means of a fourth arrow 320 is shown symbolically.

Furthermore, every second component area can 308 a logic circuit, for. B. a regulator circuit, to the transistor 312 in the first component area 306 to control. In general, every second component area 308 have any type of control logic, depending on the desired drive characteristics. In a very simple implementation, every second component area can 308 a differential amplifier 322 , a first resistance 324 and a second resistor 326 which can be connected to a regulator circuit to the flow of current through the transistor 312 the associated and connected first component area 306 to control. Specifically, an output of the differential amplifier 322 can with the base area 314 of the transistor 312 be connected, z. B. via interconnects, over the top of the component areas 306 . 308 are provided (not shown). Furthermore, a first input of the differential amplifier 322 with a first terminal of the first resistor 324 be connected, of which a second terminal to a second terminal of the second resistor 326 may be connected, wherein a first terminal of the second resistor 326 with a second input of the differential amplifier 322 can be connected. Furthermore, the emitter region 316 of the transistor 312 with the second terminal of the second resistor 326 be connected, and the collector region of the transistor 312 can with an anode 328 the LED 310 be connected. A cathode 330 the LED 310 can with a reference voltage 332 such as B. a mass 332 be connected. In addition, the differential amplifier 322 with a power source 334 and about this with the reference voltage 332 such as B. the mass 332 be connected. As in 3A shown, is the anode 328 the LED 310 with the collector area 318 of the transistor 312 via an anode contact 336 the LED 310 and a first substrate contact 338 of the substrate 302 connected. Further, the cathode 330 the LED 310 with the reference voltage 332 such as B. the mass 332 via a cathode contact 340 the LED 310 and via a second substrate contact 342 of the substrate 302 connected. Thus, a current flow from the LED 310 via the cathode contact 340 the LED 310 in the second substrate contact 342 of the substrate 302 and in the substrate 302 be guaranteed as in 3A by means of a fifth arrow 346 symbolically represented. The reference voltage 332 can be over a section of the substrate 302 of the second component area 308 to be provided.

Thus, for example, a driver switch in the first component area 306 be provided, and the control circuit for controlling the driver switch (and thus the current to flow through the driver switch) can in the second component area 308 be provided, which allows a simple implementation of very different properties of electrical components, eg. B. one or more power device (s) (in the first component area 306 ) and logic device (s) (in the second component area 308 ). Furthermore, these embodiments ensure a very space-saving arrangement of the components and a very simple and inexpensive connection between the electronic components, for example, the driver circuit and the LEDs 310 , The assembly of these components is also very easy.

In these embodiments, the substrate 302 an SOI substrate 302 be. For example, in various embodiments, a per se standard CMOS process in the p-doped substrate 302 be provided to the isolation trenches 344 train to the component areas 306 . 308 electrically isolate each other. In these embodiments, the vertical pnp transistor becomes 312 used to power to the LED 310 while the adjacent CMOS control circuit (also referred to as a control circuit above) controls the pass device, in other words, the vertical pnp transistor 312 , In these embodiments, a per se standard pad metallization on top of the devices and metallization on the side of the substrate 302 be provided to contact the LED 310 to ensure. Again, the cathode contact 340 be implemented, if this is the design of the LED 310 simplified.

4A shows a sectional view 400 a section of a substrate 402 , z. B. a driver substrate 402 , and a portion of an LED sub-array 404 according to various embodiments. Further shows 4B a circuit diagram 450 a circuit comprising an LED and a driver circuit including an LED and a drive circuit as represented by a section such as that shown in FIG 4A are implemented illustrated.

A major difference between the embodiments as shown in FIG 4A and the embodiments as shown 3A can be seen in that the substrate 402 an n-doped substrate 402 is while the substrate 302 of the embodiments as shown in FIG 3A a p-doped substrate 302 is. According to this difference, the respective circuits are also inverted in doping, and the respective connections are adjusted accordingly.

Exactly, as in 4A In various embodiments, the substrate may be illustrated 402 have multiple component areas, z. B. several first component areas 406 and a plurality of second component areas 408 , Exactly a first component area 406 and exactly a second component area 408 may form a component regions unit, each component regions unit being exactly one LED 410 the LED sub-matrix 404 can be assigned to the associated LED 410 head for. The first component areas 406 and the second component areas 408 can be inside the substrate 402 be arranged alternately next to each other. The component areas 406 . 408 can through isolation trenches 444 be electrically isolated from each other.

Every first component area 406 can at least one transistor 412 have, for. B. a vertical transistor 412 , z. B. a vertical power transistor 412 , z. B. a bipolar transistor 412 , z. B. a npn bipolar transistor with a base region 414 (which may be p-doped), an emitter region 416 (which may be n-doped) and a collector region 418 (which may be n-doped). As in 4A shown, the npn bipolar transistor 412 a vertical transistor, ie, a transistor that conducts current from an upper surface of the substrate 402 through the entire substrate 402 through to one of the top of the substrate 402 opposite bottom of the substrate 402 allows.

Furthermore, every second component area can 408 a logic circuit, for. B. a regulator circuit, to the transistor 412 in the first component area 406 to control. In general, every second component area 408 have any type of control logic, depending on the desired drive characteristics. In a very simple implementation, every second component area can 408 a differential amplifier 420 , a first resistance 422 and a second resistor 424 which can be connected to a regulator circuit to the flow of current through the transistor 412 the associated and connected first component area 406 to control.

Specifically, an output of the differential amplifier 420 can with the base area 414 of the transistor 412 be connected, z. B. via interconnects, over the top of the component areas 406 . 408 are provided (not shown). Furthermore, a first input of the differential amplifier 420 with a first terminal of the first resistor 422 be connected, of which a second terminal to a second terminal of the second resistor 424 and with a reference voltage 426 how mass can be connected. A first terminal of the second resistor 424 can with a second input of the differential amplifier 420 be connected. Furthermore, the emitter region 416 of the transistor 412 with the first terminal of the second resistor 424 be connected, and the collector area 418 of the transistor 412 can with an anode 428 the LED 410 be connected. An anode 430 the LED 410 can with a supply voltage terminal 432 be connected (where the supply voltage can be a positive voltage). In addition, the differential amplifier 420 with a power source 434 and be connected via this with the supply voltage. As in 4A shown, is the cathode 428 the LED 410 with the collector area 418 of the transistor 412 via a cathode contact 436 the LED 410 and a first substrate contact 438 of the substrate 402 connected. Further, the anode 430 the LED 410 with the supply voltage via an anode contact 440 the LED 410 and via a second substrate contact 442 of the substrate 402 connected (it should be noted that these contacts 440 . 442 optional).

Thus, for example, a driver switch in the first component area 406 be provided, and the control circuit for controlling the driver switch can in the second component area 408 be provided, which allows a simple implementation of very different properties of electrical components, eg. B. one or more power device (s) (in the first component area 406 ) and logic device (s) (in the second component area 408 ). Furthermore, these embodiments ensure a very space-saving arrangement of the components and a very simple and inexpensive connection between the electronic components, for example, the driver circuit and the LEDs 410 , The assembly of these components is also very easy.

In these embodiments, the substrate 402 an SOI substrate 402 be. For example, in various embodiments, a per se standard CMOS process in the p-doped substrate 402 be provided to the isolation trenches 444 train to the component areas 406 . 408 electrically isolate each other. In these embodiments, the vertical npn transistor becomes 412 used to power to the LED 410 while the adjacent CMOS control circuit (also referred to as a control circuit above) controls the pass device, in other words, the vertical npn transistor 412 , In these embodiments, a per se standard pad metallization on top of the devices and metallization on the side of the substrate 402 be provided to contact the LED 410 to ensure. Again, the cathode contact 440 be implemented, if this is the design of the LED 410 simplified.

5 shows an enlarged sectional view 500 a portion of the driver substrate 302 , as in 3A shown.

As in 5 As illustrated, one possible implementation of these embodiments may be to apply a so-called thin wafer technology starting from a substrate (eg p-substrate). 302 . 402 and Deep Trench Isolation (DTI) 344 from Z. B. about 50 microns depth (with an oxide filling (eg., Silicon oxide) alone or oxide sidewalls with polysilicon filling). After editing the front 560 (Isolation (eg 344 ), Depressions (e.g. 502 . 504 . 506 . 508 ), Contact implants (eg 510 . 512 . 514 . 516 . 518 . 520 . 522 ) and front side metallization (e.g. 524 . 526 . 528 . 530 . 532 . 534 . 536 . 538 ) within insulation material (eg 540 ), such as an oxide (eg, silicon oxide), the wafer substrate 302 . 402 placed on a glass carrier system and up to the DTI 344 be sanded, and an oxide 542 can on the back 562 be applied, and the oxide 542 can be structured. Thereafter, a metallization layer can be processed and patterned. This metallization layer may have a contact surface 342 however, may also serve as a connection surface for the voltage supply of the circuits or components 338 to the respective LED 310 . 410 serve, which can be arranged above it and can be electrically controlled, z. By a vertical (pnp or npn) transistor 312 . 412 ,

6 shows an LED sub-matrix 102 . 304 and a corresponding portion of a driver substrate 302 . 402 according to various embodiments, wherein the LED sub-matrix 102 . 304 and the driver substrate 302 . 402 are aligned in alignment. In various embodiments, the size of the LED sub-matrix 102 . 304 be optimized taking into account the yield and testability thereof. The connection between the LED 310 and the driver substrate 302 . 402 has been explained above, and the following is the connection of the driver substrate 302 . 402 with a grid referring to 7 described.

7 shows an arrangement 700 containing several LED sub-matrices 102 . 304 and corresponding portions of the driver substrates 302 . 402 , as in 6 shown mounted on a support has, according to various Embodiments. As in 7 shown, the multiple LED sub-matrices 102 . 304 and corresponding portions of the driver substrates 302 . 402 on a carrier 702 to be appropriate. The carrier 702 may comprise a grid, which may be made of a printed circuit board (PCB) material or ceramic and / or semiconductor material and the like. The carrier can have multiple tracks 704 and contact surfaces 706 , which are electrically conductive with the multiple tracks 704 and about these with the driver substrates 302 . 402 are connected. Furthermore, one or more chip (s) can 708 . 710 be provided to electrically contact surfaces 706 to be connected, for. B. via wire bonds (not shown). The chips 708 . 710 may be configured as a control unit (eg, a microcontroller and / or a digital signal processor (DSP)), and / or as a power supply such as a power supply. An AC / DC converter or DC / DC converter (eg, a DC / DC buck converter), which may be configured to convert an input voltage to a voltage needed to, for example, the entire LED -Matrix 100 or sections of the LED matrix 100 (eg one or more LED sub-matrix (s) 102 ) to supply. In various embodiments, the controller may be configured to each LED 310 to give the desired modulation parameter (s). The modulation parameter (s) may include, for example, duty cycle, pulse density, t _on (time period in which the LED is activated), t _off (time period in which the LED is activated), average current, and the like.

8th shows a flowchart illustrating a method 800 for making a device illustrated.

The procedure 800 can in 802 providing a substrate having a first side and a second side opposite the first side, in FIG 804 forming a plurality of drive circuits on the first side of the substrate, wherein each of the plurality of drive circuits is configured to drive a current from the first side of the substrate to the second side of the substrate, and in FIG 806 forming at least one load interface on the second side of the substrate, wherein the at least one load interface is configured to supply the current from the plurality of driver circuits to a plurality of loads on the second side of the substrate.

9 shows a flowchart illustrating a method 900 illustrated. The procedure 900 includes in 902 driving, by a plurality of driving circuits embedded in a first side of a substrate, an electric current from the first side of a substrate to a second side of the substrate opposite to the first side of the substrate; 904 electrically supplying, via at least one load interface on the second side of the substrate, the electrical current from the plurality of drive circuits to a plurality of loads on the second side of the substrate.

• – N × M isolierte unabhängige LED-Treiber monolithisch auf demselben Chip, z. B. demselben Halbleiterchip, integriert sein können (wobei N und M beliebige ganzzahlige Werte sind).
• – Beispiel 1: Technologie der Volumenmikromechanik auf einem an sich standardmäßigen übergangsisolierten Halbleiter (wie z. B. unter Bezugnahme auf 2A bis 2D beschrieben);
• – Beispiel 2: Technologie, die „Flipped SOI“ („gewendete SOI“) ähnlich ist, oder Technologien „Flipped SOI auf Grabenisolation“ (wie z. B. unter Bezugnahme auf 3A und 4A beschrieben).

For example, in various embodiments, a semiconductor technology implementing the LED pixel driver is provided, wherein:

• - N × M isolated independent LED driver monolithically on the same chip, z. B. the same semiconductor chip, can be integrated (where N and M are any integer values).
• Example 1: Volume micromechanical technology on a per se standard junction isolated semiconductor (such as with reference to FIG 2A to 2D described);
• Example 2: Technology similar to "Flipped SOI" or technologies "Flipped SOI on trench isolation" (such as with reference to FIG 3A and 4A described).

In various embodiments, the controlled LED current flows vertically from the driver through the substrate to the LED.

Interconnections may be on both sides of the semiconductor chip z. B. by ball grid array (BGA) technology.

In various embodiments, a grid technology is provided that includes the routing required to power each individual LED and includes the pads to receive the LED pixel drivers and other electronic components. Examples of an implementation of a grating are an FR4 substrate or a ceramic substrate or an unprocessed silicon substrate, wherein only the metallization complex is implemented.

• – N × M LED-Teilmatrix: Das einzelne LED-Pixel sollte wenigstens eine Elektrode an der Unterseite aufweisen, um die Verbindung mit der nachfolgenden Schicht herzustellen.
• – N × M LED-Teiltreiber. Die Treiber sind mit dem Substrat oben angeordnet (z. B. auf der ersten Seite 204 des Substrats 202). Jeder Treiber sollte mit dem jeweiligen LED-Pixel kontaktiert werden. Die Unterseite, welche die Schaltungen aufnimmt, und eine Seite der Durchlassvorrichtung können Verbindungskontaktflächen aufweisen, welche die Verbindung mit der letzten Schicht des Sandwichaufbaus herstellen.

In various embodiments, a sandwich construction is provided, e.g. With the following substructures starting at the top of the sandwich construction:

• - N × M LED sub-matrix: The single LED pixel should have at least one electrode at the bottom to connect to the subsequent layer.
• - N × M LED sub driver. The drivers are located at the top of the substrate (eg on the first page 204 of the substrate 202 ). Each driver should be contacted with the respective LED pixel. The underside receiving the circuits and one side of the transmission device may have connection pads that connect to the last layer of the sandwich structure.

While the invention has been particularly shown and described with reference to specific embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims , The scope of the invention is, therefore, indicated by the appended claims, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (15)

Contraption ( 200 ) which comprises: a substrate ( 202 ) with a first page ( 204 ) and one of the first page ( 204 ) opposite second side ( 206 ), the substrate ( 202 ) several driver circuits on the first page ( 204 ) of the substrate ( 202 ), each of the plurality of driver circuits being adapted to receive a current from the first side ( 204 ) of the substrate ( 202 ) to the second page ( 206 ) of the substrate ( 202 ) to drive; and at least one load interface on the second side ( 206 ) of the substrate ( 202 ), wherein the at least one load interface is adapted to supply the current from the plurality of driver circuits to a plurality of loads on the second side ( 206 ) of the substrate ( 202 ). Contraption ( 200 ) according to claim 1, wherein the at least one load is adapted to be connected to a test module, wherein the test module is adapted to test at least one of the plurality of loads on the at least one load interface based on the current, the several loads on the second page ( 206 ) of the substrate ( 202 ) is supplied from the plurality of drive circuits; optionally, the plurality of loads comprising a plurality of LED elements, and optionally wherein the test module is adapted to test the plurality of LED elements via the at least one load interface. Contraption ( 200 ) according to claim 2, wherein the test module is adapted to test the plurality of LED elements to determine the operability of the LED elements. Contraption ( 200 ) according to one of claims 1 to 3, wherein the plurality of driver circuits on the first side ( 204 ) of the substrate ( 202 ) in the substrate ( 202 ) are embedded. Contraption ( 200 ) according to one of claims 1 to 4, wherein the at least one load interface on the second side ( 206 ) of the substrate ( 202 ) in the substrate ( 202 ) is embedded. Contraption ( 200 ) according to one of claims 1 to 5, wherein the plurality of loads are transferred to the second side via the at least one load interface ( 206 ) of the substrate ( 202 ) are embedded; optionally, the at least one load interface having a plurality of recesses on the second side ( 206 ) of the substrate ( 202 ) having; Optionally, each of the plurality of wells is configured to receive at least one of a plurality of loads. Contraption ( 200 ) according to one of claims 1 to 6, wherein at least one load of the plurality of loads comprises a light emitting diode. Contraption ( 200 ) according to one of claims 1 to 7, wherein the plurality of drive circuits in a lateral direction across the first surface of the substrate ( 202 ) are electrically isolated from each other; optionally, the plurality of driver circuits in the substrate ( 202 ) are electrically isolated from each other by at least one trench. Contraption ( 200 ) according to one of claims 1 to 8, wherein at least one of the plurality of drive circuits comprises a vertical transistor. Contraption ( 200 ) according to any one of claims 1 to 9, further comprising: at least one control unit incorporated in the substrate ( 202 ) is integrated to control the multiple driver circuits. Method for producing a device ( 200 ), the method comprising: forming a plurality of driver circuits on a first side ( 204 ) of a substrate ( 202 ), wherein each of the plurality of driver circuits is adapted to receive a current from a first side ( 204 ) of the substrate ( 202 ) to a first page ( 204 ) of the substrate ( 202 ) opposite second side ( 206 ) of the substrate ( 202 ) to drive; and forming at least one load interface on the second side ( 206 ) of the substrate ( 202 ), wherein the at least one load interface is adapted to supply the current from the plurality of driver circuits to a plurality of loads on the second side ( 206 ) of the substrate ( 202 ). Method comprising: Drifting through several into a first page ( 204 ) of a substrate ( 202 ) embedded driver circuits, an electrical current from the first side ( 204 ) of a substrate ( 202 ) to a first page ( 204 ) of the substrate ( 202 ) opposite second side ( 206 ) of the substrate ( 202 ); electrical feeding, via at least one load interface on the second ( 206 ) of the substrate ( 202 ), the electric current from the plurality of driver circuits to a plurality of loads on the second side ( 206 ) of the substrate ( 202 ).  The method of claim 12, wherein at least one load of the plurality of loads comprises a light emitting diode. The method of claim 12 or 13, wherein the plurality of driver circuits in a lateral direction across the first surface of the substrate ( 202 ) are electrically isolated from each other.  The method of any one of claims 12 to 14, further comprising: Testing the plurality of loads based on the driven electrical current; optionally testing the operability of the plurality of loads, checking comprises at least one of the following parameters: Intensity of light emitted by a respective load; Light color of the light emitted by a respective load; Luminous flux of the light emitted by a respective load; Directivity of the light emitted by a respective load; Power consumption of a respective load.

Images