DE102013103582B4 - Data processing device - Google Patents

Abstract

A data processing device (1200) comprising a controller (1201) arranged to open a logical channel to another data processing device;
a receiver (1202) adapted to receive a message from the other data processing device, the message indicating a data link layer protocol packet data unit size to be used for data exchange over the logical channel, the receiver (1202) being further adapted to receive a data link layer packet data unit from the other data processing apparatus, wherein the data link layer packet data unit includes at least a network layer packet and an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet; and
a transceiver (1203) adapted to communicate with the other data processing device via the logical channel according to the data link layer protocol packet data unit size, wherein the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed.

Description

The present disclosure relates to data processing devices.

In wireless communication systems, data typically needs to be exchanged between the modem and the application processor at high data rates. In order to allow such high data rates, it is desirable to have efficient network layer protocols for data exchange that allow, for example, data to be exchanged with a low overhead and with a small number of operations (or operations) (eg, memory operations and CPU operations) , The publication US 8,098,771 B2 describes a receiver apparatus and method for receiving data units over a high-speed shared downlink channel of wireless communication systems. The publication US 7,715,344 B2 describes a method and apparatus for providing new configurations for transferring control information between a mobile terminal and a network using a common control channel. Sigmund, G. in "Technik der Netze" at pages 269-275 and 282-283 describes data communication (eg the OSI reference model and packet switching technology). Downes, K., et al. in "Internetworking Technologies Handbook" at pages 430-433 describes Ethernet technologies and Internet protocols.

According to one aspect of the disclosure, there is provided a data processing apparatus including a controller configured to open a logical channel with another data processing apparatus; a receiver adapted to receive a message from the other data processing device, the message indicating a data link layer protocol packet data unit size to be used for data exchange over the logical channel, the receiver being further adapted to receive a data link layer packet data unit from the other data processing device; The data link layer packet data unit includes at least a network layer packet and an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet and including a transceiver configured to communicate with another data processing device via the logical channel according to the data link layer protocol packet data unit size, wherein the data link layer protoc oll packet data size for the logical channel is constant until the logical channel is closed.

The controller may be configured to open the logical channel by establishing a connection with the other data processing device via the logical channel.

Further, the controller may be configured to open the logical channel by transmitting a message to the other data processing device, the message indicating that the data processing device is requesting that the logical channel be opened. In one embodiment, the data link layer protocol packet data unit size may be indicated in the message. In yet another embodiment, the data link layer protocol data unit size may be specified in bytes or words. In yet another embodiment, the controller may be configured to transmit the message over another logical channel to the other data processing device. In yet another embodiment, the other logical channel may be a control channel. In yet another embodiment, the controller may be configured to close the logical channel by releasing the connection. In one example, the data processing device may be a modem and the other data processing device may be an application processor or the data processing device may be an application circuit and the data processing device may be a modem. In yet another embodiment, the data processing device and the other data processing device may be components of the same communication device. In yet another embodiment, the communication device may be a cellular communication device.

According to another aspect of the disclosure, there is provided a data processing apparatus including a controller configured to open a logical channel with another data processing apparatus; a transmitter adapted to send a message to the other data processing device, the message indicating a data link layer protocol packet data unit size to be used for data exchange over the logical channel, the transmitter being further adapted to transmit a data link layer packet data unit to the other data processing device, wherein the The data link layer packet data unit includes at least a network layer packet and an unused portion having at least the designated data link layer header size and being at a header position for the data link layer packet data unit Network Layer packet is arranged, and further includes a transceiver configured to communicate with the other data processing device via the logical channel according to the data link layer protocol packet data unit size, the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed.

According to another aspect of the disclosure, there is provided a data processing apparatus including generating means configured to generate a data link layer packet data unit based on a data link layer header size according to another data processing apparatus for transmitting a network layer packet, such that the data link layer packet data unit comprises at least one network layer Packet and an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet.

In one embodiment, the data processing device may further comprise a determination device configured to determine the data link layer header size required by the other data processing device for transmitting a network layer packet.

In one embodiment, the data processing device may further comprise a receiver configured to receive a message from the other data processing device, the message indicating the data link layer header size required by the other data processing device to transmit a network layer packet.

In yet another embodiment, the at least one network layer packet may be an IP packet.

In yet another embodiment, the data link layer packet data unit may include a plurality of network layer packets and may include, for each network layer packet, an unused portion having at least the specified data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet header. Package is arranged.

In one example, the data processing device may be a modem and the other data processing device may be an application processor or the data processing device may be an application circuit and the other data processing device may be a modem.

In yet another embodiment, the data processing device and the other data processing device may be components of the same communication device.

In yet another embodiment, the communication device may be a cellular communication device.

According to another aspect of the disclosure, there is provided a data processing apparatus including a transmitter adapted to transmit a message to another data processing device, the message indicating a data link layer header size requested by the data processing device for transmitting a network layer packet and further including a receiver, arranged to receive a data link layer packet data unit from the other data processing device, the data link layer packet data unit containing at least a network layer packet and an unused portion having at least the specified data link layer header size and located within the data link layer packet data unit at a header position for the network layer Package is arranged.

According to one example, there is provided a data processing apparatus that includes a memory that stores, for each network layer data block of a plurality of network layer data blocks, an indication of whether an interrupt should be triggered after processing the network layer data block and further includes a processing element configured for Processing each network layer data block and initiating an interrupt after processing the network layer block if the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

In one example, the data processing device may further comprise an investigator configured to determine for each network layer data block whether the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

In yet another example, the processor may be configured to initiate an interrupt after processing the network layer data block only if the indication stored for the network layer data block indicates that an interrupt should be triggered after processing the network layer data block.

In yet another example, the interrupt may be an interrupt that triggers the transmission of a control message.

In yet another example, the indication may be stored by software.

In yet another example, the network layer data blocks may be IP data blocks and the network layer data packets may be IP packets.

In yet another example, the data processing device may be a modem of a communication device.

In yet another example, the network layer data packets may be data packets received via wireless communication and to be transmitted to an application processor of the data processing device, or data packets received from the application processor and to be transmitted via wireless communication.

According to further aspects of the disclosure, methods are provided according to the data processing devices previously described.

• 1 eine Kommunikationsanordnung zeigt;
• 2 ein Kommunikationsgerät, z.B. gemäß dem mobilen Kommunikationsgerät, zeigt;
• 3 einen Kommunikationsprozessor und einen Applikationsprozessor zeigt;
• 4 den Datenpfad in einem zellularen Modem zeigt;
• 5 ein Nachrichtenflussdiagramm für UL-Übertragung zeigt;
• 6 ein Nachrichtenflussdiagramm für DL-Übertragung zeigt;
• 7 eine Softwarearchitektur für die Datenebene zeigt;
• 8 einen Kommunikationsprozessor zeigt;
• 9 eine Schnittstellenarchitektur zeigt;
• 10 ein Flussdiagramm betreffend einen Kommunikationsaufbau eines Modus-Applikationsprozessors zeigt;
• 11 eine Paketdateneinheit zeigt;
• 12 eine Datenverarbeitungsvorrichtung, eingerichtet zum Empfangen einer Anzeige einer konstanten Datenverbindungsschicht-Dateneinheitsgröße von einer anderen Datenverarbeitungsvorrichtung zeigt;
• 13 ein Flussdiagramm zum Anzeigen einer konstanten Datenverbindungsschicht-Dateneinheitsgröße zeigt;
• 14 eine Datenverarbeitungsvorrichtung, eingerichtet zum Anzeigen einer konstanten Datenverbindungsschicht-Dateneinheitsgröße von einer anderen Datenverarbeitungsvorrichtung zeigt;
• 15 ein Flussdiagramm zum Empfangen einer Anzeige einer konstanten Datenverbindungsschicht-Dateneinheitsgröße zeigt;
• 16 eine Datenverarbeitungsvorrichtung, eingerichtet zum Einfügen eines Datenverbindungsschicht-Headerbereichs in eine Datenverbindungsschicht-Dateneinheit zeigt;
• 17 ein Flussdiagramm zum Einfügen eines Datenverbindungsschicht-Headerbereichs in eine Datenverbindungsschicht-Dateneinheit zeigt;
• 18 eine Datenverarbeitungsvorrichtung, eingerichtet zum Empfangen einer Datenverbindungsschicht-Datenpaketeinheit mit einem eingefügten Datenverbindungsschicht-Headerbereich zeigt;
• 19 ein Flussdiagramm zum Empfangen einer Datenverbindungsschicht-Datenpaketeinheit mit einem eingefügten Datenverbindungsschicht-Headerbereich zeigt;
• 20 ein Nachrichtenflussdiagramm für eine Kommunikationsaufbaukonfiguration zeigt;
• 21 ein Nachrichtenflussdiagramm für eine Übertragung einer Datenverbindungsschicht-PDU zeigt;
• 22 ein Nachrichtenflussdiagramm für eine Übertragung einer Datenverbindungsschicht-PDU mit Flusskontrolle zeigt;
• 23 ein Nachrichtenflussdiagramm für eine Neukonfiguration einer PDU-Größe zeigt;
• 24 ein Nachrichtenflussdiagramm für einen Neu-Synchronisation zeigt;
• 25 ein Nachrichtenflussdiagramm ohne Streuungs-Operation zeigt;
• 26 ein Nachrichtenflussdiagramm mit Streuungs-Operation zeigt;
• 27 ein Nachrichtenflussdiagramm mit Sammel-Operation zeigt;
• 28 eine Datenverarbeitungsvorrichtung zeigt, die einen Datenverbindungsschicht-Datenblock verarbeitet;
• 29 ein Flussdiagramm für die Verarbeitung Netzwerkschichtdaten zeigt;
• 30 ein Nachrichtenflussdiagramm für die Synchronisierung mittels eines vorherigen Pufferzeigers zeigt;
• 31 ein Nachrichtenflussdiagramm für die Synchronisierung mittels eines Semaphors zeigt;
• 32 ein Nachrichtenflussdiagramm für die Synchronisierung mittels eines Interrupts (Unterbrechers) zeigt;
• 33 ein Nachrichtenflussdiagramm für die Synchronisierung mittels eines nächsten Zeigers zeigt; ....
• 34 ein Nachrichtenflussdiagramm für die Synchronisierung mittels eines vorherigen Zeigers zeigt.

In the drawings, like reference characters generally refer to the same parts throughout the several views. The drawings are not necessarily to scale; Instead, value is generally placed upon the illustration of the principles of the invention. In the following description, various embodiments of the invention will be described with reference to the following drawings, in which:

• 1 a communication arrangement shows;
• 2 a communication device, eg according to the mobile communication device, shows;
• 3 shows a communication processor and an application processor;
• 4 shows the data path in a cellular modem;
• 5 shows a message flow diagram for UL transmission;
• 6 shows a message flow diagram for DL transmission;
• 7 shows a software architecture for the data layer;
• 8th shows a communication processor;
• 9 shows an interface architecture;
• 10 Fig. 10 shows a flowchart relating to communication establishment of a mode application processor;
• 11 shows a packet data unit;
• 12 a data processing device configured to receive a display of a constant data link layer data unit size from another data processing device;
• 13 Fig. 10 shows a flow chart for displaying a constant data link layer data unit size;
• 14 a data processing device configured to display a constant data link layer data unit size from another data processing device;
• 15 Fig. 10 shows a flow chart for receiving an indication of a constant data link layer data unit size;
• 16 a data processing device configured to insert a data link layer header area into a data link layer data unit;
• 17 Fig. 10 shows a flowchart for inserting a data link layer header area into a data link layer data unit;
• 18 a data processing apparatus configured to receive a data link layer data packet unit having an inserted data link layer header area;
• 19 Fig. 10 shows a flow chart for receiving a data link layer data packet unit with an inserted data link layer header area;
• 20 shows a message flow diagram for a communication establishment configuration;
• 21 shows a message flow diagram for a data link layer PDU transmission;
• 22 shows a message flow diagram for a flow-control data link layer PDU transmission;
• 23 shows a message flow diagram for reconfiguring a PDU size;
• 24 shows a message flow diagram for a re-synchronization;
• 25 shows a message flow diagram without scatter operation;
• 26 shows a message flow diagram with scatter operation;
• 27 shows a message flow diagram with collection operation;
• 28 a data processing apparatus processing a data link layer data block;
• 29 a flowchart for processing shows network layer data;
• 30 shows a message flow diagram for synchronization by means of a previous buffer pointer;
• 31 shows a message flow diagram for synchronization by means of a semaphore;
• 32 shows a message flow diagram for synchronization by means of an interrupt;
• 33 shows a message flow diagram for synchronization by means of a next pointer; ....
• 34 shows a message flow diagram for synchronization by means of a previous pointer.

The following detailed description makes reference to the accompanying drawings which, for purposes of illustration, show specific details and embodiments in which the invention may be practiced. These aspects of this disclosure are described with enough detail to enable one skilled in the art to carry out the aspects. Other aspects of this disclosure may be utilized and structural, logical, and electrical changes may be made without departing from the spirit of the aspects. The various aspects of this disclosure are not mutually exclusive, and some aspects of this disclosure may be combined with one or more aspects of the disclosure to create new aspects.

A data link layer protocol for data exchange between a modem and an application processor in a wireless communication device may be based on protocol handshake about each PDU (Protocol Data Unit) transmission, on a single PDU transmission without PDU framing format, and based on transmission of variable size PDUs.

On the other hand, with respect to the protocol handshake, an exchange of control information before and after each PDU transmission reduces the available bandwidth due to the bandwidth required for the transmission of control information. Usually, the data link layer protocol is handled in the software (SW). SW processing of the control information may result in interrupt processing for each control information, which means SW latencies relative to expensive context switches in a modem-side real-time processing system. SW processing for each control message not only increases CPU utilization but also reduces available throughput due to processing latencies. Considering two interrupts for each PDU and a maximum IP packet size of 1.5 kbytes at 100 Mbps downlink rate results in an interrupt load of 17000 IRQs / s. This interrupt load is well beyond the possible limit for CPUs of today's cellular modems.

With regard to single PDU transmissions without PDU framing format, it should be noted that either a single IP packet can be transmitted via PDU, or many IP packets can be transmitted in a PDU in a streaming format involving an IP packet followed directly by the next IP packet. The transmission of individual IP packets by means of PDU limits the network throughput. Considering a SW latency of approximately 100 μs for the processing of each of the two IRQs per PDU, the network throughput, for example, for a MIPI HSI physical link of 200 Mbps, is only about 46 Mbps, that is less than 25%. The transmission of many IP packets per PDU increases the connection efficiency. However, the IP packets are usually unavailable in a contiguous memory space, with no gaps between the packets. In this case, forming a PDU from many IP packets may require first copying IP packets from different memory locations to a contiguous location. Memory copy operations are then necessary that overburden the available memory bandwidth of today's cellular modems. In accordance with one aspect of this disclosure, a more efficient implementation is achieved through the use of a scatter-gather DMA (direct memory access).

With regard to the transmission of PDUs of variable size, it should be noted that if each PDU has a different size, which is known to the receiver just in time, it may prevent the receiver from efficiently providing buffers for PDU reception. Memory allocation can typically take place just prior to each reception of a PDU. The memory allocation operation, specific to each PDU, adds additional load to the CPU. Furthermore, supporting a flexible PDU size results in a more complex memory management scheme required to allow more efficient use of limited system memory.

In accordance with one aspect of the disclosure, efficient inter-processor communication, for example, between an LTE-enabled cellular modem and an application processor for user data exceeding data rates of 100 Mbps, is provided. For example, a data link layer protocol and efficient implementation over the MIPI HSI physical level are provided that require the required throughput of 100 Mbps download and 60 Mbps upload of LTE, efficient use of low protocol overhead network bandwidth, power efficient transmission, and very low CPU Performance Requirements for Processing Data Link Layer Protocols.

1 shows a communication arrangement 100 ,

The communication arrangement 100 includes radio cells 101 with each radio cell 101 from a respective base station 102 is operated. The base stations 102 are for example part of a radio access network of a mobile communication network. A mobile device 103 that is in one of the radio cells 101 located, can with the base station 102 that the radio cell 101 operates, communicate (via the so-called air interface) and so can with a communication connection to another mobile terminal 104 that in the same radio cell 101 or in a different radio cell 101 (or also a radio cell of another mobile communication network), a core network of the mobile communication network or other communication networks such as the Internet or other mobile communication networks.

The mobile communication network may be a cellular mobile communication network according to various standards. For example, the mobile communication network is a wireless communication system according to GSM (Global System for Mobile Communication), UMTS (Universal Mobile Telecommunication System Universal Mobile Telecommunication System), or LTE (Long Term Evolution).

The mobile communication network may also be a local area network or a wide area network, for example, wireless local area network (WLAN) standard. The base stations 102 may be access points (or access points) in this example. It should be noted that aspects of this disclosure may also be based on other communication networks (which are not necessarily cellular), such as Bluetooth pico networks, etc.

The mobile device 103 can act as a receiver in case of a downlink transmission (ie transmission from the base station 102 to the mobile terminal 103 ) and can act as a receiver in the case of an uplink transmission (ie transmission from the mobile terminal 103 to the base station 102 ) act.

An example of the structure of a mobile terminal 103 is in 2 given.

2 shows a communication device 200 , eg according to the mobile communication device 201 ,

The communication device 200 can be a processor 202 , such as a microprocessor (for example, a central processing unit (CPU) or any other type of programmable logic device (which may act as a controller, for example). Furthermore, the communication device 200 a first memory 204 for example, a read-only memory (ROM) 204 and / or a second memory 206 , for example a Random Access Memory (RAM) 206 , include. In addition, the communication device 201 a display 208 , such as a touch-sensitive display, for example, a liquid crystal display (LCD) or a display with light emitting diode (LED), or a display with organic light emitting diodes (OLED - organic light emitting diode) include , However, any other type of display than the display can 208 be provided. The communication device 200 may additionally include any other type of suitable output device (not shown), such as a speaker or vibration actuator. The communication device 200 can be one or more input devices that use a keypad 210 including a variety of buttons. The communication device 200 In addition, any other suitable input device (not shown) such as a microphone, for example, for voice control of the communication device 200 , include. In the event that the display 208 as a touch-sensitive display 218 is implemented, the keypad can 210 through the touch-sensitive display 218 be implemented. In addition, the communication device 200 optionally a coprocessor 210 involve to workload from the processor 202 to decrease. In addition, the communication device 200 a variety of transceivers 214 . 218 include, which may be part of a communication circuit and the communication device 200 allow to use different radio access technologies for communication. The components described above may be interconnected via one or more lines, for example implemented as a bus 216 be connected. The first store 204 and / or the second memory 206 For example, a volatile memory such as a Dynamic Random Access Memory (DRAM) or a nonvolatile memory, such as a Programmable Read Only Memory (PROM), an Erasable PROM (Erasable PROM) PROM), an EEPROM (Electrically Erasable PROM) or a flash memory, eg a floating gate memory, a charge trapping memory, an MRAM (Magnetoresistive Random Access Memory). Mangetoresistive Random Access Memory) or a Phase Change Random Access Memory (PCRAM). The program code used to execute and thereby control the processor 202 (and optionally the coprocessor 212 ) may be in the first memory 204 be saved. Data (for example, the messages received or to be transmitted via the first transceiver 214 ) for processing by the processor 202 (and optionally the coprocessor 212 ) can in the second memory 206 be saved.

Every transceiver 214 . 218 is with one or more associated antennas 222 . 224 coupled by the transceiver 214 . 218 be used for transmitting and receiving radio signals. The communication device 201 and one or more of the transceivers 214 . 218 may also be configured to provide MIMO radio transmission.

Furthermore, the communication device 200 a picture and / or video camera 220 which is set up for a videoconference via the communication device 200 provide.

Furthermore, the communication device 200 a subscriber identity module (SIM), for example a UMTS Subscriber Identity Module (USIM), for identifying a user and subscriber 216 of the communication device 200 for example, for the use of a cellular wide area communication network 103 ,

The processor 202 For example, audio processing circuits such as an audio decoding circuit and / or audio encoding circuit configured to decode and / or encode audio signals according to one or more of the following audio encoding / decoding technologies: ITU G.711, Adaptive Multi-Rate Narrowband (AMR-NB) Rate Narrowband), Adaptive Multi-Rate Wideband (AMR-WB), Advanced Multi-Band Excitation (AMBE) Broadband, etc.

For example, the first transceiver 214 so that it implements an interface according to a cellular communication system (such as UMTS or LTE). In this case, the first transceiver corresponds 214 for example, a communication chip or a Communication processor that acts as a cellular modem that with the processor 202 (which acts as an application processor, for example, processes applications and provides multimedia features) corresponds. The communication between the communication processor and the application processor is also referred to as inter-processor communication (IPC) and is known in the art 3 shown.

3 shows a communication processor 301 and an application processor 302 ,

The communication processor 301 acts as a cellular modem.

The communication processor 301 and the application processor 302 are connected via an IPC interface through an IPC protocol driver 303 , a physical IPC driver 304 and IPC hardware (HW) is implemented, which are present both on the side of the application processor and the communication processor. It should be noted that the exchange of audio data as a PCM (Pulse Code Modulation) sample can be handled by a separate interface.

In the communication processor 301 implements a cellular protocol stack (PS) 305, ie, a protocol stack according to the cellular communication technology used by the communications processor 301 is supported. User data is transferred from / to the cellular protocol stack (PS) to the IPC via centralized memory management called packet buffer manager (PBM). The user data is routed along the data plane as IP packets using multiple logical channels. Each logical channel corresponds to an associated packet data network (PDN) connection. The term PDN connection refers to a packet data path connection to a specific access point name (APN) resulting in an association of a particular receiver IP address. In a 2G / 3G network, a PDN connection is established for each primary PDP context, while in a 4G network a given bearer (bearer) is used to establish the PDN connection. The term PDN connection is used as a generic term to abstract from the specific radio access technology (RAT), whether 2G, 3G or 4G.

There is no TCP / IP stack on the cellular modem side in the data path from the IPC interface 303 . 304 . 305 over PBM 306 to PS 305 that handles IP address based routing.

The central packet buffer manager (PBM) 306 provides a common packet buffer between the IPC interface and the protocol stack 307 is used. There is no copying of data between the PS 305 and the IPC interface necessary. The IPC interface provides DMA (direct memory access) capabilities with scatter / gather processing of linked lists. A highly efficient, high throughput data path is enabled in this way.

The control plane uses at least one particular channel via a serial IO (input output) handler (S-IO) 308 to an AT (Attention Attention) handler 309 , The S-IO handler 308 implements TX (transmission) and RX (reception ring buffers) supplies via specific interfaces in the direction of drivers and applications. The application in this case is the AT command handler 309 , The control channel uses AT commands. Alternatively, remote procedure calls (RPCs) may be routed to an RPC client on the cellular modem side based on function calls along the same path.

• • IPC-HW-Blöcke 305,
• • Physikalischer-IPC-Treiber 304, der die Hardware versorgt,
• • IPC-Protokolltreiber 303, der Datenverbindungsschicht- und MAC-Funktionalität bereitstellt.

The IPC interface is based on the three main components:

• • IPC HW blocks 305 .
• • Physical IPC driver 304 who supplies the hardware,
• • IPC protocol driver 303 providing data link layer and MAC functionality.

• • MIPI (Mobile Industry Processor Interface - mobile Industrieprozessorschnittstelle) serielles Hochgeschwindigkeitsnetzwerk (HSI - High-Speed Serial Interface),
• • USB (Universal Serial Bus - universeller serieller Bus) Hochgeschwindigkeits-Interchip-Schnittstelle (HSIC - High Speed Inter-chip Interface),
• • USB 2.0 Hochgeschwindigkeit (HS - High Speed).

The control and data flow of the IPC interface depends on the hardware solution and the IPC protocol. According to one aspect of this disclosure, the communications processor supports 301 a serial IPC connection via three interfaces:

• MIPI (Mobile Industry Processor Interface) Serial High Speed Serial Interface (HSI),
• • USB (Universal Serial Bus) High Speed Interchip Interface (HSIC),
• • USB 2.0 High Speed (HS - High Speed).

For example, only one of these interfaces is in the mobile terminal 103 used. For example, a simultaneous operation of a MIPI HSI, USB HSIC or USB HS interface for IPC is not provided.

A more detailed illustration of the routing through logical channels of the IPC interface on the cellular modem side is in FIG 4 given.

4 shows the data path in a cellular modem 400 ,

The cellular modem 400 includes a UPC interface 401 according to IPC components 303 . 304 . 305 , an S-IO 402 according to the S-IO 308 , a PBM 403 correspond to the PBM 306 , a command handler 404 according to the command handler 309 and a protocol stack 405 according to the command handler 309 , The cellular modem 400 further includes a packet traffic manager 406 and a RAT module 407 for any supported cellular communication technology (these are not in 3 ) Shown.

Control channels (hatched) and data channels (shown without hatching) transport data to and from the components. Forwarding of the high bandwidth data path is managed by the packet buffer manager (PBM). The dynamic forwarding of a logical IPC channel (corresponding to a channel ID) to a context ID of PS (PTM ID) is performed by a router component of the PBM 403 handled. The PBM clients 403 register at system startup, the channel assignments for each PDN connection are handled by AT commands.

The PBM 403 provides a complete abstraction of the specific IPC interface to the PS 405 ready. The PBM 403 can be seen as acting as a middleman.

Along similar lines, the packet traffic manager (PTM) supports abstraction of the various RATs (provided by RAT modules 407 ) compared to the rest of the system.

The control path and optionally data with low bandwidth go through the S-IO module 402 , The control path is used for call control and PDP context (content) control. On the application processor side, the control channels are accessible as serial ports that provide a terminal interface over the tty layer.

It should be noted that in the case of a MIPI-HSI-IPC interface, the control path and optionally low bandwidth data over the PBM 403 in the direction of S-IO 402 (not in 2 shown) go. The IPC channel usage is at compile time (eg with the exception of the channels 0 , which is used for the IPC control) configurable.

• • AT-Befehle zur Anrufsteuerung, ergänzende Dienste. SMS, SIM Toolkit, Treiber und Zugangskontrolle, usw.
• • Schaltungswechseldaten
• • MUX-Kanalzuweisung

The control of the modem at the application level between the modem of the communications processor 301 and the application processor 302 , is implemented through the use of AT commands. In the context of an AT-based architecture, an SW multiplexer can be added. The SW multiplexer provides a number of logical channels (DLC) serving as AT terminals on the AP side. The logical channels are mapped to the top of one of the control channels of the physical IPC physical interface. The multiplexer protocol is a data connection protocol (level 2 of the OSI model) using high level data link control (HDLC) -like framing, virtual data channels, and channel control. The MUX protocol controls the virtual channels and conveys user data over the virtual channels. Typical data generated by user applications are:

• • AT commands for call control, supplementary services. SMS, SIM toolkit, drivers and access control, etc.
• • Circuit change data
• • MUX channel assignment

An example of a standard of DLCs (Data Link Connections) is given in Table 1. Table 1 DLC0 Mux control channel DLC1 Call control commands - AT cmds DLC2 CSD (circuit-switched data / multimedia calls) DLC3-5 Low bandwidth PDN connection facility and data DLC6 Call settings, Phonebook, SMS, SIMTK DLC7 Free DLC8 XDRV, SYSTEM - Audio Management DLC9 Location Services - A-GPS DLC10 Free DLC11 CIQ

The data channels end up as network interfaces on the AP side 320 that enter a network protocol stack (eg TCP / IP stack).

Each PDN connection ends as a separate network interface 320 with a specific IP address on the application processor side. A PDN connection corresponds to a primary PDP context for a UMTS communication system or standard carrier for an LTE communication network. User data of a secondary PDP context or carrier is routed over the same IPC channel as the corresponding primary PDP context or carrier.

The PBM 306 supports shared buffer management between the protocol stack 307 and the IPC interface. The PBM 306 indicates a memory pool of the operating system 303 that on the application processor 302 runs when the mobile device starts up 103 , too. The PBM serves from this storage pool 306 Buffer requests from the IPC interface or the protocol stack 307 , No OS level memory allocation is necessary after startup. The PBM 206 sets packet buffers and certain buffer descriptors to the protocol stack 307 and the IPC interface ready.

There are two types of buffers and corresponding buffer descriptors: transfer buffer / descriptor (TB / TD) and segment buffer / descriptor (SB / SD).

A transfer buffer is an elementary unit of IPC transfer, i. the PDU (physical data unit), which is transmitted as an elementary unit via the physical lines of the IPC interface. A transfer buffer contains a collection of IP packets. A transmission buffer is described via a transmission buffer descriptor (TD).

A Segment Descriptor (SD) points to a single packet. The packet may be part of a transmission buffer in the uplink (UL) or a separate buffer itself in the downlink (DL).

By transmitting multiple IP packets in a single large IPC transmission, a data path with minimal SW interaction is enabled. On the HW side, the IPC interfaces traverse autonomous connection lists of buffer descriptors due to built-in scatter / gather scattered-list DMA capabilities.

The data path processing in the UL direction from the application processor 302 to the connection processor 301 is in 5 shown.

5 shows a message flow diagram 500 for UL transmission.

The message flow is between an IPC hardware 501 , for example, according to the IPC hardware 305 the communications processor 301 , an IPC driver 502 , for example according to the physical IPC driver 304 and IPC protocol drivers 303 the communications processor 301 , a PBM 503 , for example according to the PBM 306 . 403 , and a PTM 504 , for example according to the PTM 504 , instead of.

From left to right are IP packets 505 into the communications processor via a physical line. The IP packets 505 are part of an IPC transmission. Every transmission is through the IPC hardware component 501 in a previously assigned transfer buffer (TB) 506 . 507 saved. Whenever a transmission buffer 506 through the IPC hardware 501 is completely filled, this will be sent to the IPC driver 502 via an interrupt service (interrupt service). In this example, there are two transmission buffers 506 . 507 shown. The lower transfer buffer 507 is currently through the IPC hardware 501 filled while the upper transfer buffer 506 already to the IPC driver 502 has been handed over.

The IPC driver 502 parses the received transfer buffer 506 and updates a segment descriptor (SD) 508 for every packet in the transmission buffer 506 is available. Processing results in a linked list of segment descriptors 508 for each transmission buffer 506 . 507 , The list of segment descriptors 508 finally gets over the PBM 503 at the PTM 504 to send to the network side (ie the base station 102 ) of the cellular network.

The data path processing in the DL direction from the communication processor 301 to the application processor 302 is in 6 shown.

6 shows a message flow diagram 600 for DL transmission.

The message flow is between an IPC hardware 601 , for example, according to the IPC hardware 305 the communications processor 301 , an IPC driver 602 , for example according to the physical IPC driver 304 and IPC protocol drivers 303 of the communications processor 301 , a PBM 603 , for example according to the PBM 306 . 403 , and a PTM 604 , for example according to the PTM 504 , instead of.

The IPC driver 602 receives a linked list of segment descriptors 605 from the PTM 604 over the PBM 603 , Each segment descriptor 605 points to an IP packet 606 that from a base station 102 of the cellular network. The IPC driver 602 parses the length of each packet by the segment descriptors 605 given are. Based on the length information, the IPC driver formats 602 an IPC transmission. Formatting involves compiling a transfer header and adding a segment descriptor for a zero padding at the end of the transfer.

Finally, the IPC driver programs 602 (eg an IPC descriptor) the IPC hardware 601 with the first segment descriptor to be sent for a particular transmission. The IC hardware 601 processes the linked list of segment descriptors 605 that independently obtains all data from the corresponding segment buffers (SB) 505 sent.

The overall data plane software architecture according to one aspect of this disclosure is disclosed in U.S.Pat 7 shown.

7 shows a software architecture 700 for the data level.

The software architecture 700 includes a cellular protocol stack 701 according to the protocol stack 307 as part of the NAS (Non-Access Stratum) an implementation of a PTM 711 , according to the PTM 406 , the platform services 702 as runtime services, PDM services 705 , for example according to the PBM 506 , which includes and includes as SIO services 712 an implementation of an S-IO 710 , according to the S-IO 308 , Connection stack 503 holding a USB stack 709 and drivers 504 contains, as a connection driver, a MIPI_HSI driver 706 for a MIPI-HSI interface used as the IPC interface in one aspect of the disclosure.

In 7 is shown as the PS 702 , the PBM 705 and the IPC interact. This in 7 The context diagram shown is a high level diagram showing the components along with their inputs and outputs to / from other software components. The PBM component 705 represents a service interface 707 to the PS 501 and a driver interface 708 to the IPC component MIPI HSI drivers 706 and USB stack 709 ready.

The task of the PBM is the memory management. It provides services for allocating and releasing buffers and the associated descriptors for transmission and segment buffers. The PBM 705 provides the allocation and release of transmit and segment buffers. The UL has a transfer buffer 506 . 507 usually multiple IP packets, and a segment descriptor 508 is every IP packet 505 in a transmission buffer 506 . 507 assigned. In the DL is every segment descriptor 605 an IP packet 606 assigned in a specific segment buffer.

The second task of the PBM 705 is to support the packet forwarding. The PBM 705 is concerned with the registration of clients: PTM, USB HS, USB HSIC, MIPI HSI and S-IO. It manages the ID mapping from the device ID of a driver to the channel ID to the IPC and the PTM ID of the PTM of PS, as in 4 shown. Based on the forwarding information, the PBM manages 705 the transfer of descriptors from one side to the other side. Furthermore, the PBM supports 705 the UL flow control initiated by the PTM 711 by restricting access to new buffers in a flow control situation.

The PTM 711 provides services for IP packet forwarding and filtering. The generated IP packet lists via Network Service Access Point Identifier (NSAPI), according to a traffic flow template, provides the PTM-ID for NSAPI mapping and performs TCP-ACK prioritization in the UL direction. In the UL, the PTM 711 tracking data buffer status for reporting to the cellular network based on current data transfer status / rate.

The USB HS, USB HSIC, MIPI HSI and S-IO clients use PBM services 705 for processing linked lists of user data.

• • Frage Übertragungspuffer (TB) vom PBM 705 an
• • Frage Übertragungs- und Segment-Deskriptoren vom PBM 705 an
• • Parse Übertragungspuffer, empfangen über IPC-HW 305
• • Erzeuge IP-Paket bezogene Segment-Deskriptoren-Liste für TB 506
• • Gebe Liste zu PBM 705 weiter, um zu PS 701 weitergeleitet zu werden.

For UL processing, the IPC components provide the following operations:

• • Question Transfer buffer (TB) from the PBM 705 on
• • Question transmission and segment descriptors from the PBM 705 on
• • Parse transmission buffer, received via IPC-HW 305
• • Create IP packet related segment descriptor list for TB 506
• • Give list to PBM 705 continue to PS 701 to be forwarded.

• • Empfange IP-Pakete von PBM 705 als verlinkte Liste von Segment-Deskriptoren vom PS 701
• • Formatiere verlinkte Liste von IP-Paketen für Übertragung
• • Liefere Liste zu IPC-Hardwaremodul 505
• • Veröffentliche Hinweis für Segment-Deskriptoren an PBM.

For DL processing, the IPC components provide the following operations:

• • Receive IP packets from PBM 705 as a linked list of segment descriptors from the PS 701
• • Format linked list of IP packets for transmission
• • Get List to IPC Hardware Module 505
• • Publish notice for segment descriptors to PBM.

An example of the underlying hardware for the IPC architecture, as in 3 is shown in 8th shown.

8th shows a communication processor 800 ,

The communication processor 800 includes a processing component 801 eg a baseband chip, a power management unit 802 , a store 803 , an oscillator 804 , a transceiver component 805 and front-end components 806 that with antennas 807 are connected.

• • USB 2.0 HS
• • USB HSIC
• • MIPI HSI

In this example, multiple interfaces to the application processor 302 supported:

• • USB 2.0 HS
• • USB HSIC
• • MIPI HSI

Appropriate interface components 808 . 809 . 810 are in the processing element 801 provided.

All three of the supported IPC interfaces can provide built-in DMA capabilities with scatter / gather linked-list processing. A high performance, high throughput data path is thereby enabled.

According to one aspect of the disclosure, only one of the supported interfaces to the application processor becomes 302 used. In the following it is assumed that the MIPI-HSI interface is used and that the MIPI-HSI component 810 with the appropriate MIPI-HSI component of the application processor 302 is connected to provide the IPC interface.

An implementation of the IPC interface as MIPI HSI is in 9 shown.

9 shows an interface architecture 900 ,

The architecture includes components in a cellular modem 901 (according to the cellular modem 301 ) and components are placed in an application processor 901 (correspond to the application processor 302 ) are arranged.

On the modem side, a GPIO (General Purpose Input / Output) component becomes 903 , a MIPI HSI driver 94 (For example, according to the physical IPC and / or protocol drivers 303 . 304 ) and MIPI HSI hardware 905 (according to the IPC hardware 305 ) provided.

On the application processor side, a GPIO (General Purpose Input / Output) component becomes 906 , MIPI HSI hardware 907 (according to the IPC hardware 305 ), a physical MIPI HSI driver 908 (for example, according to the physical IPC driver 303 ), and a MIPI-HSI protocol driver 909 (for example, according to the IPC protocol driver 304 ) provided.

For example, the components on the modem side correspond to the MIPI HSI components 810 the processing component 801 ,

The MIPI HSI driver 904 is at the top of the MIPI HSI hardware 905 (eg an interface controller). In this example, the MIPI-HSI driver implements 904 the HW driver 205 and the protocol driver 304 using software in a single component.

• • Konform mit der MIPI*-HSI-physikalischen Ebenen-Spezifikation
  • - Synchronisiert, über eine Leitung geführt (pipelined) und Empfänger-Echtzeit-Datenfluss
  • - Fluss- und Rahmen-Bit-Übertragungs-Modi
• • Unterstützt 16 Empfangs- und 16 Übertragungs-Kanäle
• • Unterstützt Übertragungsgeschwindigkeit bis zu 208 Mbps
• • Quellensynchrone Empfängerimplementierung unterstützt Empfangsgeschwindigkeit bis zu 230 Mbps
• • Aufweck- (wake-up) Unterstützung
  • - Empfänger unterstützt Aufwachen mit und ohne ACWAKE-Signal
• • Arbeitet mit Standard 1,2 V und 1,8 V IO-Pads

The high-speed serial interface (HSI) serial interface is provided to connect to an application processor. In one aspect of this disclosure, the MIPI-HSI component supports 810 the following properties:

• • Compliant with the MIPI * HSI physical plane specification
  • - Synchronized, pipelined and receiver real-time data flow
  • - Flow and frame bit transfer modes
• • Supports 16 receive and 16 transmit channels
• • Supports transmission speed up to 208 Mbps
• • Source-synchronous receiver implementation supports reception speed up to 230 Mbps
• • Wake-up support
  • - Receiver supports wake up with and without ACWAKE signal
• • Works with standard 1.2V and 1.8V IO pads

A data link layer protocol used by the MIPI HSI component 810 is used is described below.

The MIPI-HSI component 810 For example, an interface from the S-IO 710 (implemented by S-IO services 712 ) and use an interface from the PBM. This has dependencies on driver components, operating system, and MIPI HSI hardware (for example, part of a chip that contains the processing component 801 implemented).

The MIPI-HSI-SW concept is limited to peer-to-peer (P2P) communication. The SW protocol is based on the physical layer of the MIPI Alliance High Speed Synchronous Interface Specifications (HSI).

Examples of data link protocol commands issued by the IPC interface (eg, the processing element 801 ) are described below.

The MIPI-HSI interface supports a variable number of IPC channels: from a minimum of 2 channels to 16 channels can be activated. The step size is 2, 4, 8, and 16. Further, the MIPI-HSI operation is configurable in terms of data link layer properties and physical layer operations.

A MIPI HSI channel is available to be used as an interface for AT commands. The control channel is with the PBM 306 Driver interface and from there via S-IO 308 connected to the application on the modem side. The logical channel is connected to the outside via S-IO 308 to the PBM 306 using the PBM driver interface.

Up to 14 MIPI HSI channels are available for use as an interface for network connections or other application services. The data channels are via the PBM driver interface to the PBM 306 and from there via the PBM service interface to the PTM component 711 of the PS 701 connected.

After switching on or resetting (reset) the mobile device 103 The MIPI-HSI based IPC interface provides an indication to the application processor that the modem control path is on and running and IPC communication can begin over IPC. The events after starting are in 10 shown.

10 shows a flowchart 1000 in connection with the communication setup of a mode application processor.

In this example, assume that there are two channels with corresponding units 1001 . 1002 on the modem side and corresponding units 1007 . 1008 be used on the application processor side. Furthermore, HSI-HW 1003 on the modem side, HSI-HW 1006 on the application processor side and SCUs (System Controller Units) 1004 . 1005 both on the modem side and on the application processor side in the process involved.

at 1009 becomes an identification of the communication processor 301 specified.

at 1010 the MPI-HSI's CAREADY signal goes up to indicate that MIPI-HSI-HW 903 ready to receive an HSI frame.

at 1011 becomes a response to an ECHO data link layer command by the application processor 302 Posted. An ECHO response by the communications processor 302 indicates that the MIPI-HSI driver is ready for use. The application processor 302 Repeats ECHO Data Link Layer commands repeatedly until they arrive at 1012 be answered by an ECHO link layer command from the modem side.

at 1013 the application processor sends 302 an OPEN_CONNECT or OPEN_CONNECT_OCTET command to the modem 301 ,

at 1014 , an ACK response indicates that on the receiver side the full path from IPC to S-IO and PBM is ready towards the final destination. On the modem side, the ACK data link layer response is acknowledged upon receipt of the ready event from the command handler. Blocked application indicating that the control plane is ready. The communication processor 301 is at 1015 ready to start communication via the IPC for communicating PDUs.

The application processor 302 tolerates a certain latency for the response to the ECHO and OPEN_CONNECT and OPEN_CONNECT_OCTET command. The latency is the time required to complete the commissioning process and to be ready for use on the communications processor side.

Flow control can be activated in both directions DL and UL and separately for each data channel. For example, a design-specific setting may allow flow control for only one of the four channels in the UL and not set flow control for all UL data channels. No flow control is available for all DL data channels. The IPC sends data in the DL as soon as it has a linked list of packets from the PS 309 over PBM 306 receives.

In one aspect of the disclosure, the flow control is based on credits. The receiving device must send credits before the sender can send the first packet data unit (PDU). For example, the credits over the IPC become the application processor via a CREDIT command 302 cleverly. Each credit allows the transfer of a PDU to the communications processor 301 , If the transmitter device (communication processor in the downlink, or application processor 302 in the uplink) receives the CREDITS command, it increases its value of credits by the newly received value. For each transferred PDU, it has to reduce its credit value by one. A transmitter (device) is not allowed to transmit if its credit value is 0.

Regarding power management, both devices can 301 . 302 initiate a wakeup by pulling up its WAKE line: ACWAKE or CAWAKE. A machine 301 . 302 can only enter sleep / sleep mode if both ACWAKE and CAWAKE lines are low.

The devices can be re-synchronized by using a BREAK command, as described below.

In the following, the data connection protocol used by the MIPI-HSI interface according to one aspect of this disclosure is described. The data link protocol is used for multi-purpose data transmission over the MIPI-HSI interface in accordance with one aspect of this disclosure. This covers all types of data transmission, except for audio data that requires a specific protocol to enable audio applications to meet more stringent real-time requirements.

The data connection protocol distinguishes between control messages and data PDUs. The data link protocol reserves one of the logical channels to be used as a control channel. This channel is used to negotiate the channel configuration and transfer PDUs between the modem 301 and the application processor 302 (eg corresponding ASICs (application specific integrated circuits)) used. That is always the first channel of the interface, channel 0 , The other logical channels of the interface are used as data channels. The transmission of data PDUs is based on PDUs with fixed length data. For data channels, the data is transmitted in one or two formats, either raw format or packet format. In raw format, the data connection protocol does not require a special PDU structure. When using the packet format, the PDU is divided into a header and payload. The header provides information about the structure of the payload.

The data link protocol does not limit its use, but it provides a method to enable flow control between the transmitter and the receiver. Through the flow control protocol, the sender can be sure that the receiver is always ready to receive the data. Thus, the interface does not delay.

Since the data link protocol is a point-to-point protocol, there are always two devices involved and, for example, connected to the bus used for data exchange. These devices, for example the modem 301 and the application processor 302 , are hereinafter generally referred to as device A and device B. With regard to the data connection protocol, the only difference between the devices is that device A is the one that handles configuration management. In the actual transmission, both devices are the same. For example, the application processor (eg, an application ASIC) is the device A and the modem 301 (eg a modem ASIC) is the device B.

The control channel protocol is a fixed size PDU protocol. The PDU of the control channel is called a command. The structure of a command is as follows:

Examples of commands according to the data link protocol are given in Table 2. Table 2: List of Data Link Layer Protocol Commands value command answer direction action 0 × 0 BREAK A -> B Close all connections and reset the configuration. B <- A 0 × 1 ECHO A -> B The receiver responds with ECHO command B <- A 0 × 5 CONF_CH ACK / NAK A → B The channel specified in the channel field becomes configured for the specified connection. 0 × 7 OPEN_CONN ACK / NACK A -> B The receiver opens a connection to receive PDUs of specified length. B <- A 0 × A CANCEL_CO N ACK / NACK A -> B The open connection is terminated and closed. The transfer is terminated. B <- A 0 × B ACK A -> B The receiver has received and understood the command B <- A 0 × C NACK A -> B The recipient received the command but did not understand it B <- A 0xF CREDITS ACK / NACK A -> B The sender updates the amount of credits B <- A

For example, the following commands are recognized by an ACK or NAK command: CONF_CH, OPEN_CONN, CANCEL_CONN, and CREDITS. For example, the following commands are not recognized: BREAK, ECHO, ACK, and NAK.

It should be noted that according to one aspect of this disclosure, the instructions are always transmitted using the control channel.

BREAK command

The BREAK command is used to stop all ongoing data transfers on all channels and reset the configuration to the initial state.

After receiving a BREAK command, the receiver sends the BREAK command. The initiator must forward BREAK (with 100ms timeout) until it receives a response to the BREAK command. After receiving the BREAK response, the communication can be restarted. For example, the timeout between the BREAK commands of the initiator and the receiver is 100 ms.

For example, the BREAK command is always sent with the maximum number of channels, using channel 0, the control channel, for transmission. For example, according to the above-mentioned instruction structure, the BREAK instruction has the following structure:

ECHO command

The ECHO command can be used if the other device is present and live. When a receiver receives an ECHO command, it responds with an ECHO command. The ECHO instruction has a consistent test pattern field. It contains a previously known constant (0 × AXAFFE in this example), which is used to check the correctness of the channel configuration.

For example, the channel is always the number of the control channel, ie 0. According to the above-mentioned instruction structure, the ECHO instruction has, for example, the following structure:

CONF_CH command

The CONF_CH command is used to configure a logical channel for a particular connection. For example, according to the above-mentioned instruction structure, it has the following structure:

For example, the fields for device A of the channel and for device B of the channel have the following structure:

The values for the flow control field are given, for example, as in Table 3: Table 3: Flow Control Field value attitude 0 × 0 No flow control 0 × 1 Flow control via credits 0 × 2-0 × F Reserved for future use

The values for the data format field are given, for example, as in Table 4: Table 4: Data Format Fields value attitude 0 × 0 raw Data 0 × 1 Packet data with byte assignment 0 × 2 Packet data with half-word assignment 0 × 3 Packet data with word assignment 0 × 4 Packet data with double word assignment 0 × 5 Packet data with quadword assignment 0 × 6 Packet data with 8-fold word assignment 0 × 7 Packet data with 16-fold word assignment 0 × 8-0 × F Reserved for future use

It should be noted that the CONF_CH command is applied during startup before a channel is opened for a connection. Reconfiguration, for example, requires the channel to be closed in advance via CANCEL_CONN.

OPEN_CONN command

The OPEN_CONN command is used to open a connection to transmit fixed-size PDUs. For example, according to the above-mentioned instruction structure, it has the following structure:

The OPEN_CONN instruction includes a 16-bit wide length field. The length field determines the number of 32-bit words in the PDU. The maximum length of the PDU is 2 ^ 16 words, i. 256 Kbytes -1.

The receiver responds with the ACK command if it accepts the transmission. Otherwise, it will respond with NAK command (e.g., if a previous connection is still open). The ACK command includes the lengths of the PDU. For example, the sender may not send the first PDU until the receiver has responded with ACK.

It should be noted that according to one aspect of this disclosure, in case the connection is configured to apply flow control, the sender may not send PDUs without having received sufficient credits.

CANCEL_CONN command

The CANCEL CONN command is used to terminate the current connection requested by the OPEN_CONN command. For example, according to the above-mentioned instruction structure, it has the following structure:

The values for the direction field are given, for example, as in Table 5: Table 5: Direction field values value attitude 0 × 0 send 0 × 1 Receive 0 × 2 Send & Receive 0x3 -0xF Reserved for future use

The other device responds with the ACK command if it agrees to the termination. Otherwise, it will respond with a NAK command.

ACK command

The ACK command is used by a device to signal that the previous command sent from another device has been received, and that the receiver approves the command. The parameters of the previous command are echoed back, so the other device can check their correctness. For example, according to the above-mentioned instruction structure, it has the following structure:

NAK command

The NAK command is used by a device to signal that the previous command sent from another device has been received but was not understood and / or that the device disagrees with the previous command. For example, according to the above-mentioned instruction structure, it has the following structure:

CREDITS command

The CREDITS command can be used to support flow control from the receiver to the transmitter. When a sender device receives the CREDITS command, it increments the value of the credits by the newly received value. For each transferred PDU, it reduces the credit value by 1. A device is not allowed to send if its credit value is below 0.

The transmission of data over the MIPI-HSI interface according to the data link layer protocol is based on PDUs of fixed size, in accordance with one aspect of this disclosure. The size of the PDUs is for example matched to words (32 bits). The PDU size is signaled by the OPEN_CONN command. It remains unchanged until the connection is terminated via the CANCEL_CONN command.

In raw format, the data connection protocol does not require a special PDU setup.

The package format is in 11 shown.

11 shows a data connection packet data unit (PDU) 1100 ,

In package format is the PDU 1100 in a header 1101 and a payload 1102 divided up:

The header 1101 provides information about the structure of the payload 1102 ready. The packet data in the payload 1102 , in this example, the packages 1103 . 1104 . 1105 are compensated according to the configured orientation by means 1106 Voted.

The structure of the header is for example as follows:

The header contains a packet descriptor in succession 1107 for every package 1103 . 1104 . 1105 the payload 1102 , Each package descriptor 1107 Represents the start address and the size of a package 1103 . 1104 . 1105 in the payload 1102 ready. For example, the start address and size are in bytes. A special next (N) field can be used to signal if there is another packet descriptor (N = 0b1) or if the last packet descriptor is reached (N = 0b0). For example, has a package descriptor 1107 the following structure:

The package descriptors 1107 are from a CRC control value 1108 of the header 1101 followed.

The sender is responsible for ensuring that the packet data 1103 . 1104 . 1105 Start launches according to the adjustment as configured by the CONF_CH command. For half-word matching, the LSB of the packet start address must be 0b0, for word alignment, the last two LSBs must be 0b00, and so on.

The payload 1102 includes packet data created as described in the PDU header.

The distance of the packet data is determined by two parameters: matching and header area requirements of the receiver. The placement of the first byte of a packet follows the matching requests (those made by matches 1106 be taken into account). Free bytes 1109 at the beginning of each package 1103 . 1104 . 1105 are included to accommodate the header space requirements of the recipient.

It should be noted that the header space requirement parameter is preconfigured. It is determined at compile time and between the application processor 302 and the modem 301 distributed.

The PDU 1100 also contains a padding 1010 at its end.

As noted previously, the PDU size is fixed and unchanged during a connection opening with the OPEN_CONN command. Generally, in accordance with one aspect of this disclosure, a data link layer PDU size is determined which is kept constant as long as a logical channel is open (eg, in the above example, constant for connection over the logical channel). This is in 12 shown.

12 shows a data processing device 1200 indicating a constant data link layer protocol data unit size.

The data processing device 1200 includes a controller 1201 configured to open a logical channel with another data processing device and a receiver 1202 adapted to receive a message from the other data processing device, the message indicating a data link layer protocol packet data unit size to be used for data exchange over the logical channel.

The data processing device 1200 also includes a transceiver 1203 set up for data exchange with the other data processing device via the logical channel according to Data link layer protocol packet data unit size, wherein the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed.

In other words, according to one aspect of this disclosure, the size of a data link layer protocol data unit is determined when a logical channel is opened (eg, a logical channel connection is opened) and is fixed until the logical channel is closed (eg fixed for the duration of the connection). The opening of a logical channel can be understood as bringing the logical channel to a state where data can be transmitted over the logical channel (eg, opening a connection with the OPEN_CONN command), and closing a logical channel can be understood as the logical channel is brought into a state in which data can no longer be transmitted over the logical channel (until it is reopened again).

For example, the data link layer protocol data unit being exchanged includes a plurality of network layer packets (e.g., IP packets) and one or more header fields describing the starting point of the IP packets within the data link layer protocol data unit and the length of the IP packets. Further, for example, a flow control via credits may be used for the exchange of the data link layer protocol data units, as described in detail below.

The controller may be configured to open the logical channel by establishing a connection with the other data processing device via the logical channel.

The controller may be configured to open the logical channel by transmitting a message to the other data processing device, the message indicating that the data processing device is requesting that the logical channel be opened.

For example, the packet data unit size of the data link layer protocol is indicated in the message.

The data link layer protocol packet data unit size is indicated, for example, in bytes or words.

For example, the controller may be configured to transmit the message over another logical channel to the other data processing device.

The other logical channel is, for example, a control channel.

For example, the controller is set up to close the logical channel by releasing the connection.

According to one aspect of this disclosure, the data processing device is a modem and the other data processing circuit is an application processor, or the data processing device is an application circuit and the data processing circuit is a modem.

For example, the data processing circuit and the other data processing circuit are components of the same communication device. The communication device is, for example, a cellular communication device.

The data processing device 1200 For example, perform a procedure as described in 13 is shown.

13 shows a flowchart 1300 for displaying a constant data link layer data unit size.

The flowchart 1300 illustrates a method for communicating with a data processing device.

at 1301 we opened a logical channel with a data processing device.

at 1302 a message is received from the data processing device indicating a data link layer protocol data unit size to be used for the data exchange over the logical channel.

at 1303 Data is exchanged with the data processing device via the logical channel according to the data link layer protocol data unit size, the data link layer protocol data unit size being constant until the logical channel is closed.

The data processing device 1200 For example, it communicates with a data processing device as in 14 shown.

14 shows a data processing device 1400 which receives an indication of a constant data link layer data unit size.

The data processing device 1400 includes a controller 1401 configured to open a logical channel with another data processing device and a transmitter 1402 adapted to send a message to the other data processing device, the message indicating a data packet layer protocol packet data unit size to be used for data exchange over the logical channel.

The data processing device 1400 also includes a transceiver 1403 (for example, the transmitter 1402 may be arranged) for communicating with the other data processing device via the logical channel according to the data link layer protocol packet data unit size, wherein the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed.

The data processing device 1400 For example, perform a procedure as described in 15 is shown.

15 shows a flowchart 1500 for receiving an indication on a constant data link layer data unit size.

The flowchart 1500 illustrates a method for communicating with a data processing device.

at 1501 a logical channel is opened with a data processing device.

at 1502 a message is sent to the data processing device indicating a data link layer protocol data unit size to be used for the data exchange over the logical channel, the data link layer protocol data unit size being constant until the logical channel is closed.

at 1503 Data is exchanged with the data processing device via the logical channel according to the data link layer protocol data unit size, the data link layer protocol data unit size being constant until the logical channel is closed.

As described above, the transmitter includes free bytes 1109 (or in other words, unused parts of the message) containing each data 1103 . 1104 . 1105 preceded by the header requirements of the recipient. Generally, according to one aspect of this disclosure, a data processing device in a data link layer packet includes an unused portion at a header position for a network layer packet included in the data link layer packet. This is in 16 shown.

16 shows a data processing device 1600 which inserts a data link layer header area into a data link layer data unit.

The data processing device 1600 includes a generator unit (generator) 1601 adapted for generating a data link layer packet data unit based on a data link layer header size according to another data processing device for transmitting a network layer packet such that the data link layer packet data unit contains at least a network layer packet and an unused portion having at least the specified data link layer Has header size and which is located within the data link layer packet data unit at a header position for the network layer packet.

In other words, according to an aspect of this disclosure, a data processing apparatus in a data link layer packet data unit leaves free in front of a network layer packet data unit that can be used by the data link layer packet data unit receiver to provide its own data link layer header information before the data link layer packet data unit to insert the transmission (eg for forwarding) of the data link layer packet data unit. This allows the receiver to easily insert its own data link layer header information without copying the data link layer packet data unit (and, for example, separating other data link layer packet data units) to make room for data link layer header information to forward it. For example, the data link layer packet data unit may include a plurality of data link layer packet data units and the receiver may omit the headers of the data link layer headers, their own data link layer headers for each data link layer packet data unit (e.g., provided individually with data link layer header information, for example, via different channels and / or or to transmit to different receivers) in the free spaces provided before the data link layer packet data units. The data link layer header size may be previously stored in a memory of the data processing device so that the investigator can determine it by reading from the memory. The data link layer header size may also be included in a programming of the generator means (the generator) so that it can be considered in the generation of the data link layer packet data unit.

The unused portion may be used for further data link layer processing to insert data link layer header information. For example, the data link layer packets are transferred from the data processing device to another data processing device via a first data link layer protocol, and the other data processing device forwards the data layer packets according to a first data link layer protocol. The other data processing device may then use the unused space to insert control data (i.e., header data) according to the second data link layer protocol. The data link layer (or link layer) may be layer 2, and the network layer (or network layer) may be layer 3 of the Open Systems Interconnection Reference Model (OSI) model of the ISO (International Organization for Standardization) become.

The data processing apparatus may further include a detecting means arranged to determine the data link layer header size required for the other data processing apparatus for transmitting a network layer packet.

The data processing device may further include a receiver configured to receive a message from the other data processing device, the message indicating the data link layer header size required by the other data processing device to transmit a network layer packet.

The at least one network layer packet is, for example, an IP packet.

The data link layer packet data unit includes, for example, a plurality of network layer packets and includes, for each network layer packet, an unused portion having at least the indicated data link layer header size and located within the data link layer packet data unit at a location of a data link layer header of the network layer packet.

According to one aspect of this disclosure, the data processing device is a modem and the other data processing circuit is an application processor or the data processing device is an application processor and the other data processing circuit is a modem.

The data processing circuit and the other data processing circuit may be components of the same communication device.

For example, the communication device is a cellular communication device.

The data processing device 1600 For example, executes a method as in 17 shown.

17 shows a flowchart 1700 for inserting a data link layer header area into a data link layer data unit.

The flowchart 1700 illustrates a method for transmitting network layer data.

at 1701 A data link layer packet data unit is generated based on a data link layer header size required for a data processing device for transmitting a network layer packet such that the data link layer packet data unit contains at least a network layer packet and an unused portion having at least the specified data link layer header size and within the Data Link Layer packet data unit is located at a header position for the network layer packet.

The data processing device 1600 For example, it communicates with a data processing device as in 18 shown.

18 shows a data processing device 1800 that receives a data link layer data packet unit with an inserted data link layer header area.

The data processing device 1800 includes a transmitter 1801 adapted to transmit a message to another data processing device, the message indicating a data link layer header size required by the data link device for transmitting a network layer packet.

The data processing device 1800 further includes a receiver 1802 arranged to receive a data link layer packet data unit from the other data processing device, the data link layer packet data unit including at least a network layer packet and an unused portion having at least the designated data link layer header size and within the data link layer packet data unit at a header position for the network layer packet is arranged.

The data processing device 1800 For example, executes a method as in 19 shown.

19 shows a flowchart 1900 for receiving a data link layer data packet unit with an inserted data link layer header area.

The flowchart 1900 illustrates a method for receiving network layer data.

at 1901 a message is transmitted to a data processing device indicating a data link layer header size required by a network layer packet transmission data processing device.

at 1902 wherein a data link layer packet data unit including at least a network layer packet and an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet is received by the data processing device.

Using the Data Link Layer Protocol (DLP) commands, as described above, the parameters of the MIPI-HSI interface may be, for example, as in Table 6 shown to be configured. Table 6 parameter Default value attitude reach flow control 0 × 0 No flow control 0x0, 0x1 data format 0 × 0 raw 0 × 0 - 0 × 7 PDU length 0 × 3C00 15 KB 4 B - 256 kB

For example, the parameters shown in Table 7 are preconfigured using a default value (default). For example, the parameter values at compile time are determined and are provided by the modem 301 and the application processor 302 shared.

Table 7 parameter Default setting reach AP / CP-alarm includes RX data flow forwarded synchronized, forwarded Bit transmission mode frame Channel Descriptor 3 bit (8 channels) 3 bits, 4 bits CP transfer speed 208 Mbps 1, 5, 52, 104, 208 Mbps AP transmission speed it 100 Mbps 1, 5, 50, 100, 200 Mbps CP header space 4 B 0 - 64 B AP header space 18 B 0 - 64 B

The following is an example of how the communication (initially) between the data link device drivers of the device A and the device B, with reference to 20 , is built up.

20 shows a message flow diagram 2000 for a communication setup configuration.

The message flow takes place between a device A 2001 and a device B 2002 instead of.

at 2003 Device A uses an ECHO command to test whether Device B is "alive".

at 2004 the device B responds with an ECHO command.

at 2005 Device A uses a CONG_CH command to configure a channel.

at 2006 acknowledges device B with ACK to accept the channel configuration. 2005 and 2006 are performed for each channel to be used.

at 2007 Device A and Device B configure their HSI drivers and prepare the configured channels for data transfer.

The following is an example of a transmission of a data link layer PDU on channel 2 , regarding 21 , described.

21 shows a message flow diagram 2100 for a data link layer PDU transmission.

The message flow takes place between a device A 2101 and a device B 2102 instead of.

at 2103 sends one of the devices (in this example device A 2101 ) an OPEN_CONN command to indicate that it has fixed-size data PDUs on a particular channel (channel 2 in this example).

at 2104 confirms the other device (in this example device B 2102 ) command with ACK. This means that the transfer can begin.

at 2105 the device sends A PDUs of fixed size across the channel 2 ,

at 2106 sends when device A 2101 or device B 2102 want to close the channel (in this example device B 2102 ), this one CANCEL_CONN command, which comes with 2107 is confirmed by an ACK command.

The following is an example of a transmission of a data flow-controlled data PDUs to channel 2 , regarding 22 , described.

22 shows a message flow diagram 2200 a transmission of a data link layer PDU with flow control.

The message flow takes place between device A 2201 and device B 2202 instead of.

at 2203 sends one of the devices (in this example device A 2201 ) an OPEN_CONN command to indicate that it has fixed-size data PDUs on a particular channel (channel 2 ) wants to send.

at 2204 confirms the other device (in this example device B 2202 ) command with ACK.

at 2205 sends the receiver device (device B 2202 ) Credits to allow the sender to send the first PDU, which comes from device A 2206 is confirmed.

at 2207 PDUs of fixed size are transmitted. For each transmitted PDU, the sender has to lower its credit value by one. A sender is not allowed to send if his credit value is below 0.

If the transmitter device at 2008 receives the CREDITS command (acknowledged in 2209 ), it increases its value of the credit by the newly received value and can at 2210 continue to send PDUs.

at 2211 sends when device A 2201 or device B 2202 want to close the channel (in this example device B 2202 ), this one CANCEL_CONN command, which comes with 2212 is confirmed by an ACK command.

The following is an example of PDU size reconfiguration, with reference to FIG 23 , stated. In one aspect of this disclosure, each channel uses fixed size PDUs for data transmission in each direction. Changing the length requires closing an open connection and reopening it with a different length parameter. In this example, data PDUs with a change in PDU length are on channel 2 over days.

23 shows a message flow diagram 2300 for reconfiguring a PDU size.

The message flow takes place between device A 2301 and device B 2302 instead of.

at 2304 sends one of the devices (in this example device A 2301 ) an OPEN_CONN command to indicate that it has fixed-size data PDUs on a particular channel (channel 2 in this example).

at 2305 confirms the other device (in this example device B 2302 ) command with ACK. This means that the transfer can begin.

at 2306 sends the device A 2301 Fixed size PDUs.

at 2307 when the device A 2301 If you want to close the channel, it will send a CANCEL_CONN command 2308 is confirmed.

at 2309 opens the device A 2301 resend the channel by sending an OPEN_CONN command with a different length setting.

at 2310 confirmed device B 2302 the OPEN_CONN command with an ACK command. This means that the transmission can start again.

at 2311 sends the device A 2301 Fixed size PDUs with the new length.

It should be noted that the receiver can inform the sender that the PDU size should be changed.

The following is an example of a resynchronization message exchange, with reference to 24 , described.

24 shows a message flow diagram 2400 for a resynchronization.

The message flow takes place between device A 2401 and device B 2402 instead of.

at 2403 sends one of the devices (in this example device A 2401 ) an OPEN_CONN command to indicate that it has fixed-size data PDUs on a particular channel (channel 2 in this example).

at 2404 confirms the other device (in this example device B 2402 ) command with ACK. This means that the transfer can begin.

at 2405 sends the device A 2401 Fixed size PDUs

at 2406 determines one of the devices, in this example device A. 2401 , a timeout error, or other critical system error.

at 2407 sets device A 2401 the configuration of the IPC connection back.

at 2408 sends the device A 2401 (the device that detected the error condition) issued a BREAK command.

at 2409 Repeats the device A 2401 sending the BREAK command with a timeout interval of, for example, 100 ms.

Upon receipt of the BREAK command, the device B sets 2402 at 2410 its configuration of the IPC connection back and answers 2411 with a BREAK command.

at 2412 drive the device 2401 . 2402 with the normal commissioning and reconfiguration of the channels.

In one aspect of this disclosure, the modem supports 301 and the application processor 302 Scatter / Gather- (Scatter / Gather -) - processing. This is described below.

25 shows a message flow diagram 2500 without scattering operation.

A variety of IP packages 2501 is received by the modem (for uplink transmission direction), for example by means of a data link layer PDU as previously described with reference to FIG 11 and are written as a whole in an IP packet buffer 2502 saved. For example, there is an IP buffer 2502 per channel. The position of the IP packets 2501 within the IP packet buffer 2502 is through the first buffer descriptors 2503 set by the SIO 208 be signaled to the HSI interface. The location of each IP packet 2501 is from the SIO 308 the PS 307 by means of second buffer descriptors 2504 signaling to the PDCP header information in a PS header buffer according to one aspect of this disclosure 2505 can relate.

It should be noted that the hardware may not know the frame boundaries. This is addressed by fixed transfer sizes, with the transfer size between the modem 301 and the application processor 302 can be dynamically configured based on control data from the protocol stack.

A scatter operation can be used to handle the memory requirements for small packet uplink transmission, as in 26 shown to reduce.

26 shows a message flow diagram 2600 with scatter operation.

Similar to the in 25 shown data flow, are a variety of IP packets 2601 received by the modem (for uplink transmission direction), for example by means of a data link layer PDU as described above 11 described. With scatter operation, the IP packets are individually in individual IP packet buffers 2602 stored, eg in an external memory. The place to store the IP packets 2601 is by first buffer descriptors 2603 specified, signaled by the SIO 308 to the HSI interface, and is signaled by the SIO 208 to the PS 307 by means of the second buffer descriptors 2604 according to one aspect of this disclosure, refer to PDCP header information in a PS header buffer 2605 can relate.

The Scatter option splits IP frames across multiple buffers. On the other hand, IP frames can be stored in an external memory where space problems are relaxed.

For DL (downlink) direction, the IPC interface gathers (gathers) IP packets from different IP buffer locations to assemble large IP transmissions. This is in 27 shown.

27 shows a message flow diagram 2700 with gather (collection) operation.

IP packets in individual IP packet buffers 2702 stored in external memory, become a block of IP packets 2701 compiled, which is sent over the interface.

The location of the IP packets (eg in an external memory) is through the first buffer descriptors 2703 specified, signaled by the SIO 308 to the HSI interface, and is signaled by the SIO 208 to the PS 307 by means of the second buffer descriptors 2704 according to one aspect of this disclosure, refer to PDCP header information in a PS header buffer 2705 can relate.

When the stored IP packets are processed, they become a linked list of buffer descriptors pointing to the corresponding data buffer (eg IP packet buffer 2502 . 2602 . 2702 ) from the processing hardware, eg the IPC hardware 305 , followed. The hardware stops scrolling through the list if it finds a next pointer with 0 or last flag set by the software to a particular buffer descriptor.

The hardware issues an interrupt if it has processed a buffer descriptor where the software has set a tail IRQ flag.

For each buffer descriptor, (for UL transmission) or empty (for DL transmission) the hardware fills the corresponding data buffer with data transmitted from the IPC connection to the application processor 302 ,

According to one aspect of this disclosure, DMA (Direct Memory Access) is used in the processing of the IP packets. Each logical DMA channel has its own linked list of buffer descriptors prepared by SW and consumed by HW.

For uplink, each DMA channel has the starting address of the first linked-list UL buffer descriptor programmed into a next-buffer-descriptor register in the HSI hardware. For example, there are 16 nearest buffer descriptor registers to the 16 logical channels.

For example, an uplink buffer descriptor contains the information shown in Table 8. Table 8: UL Buffer Descriptor Surname size description HW SW 28 Point to next linked-list buffer descriptor element Aligned to 4 word boundary r rw data start pointer 30 Points to the beginning of the UL data area in the Buffered Word Address r w datasize 20 Length of the data area in the buffer Word-oriented r w tailIrqEn 1 Triggers the end of the transfer interrupt after the buffer descriptor has been processed, if this bit has been sent r w lastBD 1 Shows the last one to be processed by the HW r w Buffer Descriptor on HW stops traversing the linked list until it is re-enabled by SW prevBufferDescriptor 28 Points to Previous Buffer Descriptor Item of Linked List Aligned to 4 word boundary r rw doneSW 1 Set by SW when the buffer descriptor is processed - rw data buffer pointer 32 Points to the beginning of the buffer, used by SW to reclaim buffer - rw dataBufferLength 16 Length of buffer in memory used by SW to reclaim buffer - rw

At the downlink, each DMA channel has the starting address of the first linked-list DL buffer descriptor programmed in a next-buffer-descriptor register in the HSI hardware. There are 16 linked Next Buffer descriptor registers corresponding to the 16 logical channels. For example, a downlink buffer descriptor contains the information displayed in Table 9. Table 9 Surname size description HW SW nextBufferDescriptor 28 Point to next linked-list buffer descriptor element Aligned to 4 word boundary r rw data start pointer 30 Points to the beginning of the UL data area in the Buffered Word Address r w datasize 20 Size of the UL data area in the buffer Word-oriented r w tailIrqEn 1 Triggers interrupt after processing the buffer descriptor when this bit has been sent r w lastBD 1 Displays the last buffer descriptor to be processed by the HW HW stops traversing the linked list until it is re-enabled by SW r w prevBufferDescriptor 28 Points to Previous Buffer Descriptor Item of Linked List r rw Aligned to 4 word boundary doneSW 1 Set by SW when the buffer descriptor is processed - rw dataBufferPonter 32 Points to the beginning of the buffer in memory, used by SW to reclaim buffer - rw dataBufferLength 16 Length of buffer in memory used by SW to reclaim buffer - rw

As can be seen from Tables 8 and 9, the software can adjust, by means of the tailIRQ flag, whether an interrupt by the hardware after processing a buffer descriptor, e.g. the corresponding IP packet.

In general, a data processing device may have stored an indication specifying whether an interrupt should be triggered after processing a network layer data block. This is in 28 shown.

28 shows a data processing device 2800 which processes a network layer data block.

The data processing device 2800 includes a memory 2801 which stores, for each network layer data block of a plurality of network layer data blocks, an indication of whether an interrupt should be triggered after the processing of the network layer data block.

The data processing device 2800 further includes a processing unit 2802 adapted to process each network layer data block and to trigger an interrupt after processing the network layer block if the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

In other words, in accordance with one aspect of this disclosure, there is a setting for each of the plurality of network layer data blocks to trigger (or issue) an interrupt after processing the network layer data block. The setting may be stored as an indication (eg, a flag) by means of a buffer descriptor of the network layer data blocks and may be connected to the buffer (eg, the area of the first memory) in which the network layer data block is stored to be (associated).

The data processing may further include a determiner arranged to determine for each network layer data block whether the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

The processor is configured, for example, to initiate an interrupt after processing the network layer data block only if the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

The interrupt is, for example, an interrupt that triggers the transmission of a control message.

The note is stored for example by means of software.

The network layer data blocks may be, for example, IP data blocks and the network layer data packets are IP packet.

For example, the data processing device is a modem of a communication device.

According to one aspect of this disclosure, the network layer data packets are data packets received via wireless communication and to be transmitted to an application processor of the data processing device or data packets received from the application processor and to be transmitted via wireless communication.

The data processing device 2800 For example, perform a procedure as described in 29 is shown.

29 shows a flowchart 2900 for processing network layer data.

The flowchart 2900 illustrates a method for processing network layer data.

at 2901 For each network layer data block of a plurality of network layer data blocks, an indication is stored as to whether an interrupt (or interruption) should be triggered (or output) after the processing of the network layer data block.

at 2902 each network layer data block is processed and an interrupt is triggered after the processing of the network layer data block, if the indication stored for the network layer data block indicates that an interrupt should be triggered after the processing of the network layer data block.

The various components of the communication device (e.g., detector, controller, and determiner) may be implemented by means of one or more circuits. A "circuit" may be any entity implemented as any type of logic, which may be a special purpose circuit or processor, software stored in memory, firmware, or any combination thereof. Thus, a "circuit" may be a hardwired logic circuit or programmable logic circuit such as a programmable processor, such as a microprocessor (eg, a CISC (Complex Instruction Set Computer) processor or a Reduced Instruction Set Computer (RISC) computer ) - processor). A "circuit" may also be a processor that executes software, for example, any type of computer program that uses a virtual machine code, such as Java. Any other kind of implementation of the respective functions, which will be described in more detail below, may also be understood as a "circuit".

It should be further noted that embodiments described in connection with each of the data processing apparatus are valid for the other data processing apparatus and methods, respectively.

The following are message flows for uplink and downlink transmissions for different possibilities regarding the synchronization between HSI software and HSI hardware.

30 shows a message flow diagram 3000 for syncing to previous buffer pointers.

The message flow occurs between a protocol stack 3001 (eg according to the protocol stack 307 ) a buffer management entity 3002 (eg implemented as part of the operating system of the communication device 300 ), an S-IO 3003 (eg correspond to the S-IO 308 ), an HSI driver 3004 (eg according to the IPC protocol driver 303 and the physical IPC driver 304 ) and HSI hardware 3005 (eg according to the HSI hardware 305 ).

The message flow corresponds to the case of synchronization by the previous buffer pointer.

at 3006 asks the HSI driver 3004 the linked list of buffer descriptors for each channel from the buffer manager 3002 to the 3002 Assigning data buffers (eg IP packet buffers) will provide a linked list for the IP Buffer Descriptors 3007 the HSI driver 3004 ready. 3006 and 3007 for example, through the S-IO 3003 executed.

at 3008 programs the HSI driver 3004 the routing buffer descriptor for the HSI hardware 3005 ,

at 3009 receives the HSI driver 3004 IP packets from the application processor 302 about transmissions of previously defined PDU size. The IP packets are stored in IP buffers indicated by the buffer descriptors read from the linked list.

at 3010 , a buffer descriptor indicates that an interrupt should be triggered after the processing of the buffer descriptor (ie, after the processing of the IP packet to be stored in the IP buffer corresponding to the buffer descriptor). In this example, this is done when all buffers have been filled.

at 3011 asks the HSI driver 3004 new buffer descriptors from the buffer management unit 3002 on.

at 3012 updates the buffer management unit 3002 the linked list by adding buffer descriptors at the end of the linked list and making new buffer descriptors by transmitting the updated linked list to the HSI driver 3004 at 3013 ready.

at 3014 reads the HSI driver 3004 a pointer pointing to the last buffer descriptor from the HSI hardware 3005 is processed, ie the last buffer descriptor that has been processed before a buffer descriptor currently in use 3020 is processed so that a conflict between reading from and writing to the same buffer is avoided. The HSI driver 2004 for example, periodically checks the pointers indicating the last buffer descriptor so that no buffer is missed during processing.

at 3015 ends the HSI driver 3004 the linked list and submit the buffer descriptors 3014 to the S-IO 3003 ,

at 3016 parse the S-IO 3003 the displayed buffers, extracts the IP packets, and sets up a new linked list of packet buffer descriptors for the protocol stack that are attached to the protocol stack 3001 at 3017 is handed over.

at 3018 the protocol stack sends the data (eg to the base station) and marks the buffers that have been processed.

It should be noted that the buffer management unit adds buffers 3019 request new.

As an alternative to reading a pointer indicating the previous buffer descriptor, a similar synchronization can be performed by reading out the sequence number to find out the last buffer descriptor generated by the HSI hardware 3005 has been processed. However, this requires the buffer management unit 3002 to ensure monotonically increasing sequence numbers of the buffer descriptors.

The following is an example of semaphore based synchronization.

31 shows a message flow diagram 3100 for synchronization based on semaphore (s).

The message flow occurs between the protocol stack 3101 (eg according to the protocol stack 307 ) a buffer management entity 3102 (eg implemented as part of the operating system of the communication device 300 ), an S-IO 3103 (eg correspond to the S-IO 308 ), an HSI driver 3104 (eg according to the IPC protocol driver 303 and the physical IPC driver 304 ) and HSI hardware 3105 (eg according to the HSI hardware 305 ).

The message flow corresponds to the case of a semaphore synchronization.

The processing of 3106 to 3113 is similar to the processing 3006 to 3013 described with reference to 30 , It should be noted that at 3111 . 3112 . 3113 , alternatively at 3011 . 3012 . 3013 The buffer management unit can provide a linked list of buffer descriptors on request and the end of the linked list accordingly by the HSI driver 3104 can be updated.

It should be further noted that at 3109 the HSI hardware 3105 updating a semaphore by a write operation to the corresponding buffer descriptor to protect a buffer currently owned by the HSI hardware 3105 is described.

at 3114 parses the HSI driver 3104 the linked list to find buffer descriptors that are from the HSI hardware 3105 have been processed. The following processing at 3115 to 3118 is similar to the processing 3014 to 3017 , at 3118 Spoken buffer descriptors can be released. In addition, buffers may be included 3119 through the buffer management unit 3102 be reasserted, eg if the stored IP packets have been sent.

The following is an example of an interrupt-based synchronization is described.

32 shows a message flow diagram 3200 for synchronization by interrupt.

The message flow occurs between the protocol stack 3201 (eg according to the protocol stack 307 ) a buffer management entity 3202 (eg implemented as part of the operating system of the communication device 300 ), an S-IO 3203 (eg correspond to the S-IO 308 ), an HSI driver 3204 (eg according to the IPC protocol driver 303 and the physical IPC driver 304 ) and HSI hardware 3205 (eg according to the HSI hardware 305 ).

The message flow corresponds to the case of a synchronization by interrupt.

The processing of 3206 to 3213 is similar to the processing of 3006 to 3013 described with reference to 30 , It should be noted that at 3211 . 3212 . 3213 , alternatively at 3011 . 3012 . 3013 The buffer management unit can provide a linked list of buffer descriptors on request, and the end of the linked list accordingly by the HSI driver 3204 can be updated.

In this example, if an HSI hardware 3205 an IP packet has been stored in a buffer, it is an interrupt 3214 triggers. The HSI driver 3204 passes the buffer descriptor of the buffer 3215 to the S-IO 3203 and programs the beginning of the buffer descriptor 3216 for the HSI hardware 3205 ,

at 3217 the S-IO parses the buffer according to the buffer descriptor, extracts the IP packet (or IP packets in case more than one IP packet is stored in the buffer) stored in the buffer and sets up one linked list of packet buffer descriptors for the protocol stack 3201 one he put to the protocol stack 3201 at 3218 passes.

The protocol stack 3201 processes the buffers displayed and adds the processed buffers 3219 ,

The buffer management unit 3202 can buffer at 3220 reclaim (eg buffers that have been released).

The following is an example of a next-pointer-based synchronization.

33 shows a message flow diagram 3300 for syncing to the next pointer.

The message flow occurs between the protocol stack 3301 (eg according to the protocol stack 307 ) a buffer management entity 3302 (eg implemented as part of the operating system of the communication device 300 ), an S-IO 3303 (eg correspond to the S-IO 308 ), an HSI driver 3304 (eg according to the IPC protocol driver 303 and the physical IPC driver 304 ) and HSI hardware 3305 (eg according to the HSI hardware 305 ).

The message flow corresponds to the case of synchronization by a next pointer.

The processing of 3306 to 3313 is similar to the processing of 3006 to 3013 described with reference to 30 , It should be noted that at 3311 . 3312 . 3313 , alternatively at 3011 . 3012 . 3013 The buffer management unit can provide a linked list of buffer descriptors on request and the end of the linked list accordingly by the HSI driver 3204 can be updated.

at 3314 reads the HSI driver 3304 a pointer indicating the Next Buffer Descriptor to be processed by the HSI hardware 3305 , Using this pointer finds the HSI driver 3304 the last buffer descriptor out by the HSI hardware 3305 has been processed.

The processing of 3315 to 3318 is similar to the processing of 3015 to 3018 described with reference to 30 ,

The buffer management unit 3302 can buffer at 3319 reclaim (eg buffers that have been released).

The following is an example of a previous pointer-based synchronization.

34 shows a message flow diagram 3400 for the synchronization based on the previous pointer.

The message flow occurs between the protocol stack 3401 (eg according to the protocol stack 307 ) a buffer management entity 3402 (eg implemented as part of the operating system of the communication device 300 ), an S-IO 3403 (eg correspond to the S-IO 308 ), an HSI driver 3404 (eg according to the IPC protocol driver 303 and the physical IPC driver 304 ) and HSI hardware 3405 (eg according to the HSI hardware 305 ).

The message flow corresponds to the case of a synchronization by means of a previous pointer.

at 3406 asks the protocol stack 3401 a linked list of buffer descriptors from the buffer management unit 3402 on.

at 3407 maps the buffer management unit 3402 Data buffer and provides a linked list of buffer descriptors to the protocol stack 3401 ready.

at 3408 passes the protocol stack 3401 the packet buffer descriptors to the HSI driver 3404 in turn, the beginning of the buffer descriptors for the HS hardware 3405 at 3409 programmed (ie sets the first buffer descriptor).

at 3410 reads the HSI hardware 3405 IP packets from the buffers and forwards them to the application processor 302 further.

at 3411 can the protocol stack 3401 provide additional buffer descriptors that are included 3412 through the HSI driver 3404 be added to the linked list, for example by updating the end of the linked list accordingly.

at 3413 can the HSI driver 344 read out a pointer indicating the previous buffer descriptor to find out the last buffer descriptor that passed through the HSI hardware 3405 has been processed.

at 3414 parses the HSI driver 3404 the linked list and marks buffers that have been processed.

The buffer management unit 3402 can buffer at 3415 reclaim that has been processed.

It should be noted that as an alternative to using a Previous Buffer Descriptor pointer, the HSI driver 3404 may use a Next Buffer Descriptor pointer indicating the next Buffer Descriptor generated by the HSI hardware 3405 has been processed.

It is further noted that 3409 may involve the accumulation of IP packets to fill transmission frames to be transmitted over the HSI interface. This can also be done 3412 happen.

It should be noted that the synchronization by means of the next pointer (as in 33 and similar for downlink transmission as related to 32 described) as the best optimized version of the synchronization. In this case, in the UL and DL directions, the HW is programmed only at the beginning with the beginning of the buffer descriptor of a linked list of Buffer Descriptors (BD). A buffer descriptor stands for a data link layer protocol PDU. During ongoing transmissions, the SW and HW are able to independently process PDUs. The SW constantly updates the BD end of the linked list as often as new PDUs become available. The SW and HW are via an IRQ end or by reading the SW of the last HS processed BD in a special HW register.

As described above, according to one aspect of this disclosure, an efficient data link layer protocol on top of the MIPI-HSI physical layer, efficient interaction between IPC-SW and IPC-HW, and efficient interaction between IPC and cellular protocol stacks are provided. The data link layer protocol can be seen as defining an absolute minimum of control messages. By using fixed-length PDUs with optimized frame formats, the protocol handshake between two devices is limited to initial setup and flow control. The PDU format allows efficient back-to-back transmission of a plurality of IP packets per PDU. The network throughput is drastically increased, almost reaching the physical limit of the connection. To enable flow control, a credit based method is specified. The reduced protocol handshake and the transmission of a large number of IP packets in each PDU drastically increases the connection efficiency.

According to one aspect of this disclosure, the SW interaction between IPC-HW and IPC-SW is reduced to a maximum of one IRQ per PDU transmitting a plurality of IP packets. A PDU is formed by the use of DMA gathering of IP packets without the payload copying. In an optimized implementation, linked lists can be transmitted or received without any time-consuming interaction between HW and SW.

The PDU format supports the stringing of IP packets within the PDUs and a header area in front of all IP packets. IP packets can be exchanged between the IPC and the cellular protocol stack without copying the payload. Only packet descriptors are received or transmitted to the cellular protocol stack. The payload, i. the IP packets, is not moved unnecessarily. Similar optimized processing is enabled on the application processor side, by taking into account receiver constraints on match and header range parameters.

With unified buffer management coping with fixed-length PDUs, the complexity of memory management, by allowing even continued reuse of initially allocated buffers, reduces the need for dynamic memory allocation.

In accordance with one aspect of this disclosure, an efficient data link layer protocol is provided on top of the MIPI-HSI physical layer that uses control messages to open pre-configured communication links over logical channels. The user data is transferred to PDU of fixed length. A simplified memory manager supports memory management and buffer descriptor replacement for IP packets and PDUs. By transmitting multiple IP packets in a single large IPC transmission, a data path with minimal SW interactions is enabled. On the HW side, the IPC controllers independently traverse linked lists of buffer descriptors because of built-in scatter / gather linked list DMA capabilities.

While the invention has been particularly shown and described with reference to particular embodiments, it should be understood by those familiar with the art that numerous changes in form and detail may be made therein without departing from the spirit and scope of the invention. as defined by the appended claims, to depart. The scope of the invention is, therefore, determined by the appended claims, and it is therefore intended to encompass all changes which come within the literal meaning or range of equivalency of the claims.

Claims (19)

A data processing device (1200) comprising a controller (1201) arranged to open a logical channel to another data processing device; a receiver (1202) arranged to receive a message from the other data processing device, the message indicating a data link layer protocol packet data unit size to be used for data exchange over the logical channel, the receiver (1202) being further adapted to receive a data link layer packet data unit from the other data processing apparatus, wherein the data link layer packet data unit includes at least a network layer packet and an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet; and a transceiver (1203) adapted to communicate with the other data processing device via the logical channel according to the data link layer protocol packet data unit size, wherein the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed. Data processing device (1200) according to Claim 1 wherein the controller (1201) is arranged to open the logical channel by establishing a connection with the other data processing device via the logical channel. Data processing device (1200) according to Claim 1 or 2 wherein the controller (1201) is arranged to open the logical channel by transmitting a message to the other data processing device, the message indicating that the data processing device (1200) is requesting that the logical channel be opened. Data processing device (1200) according to Claim 3 where the data link layer protocol packet data unit size is specified in the message. Data processing device (1200) according to Claim 4 wherein the data link layer protocol data unit size is specified in bytes or words. Data processing device (1200) according to one of Claims 3 to 5 wherein the controller (1201) is arranged to transmit the message over another logical channel to the other data processing device. Data processing device (1200) according to Claim 6 , where the other logical channel is a control channel. Data processing device (1200) according to one of Claims 2 to 7 wherein the controller (1201) is arranged to close the logical channel by releasing the connection. Data processing device (1200) according to one of Claims 1 to 8th wherein the data processing device (1200) and the other data processing device are components of the same communication device (200, 300). Data processing device (1200) according to Claim 9 wherein the communication device (200, 300) is a cellular communication device. Data processing apparatus (1400), comprising: a controller (1401) configured to open a logical channel with another data processing device; a transmitter (1402) adapted to send a message to the other data processing device, the message to be used for data exchange over the logical channel Indicating data link layer protocol packet data unit size, wherein the transmitter (1402) is further configured to transmit a data link layer packet data unit to the other data processing device, the data link layer packet data unit including at least a network layer packet and an unused portion, which has at least the specified data link layer header size and which is within the Data link layer packet data unit is located at a header position for the network layer packet; and a transceiver (1403) adapted to communicate with the other data processing device via the logical channel according to the packet data unit size of the data link layer protocol, wherein the data link layer protocol packet data unit size for the logical channel is constant until the logical channel is closed. Data processing apparatus (1600), comprising: a generator (1601) adapted to generate a data link layer packet data unit based on a data link layer header size according to another data processing device for transmitting a network layer packet, such that the Data link layer packet data unit contains at least one network layer packet and one unused part, which has at least the specified data link layer header size and which is within the Data Link Layer packet data unit is located at a header position for the network layer packet. Data processing device (1600) according to Claim 12 further comprising an investigator arranged to determine the data link layer header size required by the other network layer packet data processing apparatus. Data processing device (1600) according to Claim 13 further comprising a receiver arranged to receive a message from the other data processing device, the message indicating the data link layer header size required by the other network layer packet data processing device. Data processing device (1600) according to one of Claims 12 to 14 wherein the at least one network layer packet is an IP packet. Data processing device (1600) according to one of Claims 12 to 15 wherein the data link layer packet data unit includes a plurality of network layer packets and for each network layer packet includes an unused portion having at least the designated data link layer header size and located within the data link layer packet data unit at a header position for the network layer packet. Data processing device (1600) according to one of Claims 12 to 16 wherein the data processing device (1600) and the other data processing device are components of the same communication device (200, 300). Data processing device (1600) according to Claim 17 wherein the communication device (200, 300) is a cellular communication device. Data processing apparatus (1800), comprising: a transmitter (1801) arranged to transmit a message to another data processing device, the message indicating a data link layer header size required by the data processing device (1801) to transmit a network layer packet; and a receiver (1802) adapted to receive a data link layer packet data unit from the other data processing device, the data link layer packet data unit including at least a network layer packet and an unused part, which has at least the indicated data link layer header size and which is located within the data link layer packet data unit at a header position for the network layer packet.

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