DE102011111835B4 - Procedure for recovering lost and / or damaged data - Google Patents

Abstract

A method of restoring lost and / or damaged data transmitted from a transmitting device (10) to a receiving device (12), comprising the steps of:
Encoding the data by an encoder (14) connected to the transmitting device (10) using a low-density parity check method,
Transmitting the data from the transmitting device (10) to the receiving device (12) via a transmitting device (18), and
Decoding the data by a decoder (16) connected to the receiving device (12), wherein lost and / or corrupted data is recovered during decoding,
the decoding takes place by solving the equation system of the parity check matrix H,
characterized in that
a tail-bail accumulator is used to encode the data, the LDPC code being a repeat accumulate code.

Description

The invention relates to a method for restoring lost and / or damaged data transmitted from a transmitting device to a receiving device.

The transmitted data may be, for example, audio or video streams. These are transmitted by a transmitting device, which provides the data, for example, to a mobile receiving device. The mobile receiving device may be, for example, a mobile phone, a PDA or another mobile terminal. Alternatively, data may also be transmitted from a transmitting device to a stationary receiving device.

Used standards for transferring data to mobile devices include DVB-H, MBMS and DVB-SH in the near future.

In order to ensure a desired transmission quality, it is necessary to check the correct transmission of the data or data packets to the receiving device. Various methods can recover lost and / or corrupted data that has not been correctly transmitted to the receiving device.

One known method of recovering lost and / or corrupted data is the low density parity check method or the low density parity check code. This is applied on a so-called erasure channel. Apart from an application by coding at the level of the physical layer, there are also applications in the area of a packet erasure channel (PEC).

In 1 the restoration of lost and / or damaged data is exemplified in the prior art. A number of k information packets are to be transmitted from a transmitting device (left side) to a receiving device (right side). A packet level encoder on the sender side assembles the k info packets and the m parity packets into n = m + k codeword packets. At the physical layer level, the packets are backed up by an error correction code (eg, a turbo code) and an error detection code (eg, by a cyclic redundancy check, CRC) so that damaged packets can be removed. At the levels above the physical layer, packets are either received correctly or considered lost by being deleted because the CRC in the physical layer has detected a corrupted packet. The transmission channel is therefore considered by the overlying layers to be a so-called erasure channel, the packets representing the transmission units. At the receiver side, the received codeword packets are decoded by the packet level decoder so that the lost and / or corrupted data can be recovered.

The recovery of lost and / or damaged data can be realized by a redundancy of the data. The encoding process by the packet level encoder is usually done bitwise (or bytewise) by using an encoder with a linear block code. The decoding then takes place by solving the system of equations defined by the parity check matrix H of the code. Such decoders, which are based on the Gaussian elimination, show strongly increasing complexity with increasing block length, so that high data rates can often not be achieved.

It is known in the art to use an accumulator within the scope of LDPC codes. For IRA codes, for example, the accumulator typically has a transfer function of the form 1 / (1 + D). For encoding, the information bits are repeated in a first step in the encoder. The repetition rate can be either regular or irregular. Then, a single parity check (SPC) is performed on a combination of several repeated bits. If only one bit is used then an SPC is not required. This happens before the result is fed to the accumulator. Considering the parity check matrix representation of the code as an alternative, the accumulator corresponds to the parity part of the matrix, namely H _p , while the repetition and the SPC operation correspond to the information part H _u . For an accumulator with the transfer function 1 / (1 + D) H _{p has} the typical double diagonal form.

After the encoding is completed, the coded bits are transmitted to a receiver via a channel. For example, this may be a so-called binary erasure channel (p-ary for GF (p)). This means that some bits are lost during the transmission with the probability of tripping ε, while others are received with the probability (1-ε). Subsequently, the decoding is performed. For example, maximum likelihood (ML) decoding can be performed to recover the lost bits. In order to find out the code performance, the bit error rate (BER) or alternatively the code word error rate (CER) at the output of the decoder can be measured.

An exemplary representation of such a system is in 3 shown. The two branches of the encoder correspond to the systematic part and the parity bits. For a systematic code both types of bits are transmitted, while for a non-systematic code the systematic part is neglected.

An illustration of a maximum likelihood method for decoding can be found in: E. Paolini, G. Liva, B. Matuz and M. Chiani, "Generalized IRA erasure correcting codes for hybrid iterative / maximum likelihood decoding," vol. 12, no. 6, pp. 450-452, June 2008 ,

1. 1. Ermittlung der optimalen degree distributions. Dazu wird mit Hilfe von density evolution oder EXIT Analyse (o.ä.) der decoding threshold des Codeensembles bestimmt. Unter Verwendung von Optimierungsalgorithmen, wie beispielsweise differential evolution, werden stets neue degree distributions generiert (unter Beachtung best. Kriterien), wobei nach einer Vielzahl von Iterationen nur die besten Kandidaten übrig bleiben. Während der gesamten Analyse wird eine unendlich große Blocklänge angenommen.
2. 2. Design der PCM des (n,k) Codes unter Berücksichtigung der degree distributions. Hier gibt es verschiedenen Ansätze, welche evtl. Zwischenschritte erfordern (z.B. bei protographs). Alle haben gemein, dass die optimale Platzierung der 0 und 1 unter Beachtung der degree distributions das Ziel ist, um kurze Schleifen in der PCM zu vermeiden (d.h. den girth des Graphen zu steigern). Typischerweise kommen hier Algorithmen wie ACE, PEG oder Ableitungen davon zum Einsatz. Zu beachten ist dabei, dass es Zwänge für die Platzierung der Einträge in bestimmten Teilen der PCM geben kann, wie z.b. bei Codes mit Akkumulator. Hier bestehet der Paritätsteil aus einer Doppeldiagonalen, der Informationsteil ist scheinbar unstrukturiert.
3. 3. Koeffizientenbestimmung der PCM. Im Falle von nicht binären Codes, enthält die PCM nicht nur 0 und 1, aber statt den 1 Einträgen können beliebige Elemente aus GF(p)\{0} gewählt werden. Für eine gute Wahl gibt es verschiedene Algorithmen, die hier jedoch nicht erläutert werden.

Accumulator-based codes, such as Irregular Repeat Accumulate (IRA) codes and other similar codes, are used in communication systems according to the prior art. The applied code design is briefly outlined below:

1. 1. Determination of the optimal degree distributions. For this purpose the decoding threshold of the code ensemble is determined with the help of density evolution or EXIT analysis (or similar). Using optimization algorithms, such as differential evolution, new degree distributions are always generated (using best criteria), leaving only the best candidates after a large number of iterations. Throughout the analysis, an infinite block length is assumed.
2. 2. Design of the PCM of the (n, k) code considering the degree distributions. There are different approaches, which may require intermediate steps (eg protographs). All have in common that the optimal placement of the 0 and 1 with respect to the degree distributions is the goal to avoid short loops in the PCM (ie to increase the girth of the graph). Typically, algorithms such as ACE, PEG or derivatives thereof are used. It should be noted that there may be constraints for the placement of entries in certain parts of the PCM, such as codes with accumulator. Here the parity part consists of a double diagonal, the information part is apparently unstructured.
3. 3. Coefficient determination of the PCM. In the case of non-binary codes, the PCM not only contains 0 and 1, but instead of the 1 entries, any elements of GF (p) \ {0} can be selected. For a good choice there are different algorithms, which are not explained here.

2 shows the parity check matrix for a binary (256, 128) IRA code. The points correspond to the ones in the matrix, where the left part of the parity check matrix (k columns) corresponds to the k information bits. The right nk columns correspond to the nk parity bits. Here, in the case of codes with accumulator, a fixed structure is assumed (for example, double diagonal in the IRA example).

• ANDRIYANOVA, I.; TILLICH, J.-P.: A family of non-binary TLDPC codes: density evolution, convergence and thresholds. In: IEEE Symposium on Information Theory, 2007, S. 1216-1220. - ISBN 978-1-4244-1397-3 .
• KIENLE, F.; LEHNIGK-EMDEN, T.; WEHN, N.; Fast convergence algorithm for LDPC Codes. In: IEEE 63rd Vehicular Technology Conference, Vol. 5, 2006, S. 2393-2397. - ISBN 0-7803-9391-0 .
• LIVA, G.; RYAN, W. E.; CHIANI, M.: Quasi-Cyclic Generalized LDPC Codes with Low Error Floors. In: IEEE Transactions on Communications, Vol. 56, 2008, No. 1, S. 49-57. ISSN: 0090-6778 . Aufgabe der Erfindung ist es, ein Verfahren zum Wiederherstellen verlorener und/oder beschädigter Daten bereitzustellen, das eine niedrigere Fehlerrate aufweist.

Other coding methods using LDPC codes in different forms are known from the following publications:

• ANDRIYANOVA, I .; TILLICH, J.-P .: A family of non-binary TLDPC codes: density evolution, convergence and thresholds. In: IEEE Symposium on Information Theory, 2007, p. 1216-1220. - ISBN 978-1-4244-1397-3 ,
• KIENLE, F .; LEHNIGK-EMDEN, T .; WEHN, N .; Fast convergence algorithm for LDPC codes. In: IEEE 63rd Vehicular Technology Conference, Vol. 5, 2006, pp. 2393-2397. - ISBN 0-7803-9391-0 ,
• LIVA, G .; RYAN, WE; CHIANI, M .: Quasi-Cyclic Generalized LDPC Codes with Low Error Floors. In: IEEE Transactions on Communications, Vol. 56, 2008, no. 1, pp. 49-57. ISSN: 0090-6778 , The object of the invention is to provide a method for recovering lost and / or damaged data having a lower error rate.

The object is achieved according to the invention by the features of claim 1.

In a method for restoring lost and / or damaged data transmitted from a transmitting device to a receiving device, the data is first encoded by an encoder connected to the transmitting device. This may be, for example, a packet-level encoder. The data is transmitted from the transmitting device to the receiving device via a transmitting device. As a transmission device according to the invention is any Device understood that allows transmission of data from the transmitting device to the receiving device and / or vice versa. For example, the transmission device may be formed by using a mobile broadcasting system (for example, DVB-H or MBMS). The data can also be transmitted via UMTS, for example.

By means of a decoder connected to the receiving device, the transmitted data is decoded using a low-density parity-check method, whereby lost and / or damaged data are restored during decoding.

The decoding is done by solving the equation system of the parity check matrix H.

According to the invention, a tailbiting accumulator is used to encode the data.

The method according to the invention thus permits a code design which takes into account a special feature of accumulator-based LDPC codes which has hitherto been disregarded in the prior art. An input with a low weight on the accumulator leads to output sequences with a likewise low weight. These can cause a high level of error. Such sequences can be eliminated by the code design according to the invention.

Although tail-biting accumulators are known in the art, so far they have only been studied in the context of convolutional codes. Consideration of accumulator-based LDPC codes using a tailbiting accumulator has not yet taken place. Applicants' extensive calculations and simulation series have shown that the use according to the invention of a tailbiting accumulator in an LDPC code leads to an improvement in the code performance. This is illustrated in the present application hereinafter.

The method according to the invention is particularly interesting for short block lengths and higher order Galois fields. However, for larger block lengths and a Galois field of 2, an improvement can also be observed.

It is preferable that the entry in the first row of the last column of the parity check matrix used for coding and decoding is set to a value of ≠ 0. This is the usual operation of a tail-billing accumulator.

Furthermore, it is preferred that the entries in the parity check matrix are taken from a Galois field of order> 2. This means that the LDPC code used is a non-binary LDPC code.

Furthermore, it is provided according to the invention that the LDPC code is a repeat accumulate and preferably an irregular repeat accumulate code.

In the following, preferred embodiments of the invention will be explained with reference to figures.

• 1 einen Ablaufplan der Datenübertragung zwischen einer Sendevorrichtung und einer Empfangsvorrichtung, wie sie auch im erfindungsgemäßen Verfahren stattfinden kann,
• 2 eine Parity-Check-Matrix eines binären IRA-Codes, 3 eine schematische Ansicht eines Akkumulators, der in einem Encoder verwendet wird,
• 4 eine Darstellung der Funktionsweise eines Repeat-Accumulator-Codes,
• 5-8: Darstellungen der Performance eines Codes gemäß dem erfindungsgemäßen Verfahren, und
• 9 eine Darstellung durchschnittlicher Codewortgewichte für einen RA-Code.

Show it:

• 1 a flowchart of the data transmission between a transmitting device and a receiving device, as may also take place in the method according to the invention,
• 2 a parity check matrix of a binary IRA code, 3 a schematic view of a rechargeable battery used in an encoder
• 4 a representation of the operation of a repeat accumulator code,
• 5-8 : Representations of the performance of a code according to the inventive method, and
• 9 a representation of average codeword weights for an RA code.

1 to 3 have already been explained in connection with the prior art.

As already stated, the method according to the invention is intended to avoid codewords having a low weight since they cause a high level of error. The steps to code design can thus take place as follows:

First, standard code design techniques described at the beginning and known in the art to obtain the desired accumulator-based LDPC code can be used. Subsequently, the error patterns with the lowest weights of the designed code are estimated. This can be done, for example, by Monte Carlo simulation or other techniques known in the art. If the last parity bit in this lowest-weight error pattern is involved (namely, the last entry in the double diagonal), a tail-biting accumulator is introduced. Otherwise, the standard code design according to the prior art is maintained.

For a tail-billing accumulator, the initial status and the final status must be identical. For example, this limits the input sequences to even weights. This means that there must be an even number of ones in the input words. It is intuitively recognizable that the performance of the code will improve if the lowest weight output sequences can be avoided. This only applies to the binary case.

In the following, it will first be mathematically demonstrated why a tailbiting accumulator offers better performance than a accumulator without tailbiting. This has not previously been demonstrated for accumulator-based LDPC codes. The stated advantages of the invention in LDPC codes have thus far not been known. As used herein, a simple non-systematic repeat accumulate code is used, as described in the following publication: H. Jin, D. Khandekar, and RJ McEliece, "RA codes achieve AWGN channel capacity," in Proceedings of the 13th International Symposium on Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, ser. AAECC-13th London, UK: Springer-Verlag, 1999, pp. 10-18 , For the repeat-accumulate case, the information part of length kq is repeated once. Then the bits are scrambled and fed to the accumulator. The output are n = qk code bits. An overview is in 4 shown.

In order to obtain an estimate of the block error probability under maximum likelihood decoding, the known input-output-weight-enumerator (IOWE) coefficients A _{i, w of} the code are needed. A _{i, w} indicates the number of codewords of weight w associated with the input sequences of weight i. To simplify the analysis, the focus has been placed on all the possible (n, k) codes given by all possible interleaver convocations. Information on the following calculations can be found in the latter reference and in the following: D. Divsalar, H. Jin, and RJ McEliece, "Coding theorems for turbocharger codes," in Proc. 36th Allerton Conf. on Communication, Control and Computing, Allerton, Ill., September 1998, pp. 201-210.

From this literature it is known that the IOWE coefficients of the repeat-accumulate-code ensembles are given by: $$A_{i.w}^{RA}=\frac{\left(\begin{array}{l}k\\ j\end{array}\right)\left(\begin{array}{l}qk-w\\ \lfloor qi/2\rfloor \end{array}\right)\left(\begin{array}{l}w-1\\ \lfloor qi/2\rfloor -1\end{array}\right)}{\left(\begin{array}{l}qk\\ qi\end{array}\right)}$$

i ist hierbei auf gerade Werte beschränkt.In a further step, which is no longer known from the cited prior art, it can now be shown that the IOWE coefficients for the RA code ensemble with tail-biting are: $$A_{i.w}^{RATB}=\frac{\left[\left(\begin{array}{l}k\\ i\end{array}\right)\left(\begin{array}{l}qk-w\\ \lfloor qi/2\rfloor \end{array}\right)\left(\begin{array}{l}w-1\\ \lfloor qi/2\rfloor -1\end{array}\right)+\left(\begin{array}{l}w\\ \lfloor qi/2\rfloor \end{array}\right)\left(\begin{array}{l}qk-w-1\\ \lceil qi/2\rceil -1\end{array}\right)\right]}{\begin{array}{l}qk\\ qi\end{array}}$$

i is limited to even values.

For better understanding is in 9 the distribution of the average weights for RA code ensembles with and without tail-biting. In the box on the left side there is an enlarged representation of the codewords with a low weight. It can be seen that the tail bit biting method of the present invention can reduce the number of low-weight codewords while slightly increasing the number of codewords having a large weight.

Based on the calculations above, the average performance (CER) for repeat accumlate code ensembles with and without tail-biting can be determined. For a very short systematic (24.4) RA code, this leads to the results found in 5 are shown. Here is the theoretical ensemble performance for RA codes with and without tail-biting with the well-known Union-Bound (UB). Simulation results of the average CER for every 10 different RA codes with and without tail-biting are also shown. Maximum likelihood decoding and transmission over a binary erasure channel was assumed. As can be seen, the theoretical limits based on the above formulas coincide with the simulation results. It can also be seen that tail-biting offers advantages over the case without tail-biting.

Thus, formal proof has been provided that RA codes with tail biting provide better average performance than RA codes without tail biting. Although this has not been proven, it is expected that this behavior will also be observed in other accumulator-based LDPC codes, such as IRA codes.

• 20, 44, 57, 73, 100, 127
• 61, 85, 86, 87, 126, 127

In a concrete simulation example, a binary IRA code was constructed according to the standard design criteria described above. The code length n was set to 128, the information length k to 64 bits. Simulations with maximum-likelihood decoding were performed on the binary erasure channel. The results are in 6 shown. By analyzing the lowest weight error patterns that cause the decoding algorithm to fail, two different error patterns with a weight of 6 can be identified, each containing the last code bit (namely, bit 127, since the numbering starts at 0) , The error patterns, or more precisely the indices of the erased code bits which are responsible for the failure of the decoder, are:

• 20, 44, 57, 73, 100, 127
• 61, 85, 86, 87, 126, 127

To avoid these error patterns, the code design has been modified according to the illustrated invention. Thus, if a tail-biting accumulator is used, the maximum-likelihood decoder is able to decode these error patterns, so that the improved results found in FIG 7 are shown can be achieved. In other words, using tail-bititing, the error patterns shown can be decoded because the last bit additionally occurs in the first equation of the parity-check matrix, since in this equation (1st row, last column the parity check Matrix) an additional 1 has been inserted.

To make a comparison in 7 To make things easier, the CER curve was designed for the case without tail-biting 6 shown again. In terms of tail bit biting improvement, it can be seen that for a default probability of 0.15, the CER for standard code design is 3e-5, while that for a tail-bit accumulator is 4e-6. It can thus be achieved due to the inventive method significant improvements in the code performance. However, it should be noted that short accumulator-based LDPC codes have greater advantages when using a tail-billing accumulator.

In 8th is the performance of IRA codes with and without tail-biting on a Galois field of size p = 256. The channel is no longer a binary erasure channel, but a p-ary erasure channel. This means that in contrast to the binary case, here GF (p) symbols are canceled with a probability of ε. Of particular note is the difference between the two curves for low ε.

• Für IRA Codes ohne TB hat wurden folgende Fehlermuster gefunden, die für den Leistungsabfall verantwortlich sind (alle mit Gewicht 12):
  • : 16 : 58 :109 :119 :120 :121 :122 :123 :124 :125 :126 :127
  • : 13 : 21 : 40 : 58 : 97 : 98 : 99 :117 :118 :121 :126 :127
  • : 14 : 26 : 46 : 69 : 88 : 89 :114 :123 :124 :125 :126 :127
• Für IRA Codes mit TB hat wurden folgende Fehlermuster gefunden, (alle mit Gewicht 15):
  • : 13 : 16 : 21 : 58 : 98 : 99 :109 :119 :120 :121 :122 :123 :124 :125 :126
  • : 7 : 17 : 18 : 42 : 66 : 67 : 76 : 77 : 78 : 79 : 80 : 81 : 82 : 83 : 84

The difference between the two curves can be explained again using the code spectrum. A closer look at the error patterns (after decoding) shows the following:

• For IRA codes without TB, the following error patterns were found, which are responsible for the performance drop (all with weight 12):
  • : 16: 58: 109: 119: 120: 121: 122: 123: 124: 125: 126: 127
  • : 13: 21: 40: 58: 97: 98: 99: 117: 118: 121: 126: 127
  • : 14: 26: 46: 69: 88: 89: 114: 123: 124: 125: 126: 127
• For IRA codes with TB the following error patterns were found (all with weight 15):
  • : 13: 16: 21: 58: 98: 99: 109: 119: 120: 121: 122: 123: 124: 125: 126
  • : 7: 17: 18: 42: 66: 67: 76: 77: 78: 79: 80: 81: 82: 83: 84

For the former, bit 127 is always involved. By applying TB, these error patterns can be corrected again by the decoder. In the latter case, bit 127 is not involved (due to TB construction).

It should be noted that without TB code has a built-in defect, since the last parity bit is insufficiently protected. This creates an errorfloor, the v.a. is visible at short block lengths and higher GFs.

The inventive method can be used in all wireless and wired transmission systems. Particularly preferred is a use with short codes, since the greatest improvement in performance can be expected here.

Claims (4)

A method for recovering lost and / or damaged data transmitted from a transmitting device (10) to a receiving device (12), comprising the steps of: encoding the data by an encoder (14) connected to the transmitting device (10) using a low Density parity check method, transmitting the data from the transmitting device (10) to the receiving device (12) via a transmitting device (18), and decoding the data by a decoder (16) connected to the receiving device (12) when decoding lost and / or damaged data are recovered, wherein the decoding is done by solving the equation system of the parity check matrix H, characterized in that a tail-billing accumulator is used to encode the data, wherein the LDPC code is a repeat accumulate code. Method according to Claim 1 , characterized in that the LDPC code is an irregular repeat accumulate code. Method according to Claim 1 or 2 , characterized in that the entry in the first row of the last column of the parity check matrix is set to a non-zero value. Method according to Claim 1 to 3 , characterized in that the entries in the parity check matrix are taken from a Galois field of order> 2.

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