DE102011086908A1 - Method for transferring data over data communication interface of motor vehicle, involves carrying out data conversion from primary data transfer protocol of bus system to secondary data transfer protocol of data transfer channel - Google Patents

Abstract

The method involves connecting multiple bus channels (Ch1 to Chn) with a transceiver unit (20), which is connected with a microcontroller (40) by a data transfer channel (30). The data conversion is carried out from the primary data transfer protocol of a bus system (10) to the secondary data transfer protocol of the data transfer channel, which includes extracting user data (D0 to Dn) of variable lengths by bus system from a data frame (PSI5) in the primary data transfer porotocol. The user data is conveyed in a variable number of data packets of the secondary data transfer portocol.

Description

The invention relates to a method for transmitting data via a data communication interface. The data communication interface is configured for data communication between a bus system having a first number of bus channels and a microcontroller, wherein the number of bus channels in operation is connected to a transceiver unit which is connected to a microcontroller via a data transmission channel. The transceiver unit is a multi-channel transceiver which can be operated in the time-multiplex method and comprises a first asynchronous transceiver module which can exchange data over the data transmission channel with a second asynchronous transceiver module of the microcontroller in the full duplex method.

A data communication interface of the type referred to above is used in motor vehicles. To a respective data communication interface, for example, control devices of passenger restraints (such as airbags), powertrain controllers, sensors, etc. are connected. With the number of required communication channels, i. the number of bus channels connected to the transceiver unit, the interfaces between the transceiver unit and the microcontroller are typically duplicated. Such an approach is not optimal in terms of scalability, flexibility and resource consumption of the data communication interface.

The German application 10 2010 061 734.2 In order to solve this problem, the Applicant proposes a data communication interface for data communication between a bus system and a microcontroller which makes scalable, flexible, minimal demands on resource requirements and the implementation risk and allows optimization of the bandwidth request. For this purpose, the data communication interface comprises a multichannel transceiver which can be operated in the time-multiplex method and which comprises a first asynchronous transceiver module which can exchange data via the data transmission channel with a second, asynchronous transceiver component of the microcontroller in the full-duplex method. By using the multi-channel transceiver, which can be time-multiplexed, the data communication interface can easily be scaled. An extension of the number of bus channels can be achieved, for example, by exchanging the multichannel transceiver with corresponding properties, ie a larger number of communication channels. However, the actual data communication interface between the transceiver and the microcontroller remains unaffected.

Such a data communication interface is used in particular in a motor vehicle. For example, the data communication interface is used in control devices of personal restraint or a control unit for the drive train or other control devices in a motor vehicle.

The object of the transceiver unit used in the known data communication interface is to perform a data conversion from a first data transmission protocol of the bus system to a second data transmission protocol of the data transmission channel.

It is an object of the present invention to provide a method with which the data conversion is to be accomplished with the lowest possible consumption of bandwidth.

This object is achieved by having the features of claim 1. Advantageous embodiments will be apparent from the dependent claims.

The invention provides a method for the transmission of data via a data communication interface of the type described above. The data communication interface should in particular be designed as in the applicant's 10 2010 061 734.2. The content of this application is therefore incorporated by reference into the disclosure of this application.

In this data communication interface, the transceiver module and the communication interface of the microcontroller are designed as UART (Universal Asynchronous Receiver Transmitter) module and connected to one another via the data transmission channel. A UART device is an electronic device used to implement digital serial interfaces. The data is transferred at UART as a serial digital data stream with a fixed frame consisting of a start bit, a number of data bits, an optional parity bit for detecting transmission errors and a stop bit. In the asynchronous mode of operation, no separate clock signal is used on a transmission line. Instead, the receiver synchronizes over the length of the frame, mediated by a start and stop bit strobe, and a set bit rate. To ensure synchronization, the number of transferable bits is limited. With a longer data stream the synchronization could be lost. The designed as a multi-channel transceiver transceiver unit then takes over the data conversion from the bus protocol in the UART protocol.

The data transmission channel comprises a downstream line, via which data from the asynchronous transceiver module can be transmitted to the data communication interface of the μcontroller, as well as an upstream line, via which data can be transmitted from the μcontroller to the first asynchronous transceiver module. Other lines between the microcontroller and the transceiver unit are not required in the data communications interface, regardless of the number of bus channels connected to the transceiver unit.

For data conversion from a first data transmission protocol of the bus system into a second data transmission protocol of the data transmission channel, at least user data of variable length are extracted from a data frame received from the transceiver unit via the bus system in the first data transmission protocol. Subsequently, the user data is converted into a variable number of data packets of the second data transmission protocol, wherein the number of data packets is dependent on the length of the user data of the data frame in the first data transmission protocol.

The data conversion according to the invention makes optimum use of the bandwidth. Although the data is transmitted in a fixed frame for data transmission via the data transmission channel, the data frames received by the transceiver unit are processed in such a way that the user data contained therein can be transmitted to the microcontroller with a minimum number of data packets.

Another advantage resulting from the topology of the data communication interface is the minimization of resource requirements. In particular, the resource requirement of such a data communication interface is minimized compared to conventional solutions in that only two electrical connections (so-called pins) between the microcontroller and the transceiver unit are required. This makes it possible to optimize both the PCB area and the number of pins both on the microcontroller and on the transceiver unit. Due to the possible reduction of printed circuit board surfaces and costs due to possibly smaller component housings, a cost reduction can be achieved.

In particular, the data transfers on the downstream line and the upstream line may be asynchronous and parallel to one another. An advantage of this approach is that the bandwidth requirement required over traditional data communication interfaces is reduced. When used in conventional data communication interfaces, e.g. For example, in a Serial Peripheral Interface (SPI), where bandwidth is the sum of bandwidth for each bus channel, bandwidth for an upstream data channel, and a safety margin, the total bandwidth in the data communications interface is the sum of the bandwidths of the bus channels and a safety margin together.

The data frames in the first data transmission protocol are expediently transmitted in accordance with the standard PSI5. The transceiver unit thus translates a data bus protocol specified in the PSI5 standard with a configurable length of the user data into a data transmission protocol with data packets of fixed data length.

Expediently, the data packets in the second data transmission protocol are transmitted as a serial data stream with a fixed frame, wherein the frame consists of a start bit, a predetermined number of data bits, in particular eight data bits, and a stop bit. Optionally, a parity bit may be provided between the data bits and the stop bit to detect transmission errors.

In a further embodiment of the method according to the invention, the payload data is transparently added to respective payload data fields of the number of data packets of the second data transmission protocol. As a result, for the microcontroller, the data frame received by the transceiver unit becomes transparent, i. without change, can be received and processed.

According to a further expedient embodiment, an internal data frame is generated from the data frame of the first data transmission protocol by the transceiver unit, from which subsequently the number of data packets according to the second data transmission protocol is generated, which are then transmitted to the microcontroller. This "intermediate step" of generating the internal data frame enables the transceiver unit to convert the payload of the data frame into a minimum number of data packets, which can then be transmitted to the microcontroller with minimal bandwidth requirements.

According to a further expedient embodiment, the internal data frame comprises the following fields:
a header of predetermined first number of bits, in particular of eight bits length, which does not replace the payload data of the data frame of the first data transmission protocol associated data fields, in particular a start condition. The header includes, for example, the number of the physical Bus channel (so-called interface) at which the data frame was received according to the first data transmission protocol. This information can be transmitted, for example, by means of a so-called channel ID. Furthermore, the header comprises the number of the data frame, ie the message currently being received by the transceiver unit. Finally, the header may include an error field. A start condition of the data frame formed according to the protocol PSI5 comprises the fields S1, S2, these being cut off from the payload and being replaced by the header. For the payload data, a CRC sum of the data frame is also counted in the present description.

Furthermore, the internal data frame comprises the payload data of the data frame whose second number of bits is determined by the content of the payload. As part of the generation of the internal data frame, the payload data are in no way changed.

Finally, the internal data frame comprises an extended checksum information of a predetermined third number of bits, in particular of 6 bits in length. To determine the extended checksum information, for example, the sixth-order PSI5 V2.0 specified polynomial can be used. The checksum information takes into account not only the payload of the internal data frame, but also the information contained in the header.

Optionally, the internal data frame may further include a padding data having a fourth bit number, the fourth bit number depending on the total number of bits of the first, second, and third bit numbers. In this case, the sum of the first, second, third and fourth number of bits must be divisible by the predetermined number of data bits of the fixed frames (without remainder). Each bit of the optional filling date is filled with dummy information. For example, all bits of the filling date are assigned logic "0" or logic "1". The fill date is thus used to allow the subdivision of the internal data frame into data packets with a fixed frame. If the total number of bits of the first, second, and third bit numbers can be divided by the predetermined number of data bits of the fixed frames with no remainder, no fill date is needed. The filling date thus has a variable fourth number of bits.

According to a further expedient embodiment, a data conversion from the second data transmission protocol of the data transmission channel to a third data transmission protocol of the bus system is carried out if one of the bus channels is to be addressed by the microcontroller. While in the previous embodiments, a data transfer from the transceiver unit in the direction of the microcontroller (ie downstream) was carried out, a data conversion takes place in the reverse direction (ie upstream) using a third data transmission protocol.

For this purpose, one or more data frames are expediently generated from a data packet of the second data transmission protocol in accordance with a UART format having a fixed bit length, wherein a respective data frame comprises a start bit, a predefined number of useful bits, a parity bit and a stop bit. wherein the predetermined number of payload bits may differ from that of the number of payload bits in the second data transfer protocol.

According to a further embodiment, a data frame is a command frame in which the transceiver unit is encoded with a request to generate a predetermined pulse pattern (according to a predetermined specification, for example according to PSI5) for addressing a unit connected to the relevant bus channel. Such a unit may for example be a sensor or the like.

In particular, the coding variants not required for the coding of the plurality of pulses are used for the coding of commands for the transceiver unit. With a command frame, it is thus not only possible to trigger the transceiver unit to deliver a pulse and request a date of a particular unit, but to transmit commands, for example, to configure the transceiver unit.

It may further be provided that the command frame is transmitted ahead of one or more data frames via the bus channel addressed in the command frame. For example, data necessary for the transceiver unit may be included in the data frame for the configuration. By means of the preceding command, the transceiver unit is informed of a configuration to be made, with the data necessary for the configuration then being contained in the data frame.

The invention will be explained in more detail below with reference to an embodiment in the drawing. Show it:

1 a data communication interface based on a time-multiplexed multichannel transceiver,

2 a schematic representation of the translation of a data frame formed in the first data transmission protocol in a number of data packets according to a second Data transmission protocol in the case of transmission from a transceiver unit to a microcontroller, and

3 a schematic representation of the transmitted from the microcontroller to the transceiver unit of the data communication interface data frame according to a third data transmission protocol.

1 shows a data communication interface for data communication between a bus system 10 and a microcontroller 40 , For example, a control device of a motor vehicle. The controller includes besides the microcontroller 40 a transceiver unit 20 and one the transceiver unit 20 with the microcontroller 40 connecting data transmission channel 30 ,

The transceiver unit 20 is designed as a multi-channel transceiver operable in the time-division multiplex method. This includes in a known manner an asynchronous transceiver module, which over the only two data lines 31 . 32 comprising data transmission channel 30 with a second transceiver module of the microcontroller 40 is formed and can exchange data in the full-duplex method.

The multichannel transceiver 20 further comprises interfaces which are connected to a respective bus channel Ch 1,..., Ch n of the bus system 10 are coupled. The interfaces are coupled on the output side to the transceiver module of the transceiver unit, the latter comprising a terminal Tx for outgoing data and a connector Rx for incoming data. The one in the microcontroller 40 contained second transceiver module is preferably designed as a UART interface and includes a connection for incoming data Rx, which with the signal line referred to as the downstream line 31 is coupled. Furthermore, the second transceiver module comprises an outgoing data terminal Tx connected to the signal line designated as an upstream line 32 of the data transmission channel 30 is coupled.

The task of the multichannel transceiver 20 is to perform a data conversion of the data packets received according to a bus protocol through the interfaces of the transceiver unit into a protocol used according to UART. The protocol translation will be described in more detail below in connection with the 2 and 3 described.

The data communication interface according to 1 based on it, both in the transceiver unit 20 as well as in the microcontroller 40 each provide an asynchronous receiver / transmitter (ie the transceiver module). An advantage of such a data communication interface is that a scaling, ie an extension of the number of bus channels, can be made in the transceiver, while the data transmission channel between the transceiver and the microcontroller remains unaffected. When changing to other bus protocols or bus topologies, only the multichannel transceiver needs to be replaced while the data transmission channel 30 remains unaffected.

The asynchronous transceiver modules provided in the transceiver and the microcontroller are operated in full-duplex mode, whereby the downstream path and the upstream path can be operated asynchronously and in parallel with each other. An advantage of this approach is that only two lines 31 . 32 between the transceiver and the microcontroller, one being needed to receive data and one to send data. The from the microcontroller 40 data to be sent is via the upstream path 32 transfer. The transmission of the transceiver unit 20 Data received at the bus channels Ch 1,..., Ch n or responses to corresponding control / diagnostic commands takes place on the downstream path 31 from the transceiver unit 20 to the microcontroller 40 ,

The required bandwidth of the data transmission channel is dependent on the number of implemented bus channels Ch 1, ..., Ch n. The via the downstream path (line 31 ) transmitted data correspond to the data on the respective bus channels. To distinguish the via the downstream path 31 transmitted data packets must therefore be provided with a channel identifier (so-called Channel ID). The via the upstream path (line 32 ) transmitted data or commands are from the microcontroller 40 for differentiation by the transceiver unit 20 also extended by a channel identifier and optional data described below.

The from the transceiver unit 20 Data frames received via the bus channels Ch 1,..., Ch n are present in accordance with the standard PSI5 (Peripheral Sensor Interface 5). PSI5 is a digital interface for sensors that is based on a two-wire line and is used in particular in automotive electronics for connecting outsourced sensors to electronic control units. In this case, a data protocol specified in the PSI5 standard with configurable data length can be used. Such a transmitted over one of the bus channels data frame PSI5, that of the transceiver unit 20 is received, in a data transmission protocol of the data transmission channel 30 translated, in which case data packets of fixed data length are used.

First, the procedure of translation in the transmission of data via the downstream line 31 described. The translation steps are in 2 shown schematically. With PSI5 is one of the transceiver unit 20 represented via one of the bus channels received data frame. The data frame consists of a 2-bit start condition 101 (the start condition is marked S1, S2), a payload field 102 and a CRC (Cyclic Redundancy Check) total 103 , The user data field can be 8 to 28 bits in size. The corresponding data fields are marked D0, ..., Dn. The CRC sum 103 can be 1 to 3 bits long and secures the data frame for possible bit errors. The number of bits of the user data field 102 depends on the information transmitted by the sensor to the transceiver unit. Overall, the data frame according to PSI5 v2.0 may have a length between 13 and 33 bits.

• a1) Bei dem an der Transceiver-Einheit 20 ankommenden Datenrahmen PSI5 wird die Startbedingung 101 (die Bits S1, S2) durch einen Header ersetzt. Der Header ist dabei der Header eines internen Datenrahmens TDF, in welchen der Datenrahmen PSI5 zunächst durch die Transceiver-Einheit 20 gewandelt wird. Der Header des internen Datenrahmens TDF umfasst die Felder 201, 202, 203. Im Feld 201 ist die Nummer des physikalischen Interfaces, an dem der Datenrahmen PSI5 empfangen wurde, codiert. Diese Angabe ist als Channel-ID (ChId) bekannt und umfasst in der Regel 3 Bit. Im Feld 202 ist die Nummer des Datenrahmens PSI5 auf dem entsprechenden physikalischen Interface enthalten. Diese Nummer wird als Frame-ID (Fid) bezeichnet und ist 3 Bit lang. Schließlich umfasst das Feld 203 des Headers Fehlerflags (Err), wobei diese 2 Bit in Anspruch nehmen. Diese zeigen den aktuellen Status des Buskanals bzw. der empfangenen Nachricht an.
• a2) An den Header schließt sich in unveränderter, d.h. transparenter, Form der Nutzdatenteil des Datenrahmens PSI5 an. Dieser stellt ein Feld 204 des internen Datenrahmens TDF dar. Ebenfalls unverändert wird die CRC-Summe des Datenrahmens PSI5 in einem Feld 205 nach den Nutzdaten angehängt. Dieser 19 bis 39 Bit lange interne Datenrahmen wird weiterhin durch einen 6 Bit langen Cyclic Redundancy Code (XCRC) ergänzt, welcher im Feld 207 enthalten ist. Zur Ermittlung von XCRC wird das im Standard PSI5 V2.0 spezifizierte Polynom sechster Ordnung vorzugsweise verwendet. Vor dem Feld 207 ist ein optionales Feld 206 gezeigt, in dem eine variable Anzahl an sog. „Stuffing Bits“ eingefügt wird. Stuffing Bits haben einen vorgegebenen Wert, beispielsweise jedes Bit weist den Wert logisch „0“ oder logisch „1“ auf. Die Anzahl der Bits im Feld 206 wird derart gewählt, dass sich eine durch eine vorgegebene Anzahl an Bits teilbare Gesamtlänge des internen Datenrahmens ergibt. Die vorgegebene Anzahl an Datenbits hängt davon ab, mit welcher Bitanzahl die tatsächlich übertragenen Datenpakte PKi, i = 1...n über den Datenübertragungskanal 30 an den Mikrocontroller übertragen werden. Vorzugsweise wird die Anzahl an Bits der Nutzdaten zu 8 gewählt, so dass die Anzahl an Stuffing Bits derart gewählt wird, dass sich eine durch acht teilbare Gesamtlänge des internen Datenrahmens ergibt.
• a3) Der interne Datenrahmen TDF wird nun in einer Mehrzahl an Paketen PK1, ..., PKn zu je beispielhaft 8 Bit Nutzdaten von der Transceiver-Einheit 20 zu dem Mikrocontroller 40 verschickt. Der Transfer jedes einzelnen Paktes PK1, ..., PKn wird durch ein Start-Bit Srt im Datenfeld 301 eingeleitet und durch ein Stop-Bit Stp im Datenfeld 303 beendet. Das Start-Bit nimmt beispielsweise den Wert logisch „0“, das Stop-Bit den Wert logisch „1“ an, so dass sich für jedes der Pakete eine Paketlänge von insgesamt 10 Bit ergibt. Dieses Format entspricht dabei einem fixen Rahmen, der mit Standard UART-Transceivern oder entsprechenden, auf Mikrocontrollern implementierten Funktionsblöcken konfiguriert werden kann.

The translation and transmission of the data frame PSI5 is performed by the transceiver unit in several steps:

• a1) At the on the transceiver unit 20 incoming data frame PSI5 becomes the start condition 101 (the bits S1, S2) replaced by a header. The header is the header of an internal data frame TDF, in which the data frame PSI5 first by the transceiver unit 20 is converted. The header of the internal data frame TDF comprises the fields 201 . 202 . 203 , in The Field 201 is the number of the physical interface on which the data frame PSI5 was received coded. This information is known as the Channel ID (ChId) and usually includes 3 bits. in The Field 202 the number of the data frame PSI5 is contained on the corresponding physical interface. This number is called Frame-ID (Fid) and is 3 bits long. Finally, the field includes 203 of the header error flags (Err), which take 2 bits. These indicate the current status of the bus channel or the received message.
• a2) The header is followed by the user data part of the data frame PSI5 in an unchanged, ie transparent, form. This represents a field 204 of the internal data frame TDF. Also unchanged is the CRC sum of the data frame PSI5 in one field 205 appended to the payload. This 19 to 39-bit internal data frame is further augmented by a 6-bit Cyclic Redundancy Code (XCRC), which works in the field 207 is included. To determine XCRC, the sixth-order polynomial specified in the PSI5 V2.0 standard is preferably used. In front of the field 207 is an optional field 206 shown in which a variable number of so-called "stuffing bits" is inserted. Stuffing bits have a predetermined value, for example, each bit has the value logical "0" or logical "1". The number of bits in the field 206 is chosen such that a total length of the internal data frame divisible by a predetermined number of bits is obtained. The predetermined number of data bits depends on the number of bits with which the actually transmitted data packets PKi, i = 1... N via the data transmission channel 30 be transferred to the microcontroller. Preferably, the number of bits of the payload data is chosen to be 8, so that the number of stuffing bits is chosen such that there is a total divisible by eight total length of the internal data frame.
• a3) The internal data frame TDF is now in a plurality of packets PK1, ..., PKn each exemplified 8 bit payload from the transceiver unit 20 to the microcontroller 40 sent. The transfer of each individual packet PK1,..., PKn is initiated by a start bit Srt in the data field 301 initiated and by a stop bit Stp in the data field 303 completed. For example, the start bit assumes the value logic "0", the stop bit the value logical "1", so that for each of the packets results in a total packet length of 10 bits. This format corresponds to a fixed frame that can be configured with standard UART transceivers or corresponding function blocks implemented on microcontrollers.

In the first data packet PK1 is in the user data field 302 contain the 8-bit header of the internal data frame TDF. In the data packets PK2 to PKn - 2 are the user data 204 of the internal data packet TDF of 8 bits each. The original order of the user data is retained. In the in 2 shown penultimate data packet PKn - 1 are the remaining, here 7 Nutzdatenbits included. The eighth bit of user data 302 is by a bit of the CRC date 205 refilled. In the last data packet PKn are the remaining 2 bits of the CRC date 205 contain. The XCRC information of the date 207 of the internal data frame TDF fills the remaining 6 bits of the user data field 302 of the data packet PKn. In this case, therefore, the provision of stuffing bits (field 206 the internal data packet TDF) is not required.

The additional configuration of one parity bit per packet is not required because using the extended CRC date results in a much higher error detection rate over the entire message of the internal data frame, XCRC.

• a4) Um einen größtmöglichen Datendurchsatz auf dem Downstream-Pfad 31 zu erreichen, können die einzelnen Datenpakete PK1, ..., PKn lückenlos aufeinander folgen. In 2 ist mit BSD die Bitshift-Richtung gekennzeichnet.

The number n of the resulting data packets PK1,..., PKn of a data stream, referred to collectively as a downstream packet frame DPF, between the transceiver unit 20 and the microcontroller 40 depends on the size of the payload of the original data frame PSI5. The minimum number n of packets PK1,..., PKn is n = 4 with a minimum useful data length of the data frame PSI5 of 13 bits, the maximum number n = 6 with the maximum usable data length of the data frame PSI5 of 33 bits.

• a4) For the highest possible data throughput on the downstream path 31 To achieve the individual data packets PK1, ..., PKn can follow each other seamlessly. In 2 BSD indicates the bit shift direction.

A synchronization or re-synchronization of consecutive downstream data frames DPF is effected by the insertion of a suitable minimum number of so-called "idle bits" between the individual downstream data frames DPF. This indicates inactivity on the communication line. It can be ensured that the first packet received after this "idle time" always represents the header packet of the following data frame.

In addition, with reference to 3 the data communication from the microcontroller 40 to the transceiver unit 20 and optionally the sensors connected via the bus channels Ch 1, ..., Ch n via the upstream path 32 described. The microcontroller sends messages of fixed length, eg 43 bits, to the transceiver unit 20 which is to be translated into the format of the first data transmission protocol of the bus channels. In this case, each bit of the 43 bits is coded in a respective command frame, ie there are 43 command frames to the transceiver unit 20 transfer. The individual bits of this data packet are displayed on the bus channels in accordance with the PSI specification V1.3 as pulses 50 (cf. 1 ) of defined length ("1") or missing pulses ("0") or alternatively according to the PSI specification V2.0 as short pulses of defined length ("0") or long pulses of defined length ("1"). To the individual bits of the data stream through the transceiver unit on the data bus 10 Thus, basically three types of pulses are to be generated by it: "no pulse", "short pulse", "long pulse". The request to generate these pulses in the transceiver is made by the microcontroller 40 in an in 3 illustrated upstream data frame UF. The structure of the upstream data frames UF likewise corresponds to a standard UART format with an 11-bit data frame length. In 3 Two data frames are shown, of which the upper one is a command frame UCF, the lower one is a conventional data frame UDF. Each of the data frames UCF, UDF points in the field 401 a start bit Srt, in the data field 403 a parity bit P and in the data field 404 a stop bit Stp on. With 402 an 8-bit user data field is shown in each case. Overall, the command frame and the data frame each have 11 bits. BSD again shows the bit shift direction.

The command frame UCF points in the user data field 402 a 3-bit long field for the number of the physical interface to be addressed, ie a bus channel Ch 1, ..., Ch n, on. Furthermore, a 5-bit field Cmd is included with a corresponding request to the physical interface to be addressed for a pulse to be generated by the transceiver unit on the addressed bus channel. Since the request for generating the pulses (long, short or no pulse) requires only three different types of commands, a total of 32 commands can be coded by the total of five command bits Cmd. There are thus 29 possible commands for the transceiver unit available. These commands are used to configure and diagnose the transceiver unit.

The data frame UDF points in the payload field 402 8 bit user data "Data" on. Depending on the command, it may be necessary to also transfer data to the transceiver unit, for example to initialize certain addresses or registers in the transceiver unit with required configuration data. In such a case, a command frame UCF is followed by one or more data frames UDF, the number of UDFs being determined by the preceding command frame.

With the invention, a protocol definition for the use of an asynchronous, UART-compliant interface between a transceiver unit for the connection of PSI5 bus channels and a microcontroller. The protocol can be used in full-duplex mode to increase bandwidth and reduce latency. Furthermore, a triggering of synchronization pulses by the transceiver unit by means of a command from the microcontroller, whereby additional trigger lines are dispensable. There is a possibility of definition of commands for configuration or for testing or for diagnosis of the transceiver unit via the upstream path.

A UART-compliant asynchronous two-wire interface can be used between the transceiver unit and the microprocessor. UART is a de facto standard in data communication. The connections between transceiver and microcontroller are reduced to two lines and thus only to two pins. This results in a cost savings. By using asynchronous full duplex operation of the UART based concept in conjunction with the proposed protocol, a bandwidth requirement can be met at the transceiver unit to microcontroller interface. In addition, a CPU / interrupt load on the microcontroller compared to the known SPI operation can be significantly reduced.

Furthermore, it is possible to provide time-multiplexed data streams on the UART-based interface between the transceiver unit and the microcontroller through the protocol header. The channel ID identifies the associated bus channel.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• DE 102010061734 [0003]

Claims (11)

Method for transmitting data via a data communication interface, wherein the data communication interface is designed for data communication between a bus system ( 10 ) having a first number (n) of bus channels (Ch 1, ..., Ch n), and a microcontroller ( 40 ), wherein the number of bus channels (Ch 1, ..., Ch n) with a transceiver unit ( 20 ) connected via a data transmission channel ( 30 ) with the microcontroller ( 40 ), the transceiver unit ( 20 ) is a multi-channel transceiver operable in the time-division multiplex mode, comprising a first asynchronous transceiver module ( 21 ), which via the data transmission channel ( 30 ) with a second, asynchronous transceiver module ( 41 ) of the microcontroller ( 40 ) can exchange data in the full duplex method, in which a data conversion from a first data transmission protocol of the bus system ( 10 ) into a second data transmission protocol of the data transmission channel ( 30 ), wherein - from one, from the transceiver unit ( 20 ) via the bus system ( 10 ), data frames (PSI5) in the first data transmission protocol at least useful data (D0, ..., Dn, CRC) variable length are extracted; - The user data (D0, ..., Dn, CRC) are converted into a variable number of data packets (P1, ..., Pn) of the second data transmission protocol, wherein the number of data packets depending on the length of the payload of the data frame in the first data transmission protocol is. A method according to claim 1, characterized in that the data frames are transmitted in the first data transmission protocol according to PSI5. A method according to claim 1 or 2, characterized in that the data packets are transmitted in the second data transmission protocol as a serial data stream with a fixed frame, wherein the frame of a start bit, a predetermined number of data bits, in particular 8 data bits, an optional parity bit and a stop bit. Method according to one of the preceding claims, characterized in that the user data (D0, ..., Dn, CRC) are inserted transparently to respective payload data fields of the number of data packets of the second data transmission protocol. Method according to one of the preceding claims, characterized in that from the data frame (PSI5) of the first data transmission protocol by the transceiver unit ( 20 ) an internal data frame (TDF) is generated, from which subsequently the number of data packets according to the second data transmission protocol is generated, which is sent to the microcontroller ( 40 ) be transmitted. Method according to Claim 5, characterized in that the internal data frame (TDF) comprises the following fields: A header of predetermined first number of bits, in particular 8 bits, which does not replace data fields belonging to the payload data of the data frame of the first data transmission protocol, in particular a start condition; - the payload of the data frame (PSI5) whose second number of bits is determined by the content of the payload; An extended checksum information (XCRC) of predetermined third number of bits, in particular 6 bits; such as Optionally, a fill data having a fourth bit number, wherein the fourth bit number depends on the total number of bits of the first, second, and third bit numbers, such that the sum of the first, second, third, and fourth bit numbers is the fixed number of data bits Frame (without rest) is divisible. Method according to one of the preceding claims, characterized in that a data conversion from the second data transmission protocol of the data transmission channel ( 30 ) into a third data transmission protocol of the bus system ( 10 ), when performed by the microcontroller ( 40 ) one of the bus channels should be addressed. Method according to Claim 7, characterized in that one or more data frames (UCF, UDF) are generated from a data packet of the second data transmission protocol in accordance with a UART format having a fixed bit length, a respective data frame comprising a start bit, a predefined number of useful bits, includes a parity bit and a stop bit. A method according to claim 7 or 8, characterized in that a data frame is a command frame (UCF), in which for the transceiver unit ( 20 ) is encoded a request for generating a predetermined pulse pattern for addressing a unit connected to the relevant bus channel (Ch 1, ..., Ch n). A method according to claim 9, characterized in that the coding variants not required for the coding of the plurality of pulses are used for the coding of commands for the transceiver unit. Method according to claim 9 or 10, characterized in that the command frame (UCF) one or more data frames (UDF) is transmitted in advance via the bus channel (Ch 1,..., Ch n) addressed in the command frame (UCF).

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