DE102010012231A1 - Method for NTV sintering of a semiconductor device - Google Patents

Method for NTV sintering of a semiconductor device Download PDF

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Publication number
DE102010012231A1
DE102010012231A1 DE102010012231A DE102010012231A DE102010012231A1 DE 102010012231 A1 DE102010012231 A1 DE 102010012231A1 DE 102010012231 A DE102010012231 A DE 102010012231A DE 102010012231 A DE102010012231 A DE 102010012231A DE 102010012231 A1 DE102010012231 A1 DE 102010012231A1
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Germany
Prior art keywords
ntv
sintering
layer
plasma deposition
contact areas
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DE102010012231A
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German (de)
Inventor
Mathias Kock
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Danfoss Silicon Power GmbH
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Danfoss Silicon Power GmbH
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Publication date
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Priority to DE102010012231A priority Critical patent/DE102010012231A1/en
Priority to PCT/DE2011/000231 priority patent/WO2011113414A2/en
Publication of DE102010012231A1 publication Critical patent/DE102010012231A1/en
Pending legal-status Critical Current

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    • H01L2924/181—Encapsulation

Abstract

Verfahren zum NTV-Sintern eines Halbleiterbauelementes für die Leistungselektronik unter dem eine Sinterschicht vorgesehen ist, die für die Wärmeabfuhr sorgt und das mit um die metallischen Kontaktbereiche ausgebildeten, isolierenden, über die ebenen Kontaktbereiche vorstehenden Rändern versehen ist, wobei über die vorstehenden Ränder hinaus die Kontaktbereiche durch das Aufbringen wenigstens einer weiteren, ebenen, metallisch leitenden Schicht angefüllt werden, Sinterstempel auf diese aufgebrachte(n) weitere(n) Schicht während des Sinterns wirken und Bonddrähte oder -bändchen auf diese aufgebrachte(n) weitere(n) elektrisch und thermisch leitende(n), vorzugsweise metallische(n) Schicht(en) gebondet werden.Method for NTV sintering of a semiconductor component for power electronics under which a sintered layer is provided, which provides for heat dissipation and which is provided with insulating edges formed around the metallic contact areas and projecting beyond the flat contact areas, the contact areas beyond the projecting edges are filled by the application of at least one further, flat, metallically conductive layer, sintering stamps act on this additional layer (s) during the sintering and bonding wires or tapes on this additional electrically and thermally conductive layer (s), preferably metallic layer (s), are bonded.

Description

Die Erfindung betrifft ein Verfahren zum NTV-Sintern eines Halbleiterbausteins nach dem Oberbegriff des Hauptanspruches.The invention relates to a method for NTV sintering of a semiconductor device according to the preamble of the main claim.

Ein modernes Verbindungsverfahren von Halbleitern auf Substraten (Keramik-Metall-Substraten oder Metallsubstraten oder Keramiksubstraten) ist das Niedertemperatur-Drucksintern (NTV-NiederTemperaturVerbinden) mit Silber. Hierbei wird der Halbleiter mit einer Verbindungsschicht aus Silber unter Anwendung von Temperatur (180°C bis 350°C) und Druck (3–30 MPa) auf das Substrat gepresst.A modern bonding method of semiconductors to substrates (ceramic-metal substrates or metal substrates or ceramic substrates) is low temperature pressure sintering (NTV low temperature bonding) with silver. Here, the semiconductor is pressed onto the substrate with a compound layer of silver using temperature (180 ° C to 350 ° C) and pressure (3-30 MPa).

Dabei erfolgt eine Verdichtung des porösen Silbers und eine temperaturgetriebene Diffusion des Silber in die Kontaktflächen der Chipmetallisierung und der Metallschicht des Substrates und umgekehrt. Die Höhe des Sinterdruckes bestimmt den Grad der Restporosität der verbindenden Silberschicht.In this case, a compression of the porous silver and a temperature-driven diffusion of silver into the contact surfaces of the chip metallization and the metal layer of the substrate and vice versa. The height of the sintering pressure determines the degree of residual porosity of the connecting silver layer.

Eine derartige vorteilhafte Verbindung weist eine besonders hohe Wärme- und Stromtragfähigkeit auf, wenn die Porosität der Sinterverbindung besonders gering (z. B. geringer als 15%) ist. Dazu ist der Sinterdruck entsprechend hoch einzustellen.Such an advantageous compound has a particularly high heat and current carrying capacity if the porosity of the sintered connection is particularly low (eg less than 15%). For this purpose, the sintering pressure is set correspondingly high.

Die initiale Silberschicht vor dem Verpressen ist meist eine getrocknete Suspension partikulären Silbers. Sind die Silberpartikel nanoskalig (d. h. haben sie 1–100 nm Durchmesser), so ist ein geringerer Druck erforderlich (3–10 MPa). Für makroskalige Suspensionen (1 μ–20 μm) ist ein Druck von 10–30 MPa erforderlich.The initial silver layer before pressing is usually a dried suspension of particulate silver. If the silver particles are nanoscale (that is, they are 1-100 nm in diameter), a lower pressure is required (3-10 MPa). For macroscale suspensions (1 μ-20 μm), a pressure of 10-30 MPa is required.

Die besten Ergebnisse werden erzielt wenn der Druck durch eine Presse mit heizbarem Unterstempel und einem Oberstempel mit flexibler oder verformbarer Anpressplatte auf das Halbleiterbauelement und das umgebende Substrat übertragen wird.The best results are obtained when the pressure is transferred to the semiconductor device and the surrounding substrate by a press with heatable lower punch and an upper punch with a flexible or deformable pressure plate.

Teilweise werden die zu sinternden Halbleiter auch mit harten (z. B. keramischen Stempelflächen) in die Silbersuspension gedrückt und die Sinterung eingeleitet. Anschließend werden die gesinterten Halbleiter z. B. durch Ultraschall-Drahtbonden oder Bändchenbonden elektrisch kontaktiert.Some of the semiconductors to be sintered are also pressed into the silver suspension with hard (eg ceramic stamping surfaces) and the sintering is initiated. Subsequently, the sintered semiconductors z. B. contacted by ultrasonic wire bonding or ribbon bonding electrically.

Dabei ergeben sich folgende Nachteile: Der relativ relative hohe Druck erzeugt auch mit einer nachgiebigen Oberstempelschicht lokale Spannungsspitzen, die zu Scherund Zugspannungen insbesondere im Halbleiter und seinen Strukturen führen. Dabei sind die besonders exponierten Erhöhungen auf dem Halbeiter als Punkte höchster Krafteinleitung gefährdet.This results in the following disadvantages: The relatively high relative pressure also generates local stress peaks with a yielding upper punch layer, which leads to shear and tensile stresses, in particular in the semiconductor and its structures. The particularly exposed elevations on the semiconductor as points of maximum force transmission are at risk.

Diese geometrisch aufragenden Strukturen auf den überwiegend ebenen Halbleitern sind die Isolationsränder rund um Kontaktierungsflächen. Zum Beispiel ist ein IGBT-Transistor auf seiner Oberseite mit Isolationsstrukturen rund um den Gatekontakt zur Isolation zwischen Gate und Emitter versehen.These geometrically towering structures on the predominantly planar semiconductors are the isolation edges around contact surfaces. For example, an IGBT transistor is provided on its upper side with isolation structures around the gate contact for isolation between gate and emitter.

Des Weiteren besteht eine erhöhte Isolationskante rund um den Emitterkontakt zur Erhöhung der Isolation zwischen Emitter und Kollektor entlang der Sägekante. Dies findet sich analog auch bei MOSFET-Halbleitern, die eine gleichartige Isolation zwischen Gate- und Source-Kontakten und zwischen Source- und umseitiger Drainfläche besitzen.Furthermore, there is an increased insulation edge around the emitter contact for increasing the insulation between emitter and collector along the saw edge. This is analogous to MOSFET semiconductors, which have a similar isolation between gate and source contacts and between source and drain surface on the other side.

Weiter werden Dioden auf gleiche Weise zwischen den Kontaktflächen von Anode und Kathode durch einen gegenüber der restlichen Halbleiterflächen erhabenen Isolationswall isoliert.Further, diodes are isolated in the same way between the contact surfaces of the anode and cathode by a raised against the remaining semiconductor surfaces insulating wall.

Derartige Isolationswälle bestehen zum Beispiel aus spröden Schichten, wie z. B. Si3N4, SiO2 oder Gläsern. Typisch sind für diese Isolationswälle dabei Höhen von 2–10 μm.Such insulation walls consist for example of brittle layers, such. As Si 3 N 4 , SiO 2 or glasses. Typical for these insulation walls are heights of 2-10 microns.

Weiter sind auch Isolationswälle aus Polymeren (speziell Polyimiden) gebräuchlich. Diese weisen eine geringe Sprödigkeit auf, sind aber durch den Sinterdruck verdrängbar. Es entstehen Anrisse, Zerstörungen und/oder Delaminationen im Bereich der Isolationswälle durch den Druck des Sinterstempels auch in den Fällen, in denen Sie gar nicht direkt in Kontakt mit dem Sinterstempel kommen.Furthermore, insulating walls of polymers (especially polyimides) are also common. These have a low brittleness, but are displaced by the sintering pressure. Cracks, destructions and / or delaminations occur in the area of the insulation walls due to the pressure of the sintering punch, even in cases where you do not come into direct contact with the sintering punch.

Derartige Beschädigungen werden auch gelegentlich nach dem Abschneidevorgang beim Draht-(Bändchen-)-Bonden beobachtet, wenn das geschnittene Draht- bzw. Bändchenende über die Kanten der Isolationswälle gezogen wird.Such damage is also occasionally observed after the wire (ribbon) bonding cutoff process when the cut wire or ribbon end is pulled over the edges of the insulation walls.

Eine Beeinträchtigung der Isolationswälle durch Beschädigungen beim Drucksintern und/oder Bonden führt zu Isolationstestausfällen oder erhöhten Leckstromwerten beim End-of-Line-Test der Halbleiter-Packages in der Fertigung.Impairment of the insulation walls due to damage during pressure sintering and / or bonding leads to insulation test failures or increased leakage current values during the end-of-line test of the semiconductor packages in production.

Es ist Aufgabe der Erfindung diese Nachteile/Beschädigungen zu vermeiden.It is an object of the invention to avoid these disadvantages / damage.

Die beschriebenen Nachteile beim Drucksintern eines Halbleiterbausteins sollen erfindungsgemäß durch folgendes Vorgehen beseitigt werden: Die Kontaktfläche bzw. Kontaktflächen des Halbleiters (Kathode oder Anode bei Dioden und Emitter oder Source, sowie die Gate-Kontaktfläche bei IGBT und MOSFET) werden zunächst mit einer elektrisch leitfähigen Zusatzschicht versehen, die mindestens die Dicke der höchsten Isolationswälle besitzt, vorzugsweise aber deutlich höher ist, um eine Entlastung der Isolationswälle zu gewährleisten.The disadvantages described in the pressure sintering of a semiconductor component are to be eliminated according to the invention by the following procedure: The contact surface or contact surfaces of the semiconductor (cathode or anode in the case of diodes and emitter or source, as well as the gate contact area in IGBT and MOSFET) are first provided with an electrically conductive additional layer provided, which has at least the thickness of the highest insulation walls, but preferably is significantly higher to ensure relief of the insulation walls.

Eine besonders vorteilhafte Wirkung hat sich bei ca. der drei bis fünffachen Schichtdicke im Vergleich zur Höhe der Isolationswälle gezeigt. Mit steigender Härte der flexiblen Schicht des Oberstempels der Sinterpresse ist die Höhe der Metallschicht zu steigern.A particularly advantageous effect has been found in about three to five times the layer thickness compared to the height of the insulation walls. With increasing hardness of the flexible layer of the upper punch of the sintering press, the height of the metal layer is to be increased.

Die Schicht sollte zudem bondbar sein, damit die typischen Kontaktierungen durch Ultraschallbonden von Kontaktdrähten und -bändern zur Stromführung erhalten werden kann. Hierzu kommen bevorzugt gut leitfähige Stoffe wie Al, Cu oder Ag oder deren Legierungen zum Einsatz.The layer should also be bondable, so that the typical contacts can be obtained by ultrasonic bonding of contact wires and tapes to conduct electricity. For this purpose, preferably good conductive substances such as Al, Cu or Ag or their alloys are used.

Die erfindungsgemäße zusätzliche Metallschicht wirkt durch ihre Dicke zusätzlich vorteilhaft als Druckmittler zur Vermeidung von mechanischen Spannungsspitzen über die Halbleiterfläche und löst damit ein weiteres Problem.Due to its thickness, the additional metal layer according to the invention additionally acts advantageously as a pressure transmitter to avoid mechanical stress peaks over the semiconductor surface and thus solves a further problem.

Eine weitere bevorzugte Verbesserung ergibt sich bei der Verwendung von thermisch gut leitenden Schichtmaterialien durch die thermische Spreiz- und Pufferwirkung der dicken Metallschicht.A further preferred improvement results from the use of thermally highly conductive layer materials by the thermal spreading and buffering effect of the thick metal layer.

Die Aufbringung der Schicht ist vorzugsweise im Waferverbund herzustellen und kann durch maskierte chemische, galvanische oder physikalische Aufbringungstechnik selektiv geschehen. Als besonders wirtschaftlich hat sich das selektive Spritzen von Metallpulvern (nanoskalig) durch ein Niedertemperatur-Plasma erwiesen. Hierbei sind Schichtdicken bis zu mehreren 100 μm herstellbar. Dieses Verfahren ist auch für bereits gesägte Wafer auf Folie und für bereits gesinterte Chips auf Substraten einsetzbar.The application of the layer is preferably to produce in the wafer composite and can be done selectively by masked chemical, electroplating or physical deposition technique. The selective spraying of metal powders (nanoscale) by a low-temperature plasma has proven to be particularly economical. Here, layer thicknesses up to several 100 microns can be produced. This method can also be used for already sawn wafers on film and for already sintered chips on substrates.

Weiter Vorteile und Merkmale ergeben sich aus nachfolgender Beschreibung eines bevorzugten Ausführungsbeispiels. Dabei zeigt:Further advantages and features will become apparent from the following description of a preferred embodiment. Showing:

1 einen Querschnitt eines Leistungshalbleiters (am Beispiel eines IGBT) gesintert auf ein Keramik-Substrat mit den erfindungsgemäßen Schutzschichten gegen zerstörerische Folgen des Sinterdrucks. 1 a cross section of a power semiconductor (the example of an IGBT) sintered on a ceramic substrate with the protective layers according to the invention against destructive consequences of the sintering pressure.

Das erfindungsgemäße Verfahren zum NTV-Sintern eines Halbleiterbauelementes 5 für die Leistungselektronik unter dem eine Sinterschicht 6 vorgesehen ist, die für die Wärmeabfuhr sorgt und das mit um die metallischen Kontaktbereiche ausgebildeten, isolierenden, über die ebenen Kontaktbereiche vorstehenden Rändern oder Isolationswällen 3 versehen ist, zeichnet sich durch die folgenden Schritte aus: 1.) über die vorstehenden Isolationswälle 3 hinaus werden die Kontaktbereiche durch das Aufbringen wenigstens einer weiteren, ebenen, elektrisch und thermisch leitenden, vorzugsweise metallischen Schicht 4 angefüllt, 2.) Sinterstempel wirken dann auf diese aufgebrachte(n) weitere(n) Schicht 4 während des Sinterns und 3.) Bonddrähte 1a, 1b werden auf diese aufgebrachte(n) weitere(n) elektrisch und thermisch leitende(n), vorzugsweise metallischen Schicht(en) gebondet.The inventive method for NTV sintering of a semiconductor device 5 for the power electronics under the one sintered layer 6 is provided, which ensures the heat dissipation and formed around the metallic contact areas, insulating over the flat contact areas protruding edges or isolation walls 3 is characterized by the following steps: 1.) over the above insulating walls 3 In addition, the contact areas by the application of at least one further, planar, electrically and thermally conductive, preferably metallic layer 4 filled, 2.) Sinter stamps then act on this applied (n) further (n) layer 4 during sintering and 3.) bonding wires 1a . 1b are bonded to this applied further electrical and thermal conductive, preferably metallic layer (s).

Diese Bonddrähte 1a, 1b werden nach dem Sintern zur Kontaktierung z. B. eines IBGT-Transistors mit Gate bzw. Emitterkontakt gefertigt.These bonding wires 1a . 1b are after sintering for contacting z. B. an IBGT transistor with gate or emitter contact.

In einer bevorzugten Variante wird beim vorgeschlagenen Verfahren zum NTV-Sintern wenigstens eine der weiteren Schichten durch Vakuum-Plasma-Abscheidung gebildet.In a preferred variant, in the proposed method for NTV sintering, at least one of the further layers is formed by vacuum plasma deposition.

Weiter wird vorgeschlagen, dass eine der weiteren Schichten aus Kupfer besteht und/oder eine der weiteren Schichten als zweite Wärmesenke mit einer Gesamtdicke der Schichten von 30 μm dick ausgebildet wird.It is further proposed that one of the further layers consists of copper and / or one of the further layers is formed as a second heat sink with a total thickness of the layers of 30 .mu.m thick.

Bevorzugt ist weiter, dass die metallischen Kontaktbereiche aus einer Aluminiumverbindung bestehen und/oder die Kupferschicht(en) aus Nanopartikeln aufgesprüht werden (Nanopowder-Plasma-Deposition).It is further preferred that the metallic contact areas consist of an aluminum compound and / or the copper layer (s) of nanoparticles are sprayed on (nanopowder plasma deposition).

Dabei wird weiter bevorzugt, dass die Nanopowder-Plasma-Deposition ohne vorbereitende Ätz- und Beizschritte auf den Halbleiterbauelementen durchgeführt wird bevor diese durch Zersägen eines Wafers vereinzelt werden.It is further preferred that the nanopowder plasma deposition is carried out without preparatory etching and etching steps on the semiconductor components before they are separated by sawing a wafer.

Schließlich werden durch die Erfindung Temperaturen von 60 bis 140°C für die Nanopowder-Plasma-Deposition vorschlagen, wobei die Temperaturen von 130°C bis 140°C für dünnere Schichten vorbehalten sind und dickere bevorzugt bei Temperaturen zwischen 95° und 115°C gefertigt werden. Die Nanopowder-Plasma-Deposition wird dabei schon bei Atmosphärendruck erfolgreich sein können.Finally, by the invention, temperatures of 60 to 140 ° C for nanopowder plasma deposition suggest, the temperatures of 130 ° C to 140 ° C are reserved for thinner layers and thicker preferably at temperatures between 95 ° and 115 ° C. become. Nanopowder plasma deposition will already be successful at atmospheric pressure.

Es wird dabei eine Nanopowder-Plasma-Deposition bevorzugt, bei der reines pulvriges Kupfer mit Korndurchmessern von 0,05 bis 0,5 μm ohne weitere Beimengungen versprüht wird.In this case, a nanopowder plasma deposition is preferred in which pure powdery copper with grain diameters of 0.05 to 0.5 μm is sprayed without further admixtures.

Claims (9)

Verfahren zum NTV-Sintern eines Halbleiterbauelementes für die Leistungselektronik unter dem eine Sinterschicht vorgesehen ist, die für die Wärmeabfuhr sorgt und das mit um die metallische Kontaktbereiche ausgebildeten, isolierenden, über die ebenen Kontaktbereiche vorstehenden Rändern versehen ist, dadurch gekennzeichnet, dass – über die vorstehenden Ränder hinaus die Kontaktbereiche durch das Aufbringen wenigstens einer weiteren, ebenen, elektrisch und thermisch leitenden, vorzugsweise metallischen Schicht angefüllt werden, – Sinterstempel auf diese aufgebrachte(n) weitere(n) Schicht während des Sinterns wirken und – Bonddrähte oder -bändchen auf diese aufgebrachte(n) weitere(n) elektrisch und thermisch leitende(n), vorzugsweise metallische(n) Schicht(en) gebondet werden.A method for NTV sintering of a semiconductor device for power electronics under which a sintered layer is provided, which provides for the heat dissipation and which is provided with formed around the metallic contact areas, insulating, over the flat contact areas protruding edges, characterized in that - over the above Margins beyond the contact areas are filled by the application of at least one further, planar, electrically and thermally conductive, preferably metallic layer, Sintering stamps act on this applied further layer during sintering and bonding wires or strips on this applied further electrically and thermally conductive layer (s), preferably metallic layer (s) be bonded. Verfahren zum NTV-Sintern nach Anspruch 1, dadurch gekennzeichnet, dass wenigstens eine der weiteren Schichten durch Vakuum-Plasma-Abscheidung gebildet ist.Method for NTV sintering according to claim 1, characterized in that at least one of the further layers is formed by vacuum plasma deposition. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass eine der weiteren Schichten aus Kupfer besteht.Method for NTV sintering according to one of the preceding claims, characterized in that one of the further layers consists of copper. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass eine der weiteren Schichten als zweite Wärmesenke mit einer Gesamtdicke der Schichten von 30 μm dick ausgebildet ist.Method for NTV sintering according to one of the preceding claims, characterized in that one of the further layers is designed as a second heat sink with a total thickness of the layers of 30 μm thick. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die metallischen Kontaktbereiche aus einer Aluminiumverbindung bestehen und die Kupferschicht(en) aus Nanopartikeln aufgesprüht werden (Nanopowder-Plasma-Deposition).Method for NTV sintering according to one of the preceding claims, characterized in that the metallic contact areas consist of an aluminum compound and the copper layer (s) of nanoparticles are sprayed on (nanopowder plasma deposition). Verfahren zum NTV-Sintern nach Anspruch 5, dadurch gekennzeichnet, dass die Nanopowder-Plasma-Deposition ohne vorbereitende Ätz und Beizschritte auf den Halbleiterbauelemente durchgeführt wird, bevor diese durch Zersägen eines Wafers vereinzelt werden.Method for NTV sintering according to Claim 5, characterized in that the nanopowder plasma deposition is carried out without preparatory etching and pickling steps on the semiconductor components before they are separated by sawing a wafer. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Nanopowder-Plasma-Deposition bei Temperaturen unterhalb von 115°C erfolgt.Process for NTV sintering according to one of the preceding claims, characterized in that the nanopowder plasma deposition takes place at temperatures below 115 ° C. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Nanopowder-Plasma-Deposition bei Atmosphärendruck erfolgt.Method for NTV sintering according to one of the preceding claims, characterized in that the nanopowder plasma deposition takes place at atmospheric pressure. Verfahren zum NTV-Sintern nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Nanopowder-Plasma-Deposition reines pulvriges Kupfer mit Korndurchmessern von 0,05 bis 0,5 μm ohne weitere Beimengungen versprüht.Process for NTV sintering according to one of the preceding claims, characterized in that the nanopowder plasma deposition sprays pure powdery copper with grain diameters of 0.05 to 0.5 μm without further admixtures.
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Publication number Priority date Publication date Assignee Title
CN102394235A (en) * 2011-11-15 2012-03-28 株洲南车时代电气股份有限公司 Insulated gate bipolar transistor (IGBT) module and manufacturing method thereof
CN102881589A (en) * 2012-09-24 2013-01-16 株洲南车时代电气股份有限公司 Crimping IGBT (insulated gate bipolar transistor) module and method for manufacturing same
CN102881589B (en) * 2012-09-24 2015-05-13 株洲南车时代电气股份有限公司 Crimping IGBT (insulated gate bipolar transistor) module and method for manufacturing same
DE112015007185B4 (en) 2015-12-14 2022-10-13 Mitsubishi Electric Corporation Semiconductor device and method of manufacturing the same
DE102020202845A1 (en) 2020-03-05 2021-09-09 Volkswagen Aktiengesellschaft Process for the production of an electrical module

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