DE102009057020A1 - Method for manufacturing multijunction solar cell in e.g. space applications, involves separating mass of semiconductor-carrier from composite structure, and separating sequence of layers as semiconductor material to form solar cell - Google Patents

Abstract

The method involves providing a semiconductor-carrier with a bonding surface or an adhering surface. A carrier substrate i.e. sapphire substrate (40), is provided, and the semiconductor-carrier and the carrier substrate are connected to produce a composite structure. A mass of the semiconductor-carrier is separated from the composite structure by leaving a semiconductor-growth substrate e.g. gallium arsenide or germanium, on the carrier substrate. A sequence of layers is separated as a semiconductor material for forming a solar cell on the semiconductor-growth substrate.

Description

BACKGROUND OF THE INVENTION

1. Field of the invention

The present invention relates to the field of semiconductor devices and to manufacturing methods and devices such as multi-junction solar cells based on III-V semiconductor compounds including a metamorphic layer. Such devices are also known as inverted metamorphic multijunction solar cells (solar cells with multiple pn junctions).

2. Description of Related Art

Solar power of photovoltaic cells, also referred to as solar cells, has been predominantly provided by silicon semiconductor technology. However, in recent years, the fabrication of III-V compound semiconductor multijunction solar cells for space applications has accelerated the development of this technology, not only for space applications but also for use in terrestrial solar power applications. Compared to silicon, III-V compound semiconductor multijunction devices have greater energy conversion efficiencies and generally have greater radiation resistance, although they tend to be more complicated to manufacture. Typical III-V compound semiconductor multi-junction solar cells have energy efficiencies that exceed 27% when illuminated with a sun, air mass (AMO) exposure, whereas even the most efficient silicon technologies generally achieve only about 18% efficiency under comparable conditions , At a high solar concentration (eg, 500X), III-V compound semiconductor multijunction solar cells have energy efficiencies in terrestrial applications (at AM1, 5D) that exceed 37%. The high conversion efficiency of III-V compound semiconductor multi-junction solar cells compared to silicon solar cells is partly based. on the ability to achieve spectral splitting of the incident radiation through the use of a plurality of photovoltaic zones or regions with different bandgap energies, and summing the current from each of the zones.

Typical III-V compound semiconductor multi-junction solar cells are fabricated on a semiconductor wafer in vertical multi-junction structures. The individual solar cells or wafers are then arranged in horizontal arrangements, wherein the individual solar cells are connected to each other in a series electrical connection. The shape and structure of an array and also the number of cells containing the array are determined in part by the desired output voltage and the desired output current.

In satellite applications and other space-related applications, the size, mass and cost of a satellite power system depend on the power and energy conversion efficiency of the solar cells used. In other words, the size of the payload and the availability of on-board services are proportional to the delivered performance group. Thus, as the "payloads" become more complicated and consume more power, the efficiency and mass of the solar cells serving as power conversion devices are becoming increasingly important to on-board power systems.

Inverted metamorphic solar cell structures as described in MW Wanlass et al., Lattice Mismatched Approaches for High Performance, III-V Photovoltaic Energy Converters (Conference Proceedings of the 31st IEEE Photovoltaic Specialists Conferences, Jan. 3-7, 2005, IEEE Press, 2005) represent an important conceptual point of view for the development of future commercial high efficiency solar cells. The described structures in this reference have a number of practical difficulties related to the proper choice of materials and manufacturing steps.

Prior to the present inventions described in this application and related applications, as noted above, the prior art materials and fabrication steps are not adequate for producing a commercially disruptive and energy efficient inverted multi-junction metamorphic solar cell.

SUMMARY OF THE INVENTION

Briefly and generally, the present invention provides a method of making a A solar cell, comprising: providing a gallium arsenide support with a prepared bonding or adhesive surface; Providing a support substrate; Bonding or bonding the gallium arsenide support and support substrate to form a composite or composite structure; Separating the bulk of the gallium arsenide support from the composite structure, leaving a gallium arsenide substrate on the support substrate; and depositing a sequence of layers of semiconductor material forming a solar cell on the gallium arsenide substrate.

In another aspect, the invention provides a method of manufacturing a solar cell, comprising: providing a germanium carrier having a bonded or glued surface; Providing a support substrate; Bonding or bonding the germanium carrier and the supporting substrate to form a composite structure; Separating the mass of the germanium carrier from the composite structure; Leaving a germanium substrate on the sapphire substrate and depositing a sequence of layers as semiconductor material to form a solar cell on the germanium substrate.

In a further aspect, the invention further provides: sequentially forming a new bonding or adhesive surface on the removed bulk portion of the germanium arsenide or germanium substrate to form a new carrier; Providing a new support substrate; Bonding or bonding the new gallium arsenide or germanium support and the new support substrate to create a new composite structure; Separating the mass of the new gallium arsenide or germanium growth substrate on the new support substrate; and depositing a train of layers of semiconductor material to form a solar cell on the new gallium arsenide or germanium growth substrate.

In a further aspect, the present invention further provides: sequentially attaching a second surrogate substrate on top of the series of layers of semiconductor material forming the solar cell; and removing the gallium arsenide or germanium growth substrate.

In another aspect, the invention provides: depositing the sequence of layers of semiconductor material to form a solar cell comprises forming a first subcell on the growth substrate, comprising a first semiconductor material having a first bandgap and a first lattice constant; Forming or forming a second subcell comprising a second semiconductor material having a second bandgap and a second lattice constant, wherein the second bandgap is less than the first bandgap and the second lattice constant is greater than the first lattice constant; Forming or forming a lattice constant transition material positioned between the first subcell and the second subcell, wherein the lattice constant transition material has a lattice constant that varies gradually from the first lattice constant to the second lattice constant.

According to a further aspect of the invention, a method for producing a solar cell is provided, wherein the following is provided:
Providing a gallium arsenide support having a prepared or prepared bonding or adhesive surface; Providing a support substrate; Bonding or bonding the gallium arsenide support and the support substrate to form a composite structure; Separating the bulk of the gallium arsenide support from the composite structure leaving a gallium arsenide substrate on the support substrate; Forming or forming a first solar subcell having a first bandgap on the gallium arsenide substrate; Forming or forming a second solar cell disposed over the first solar cell with a second band gap smaller than the first band gap; Forming a graded interlayer disposed over the second subcell having a third bandgap greater than the second bandgap; Forming or forming a third solar subcell disposed over the graded interlayer having a fourth band gap that is less than the second band gap and lattice mismatched with respect to the second subcell; Forming or forming a fourth solar subcell, disposed over the third subcell having a fifth bandgap smaller than the fourth bandgap, and lattice matched with respect to said third subcell.

Not all of these aspects or features of the present invention need to be implemented in any embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be better understood and its meaning more fully appreciated by reference to the following detailed description taken in conjunction with the accompanying drawings; in the drawing shows:

1 a cross-sectional view of the support substrate of the present invention,

1B a cross-sectional view of a carrier substrate of the present invention after the surface preparation or preparation;

1C a cross-sectional view of the composite structure, resulting from the bonding or bonding of the support and carrier substrates;

1D a cross section of the composite structure of 10 after removal of the mass of the carrier substrate;

2A a perspective view of a polyhedral (polyhedral) representation of a semiconductor lattice structure showing the crystal planes;

2 B a perspective view of the GaAs crystal lattice, wherein the position of the gallium and arsenic atoms is shown;

3A a perspective view of the plane P of the substrate according to the invention, superimposed on the crystal diagram of 2A ;

3B a graphical representation of the surface of the plane of the substrate used according to the invention;

4A FIG. 4 is a graph depicting the bandgap of certain or certain binary materials and their lattice constants and using a range of materials in the prior art inverted multi-junction metamorphic (IMM) solar cell; FIG.

4B FIG. 4 is a graph showing the bandgap of certain binary materials and their lattice constants and using a range of materials in an inverted metamorphic multi-junction (IMM) solar cell according to the invention; FIG.

5 a graph showing the range of bandgaps of different GaInAlAs materials as a function of the relative concentration of Al, In, and Ga;

6 FIG. 4 is a graph showing the Ga mole fraction depending on the Al to In mole fraction in GaInAlAs materials necessary to obtain a constant 1.6 eV bandgap; FIG.

7 Figure 9 is a graph depicting the mole fraction depending on lattice constants in GaInAlAs materials necessary to obtain a constant 1.5 eV bandgap;

8th a cross-sectional view of the solar cell of the invention, after the deposition of the semiconductor layers on the growth substrate;

9 a cross-sectional view of the solar cell of 8th after the next sequence of processing steps;

10 a cross-sectional view of the solar cell of 9 after the next sequence of processing steps;

11 a cross-sectional view of the solar cell of 10 after the next sequence of processing steps;

12 a cross-sectional view of the solar cell of 11 after the next processing step, in which surrogate substrate is attached;

13A a cross-sectional view of the solar cell of 12 after the next processing step, in which the original substrate is removed;

13B another cross-sectional view of the solar cell of 13A with an orientation representing the surrogate substrate at the bottom or bottom of the figure;

14 an extremely simplified cross-sectional view of the solar cell of 13B ;

15 a cross-sectional view of the solar cell of 14 after the next processing step;

16 a cross-sectional view of the solar cell of 15 after the next processing step in which the grid lines are formed over the contact layer;

17 a cross-sectional view of the solar cell of 16 after the next processing step;

18A a plan view of a wafer in which four solar cells are made;

18B a bottom plan view of a wafer of 18A ;

18C a top view of a wafer in which two solar cells are made;

19 a cross-sectional view of the solar cell of 17 after the next processing step;

20A a cross-sectional view of the solar cell of 19 after the next processing step;

20B a cross-sectional view of the solar cell of 20A after the next processing step;

21 a plan view of the wafer of 20B showing the surface view of the trench etched around the cell;

22A a cross-sectional view of the solar cell of 20B after the next processing step in a first embodiment of the invention;

22B a cross-sectional view of the solar cell of 22A after the next processing step in a second embodiment of the invention;

22C a cross-sectional view of the solar cell of 22A after the next processing step in a third embodiment of the present invention, in which a cover glass is mounted;

23 a cross-sectional view of the solar cell of 22C after the next processing step in a third embodiment of the invention in which the surrogate substrate is removed; and

24 Figure 3 is a graphical representation of the doping profile in a base and adjacent emitter layer in the metamorphic solar cell according to the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Details of the present invention will now be described, including exemplary aspects and embodiments thereof. With reference to the drawings and the following description, it should be noted that the same reference numerals are used to designate the same or functionally similar elements, and the description is intended to describe key features of exemplary embodiments in an exceedingly simplified schematic manner. In addition, it should be noted that the drawings do not show every feature of the actual embodiment, nor the relative dimensions of the illustrated elements, which are not drawn to scale.

The basic concept of fabricating an inverted metamorphic multi-junction (IMM) solar cell is to grow the subcell of the solar cell on a substrate in a "reversed" sequence. That is, the high bandgap subcells (ie, the subcell having bandgaps in the range of 1.8 to 2.1 eV) that are normally "up" on the subcells and are indicative of solar radiation become epitaxially grown on a semiconductor growth substrate, such as For example, GaAs or Ge grown and these subcells are therefore lattice matched to this substrate. One or more of the lower sub-band middle subcellular cells (i.e., the cells with band gaps in the range of 1.2 to 1.8 eV) can then be grown on the high band gap subcells.

At least one lower subcell is formed over the middle or middle subcell such that the at least one lower subcell is substantially lattice matched with respect to the growth substrate and such that at least one lower subcell has a third lower bandgap (ie, a bandgap in the range of 0.7 to 1 , 2 eV). A surrogate substrate or support substrate is then applied or provided over the "bottom" or substantially lattice mismatched lower subcell, and the growth semiconductor substrate is subsequently removed. (The growth substrate can subsequently be reused for the growth of a second and subsequent solar cells).

The lattice constants and electrical properties of the layers of the semiconductor structure are preferably controlled by the specification of appropriate reactor growth temperatures and times and by the use of appropriate chemical composition and dopants. The use of a vapor deposition technique such as Organo Metallic Vapor Phase Epitaxy (OMVPE), Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE) or other vapor deposition techniques for reverse growth, the layers of the monolithic semiconductor structure forming the cell can be grown to the required thickness, elemental composition, dopant concentration.

A variety of different features of the inverted multi-junction metamorphic solar cells are disclosed in the above-referenced related applications. The present invention is directed to an alternative growth and processing technology for the epitaxial fabrication of semiconductor solar cell layers in a multi-junction solar cell, and more particularly Invention to an inverted metamorphic multi-junction solar cell. In the preferred embodiment to be described, the epitaxial layers of the IMM solar cell are grown on a relatively thin semiconductor structure consisting of a GaAs or Ge growth template (or any other suitable material) attached to a sapphire or sapphire / spinel substrate or carrier is. The sapphire / spinel substrate may be designed or specified and selected to have a coefficient of thermal expansion (CTE) adapted to those of the relative III / V compounds, such as GaAs, GaInPa, etc. These compounds are used in solar cell production.

According to the embodiments described herein, the thin gallium arsenide growth template is formed by bonding or bonding a gallium arsenide wafer to a sapphire substrate and removing the bulk of the gallium arsenide wafer, leaving a thin layer of gallium arsenide on the sapphire substrate. The bulk of the gallium arsenide carrier is separated such that it is not destroyed and can be reused to form additional solar cells on other sapphire substrates. The reuse of the gallium arsenide supports in this way to form additional solar cells significantly reduces the cost per unit of gallium arsenide based solar cells.

The IMM cell structure is grown on the growth template mentioned above by MOCVD or equivalent growth technology. After growth, the structure is processed. During processing, a release technology is used to remove the sapphire or sapphire / spinel substrate. The sapphire or sapphire / spinel substrate can be reused by attaching another GaAs, Ge (or other) substrate to form an additional solar cell.

The release of the sapphire (or sapphire / spinel) substrate may be by wet etching or by a layer release process. The wet etch would laterally etch a layer, relieve the growth substrate, and the laser recycle process would melt a layer and achieve the same type of growth substrate release.

The value of the proposed method is that the grinding and etching of the growth template no longer has to be carried out. The main part of the growth template, d. H. the sapphire / spinel substrate or carrier is now reusable. Thus, much less GaAs or Ge material is required, just enough of a layer to provide a growth template.

A second advantage of this approach is that different lattice constants can now be used instead of just GaAs or Ge. If a lattice constant smaller than GaAs (or Ge) can be used, then an upper subcell with a higher bandgap can now be built into the solar cell as compared to using a GaInP ₂ subcell (with a band gap of about 1.90 eV) used in currently available IMM solar cell structures.

The 1A - 1D FIG. 15 are cross-sectional views of a sapphire substrate. FIG 40 and a gallium arsenide carrier 50 during different steps of connecting or bonding the carrier 50 with the substrate, the removal of a mass of the carrier 50 after bonding or bonding and forming a solar cell on the remaining gallium arsenide layer 51 connected to the sapphire substrate 40 , 1A shows the sapphire substrate 40 , 1B shows the gallium arsenide carrier 50 , The carrier 50 includes the thin gallium arsenide layer 51 adjacent to a mass zone or mass region 52 from gallium arsenide.

In one embodiment, the gallium arsenide layer becomes 51 by implanting a species or species such as hydrogen ions and / or noble gases into the gallium arsenide support 50 to form a defect layer in the gallium arsenide support. Any known method of implanting the species or species, such as hydrogen ions and / or noble gases, into the semiconductor wafer may be used. For example, the gallium arsenide layer 51 in the carrier 50 may be formed according to any of the species or species implantation techniques disclosed in U.S. Patent No. 4,896,754 U.S. Patents 7288430 . 7,235,462 . 6,946,317 and 6,794,276 each of these patents being assigned to SOI Tec Silicon to Insulator Technologies and the contents of these patents are hereby incorporated by reference in their entirety. The dose and / or energy of the implanted species or species may be adjusted such that the peak concentration of the implanted species at a particular depth of the carrier 50 is formed, whereby the Galliumarsenidschicht 51 weakened due to ion implantation at or near its depth. The mass zone 52 of the gallium arsenide carrier 50 is not weakened during the implantation process.

In one embodiment, the gallium arsenide support 50 a prepared bonding surface that can be roughened before bonding to the sapphire substrate 40 as indicated by the exploded view according to 1B is illustrated. The prepared connection surface of the carrier 50 can be roughened using any suitable chemical compound or by a mechanical roughening process. The roughening of the surface of the carrier 50 improves the bonding characteristics of the wearer 50 ,

1C shows the gallium arsenide carrier 50 and the sapphire substrate 40 after they are connected. In one embodiment, the bonded surface of the gallium arsenide support prepared is directly molecular in molecular weight with a surface of the sapphire substrate 40 connected, for example, at elevated temperature and pressure. A thin connecting layer between the layer 51 and the sapphire substrate 40 is not shown in the figures to simplify the drawings. According to one embodiment, the attenuated layer 51 Gallium arsenide, formed by implantation of the species or species such as hydrogen ions and / or noble gases in the carrier 50 , with the sapphire substrate 40 connected. The crowd 52 of the gallium arsenide carrier 50 is then removed from the composite structure, which is the thin layer 51 of gallium arsenide on the sapphire substrate 40 leaves.

In one embodiment, the mass becomes 52 of the gallium arsenide carrier 50 from the sapphire substrate 40 separated, by tempering the carrier 50 in a hot environment such as in the oven or any rapid thermal annealer. The effect of tempering temperature and time weakens the wearer 50 at the gallium arsenide layer 50 further, introduced by the atomic implantation, which leads to a separation. Separation along this region during or after tempering leaves the thin layer 51 of gallium arsenide with the sapphire substrate as in 1D shown connected. The separated mass part 52 of the carrier 50 will not be destroyed and can be used again.

According to one embodiment, the thin gallium arsenide layer has 51 connected to the sapphire substrate 40 , a thickness of about 5 microns and the mass 52 of the carrier 50 , separated from the composite or composite structure, has a thickness of about 395 microns. The thin layer 51 of gallium arsenide bonded to the sapphire substrate 40 , acts as a substrate on which a solar cell can be formed. In one embodiment, the gallium arsenide layer becomes 51 prepared or smoothed, before a solar cell on the layer 51 is formed. Smoothing or surface preparation may be carried out using any suitable technique, such as chemical mechanical polishing, gas-cycled etching, ion beam or reactive ion etching, HCL smoothing, etc. Hereinafter, in this application, the thin GaAs is shown. layer 51 on the sapphire carrier 40 simply referred to as the "substrate".

As mentioned above, the mass becomes 52 of the gallium arsenide carrier 50 from the sapphire 40 separated and can be used again. In one embodiment, the mass becomes 52 of the gallium arsenide carrier 50 reused to form a new solar cell on a new substrate (not shown) as described above. That is, a new connection surface will be on the separated mass part 52 made of gallium arsenide carrier 50 prepared to form a new gallium arsenide support. The new gallium arsenide support is bonded to a new sapphire substrate to create a new composite or composite structure. The bulk of the new gallium arsenide support is separated from the new composite structure, as described above, leaving a new gallium arsenide substrate on the new sapphire substrate. A new sequence of layers of semiconductor material may then be deposited on the new gallium arsenide substrate to form a new solar cell.

The gallium arsenide carrier 50 (and also the gallium arsenide growth layer of the template 51 ) is preferably a cut substrate as described with reference to FIGS 2A - 3B will be described below. 2A Fig. 12 is a perspective view of a multi-layered (polyhedral) representation of a semiconductor lattice structure showing crystal planes. The Miller indices are used to identify the planes and the crystal structure is represented in the figure by a truncated cube with the ( 001 ) Level above. In the case of a GaAs compound semiconductor, which is the material of interest of the present invention, the crystal structure is known as a zinc blending structure and is disclosed in U.S. Pat 2 B which represents a combination of two intermeshing face-centered cubic sublattices (sub lattices). The lattice constant (ie the distance between the arsenic atoms in the crystal) is 0.565 nm.

2 B Figure 12 is a perspective view of the GaAs crystal lattice showing the position of the gallium arsenic atoms with the corresponding Miller indices identifying the lattice planes.

3A FIG. 12 is a perspective view of the plane P of the substrate surface used in the present invention superimposed over the crystal diagram of FIG 2A , The plane P you see pivoted from a point on the ( 001 ) Plane (in this illustration the rear corner of the upper surface of the polyhedrone) in the direction of ( 111 ) Level or more precisely, the ( 111 ) A-plane, where the letter "A" refers to the plane formed by the sub-lattice of the arsenic atoms. The tilt angle according to the present invention defines the angle of separation of the substrate defined by the ( 001 ) Plane through the plane P, and is at least 6 ° and preferably approximately 15 °.

Although the present invention ideally includes a section (offcut) in the (FIG. 111 ) A direction, it may happen that during the production and manufacture of the various wafer batches of the alignment or cutting process can not be as precise or precise as the present invention specifies, and thus the resulting plane P may be somewhat in the direction of the adjacent ( 011 ) - or ( 101 ) Levels, as well as in the direction of ( 111 ) A plane. Such variations, whether incidental or otherwise due to mechanical or structural reasons, are considered to be within the scope of the invention.

• (i) eine benachbarte (111)A-Ebene um mindestens 6° und höchstens 20°;
• (ii) eine benachbarte (011)-Ebene um mindestens annähernd 1°;
• (iii) eine benachbarte (101)-Ebene um mindestens annähernd 1°; und
• (iv) irgendeine Ebene, die in dem Kontinuum von Ebenen liegt zwischen (i) und (ii), (i) und (iii) oder (ii) und (iii), vgl. oben.

Thus, and in the most general form, the present disclosure encompasses by citing or quoting the "cutting off" of ( 001 ) Crystal plane by at least 6 ° to the ( 111 A level "pivoting the truncated plane P toward any of the following levels:

• (i) an adjacent ( 111 ) A-plane at least 6 ° and not more than 20 °;
• (ii) an adjacent ( 011 ) Plane by at least approximately 1 °;
• (iii) an adjacent ( 101 ) Plane by at least approximately 1 °; and
• (iv) any plane lying in the continuum of planes between (i) and (ii), (i) and (iii) or (ii) and (iii), cf. above.

3B FIG. 12 is an enlarged perspective view of a clipped GaAs substrate showing how clipping results in step-like planar steps that extend over the surface of the substrate.

4A Figure 4 is a graph of the bandgap of certain binary materials and their lattice constants. The bandgap and lattice constants of ternary materials are arranged in the lines between typical associated binary materials (such as the GaAlAs ternary material located between the GaAs and AlAs points on the plot, with the bandgap of the ternary material between 1.42 eV for GaAs and 2.16 eV for AlAs is dependent on the relative size of the individual components). Thus, depending on the desired band gap, the material components of the growth template and ternary materials lattice-matched thereto may be suitably selected for the construction of new solar cell subcell sequences. Line A in the graph represents one of the material combinations of the band gaps or band gaps and the lattice constants of the ternary materials that can be grown on a gallium arsenide as known in the art.

4B is a graph showing the bandgap of certain binary materials and their lattice constants as in 4A wherein line B represents one of the material combinations of bandgap and lattice constants of ternary materials that can be grown on an alternative substrate according to the invention. Thus, depending on the desired band gap, the material components of the growth template and the ternary materials, which may be lattice-matched thereto, may be suitably selected for the construction of new solar subcell sequences.

5 Figure 12 is a graph showing the range of bandgaps of various GaInAlAs materials as a function of the relative concentration of Al, In and Ga. This diagram illustrates how the selection of a constant bandgap sequence of layers of GaInAlAs in the metamorphic layer may be designed can, by appropriately selecting the relative concentration of Al, In and Ga, to meet different lattice constant requirements for each successive layer. Thus, whether 1.5 eV or 1.1 eV or another bandgap value is the desired constant bandgap, the diagram illustrates a continuous curve for each bandgap, which represents incremental changes in component proportions as the lattice constants change so that the layer has the required band gap and lattice constant.

6 Figure 4 is a graph further illustrating the selection of a constant band gap sequence of layers of GaInAlAs used in the metamorphic layer by representing the Ga mole fraction depending on the Al to In mole fraction in GaInAlAs materials that are necessary; to obtain a constant 1.5 eV band gap.

7 Figure 4 is a graph further illustrating the selection of a constant bandgap sequence of layers of GaInAlAs used in the metamorphic layer, illustrating by depicting the mole fraction depending on the lattice constants in GaInAlAs materials necessary to obtain a constant Reach 1.5 eV band gap.

8th Figure 12 illustrates the multi-junction solar cell according to the present invention after the sequential formation or formation of three sub-cells A, B and C on a GaAs growth substrate. In particular, here is a substrate 101 which is preferably gallium arsenide (GaAs) but may also be germanium (Ge) or other suitable material. For GaAs, the substrate is preferably a 15 ° cut substrate, ie the surface is 15 ° opposite the 100 ) Level to the ( 111 ) A plane offset, as in the Specifically, U.S. Patent Application Serial No. 12 / 047,944, filed Mar. 13, 2008, is described.

In the case of a Ge substrate, a seed layer (not shown) directly on the substrate 111 deposited. Further, on the substrate or over the nucleation layer (in the case of a Ge substrate) is a buffer layer 102 and an etch stop layer 103 still deposited. In the case of a GaAs substrate, the buffer layer is 102 preferably GaAs. In the case of a Ge substrate, the buffer layer is 102 preferably InGaAs. A contact layer 104 GaAs is then deposited on the layer 103 deposited and a window layer 105 AlInP is deposited over the contact layer. Subcell A, consisting of an n + emitter layer 106 and a p-type base layer 107 , then becomes epitaxial on the window layer 105 deposited. Subcell A is generally lattice matched to the growth substrate 101 ,

It should be noted that the multi-junction solar cell structure could be formed by any suitable combination of group III to V elements listed in the Periodic Table, taking into account lattice constants and bandgap requirements, where Group III comprises: boron (B) , Aluminum (Al), gallium (Ga), indium (In) and thallium (T). Group IV includes carbon (C), silicon (Si), and germanium (Ge) and tin (Sn). Group V includes nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb) and bismuth (Bi).

In the preferred embodiment, the emitter layer is 106 constructed from InGa (Al) P and the base layer 107 is made up of InGa (Al) P. The aluminum or Al term in parentheses in the mentioned formula means that Al is an optional ingredient, in this case in an amount of 0% to 30%. The doping profile of the emitter and base layers 106 and 107 according to the present invention is used in conjunction with 23 discussed.

The subcell A finally becomes the "upper" subcell of the inverted metamorphic structure after completion of the processing steps according to the present invention, which will be described later.

On top of the base layer 107 becomes a BSF or Back Surface Field (BSF) layer 108 (rear surface field layer 108 ), preferably p + AlGaInP, and used to reduce recombination loss.

The BSF layer 103 drives minority carriers from the zone near the base / BSF interface surface to minimize the effect of recombination loss. In other words: the BSF layer 18 reduces recombination loss at the back of solar subcell A, thereby reducing recombination in the base.

On top of the BSF layer 108 becomes a sequence of heavily doped p-type and n-type layers 109a and 109b , which form a tunnel diode, deposited, ie an ohmic circuit element, which connects the subcell A with the subcell B. The layer 109a is preferably composed of p ++ AlGaAs and the layer 109b is preferably composed of n ++ InGaP.

On top of the tunnel diode layers 109 becomes a window layer 110 deposited, preferably n + InGaP. The window layer used in subcell B 110 works to reduce interface recombination loss. One skilled in the art will recognize that an additional layer or layers may be added or omitted in the cell structure without departing from the scope of the present invention.

On top of the window layer 110 the layers of subcell B are deposited: the n-type emitter layer 111 and the p-type base layer 112 , These layers are preferably InGaP or In _0.015 GaAs (for a Ge substrate or growth template) or InGaP and GaAs (for a GaAs substrate, respectively), although any other materials that meet the requirements of lattice constants and Band gap correspond. Thus, the subcell B may be constructed with a GaAs, GaInP, GaInAs, GaAsSb or GaInAsN emitter region or region and a GaAs, GaInAs, GaAsSb or GaInAsN base region. The doping profile of the layers 111 and 112 according to the present invention is used in conjunction with 23 discussed.

In the preferred embodiment of the present invention, the center subcell emitter has a bandgap equal to the upper subcell emitter, and the bottom subcell emitter has a bandgap greater than the bandgap of the base of the center subcell. Therefore, after manufacturing the solar cell and implementing the operation:
Neither the middle subcell B or the bottom subcell C emitter is exposed to absorbable radiation. The radiation is absorbed substantially in the bases of cells B and C, which have narrower band gaps than the emitters. Therefore, the advantages of using heterojunction subcells are the following: (i) short wavelength response for both subcells is improved, and (ii) the mass of radiation is more effectively absorbed and collected in the narrower bandgap basis. This effect increases J _SC .

At the top of cell B is a BSF layer 113 deposited, which performs the same function as the BSF layer 109 , The p ++ / n ++ tunnel diode layers 114a respectively. 114b are above the BSF layer 113 similar to the layers 109a and 109b and form an ohmic circuit element to connect subcell B to subcell C. The layers 114a are preferably composed of p ++ AlGaAs and n ++ - InGaP.

A barrier or barrier layer 115 , preferably composed of n-type InGa (Al) P, is above the tunnel diode 114a / 114b deposited, to a thickness of about 1.0 micron. This barrier layer is intended to prevent threading dislocations from propagating, either opposite to the direction of growth in the middle and upper sub-cells A and B or in the direction of growth into the bottom or bottom sub-cell C, which is described in detail in pending U.S. Patent Application Serial No. 11 / 860,183, filed September 24, 2007.

A metamorphic layer (or graded interlayer) 116 is above the barrier layer 115 deposited using a wetting agent or surface treatment agent (surfactant). The layer 116 is preferably a compositionally graded series of InGaAlAs layers, preferably with monotonic varying lattice constants, so as to achieve a gradual transition in lattice constants in the semiconductor structure from subcell B to subcell C while minimizing the occurrence of screw dislocations. The band gap of the layer 116 is constant throughout the thickness, preferably approximately equal to 1.5 eV, or otherwise consistent with a value slightly greater than the band gap of the middle subcell B. The preferred embodiment of the graded interlayer may also be made as (In _x Ga _1-x ). _y Al _1-y As are selected, where x and y are selected such that the band gap of the intermediate layer remains constant at approximately 1.50 eV.

In the wetting agent-assisted growth of the metamorphic layer 116 becomes a suitable chemical element in the reactor during the growth of the layer 116 introduced to improve the surface characteristics of the layer. In the preferred embodiment, such element may be a dopant or a donor atom, such as selenium (Se) or tellurium (Te). Small amounts of Se or Te are thus in the metamorphic layer 116 installed and remain in the finished solar cell. Although Se or Te are preferred n-type dopant atoms, other non-isoelectric wetting agents may also be used.

Wetting agent-assisted growth results in a much smoother or planar surface. Because surface topography affects the bulk properties of the semiconductor material as it grows thicker and thicker, the use of wetting agents can minimize screw dislocations in the active regions or zones and improves overall solar cell efficiency.

As an alternative to using a non-isoelectronic surfactant, one can use an isoelectronic surfactant. The term "isoelectronic" refers to wetting agents such as antimony (Sb) or bismuth (Bi) because such elements have the same number of bonding electrons as the P atom of InGaP or As the As atom in InGaAlAs in the metamorphic buffer layer. Such Sb or Bi surfactants are not typically in the metamorphic layer 116 built-in.

In an alternative embodiment where the solar cell has only two subcells and the "middle" cell B is the uppermost or upper subcell in the final solar cell, the "upper" subcell B typically has a band gap of 1.8 to 1.9 eV would, the band gap of the inner layer would remain at a constant 1.9 eV.

In the inverted metamorphic structure described in the Wanlass et al reference cited above, the metamorphic layer consists of nine compositionally graded InGaP steps, each step layer having a thickness of 0.25 microns. As a result, each layer has a different band gap at Wanlass et al. In the preferred embodiment of the present invention, the layer is 116 constructed or composed of a plurality of layers of InGaAlAs, with monotonic changing lattice constants, each layer having the same band gap of approximately 1.5 eV.

The advantage of using a constant bandgap material, such as InGaAlAs, is that the arsenide-based semiconductor material is much easier to process, with the conventional commercial MOCVD reactors, where the small amount of aluminum is the radiation transparency of the metamorphic layers ensures.

Although the preferred embodiment of the present invention includes a plurality of layers of InGaAlAs for the metamorphic layer 116 For reasons of manufacturability and radiation transparency, other embodiments of the present invention may be used use different material systems to achieve a change in lattice constants from subcell B to subcell C. In this way, the system of Wanlass using compositionally graded InGaP is a second embodiment of the present invention. Other embodiments of the present invention can use continuously graded materials as opposed to graded graded materials. More generally, the graded interlayer may be composed of any of the As-PN-Sb based III-V compound semiconductors, taking into account the limitations of having an in-plane lattice parameter greater than or equal to the second solar cell and is smaller than or equal to the third solar cell, and with a bandgap energy is greater than that of the second solar cell.

In another embodiment of the present invention, an optional or optionally second barrier layer 117 above the InGaAlAs metamorphic layer 11.6 be isolated. The second barrier layer 117 will typically have a different composition than the composition of the barrier layer 115 and performs substantially the same function, namely, preventing the propagation of screw dislocations. In the preferred embodiment, the barrier layer is 117 n + type GaInP.

A window layer 118 , preferably composed of n + -type GaInP, then becomes over the barrier layer 117 (or directly over layer 116 in the absence of a second barrier layer). This window layer works to reduce the recombination loss in subcell "C". It will be understood by those skilled in the art that additional layers may be added or omitted in this cell structure without departing from the scope of the invention.

On top of the window layer 118 the layers of cell C are deposited: the n + emitter layer 119 and the p-type base layer 120 , These layers are preferably composed of n + -type InGaAs and n + -type InGaAs, respectively, or n + -type InGaP and p-type InGaAs for heterojunction subcells, although other suitable materials in accordance with lattice constants and band gap requirements may also be used , The doping profile of the layer 119 and 120 will be in contact with 23 discussed.

A BSF layer 121 , preferably composed of P ⁺ GaInP, is then deposited on top of the cell C, the BSF layer having the same function as the BSF layers 108 and 113 performs.

Next is a tunnel diode with layers 122 and 123 above the BSF layer 121 Secluded similar to the layers 114 . 109 , where again an ohmic circuit element is formed, for connecting the subcell C to the subcell D. The p ⁺⁺ layer 122 is preferably GaInAsP, and the n ⁺⁺ layer 123 is preferably built on GaInAsP.

In 9 becomes a window layer 125 , preferably consisting of n + -type InGaAlAs, then over the layer 124 deposited (or over a second barrier layer, if any, disposed over the layer 124 ). This window layer works to reduce the recombination loss in subcell "D". One skilled in the art will recognize that additional layers may be added or omitted in the cell structure without departing from the scope of the present invention.

On top of the window layer 124 the layers of cell D are deposited: the n ⁺ emitter layer 125 and the p-type base layer 126 , These layers are preferably n-type GaInAs or p-type GaInAs or n-type InGaP or p-type InGaAs for a heterojunction subcell, although other suitable materials consistent with lattice constants and bandgap requirements may also be used. The doping profile of the layers 125 and 126 will be in conjunction with the 23 discussed.

Next, as in 10 shown a BSF layer 127 , preferably composed of p + -GaInAsP, then deposited on the top of the cell D, wherein the BSF layer performs the same function as the BSF layers 108 . 113 and 121 ,

Finally, a p ⁺ contact layer 128 , preferably consisting of p ⁺ -GaInAs, on the BSF layer 127 deposited.

In the next process step, a metal contact layer 129 over the p + semiconductor contact layer 128 deposited. The metal is preferably the consequence of metal layers Ti / Au / Ag / Au, although other suitable materials and sequences could be used.

Also, the metal contact materials and layers are selected to provide a planar interface with the underlying semiconductor contact layer after heat treatment to activate ohmic contact. This is done so that (i) an electrical layer separating the metal from the semiconductor need not be deposited and selectively etched in the metal contact surfaces; and (ii) the Contact layer is reflective over the wavelength range of interest reflective.

12 is a cross-sectional view of the solar cell of 11 after the next processing step, in which a bonding or adhesive layer 130 over the metal layer 129 is deposited. In one embodiment of the invention, the tie layer is an adhesive, preferably a wafer adhesive (manufactured by Brewer Science, Inc. of Rolla, MO). In other embodiments of the invention, a solder or eutectic bonding layer is used 130 as described in U.S. Patent Application Serial No. 12 / 271,127, filed November 14, 2008, or it becomes a tie layer 130 as described in U.S. Patent Application Serial No. 12 / 265,113, filed November 5, 2008, where the surrogate substrate remains as a permanent support component on the finished solar cell.

13A is a cross-sectional view of the solar cell of 12 after the next processing step, in which a surrogate substrate 150 , preferably sapphire, is attached. Alternatively, the surrogate substrate may be GaAs, Ge or Si, or any other suitable material. The surrogate substrate is about 40 mils thick, and in the embodiments in which the surrogate substrate must be removed, it is perforated with holes about 1 mm in diameter and spaced at 4 mm to facilitate subsequent removal of the adhesive and the substrate.

In the next process step, as in 13A is shown, the original growth substrate 51 and the carrier 40 removed by local heating with a laser and subsequent etching to remove the layers 51 and 102 ,

13B is a cross-sectional view of the solar cell of 13A where the orientation with the surrogate substrate 150 and the bottom of the figure. Following figures in this application assume this orientation.

14 is a simplified cross-sectional view of the solar cell of 13B with only a few of the upper layers and lower layers over the surrogate substrate 150 are shown after the removal of the buffer layer 102 ,

15 is a cross-sectional view of the solar cell of 14 after the next processing step, in which the etch stop layer 103 removed by an HCl / H ₂ O solution.

16 is a cross-sectional view of the solar cell 15 after the next sequence of processing steps, in which a photoresist mask (not shown) over the contact layer 104 is arranged to the grid lines or lines 501 to build. As will be described in detail below, the grid lines become 501 deposited by evaporation and lithographic patterning and deposition occurs via the contact layer 104 , The mask is then removed to the finished metal grid lines 501 as shown in the following figures.

The grids 501 are preferably constructed on Pd / Ge / Ti / Pd / Au or other suitable materials, as described in detail in US Patent Application Serial No. 12 / 218,582, filed July 18, 2008. This document is hereby incorporated by reference.

17 is a cross-sectional view of the solar cell of 16 after the next processing step, in which the grid lines are used as a mask, around the surface to the window layer 105 down using a citric acid / peroxide etching mixture.

18A Fig. 10 is a plan view of a wafer in which four solar cells are implemented. The illustration of the four cells is for illustrative purposes, and the present invention is not limited to any particular number of cells per wafer.

There are grid lines in each cell 501 (particularly shown in the cross section in FIG 17 ), an interconnecting bus line 502 and a contact connection 503 , The geometry and number of grid and bus lines and contact terminal are illustratively shown, and the invention is not limited to the illustrated embodiment.

18B is a bottom plan view of the wafer with four solar cells according to 18A ,

18C FIG. 10 is a plan view of a wafer in which two solar cells are implemented. FIG. The illustration of two cells in this figure is for illustrative purposes only.

19 is a cross-sectional view of the solar cell of 17 after the next process step, in which an antireflective (ARC) dielectric coating layer 130 over the entire surface of the "bottom" side of the wafer with the grid lines 501 is applied.

20A is a cross-sectional view of the solar cell of 19 after the next processing step according to the invention, in the first and second ring channels 510 and 511 or a part of the semiconductor structure on the metal layer 129 under Use of phosphide and arsenide etchants is etched down. These channels define a perimeter boundary between the cell and the remainder of the wafer, leaving behind a mesa structure that forms the solar cell. The in 20A cross section shown is the one from an AA level according to 21 looks out. In a preferred embodiment, the channel is 510 considerably wider than the canal 511 ,

20B is a cross-sectional view of the solar cell of 20A after the next step in which the channel 511 exposed to a metal etchant, the layer 123 in the canal 511 is removed and the channel 511 is extended in depth approximately to the upper surface of the bonding or adhesive layer 130 out.

21 is a top view of the wafer from above 20A and 20B , where channels 510 and 511 shown etched around the circumference of each cell.

22A shows a cross-sectional view of the solar cell of 20B according to which the individual solar cells (cell 1 , Cell 2 , etc., shown in 21 ) are cut or separated from the wafer, namely the channel 511 leaving behind a vertical edge 515 moving through the surrogate substrate 150 at the place of the canal 511 extends. In this first embodiment of the invention, the surrogate substrate forms 150 the support for the solar cell in applications where a cover glass (for example, provided in the third embodiment as described below) is not required. In such an embodiment, the electrical contact to the metal contact layer 129 through the channel 510 respectively.

22B is a cross-sectional view of the solar cell of 22A after the next processing step in a second embodiment of the invention, in which the surrogate substrate 150 suitably on a relatively thin layer 150a is diluted, by grinding, lapping or etching. In this embodiment, the thin layer forms 132a the support for the solar cell in applications where a cover glass is not required, as provided for the second embodiment to be described below. In such an embodiment, the electrical contact to the metal contact layer 129 through the channel 510 respectively.

22C is a cross-sectional view of the solar cell of 22A after the next processing step in a second embodiment of the invention, in which a cover glass 514 at the top of the cell with an adhesive 513 is attached. The cover glass 514 preferably covers the entire channel 510 but does not extend to the periphery of the cell near the channel 511 , Although the use of a cover glass is the preferred embodiment, it is not required for all implementations and additional layers or structures may also be used to provide additional support or environmental protection for the solar cell.

23 is a cross-sectional view of the solar cell of 22A after the next process step of the present invention, wherein the adhesive layer 130 , the surrogate substrate 150 and the peripheral part 512 of the wafer are completely removed, with the demolition in the zone of the channel 510 what happens is just the solar cell with the cover glass 514 (or other layers or structures) at the top leaves and the metal contact layer 129 at the bottom, which forms the back contact of the solar cell. The surrogate substrate 150 is preferably removed by the use of the etchant "Wafer Bond Solvent". As noted above, the surrogate substrate has perforations across its surface that allow the etchant to pass through the surrogate substrate 150 can flow to allow its removal. After removal (lift-off), the surrogate substrate can be used again in subsequent wafer processing operations.

24 FIG. 12 is a graphical representation of a doping profile in the emitter and base layers of one or more subcells of the inverse metamorphic multi-junction solar cell of the invention. FIG. The various doping profiles that are within the scope of the invention and the advantages of such doping profiles are described in detail in co-pending U.S. patent application Ser. No. 11 / 956,069, filed December 13, 2007, which is incorporated herein by reference in the disclosure of this application. The doping profiles shown therein are merely illustrative and other more complicated profiles may be used, as will be apparent to those skilled in the art, without departing from the scope of the invention.

The skilled person realizes that an additional or additional layers in the cell structure of 13B can be added or omitted without departing from the scope of the invention.

It will be appreciated that each of the elements described above, or two or more together, may find useful application in other types of designs that differ from the designs described above.

Although the preferred embodiment of the present invention uses a vertical stack of four subcells, the present invention may be used Also be applied to stacks with fewer or more sub-cells, ie, two-junction cells, three-junction cells, five-junction cells, etc., as described in U.S. Patent Application Serial No. 12 / 267,812, filed 10. November 2008, is described. In the case of four or more junction cells, the use of more than one metamorphic grading layer may also be used, as described in U.S. Patent Application Serial No. 12 / 271,192, issued Nov. 14, 2008.

In addition, although the present embodiment is configured with upper and lower electrical contacts, the subcells may alternatively be contacted by metal contacts on side conductive semiconductor layers between the cells. Such arrangements can be used to achieve 3-port, 4-port and generally n-port devices. The subcells may be connected between circuits that use these additional terminals such that the available photogenerated current density of each subcell can be effectively exploited, resulting in high efficiency for the multijunction cell, without contradicting the fact that the photogenerated current densities are typically different in the different subcells.

As mentioned above, the present invention may use an array of one or more or all of the homojunction cells or subcells, i. H. a cell or subcell in which the pn-junction is formed between a p-type semiconductor and an n-type semiconductor, both having the same chemical composition and the same bandgap, but only in the dopant Type and types, and one or more heterojunction cells or sub-cells can be provided. Subcell A with p-type and n-type InGaP is an example of a homojunction subcell. Alternatively, as specifically described in U.S. Patent Application Serial No. 12 / 023,772, filed January 31, 2008, the invention may use one or more or all of the heterojunction cells or subcells, i. H. a cell or subcell in which the pn junction is formed by a p-type semiconductor and an n-type semiconductor having different chemical compositions of the semiconductor material in the n-type regions and / or different bandgap or bandgap energies in the n-type p-type zones or regions, in addition to using different dopant species and the type of p-type and n-type regions forming the pn junction.

In some cells, a thin so-called intrinsic barrier layer ("intrinsic layer" or "i" layer) may be disposed between the emitter layer and the base layer with the same or different composition of both the emitter and base layers. The intrinsic layer suppresses minority carrier recombination in the space charge zone. Similarly, either the base layer or the emitter layer may also be intrinsically or unintentionally doped ("NID") over part or all of the thickness.

The composition of the window or BSF layers may use other semiconductor compounds, taking into account the requirements of lattice constants and bandgap, and these layers may include: AlInP, AlAs, AlP, AlGaInP, AlGaAsP, AlGaInAs, AlGaInPAs, GaInP, GaInAs, GaInPAs. AlGaAs, AlInAs, AlInPAs, GaAsSb, AlAsSb, GaAlAsSb, AlInSb, GaInSb, AlGaInSb, AlN, GaN, InN, GaInN, AlGaInN, GaInNAs, AlGaInNAs, ZnSSe, CdSSe, and similar materials falling within the scope of the present invention.

Although the invention has been illustrated and described as being in an inverted multi-junction metamorphic solar cell, it is not intended to limit the invention to the details shown, as various modifications and structural changes can be made without departing from the scope of the invention.

Although the description of this invention focuses primarily on solar cells or photovoltaic devices, those skilled in the art will recognize that other optoelectronic devices such as thermophotovoltaic (TPV) cells, photodetectors, and light emitting diodes (LEDs) have very similar structure, physical properties, and materials how to use photovoltaic devices, with some minor variations in doping and minority carrier lifetime. For example, photodetectors may use the same materials and structures as the photovoltaic devices described above, but possibly lower doping is used in terms of sensitivity rather than power production. On the other hand, LEDs with similar structures and materials can be made, but possibly with more doping, to shorten the recombination time, thus emphasizing the radiation lifetime for producing light rather than power. Thus, the present invention is also applicable to photodetectors and LEDs having structures, material compositions, and articles of manufacture with improvements as described above for the photovoltaic cells.

Without further analysis, the above description may fully illustrate the present invention by utilizing current knowledge to readily provide adaptation for various applications without omitting features that are in a fair manner essential characteristics of the general or generic art from the standpoint of the art pertain to particular aspects of this invention such that such adaptations are within the scope and meaning of the equivalence of the following claims.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US 7288430 [0062]
• US 7235462 [0062]
• US 6946317 [0062]
• US Pat. No. 6794276 [0062]

Cited non-patent literature

• MW Wanlass et al in Lattice Mismatched Approaches for High Performance, III-V Photovoltaic Energy Converters (Conference Proceedings of the 31st IEEE Photovoltaic Specialists Conferences, Jan. 3-7, 2005, IEEE Press, 2005) [0005]

Claims (15)

A method of making a solar cell, comprising: Providing a semiconductor carrier having a prepared or prepared bonding or adhesive surface; Providing a support substrate; Bonding the semiconductor carrier and the supporting substrate to form a composite structure; Separating the bulk of the semiconductor carrier from the composite structure leaving a semiconductor growth substrate. on the support substrate; and depositing a sequence of layers as a semiconductor material to form a solar cell on the semiconductor growth substrate. The method of claim 1, wherein the semiconductor substrate is gallium arsenide or germanium. The method of claim 1, wherein the compound of the semiconductor carrier and the supporting substrate for forming a composite structure comprises: molecular bonding the prepared bonding surface of the semiconductor carrier to a surface of the supporting substrate. The method of claim 1, wherein separating the bulk of the semiconductor carrier from the composite comprises: Implanting a species or species into the semiconductor carrier to form a defective layer in the semiconductor carrier; Bonding the defective layer of the semiconductor carrier directly to the support substrate to create the composite structure; and Separating the bulk of the semiconductor carrier from the composite structure leaving a thin semiconductor growth substrate on the support substrate. The method of claim 4, wherein separating the bulk of the semiconductor carrier from the composite comprises: Tempering the composite structure at an elevated temperature to weaken the semiconductor carrier and the defective layer; and Separating the mass of the semiconductor carrier from the composite structure along the defective layer or during annealing of the composite structure. The method of claim 1, wherein the. Thickness of the semiconductor substrate is about 5 microns, and further wherein the thickness of the mass of the semiconductor carrier, separated from the composite structure, is greater than 350 microns. The method of claim 1 further comprising roughening the fabricated bonding surface of the semiconductor substrate prior to bonding the substrate and support substrate. The method of claim 1, further comprising: (i) forming a new bonding surface on the severed bulk portion of the semiconductor substrate to form a new semiconductor substrate; (ii) providing a new support substrate; (iii) bonding the new semiconductor carrier and the new mounting substrate to form a new composite structure; (iv) separating the mass of the new semiconductor carrier from the new composite structure leaving a new semiconductor substrate on the new supporting substrate; and (v) depositing a sequence of layers of semiconductor material to form a solar cell on the new semiconductor substrate; and (vi) repeating steps (i) through (v) with the separated bulk portion of the new semiconductor carrier. The method of claim 1, wherein the support substrate is sapphire or sapphire / spinel and wherein the semiconductor support is gallium arsenide which is cut off from the ( 001 ) Crystal plane by at least 6 ° to the ( 111 ) Level. The method of claim 1, further comprising: Mounting a second surrogate substrate on top of the sequence of layers of semiconductor material to form a solar cell, and removing the semiconductor growth substrate. The method of claim 1, wherein the step of depositing a sequence of layers on the gallium arsenide substrate comprises: Forming or forming an upper first solar subcell having a first band gap on the gallium arsenide substrate; Forming a second central solar cell over the first solar subcell having a second bandgap smaller than the first bandgap; Forming a graded interlayer over said second solar cell; Forming a third solar subcell over the graded interlayer having a fourth bandgap that is smaller and a second bandgap such that the third subcell is lattice misaligned with respect to the second subcell. The method of claim 11, further comprising: Forming a lower fourth solar subcell above the third subcell having a fifth bandgap smaller than that of the fourth bandgap such that the third subcell is lattice matched with respect to the third subcell. The method of claim 11, wherein the upper subcell is constructed of InGa (Al) P, the second subcell is composed of GaAs, GaInP, GaInAs, GaAsSb or GaInAsN emitter region or zone and a GaAs, GaInAs, GaAsSb or GaInAsN base region and wherein the third subcell is composed of a GaInAsP base and an emitter. The method of claim 12, wherein the fourth subcell consists of GaInAs base and emitter layers. The method of claim 11, wherein the graded interlayer is compositionally graded to cause lattice matching in the second subcell on one side, the third subcell being disposed on the other side and made of (In _x Ga _1-x ) _y Al _1-y As, namely x and y selected such that the band gap of the intermediate layer is constant across the thickness.

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