DE102008002157B4 - Sensor element for measuring infrared radiation and process for its manufacture - Google Patents

Abstract

Sensor element for measuring infrared radiation, in particular for spectroscopic measurements, the sensor element (35, 36, 37) having at least: a substrate (1), a membrane (33, 33a, 34) formed on the top of the substrate (1) and a cavity (9, 18) formed below the membrane (33, 33a, 34) in the substrate (1), a thermopile structure (30, 32) with at least one thermopile pair (32), which has a first thermopile ( 3a, 26) made of a first semiconductor material and a second thermal limb (6a, 26) made of a second semiconductor material, the Seebeck coefficients (S1, S2) of the first semiconductor material and the second semiconductor material being different, characterized in that the first semiconductor material the first thermal limb (3a) and the second semiconductor material of the second thermal limb (6a) have dopings of the same charge carrier type (p, n), and the first thermal limb (3a) and the second thermal limb (6a) it thermopile pair (32) are in direct contact with one another in at least one contact surface (37).

Description

State of the art

The invention relates to a sensor element for measuring infrared radiation, which can be used in particular as an IR sensor or spectroscopic sensor or as part of an infrared sensor or spectroscopic sensor, and a method for its production.

Micromechanical sensor elements for the detection of infrared (IR) radiation are used in particular in infrared cameras and in spectroscopic sensors. Such spectroscopic sensors are used in particular to detect a gas concentration, e.g. B. carbon dioxide, in the ambient air, including additional optical filters are used to select a relevant wavelength range.

The micromechanical sensors can in particular be designed as thermopile sensors which have at least one thermopile pair made up of two thermopile legs that are in contact with one another and are made of materials with different Seebeck coefficients. The hot contact point of the thermal legs is generally formed on a membrane for thermal insulation from the other substrate material and is heated when IR radiation is incident, e.g. B. by an applied to the membrane absorber material, z. B. a Ru-containing resistor paste, so that the intensity of the incident IR radiation can be inferred from the electrical voltage that forms during heating. DE 10 2004 002 163 A1 discloses, for example, such a gas sensor in which a thermopile structure is formed on a self-supporting membrane over a cavity formed by undercutting.

In particular, silicon and aluminum, or p-silicon and n-silicon and other material systems are used as material systems or material pairs for the thermopile sensors. US 6,348,650 B1 discloses a thermopile structure in such a sensor, which is formed by alternating interconnection of n-doped silicon legs and metal legs. The Seebeck coefficient S, which is relevant for the sensitivity of the thermopile sensors, results from the difference between the Seebeck coefficients of the materials S1 and S2 of the two thermo legs. Typical values for thermopile pairs (thermocouples) made of silicon and aluminum are S = -280.3 µV / K. Although aluminum enables good electrical contact with the second thermal partner silicon, due to its high thermal conductivity it also causes heat to be dissipated from the membrane and thus a reduction in the membrane temperature in the area of the hot thermal contacts. Furthermore, due to the relatively low melting temperature of aluminum of 660 ° C, the processes that follow after the application of the aluminum layer are limited to lower process temperatures. When used in a CMOS process technology, there is also a restriction in the subsequent process steps due to possible cross-contamination.

Typical values of thermopile pairs made of p-silicon and n-silicon are in the range of S = -360 µV / K. The disadvantage of this material pairing is the formation of space charge zones when the differently doped silicon regions are directly contacted, corresponding to bipolar pn diodes. When thermo legs are connected in series to increase the measurement signal, there is inevitably a series connection of pn diodes, which are always switched alternately in the forward and reverse directions and thus have a high internal resistance. Therefore, the two thermal legs are generally electrically contacted via a metallization level as an auxiliary level, so that again an additional metallization layer with the corresponding complexity and the disadvantages mentioned is required during processing. US 6,779,347 B2 discloses a Peltier cooling system which has two semiconductor legs of the same charge carrier type that are directly contacted with one another.

The formation of the membrane can be done differently and is z. B. in Review of micromachined thermopiles for infrared detection, Graf, Arndt, Sauer, Gerlach 2007, Meas. Sci. Technol. described, wherein in particular volume micromechanical or surface micromechanical manufacturing processes can be used.

Disclosure of the invention

The invention is based on the idea of constructing the thermopile sensor using two semiconductor materials with doping of the same charge carrier type and different concentration of doping, the two thermo legs being in direct contact with one another. According to the invention, a charge carrier type is understood to mean the type or the sign of the doping, ie. H. p-doping or n-doping.

The thermopile pair (thermocouple) can in particular be produced in that the two semiconductor layers of the thermo legs are formed one above the other or at least partially overlap with an insulating intermediate layer which is opened at contact points or contact surfaces. This is advantageously implemented in terms of process technology in that the first semiconductor layer is first deposited, advantageously on a first insulating intermediate layer formed on the substrate, subsequently a second insulating intermediate layer is formed on the structured semiconductor layer and structured with the contact openings, and subsequently the second semiconductor layer is deposited.

The structuring of the semiconductor and insulation layers can be done in such a way that a series circuit is formed from several thermopile pairs. This allows high Seebeck coefficients, e.g. B. about 200 µV / K, and achieve correspondingly high thermal voltages.

Since, according to the invention, a metal layer is not used either to form the thermal legs themselves or to make contact, in particular not aluminum or another low-melting metal, the aforementioned procedural disadvantages of the restriction to low process temperatures and possible cross-contamination do not occur. Since, according to the invention, semiconductor materials with doping of the same charge carrier type are used, the formation of pn junctions is also avoided. The series connection of several thermopile pairs to achieve a high signal is therefore also unproblematic.

According to the invention, the absorber material can also be applied in a manner that is not accessible in the case of metallized substrates, e.g. B. in epitaxy systems.

The formation of the cavern below the membrane can in particular take place in a surface micromechanical manner through the insulating intermediate layers and semiconductor layers; H. with the formation of access openings or etching accesses through the semiconductor layers and insulation layers to the bulk material of the substrate in order to etch the cavern. According to the invention, these access openings can also be used as access trenches for laterally structuring or separating the individual thermopile pairs.

According to the invention, the top of the thermopile measurement structure can be closed on the one hand by wafer bonding with a suitable cap substrate. As an alternative to this, however, a suitable layer can also be formed above the measuring structure or thermopile structure, whereby a lower thermal insulation of the thermopile structure is achieved upwards, but the time-consuming and costly step of manufacturing and bonding the additional cap wafer is omitted can.

The production of the thermopile structures according to the invention is inexpensive and enables a high packing density, with several thermopile cells each consisting of a large number of thermopile pairs being combined and contacted together.

Figure list

Show it:

• 1 bis 3 Prozessschritte zur Herstellung eines Sensors gemäß einer ersten Ausführungsform mit Kappenchip;
• 4 eine von 2 ausgehende Prozessvariante zur Herstellung eines Sensors mit Dünnschichtkappe;
• 5 bis 12 eine weitere Prozessvariante mit Ausgangspunkt in 1 zur Herstellung eines Sensors mit Dünnschichtkappe;
• 13 einen Sensor mit Kappenchip gemäß einer Ausführungsform;
• 14 eine Aufsicht auf einen erfindungsgemäßen Sensor mit mehreren Thermopile-Paaren gemäß einer Ausführungsform;
• 15 die Anordnung mehrerer Thermopile-Zellen gemäß einer Ausführungsform in Aufsicht.

1 to 13th Process steps for producing a sensor according to the invention according to different embodiments:

• 1 to 3 Process steps for producing a sensor according to a first embodiment with a cap chip;
• 4th one of 2 outgoing process variant for the production of a sensor with a thin-film cap;
• 5 to 12th another process variant with starting point in 1 for producing a sensor with a thin-film cap;
• 13th a sensor with a cap chip according to an embodiment;
• 14th a plan view of a sensor according to the invention with a plurality of thermopile pairs according to an embodiment;
• 15th the arrangement of several thermopile cells according to one embodiment in a plan view.

Description of the embodiments

To produce the sensor element according to the invention, according to 1 on a substrate 1 from z. B. doped silicon, a first insulating intermediate layer 2 deposited. The first intermediate layer 2 can be a single layer, e.g. B. SiO2 layer, or a layer stack, z. B. of oxide / nitride / oxide, in particular silicon oxide / silicon nitride / silicon oxide. On the first intermediate layer 2 becomes a first semiconductor layer 3 from a first semiconductor material with Seebeck coefficient S1, preferably from

First doped silicon, deposited and structured to form the first thermal leg. In this case, a plurality of areas separated from one another by free spaces are created in the first semiconductor layer 3a educated. This structuring as well as the subsequent structuring are carried out with the usual process engineering means such as masking, etching, etc.

On the structured semiconductor layer 3 is subsequently an insulating second intermediate layer 4th , in particular an oxide, e.g. B. SiO2, deposited and structured in such a way that in the second Intermediate layer 4th above each area 3a at least one first contact opening 5 is trained.

In the following, according to 2 a second semiconductor layer 6 made from a second semiconductor material with Seebeck coefficients 82 on the second intermediate layer 4th secluded and structured. The second semiconductor layer fills here 6 also the first contact openings 5 and contacts the first semiconductor layer 3 in contact areas 37 ; are advantageously in the second semiconductor layer 6 again laterally separated areas 6a formed so that each one area 6a with an underlying area 5a as a pair of thermopiles 32 is formed, in particular also a series connection of several thermopile pairs 32 can be formed.
The semiconductor materials of the first semiconductor layer 3 and the second semiconductor layer 6 have different Seebeck coefficients S1 and S2 and are doped with the same doping or the same charge carrier type, ie both p-doped or n-doped, but with different charge carrier concentrations.

In the following, according to 3 a third intermediate insulating layer 7th , preferably as an oxide, e.g. B. SiO2, deposited, which thus the structured second semiconductor layer 6 and the exposed areas of the second interlayer insulating layer 4th covered. Below is an auxiliary layer 8th deposited as an absorber layer and structured in such a way that it is in a central area above the thermopile pairs 32 is trained. The auxiliary layer 8th can be a single layer or a layer stack made up of several intermediate layers. Due to the method according to the invention, for. B. also a highly doped epitaxial silicon layer as an auxiliary layer 8th be used. The insulating intermediate layers 4th and 7th are structured in such a way that laterally outside a contact area 3c the first semiconductor layer 3 , possibly also a corresponding area of the second semiconductor layer 6 , is exposed, on which subsequently a first metallization layer 10 is deposited and structured as a bond pad metallization for contacting.

In the laterally central area, according to 3 in the substrate 1 a cavern 9 below the absorber material 8th formed so that above the cavern 9 the intermediate layers 2 , 4th and 7th and semiconductor layers 3 , 6 as well as the absorber 8th a membrane 33 form the self-supporting and thus from the bulk material of the substrate 1 is largely thermally insulated. The cavern 9 can be designed in a manner known per se, ie, as described at the outset, volume micromechanical (bulk micromechanical) or surface micromechanical.

A cap substrate 12 or Cap chip, in which by etching, z. B. KOH etching, a cavern from one side 12a is formed on top of the substrate 1 , that is z. B. on the third intermediate layer 7th , by means of vacuum-tight sealing glass intermediate layers 11 attached so that the membrane 33 including the absorber 8th between the caverns 9 and 12a is arranged.

The cap chip 12th is transparent in the relevant spectral range of the IR radiation to be detected; the absorber material of the absorber layer 8th absorbs incident IR radiation and heats up and the entire membrane 33 corresponding. Thus shows 3 a sensor element 35 on which a wavelength-selective filter may have to be attached.

4th shows a process variant of an embodiment with the starting point in FIG 2 . Here is from 2 starting with the insulating third intermediate layer 7th deposited and structured in such a way that at least one second contact opening 13th or even several contact openings 13th in the third intermediate layer 7th be formed. The following is done on the third intermediate layer 7th a third semiconductor layer 14th deposited in the contact opening 13th the second semiconductor layer 6 contacted. The third semiconductor layer 14th can in particular be epitaxially deposited silicon. Thereafter, the production of z. B. Thin-film caps possible through further processing.

5 shows one to 4th alternative process variant with starting point in 1 . Here, the second semiconductor layer 6 applied, preferably as epitaxial silicon. In the following, according to 6 the third intermediate layer 7th , preferably as oxide, applied and structured in such a way that a first trench opening 15th and a second trench opening 16 be formed; the second trench openings 16 are wider than the first trench openings 15th .

In the following, according to 7th the second semiconductor layer 6 using the third intermediate layer 7th structured as an etching mask. In particular, plasma etching can be used here, or another etching process that enables the formation of essentially vertical trenches. According to 7th become the trench openings 15th and 16 vertically down through the second semiconductor layer 6 up to the second intermediate layer 4th educated.

According to 8th is subsequently an auxiliary layer 29 as passivation on the walls of the trench openings 15th and 16 educated. The formation of this auxiliary layer 29 can in particular by thermal oxidation of the silicon material of the second semiconductor layer 6 , or by applying a PECVD oxide layer (PECVD: plasma enhanced chemical vapor deposition oxide layer). This creates the narrower first trench openings 15th filled and on the walls of the wider second trench openings 16 a side wall protection is formed.

According to 9 are perforation openings below 17th at the bottom of the trench openings 16 formed by the insulating interlayers 4th and 2 right down to the bulk material of the substrate 1 run away. This is done by a directional etching step to etch oxide, e.g. B. by a plasma etching process.
In the following, according to 10 the ditch opening 16 as access for etching the cavern 18th in the substrate 1 used. This etching process can in particular by a silicon-selective etching gas, for. B. by CIF3 etching. The intermediate layer 2 and the auxiliary layer 29 serve to protect the structures that are not to be etched.

According to 11 are subsequently the second trench openings 16 by applying a sealing layer 19th , preferably a PECVD oxide layer 19th , locked. This results in a hermetically sealed packaging of the membrane produced 34 in the cavern 18th .

According to 12th subsequently become the third intermediate layer 7th and the closure layer 19th structured and thereby the second contact opening 13th formed on which the metallization layer 10 is deposited with appropriate structuring, which serves as an optical reflector and as an electrical contact layer for bond pads.

In this embodiment, an optical filter can then be used directly 21st with a suitable adhesive that is transparent in the IR range and has a suitable refractive index 20th be glued, the filter 21st allows a wavelength-selective transmission of IR radiation in a manner known per se. 12th thus shows a sensor element 36 with thin-layer cap and without using a cap chip

13th shows another process variant with the starting point in 11 . From 11 starting out first the sealing layer 19th and the underlying third intermediate layer 7th structured in such a way that in turn - accordingly 12th - second contact openings 13th are formed, whereupon a metallization layer 10 is deposited and structured as an optical reflector and electrical contact layer. Below is the cap substrate 12th or cap chip bonded, e.g. B. in turn by means of seal-glass connections, whereby accordingly 3 the cavern 12a is formed above the measuring structure, so that a self-supporting membrane 33a results. On the top of the cap chip 12th becomes the optical filter 21st with an optically suitable adhesive 20th attached.

The sensor element 37 of the 13th with the cap substrate 12th enables better thermal insulation than the sensor element 35 out 12th where that's right on top of the membrane 34 Large-area attached optical filter 21 contributes to the lateral heat conduction. There in 12th however, the additional formation of the cap substrate 12th and the additional process step of attaching the cap substrate 12th can be omitted, the sensor element 36 out 12th can be produced more cheaply.

14th shows a plan view of part of the sensor configurations of the second and third embodiment, the features being only partially drawn in for clarity. The bond pads are already laterally outside 22nd educated. The perforation holes 25 correspond to the trench openings 16 and serve to form the cavern 18th , where in 14th the etched front 24 in the silicon material of the substrate 1 after the CIF3 etching. With this design, it can therefore be a cross-shaped cavern 18th are formed, above which the absorber area 23 is provided. The individual thermos legs 26th thus extend laterally from the edge above the cavern 18th to the middle area of the membrane on which the absorber is located 23 is provided. By connecting a large number of thermal legs in series 26th a high measurement signal can thus be achieved. The areas 27 represent heat sinks.

In 15th is accordingly the formation of several thermopile cells 30th with dividers 28 as stabilizing elements in the substrate 1 shown; 15th is in particular for the form of training according to the process variant 2 , ie according to 4th to 12th , relevant.

According to the invention, direct contact surfaces can thus 37 between the two thermal legs or the semiconductor regions of the first semiconductor layer 3 and the second semiconductor layer 6 be formed.

The semiconductor materials of the first semiconductor layer 3 and second semiconductor layer 6 are doped with the same doping or the same charge carrier type, ie both p-doped or n-doped, with different charge carrier concentrations. Advantageous combinations are in particular n-silicon and n + -silicon, or p-silicon and p + -silicon, n-germanium and n + -germanium, ie a semiconductor material with single doping in one semiconductor layer and a correspondingly highly doped semiconductor material in the other semiconductor layer. However, combinations such as B. n-silicon and n + -SiGe advantageous.

It is true that the Seebeck coefficients S1 and S2 of the two semiconductor materials initially do not differ as much as in conventional combinations. H. the difference is relatively small; According to the invention, however, a large number of thermopile pairs can be formed through the direct contact, so that overall high Seebeck coefficients S of z. B. 200 µv / K can be produced.

Claims (22)

Sensor element for measuring infrared radiation, in particular for spectroscopic measurements, the sensor element (35, 36, 37) having at least: a substrate (1), a membrane (33, 33a, 34) formed on the top of the substrate (1) and a cavity (9, 18) formed below the membrane (33, 33a, 34) in the substrate (1), a thermopile structure (30, 32) with at least one thermopile pair (32), which has a first thermopile ( 3a, 26) made of a first semiconductor material and a second thermal limb (6a, 26) made of a second semiconductor material, the Seebeck coefficients (S1, S2) of the first semiconductor material and the second semiconductor material being different, characterized in that the first semiconductor material the first thermal limb (3a) and the second semiconductor material of the second thermal limb (6a) have dopings of the same charge carrier type (p, n), and the first thermal limb (3a) and the second thermal limb (6a) ei nes thermopile pair (32) are in direct contact with one another in at least one contact surface (37). Sensor element after Claim 1 , characterized in that the two thermo legs (3a, 6a) of a thermopile pair (32) are either both p-doped or both n-doped. Sensor element after Claim 1 or 2 , characterized in that an insulating intermediate layer (4) is formed on a first semiconductor layer (3) of the first thermal leg (3a), and a second semiconductor layer (6) of the second thermal leg (6a) is formed on the insulating intermediate layer (4), wherein at least one contact opening (5) is formed in the insulating intermediate layer (4), in which the at least one contact surface (37) is formed between the first thermal limb (3a) and the second thermal limb (6a). Sensor element after Claim 3 , characterized in that the membrane has: a first insulating intermediate layer (2) which covers the substrate (1) outside the cavity (9, 18) and extends over the cavity (9, 18), a first semiconductor layer (3) , in which the first thermal legs (3a) are structured, an insulating second intermediate layer (4), which covers the first insulating intermediate layer (2) and the structured first semiconductor layer (3) and in which contact openings (5) are formed, one on the second insulating intermediate layer (4) applied second semiconductor layer (6), in which the second thermal legs (6a) are formed, wherein the second thermal legs are contacted via contact surfaces (37) formed in the contact openings (5) with the first thermal legs (3a), and an insulating third intermediate layer (7) covering the second semiconductor layer (6). Sensor element after Claim 4 , characterized in that an absorber layer (8) for absorbing the incident IR radiation is applied and structured on the third intermediate layer (7). Sensor element after Claim 4 or 5 , characterized in that a structured metal layer (10) for contacting the first and / or the second semiconductor layer (3, 6) is applied. Sensor element according to one of the preceding claims, characterized in that the thermopile structure (30, 32) has several thermopile pairs (32) arranged laterally next to one another in or on the membrane (33, 33a, 34), wherein each thermopile pair ( 32) is formed from a first thermal leg (3a) and a second thermal leg (6a) which is in contact with the first thermal leg (3a). Sensor element after Claim 7 , characterized in that the thermopile pairs (32) arranged laterally next to one another are separated by trenches (15, 16) formed in the membrane (33, 33a, 34) and subsequently filled with a sealing layer (19). Sensor element after Claim 8 , characterized in that at least in some trenches (16) access holes (25) for etching the cavern (9, 18) are formed below the membrane (33, 33a, 34). Sensor element according to one of the preceding claims, characterized in that a cap substrate (12) is attached to the coated and structured substrate (1) in vacuum-tight connections (11), a cavity (12a) being formed in the cap substrate (12) in such a way that that the membrane (33, 33a) is arranged between the cavity (12a) of the cap substrate (12) and the cavity (9, 18) formed in the substrate (1). Sensor element according to one of the Claims 1 to 9 , characterized in that a filter device (21) for wavelength-selective transmission of the IR radiation via an adhesive layer (20) is attached to the membrane (34). Sensor element according to one of the preceding claims, characterized in that one of the two semiconductor materials is lightly doped and the other of the two semiconductor materials is highly doped. Sensor element according to one of the preceding claims, characterized in that the combination of the two semiconductor materials of the two semiconductor layers (3, 6) is taken from the following group: n-silicon and n + silicon, p-silicon and p + silicon, n-germanium and n + germanium, n-silicon and n + -SiGe. Sensor element according to one of the preceding claims, characterized in that it has several thermopile cells (30), each thermopile cell (30) each having a cavity (9, 18) formed in the substrate (1) and one formed above the cavern Has membrane (33, 33a, 34) with a plurality of thermopile pairs (32), the thermopile cells (30) being formed laterally next to one another and being contacted together. A method for producing a sensor element with at least the following steps: applying or forming at least one first insulating intermediate layer (2) on a substrate (1), applying and structuring a first semiconductor layer (3) made from a first semiconductor material on the at least one insulating intermediate layer (2 ), several first thermal legs (3a) being structured in the first semiconductor layer (3), application and structuring of at least one second insulating intermediate layer (4) on the first semiconductor layer (3), application and structuring of a second semiconductor layer (6) from a second Semiconductor material on the at least one second insulating intermediate layer (4) and structuring of several second thermal limbs (6a) in the second semiconductor layer (6), with several thermopile pairs (32) each consisting of a first thermal limb (3a) and a second thermal limb (6a) are formed, each in at least one Contact the contact surface (37) directly, forming a cavity (9, 18) in the substrate (1) and a membrane (33, 33a, 34) arranged above the cavity (9, 18) in which a thermopile structure (30 , 32) is received from several thermopile pairs (32) each with a first and second thermal leg (3a, 6a) and their contact surfaces (37), the first semiconductor material and the second semiconductor material having different Seebeck coefficients (S1, S2) and are doped with the same charge carrier type (n, p). Procedure according to Claim 15 , characterized in that contact openings (5) are structured in the second insulating intermediate layer (4) above the first thermal legs (3a), and the second thermal legs (6a) are formed above the first thermal legs (3a) in such a way that the contact surfaces (37 ) are formed in the contact openings (5). Procedure according to Claim 15 or 16 , characterized in that an absorber layer (8) made of an infrared radiation absorbing material is applied to the membrane or as part of the membrane. Method according to one of the Claims 15 to 17th , characterized in that an insulating third intermediate layer (7) is applied above the second semiconductor layer (6), and an absorber layer (8) is applied to the insulating third intermediate layer (7) in the region of the membrane (33, 33a), and a Cap substrate (12) is fastened vacuum-tight on the coated substrate (1) in such a way that the membrane (33, 33a) is arranged between the cavity (9, 18) of the substrate and a cavity (12a) formed in the cap substrate (12). Method according to one of the Claims 15 to 17th , characterized in that the second semiconductor layer (6) is applied to the structured second intermediate layer (4), subsequently the insulating third intermediate layer (7) is applied to the second semiconductor layer (6), then trenches or trench openings (15, 16) through the intermediate layers and semiconductor layers are formed up to the substrate (1), subsequently the cavity (9, 18) in the substrate (1) is etched silicon-selectively through at least some of the trenches (16), and the trenches (16) are subsequently closed. Procedure according to Claim 19 , characterized in that, before the cavern (9, 18) is etched, part of the trenches (15) is closed and only the other part of the trenches (16) is etched through. Procedure according to Claim 19 or 20th , characterized in that the closed trenches (15, 16) subsequently form lateral separations of the thermopile pairs (32). Method according to one of the Claims 15 to 21st , characterized in that several thermopile cells (30) are formed, each of which has a cavity (9, 18) formed in the substrate (1) and a membrane (33, 33a, 34) with a plurality of thermopile pairs (32) formed above the cavity, formed laterally next to one another and contacted together.

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