DE102007026880A1 - Printed circuit board useful in electronic devices such as computers and mobile phones, comprises conductor areas for building elements, which are through-contactedly arranged between the conductor areas and have resistance material - Google Patents
Printed circuit board useful in electronic devices such as computers and mobile phones, comprises conductor areas for building elements, which are through-contactedly arranged between the conductor areas and have resistance material Download PDFInfo
- Publication number
- DE102007026880A1 DE102007026880A1 DE200710026880 DE102007026880A DE102007026880A1 DE 102007026880 A1 DE102007026880 A1 DE 102007026880A1 DE 200710026880 DE200710026880 DE 200710026880 DE 102007026880 A DE102007026880 A DE 102007026880A DE 102007026880 A1 DE102007026880 A1 DE 102007026880A1
- Authority
- DE
- Germany
- Prior art keywords
- circuit board
- printed circuit
- conductor areas
- components
- resistance material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/17—Post-manufacturing processes
- H05K2203/171—Tuning, e.g. by trimming of printed components or high frequency circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Die Erfindung betrifft eine Leiterplatte mit mehreren Leiterebenen für Bauelemente sowie ein Verfahren zur Herstellung einer Leiterplatte.The The invention relates to a printed circuit board with a plurality of conductor planes for components and a method of manufacturing a printed circuit board.
Bauelemente verschiedenster Art werden üblicherweise flächig auf den Leiterebenen einer Leiterplatte verlötet. Grundsätzlich besteht bei Leiterplatten immer die Zielsetzung, die Packungsdichte der Bauelemente zu erhöhen, um eine Miniaturisierung elektronischer Geräte, z. B. Computer und Mobiltelefon, zu erreichen. Ein Ansatz dazu ist die SMD (Surface Mounted Devices)-Technologie, bei der oberflächenmontierte Bauelemente auf beiden Seiten, d. h. Leiterebenen, einer Leiterplatte direkt angelötet werden. Um eine weitere Erhöhung der Packungsdichte und der Leiterbahnendichte, insbesondere bei SMD-Bauelementen, zu erreichen, werden die doppelseitigen Leiterplatten zu Multilager-Leiterplatten aufeinander geschichtet. Bekannt sind Multilager-Leiterplatten mit bis zu 48 Lagen. Zur elektrischen Verbindung zwischen den verschiedenen Lagen dienen Durchkontaktierungen, sogenannte Vias – Vertical Interconnect Access. Durchkontaktierungen mit sehr kleinem Durchmesser werden auch als Micro-Vias bezeichnet. Bei Multilager-Leiterplatten wird häufig eine Micro-Via-Technologie eingesetzt, bei der Sacklochbohrungen mit 50 bis 100 μm Durchmesser mittels Laser oder durch Plasmaätzen in die Außenlagen eingebracht werden, wobei die Sacklochbohrungen auf der üblicherweise verkupferten Oberfläche der nächsten oder einer weiter beabstandeten Lage enden. Eine Variante der Micro-Via-Technologie ist die Buried-Via-Technologie. Die Durchkontaktierungen, d. h. Vias, verbinden auch hier zwei oder mehrere Kupferlagen; diese sind jedoch nur zwischen In nenlagen vorgesehen und somit nicht von der Leiterplattenoberfläche her zugänglich. Buried-Vias-„vergrabene” Durchkontaktierungen – sind folglich nur bei Multilager-Leiterplatten ab 4 Lagen möglich.components Different types are usually flat soldered to the conductor levels of a printed circuit board. Basically there is PCB always the objective to increase the packing density of the components to miniaturization of electronic devices, e.g. Eg computer and mobile phone, to reach. One approach is the SMD (Surface Mounted Devices) technology, in the surface-mounted Components on both sides, d. H. Conductor levels, a circuit board soldered directly become. To another increase the packing density and the conductor density, in particular at SMD components, to achieve the double-sided circuit boards layered to multilayer PCBs. Are known Multi-layer printed circuit boards with up to 48 layers. For electrical connection between the different layers serve vias, so-called Vias - Vertical Interconnect Access. Through holes with a very small diameter are also referred to as micro-vias. For multilayer printed circuit boards often a micro-via technology used in the blind holes with 50 to 100 μm Diameter by laser or by plasma etching in the outer layers be introduced, the blind holes on the usually copper-plated surface the next or a more distant location. A variant of the Micro-Via technology is the buried-via technology. The vias, d. H. Vias, connect here also two or more copper layers; these are but only between internal situations and thus not from the PCB surface accessible. Buried vias "buried" vias - are therefore only possible with multilayer printed circuit boards from 4 layers.
Mit Hilfe von Durchkontaktierungen können die Leiterebenen gewechselt werden, wodurch eine Entflechtung komplexer Schaltungen möglich wird. Prinzipiell werden Durchkontaktierungen für die elektrische Verbindung zwischen verschiedenen Leiterebenen, aber auch als Lötauge für bedrahtete Bauelemente oder für die Verbesserung der vertikalen Wärmeableitung eingesetzt.With Help of vias can be the Ladder levels are changed, which makes unbundling more complex Circuits possible becomes. In principle, plated-through holes for the electrical connection between different conductor levels, but also as a lead for leaded Components or for used the improvement of vertical heat dissipation.
Einfache passive Bauelemente, beispielsweise Induktivitäten, Spulen, kleine Kapazitäten oder Kontakte können direkt als Kupferschicht-Struktur ausgebildet werden. Widerstände werden teilweise mittels spezieller Pasten auf die Oberfläche oder in die verdeckten Leiterebenen eingedruckt, so dass letztlich Bauelemente und deren Bestückung bei kompaktem Aufbau der Leiterplatte eingespart werden.easy passive devices, such as inductors, coils, small capacitors or contacts can can be formed directly as a copper layer structure. Resistances partly by means of special pastes on the surface or imprinted in the hidden conductor planes, so that ultimately components and their equipment be saved in a compact design of the circuit board.
Der Erfindung liegt die Aufgabe zugrunde, eine Leiterplatte und ein Verfahren zu deren Herstellung anzugeben, welche eine weitere erhebliche Erhöhung der Packungsdichte ermöglichen.Of the Invention is based on the object, a circuit board and a Specify method for their production, which is another significant increase allow the packing density.
Erfindungsgemäß wird die Aufgabe dadurch gelöst, dass Bauelemente in Verbindungen zwischen Leiterebenen angeordnet sind oder diese Verbindungen bilden. Durch diese Erweiterung des Bestückungsraumes quasi in die dritte Dimension kann die Packungsdichte erheblich erhöht werden. Bauelemente können neben der herkömmlichen flächigen, zweidimensionalen Oberflächenmontage auch in den Räumen zwischen den einzelnen Leiterebenen angeordnet werden. Letztlich kann Leiterebenenfläche eingespart und die Leiterplatte insgesamt verkleinert werden.According to the invention Task solved by that components are arranged in connections between conductor levels are or form these connections. Through this extension of the assembly room almost in the third dimension, the packing density considerably elevated become. Components can in addition to the conventional flat, two-dimensional surface Mount also in the rooms be arranged between the individual conductor levels. Ultimately Can save conductor plane area and the circuit board can be downsized as a whole.
Verbesserungen ergeben sich auch hinsichtlich der Wärmeableitung, der Erschütterungsempfindlichkeit und der mechanischen Festigkeit. Außerdem können Anschlussleitungen verkürzt werden, wodurch eine geringere Störempfindlichkeit resultiert.improvements also arise in terms of heat dissipation, the vibration sensitivity and mechanical strength. In addition, connection cables can be shortened, whereby a lower susceptibility to interference results.
Welche Arten von Bauelementen für die Direktmontage zwischen den Leiterebenen oder zum Einbau in Verbindungen zwischen den Leiterebenen in Frage kommen, hängt von dem Layout der Schaltung und von den Eigenschaften der Bauelemente, insbesondere deren Größe und Wärmeentwicklung ab. Unter Leiterebenen sind sämtliche Oberflächen subsummiert, sowohl beide Seiten einer einlagigen Leiterplatte als auch sämtliche Oberflächen einer Multilager-Leiterplatte. Bei Multilager-Leiterplatten können Bauelemente folglich innerhalb einer Lage oder in den Zwischenräumen der einzelnen Lagen vorgesehen sein.Which Types of components for Direct mounting between the conductor levels or for installation in connections between the conductor levels in question depends on the layout of the circuit and on the properties of the components, in particular their size and heat generation. Under conductor levels are all Subsumed surfaces, Both sides of a single-layer circuit board as well as all surfaces a multilayer printed circuit board. Multilayer printed circuit boards can use components hence within one location or in the interstices of the be provided individual layers.
Gemäß Anspruch 2 sind Bauelemente in Durchkontaktierungen angeordnet. Derartige Durchkontaktierungen, die an sich den oben genannten Zwecken dienen, können z. B. Micro-Vias jeglicher Art sein, insbesondere Buried-Vias und Blind-Vias, wobei letztere sich nicht durch die ganze Leiterplatte, sondern ausgehend von der Oberfläche nur bis zu einer Mittellage erstrecken. Diese Micro-Vias werden häufig mit einem Laser gebohrt, so dass bereits ein Hohlraum für das Einbringen der Bauelemente zur Verfügung steht. Selbstverständlich können entsprechend dem Schaltungs-Layout auch speziell für die Aufnahme von Bauelementen vorgesehene Durchkontaktierungen gebohrt werden.According to claim 2, components are arranged in plated-through holes. such Vias, which in themselves serve the above-mentioned purposes, can z. B. Micro vias of any kind, especially buried vias and Blind vias, the latter being not through the whole circuit board, but starting from the surface extend only to a central position. These micro-vias are common with drilled a laser, so that already has a cavity for insertion of the components available stands. Of course can according to the circuit layout also specifically for recording By vias provided through holes are drilled.
Vorzugsweise sind gemäß Anspruch 3 widerstandsmaterialhaltige Bauelemente zur Vertikalmontage zwischen den Leiterebenen vorgesehen. Als Widerstandsmaterial wird dabei gemäß Anspruch 4 bei der Oberflächenbestückung vielfach bewährte Polymer- Paste eingesetzt. Denkbar ist aber auch die Verwendung von Metallabscheidungen oder anderer Materialien.Preferably, according to claim 3 resistive material-containing components for vertical mounting between the conductor planes are provided. As resistance material is doing according to claim 4 often used in the surface assembly proven polymer paste. However, it is also conceivable to use metal deposits or other materials.
Ein erfindungsgemäßes Verfahren zur Herstellung einer Leiterplatte, die mit widerstandsmaterialhaltigen Bauelementen bestückt werden soll, ist gemäß Anspruch 5 dadurch gekennzeichnet, dass das Widerstandsmaterial mittels Laser- oder Ätztechnologie zur Realisierung eines vorgegebenen Widerstandswertes bearbeitet wird. Vorteilhaft ist dabei insbesondere, dass diese Technologien bei der Leiterplattenherstellung ohnehin weit verbreitet sind. Micro-Vias werden überwiegend mit einem Laser gebohrt. Außerdem ist gerade die Lasertechnologie derart hoch entwickelt, dass sich Widerstandswerte in einem sehr weiten Bereich sehr exakt auf einen bestimmten, vorgegebenen Widerstandswert einstellen lassen. Bei der Verwendung von Polymerpasten als Widerstandsmaterial sind nur wenige verschiedene Pasten erforderlich, um sehr unterschiedliche Widerstandswerte zu realisieren. Die Kosten für derartige Widerstands-Bauelemente und deren Einbringung in Vias sowie für den Widerstandsabgleich sind gering, wobei zusätzlich Lagerkosten für Widerstände entfallen und eine Zeitersparnis bei der Bestückung der Leiterplatten in der Fertigung zu erwarten ist. Darüber hinaus dürfte die Lebensdauer der Widerstände bei Via-Montage erheblich höher sein als die herkömmlicher Oberflächen-SMD-Widerstände.One inventive method for producing a printed circuit board containing resistive material Components fitted is to be, is according to claim 5 characterized in that the resistance material by means of laser or etching technology edited for the realization of a given resistance value becomes. It is advantageous in particular that these technologies anyway anyway widespread in circuit board manufacturing. Micro vias become prevalent drilled with a laser. Furthermore the laser technology is so highly developed that Resistance values in a very wide range very precisely to one set certain, predetermined resistance value. at the use of polymer pastes as resistance material are only a few different pastes required to be very different To realize resistance values. The cost of such resistor components and their introduction into vias and for resistance compensation low, in addition Storage costs for resistors eliminated and a time saving in the assembly of printed circuit boards in the production is expected. In addition, the Life of the resistors considerably higher with via-mounting be than the conventional one Surface SMD resistors.
Nachfolgend wird die Erfindung anhand figürlicher Darstellungen näher erläutert. Es zeigen:following The invention is based figurlicher Representations closer explained. Show it:
Die
Figuren veranschaulichen schematisch eine Multilager-Leiterplatte
mit Cu-Leiterbahnen
Aber
auch Spannungsteiler-Konfigurationen lassen sich mittels einer einzigen
Bohrung bei einer Multilager-Leiterplatte realisieren, wobei
Durch
die Einbeziehung vertikaler Verbindungen zwischen den Cu-Leiterbahnen
Die Erfindung beschränkt sich nicht auf die vorstehend genannten Ausführungsbeispiele. Vielmehr ist eine Anzahl von Varianten dankbar, welche auch bei grundsätzlich anders gearteter Ausführung von den Merkmalen der Erfindung Gebrauch machen. Das betrifft insbesondere die Nutzung von Blind-Vias für die Bauelementbestückung und die Anzahl der Innenlagen der Leiterplatte.The Restricted invention not on the above embodiments. Rather, it is a number of variants grateful, which are also fundamentally different kind of execution of make use of the features of the invention. This applies in particular the use of blind vias for the component assembly and the number of inner layers of the printed circuit board.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200710026880 DE102007026880A1 (en) | 2007-06-08 | 2007-06-08 | Printed circuit board useful in electronic devices such as computers and mobile phones, comprises conductor areas for building elements, which are through-contactedly arranged between the conductor areas and have resistance material |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200710026880 DE102007026880A1 (en) | 2007-06-08 | 2007-06-08 | Printed circuit board useful in electronic devices such as computers and mobile phones, comprises conductor areas for building elements, which are through-contactedly arranged between the conductor areas and have resistance material |
Publications (1)
Publication Number | Publication Date |
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DE102007026880A1 true DE102007026880A1 (en) | 2008-11-20 |
Family
ID=39868901
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE200710026880 Withdrawn DE102007026880A1 (en) | 2007-06-08 | 2007-06-08 | Printed circuit board useful in electronic devices such as computers and mobile phones, comprises conductor areas for building elements, which are through-contactedly arranged between the conductor areas and have resistance material |
Country Status (1)
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DE (1) | DE102007026880A1 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0491543A2 (en) * | 1990-12-17 | 1992-06-24 | Hughes Aircraft Company | Via resistors within multilayer 3-dimensional structures/substrates |
EP0491542B1 (en) * | 1990-12-17 | 1995-03-22 | Hughes Aircraft Company | Via capacitors within multi-layer 3-dimensional structures/substrates |
US6539613B1 (en) * | 1998-06-12 | 2003-04-01 | Intermedics, Inc. | Method of forming trimmable resistors |
US20040149490A1 (en) * | 2000-08-11 | 2004-08-05 | Huey-Ru Chang | Coaxial via hole and process of fabricating the same |
US20040187297A1 (en) * | 2003-03-27 | 2004-09-30 | E Touch Corporation | Method of fabricating a polymer resistor in an interconnection via |
US20050062587A1 (en) * | 2003-09-24 | 2005-03-24 | Wei-Chun Yang | Method and structure of a substrate with built-in via hole resistors |
-
2007
- 2007-06-08 DE DE200710026880 patent/DE102007026880A1/en not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0491543A2 (en) * | 1990-12-17 | 1992-06-24 | Hughes Aircraft Company | Via resistors within multilayer 3-dimensional structures/substrates |
EP0491542B1 (en) * | 1990-12-17 | 1995-03-22 | Hughes Aircraft Company | Via capacitors within multi-layer 3-dimensional structures/substrates |
US6539613B1 (en) * | 1998-06-12 | 2003-04-01 | Intermedics, Inc. | Method of forming trimmable resistors |
US20040149490A1 (en) * | 2000-08-11 | 2004-08-05 | Huey-Ru Chang | Coaxial via hole and process of fabricating the same |
US20040187297A1 (en) * | 2003-03-27 | 2004-09-30 | E Touch Corporation | Method of fabricating a polymer resistor in an interconnection via |
US20050062587A1 (en) * | 2003-09-24 | 2005-03-24 | Wei-Chun Yang | Method and structure of a substrate with built-in via hole resistors |
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OAV | Applicant agreed to the publication of the unexamined application as to paragraph 31 lit. 2 z1 | ||
OP8 | Request for examination as to paragraph 44 patent law | ||
8130 | Withdrawal |