DE102007016901B4 - Semiconductor device and electronic module - Google Patents
Semiconductor device and electronic module Download PDFInfo
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- DE102007016901B4 DE102007016901B4 DE102007016901A DE102007016901A DE102007016901B4 DE 102007016901 B4 DE102007016901 B4 DE 102007016901B4 DE 102007016901 A DE102007016901 A DE 102007016901A DE 102007016901 A DE102007016901 A DE 102007016901A DE 102007016901 B4 DE102007016901 B4 DE 102007016901B4
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Abstract
Bauelement (500), umfassend: – einen ersten Träger (501) mit einem ein erstes Außenkontaktelement bildenden ersten Fortsatz (505); – einen auf den ersten Träger (501) aufgebrachten ersten Halbleiterchip (503); – einen zweiten Träger (502) mit einem ein zweites Außenkontaktelement bildenden zweiten Fortsatz (506); und – einen auf den zweiten Träger (502) aufgebrachten zweiten Halbleiterchip (504), wobei – der erste Halbleiterchip (503) ein erstes Kontaktelement auf einer ersten Hauptoberfläche, die dem ersten Träger (501) zugewandt ist, aufweist und das erste Kontaktelement des ersten Halbleiterchips (503) mit dem ersten Träger (501) elektrisch verbunden ist, – der erste Halbleiterchip (503) ein zweites Kontaktelement (508) auf einer zweiten Hauptoberfläche aufweist und das zweite Kontaktelement (508) des ersten Halbleiterchips (503) mit einem dritten Außenkontaktelement (512) verbunden ist, – der erste Halbleiterchip (503) ein drittes Kontaktelement (510) auf seiner zweiten Hauptoberfläche aufweist und das dritte Kontaktelement (510) des ersten Halbleiterchips...A device (500) comprising: - a first carrier (501) having a first extension (505) forming a first outer contact element; - A first semiconductor chip (503) applied to the first carrier (501); - A second carrier (502) having a second outer contact element forming second extension (506); and a second semiconductor chip (504) mounted on the second carrier (502), wherein the first semiconductor chip (503) has a first contact element on a first main surface facing the first carrier (501) and the first contact element of the first The first semiconductor chip (503) has a second contact element (508) on a second main surface and the second contact element (508) of the first semiconductor chip (503) with a third outer contact element (512), - the first semiconductor chip (503) has a third contact element (510) on its second main surface and the third contact element (510) of the first semiconductor chip ...
Description
Die Erfindung betrifft ein Halbleiterbauelement und ein elektronisches Modul.The invention relates to a semiconductor device and an electronic module.
In Halbleiterbauelemente können beispielsweise Leistungshalbleiterchips integriert sein. Leistungshalbleiterchips eignen sich insbesondere zum Schalten oder Steuern von Strömen und/oder Spannungen.In semiconductor devices, for example, power semiconductor chips can be integrated. Power semiconductor chips are particularly suitable for switching or controlling currents and / or voltages.
Die Schriften
Vor diesem Hintergrund werden ein Bauelement gemäß den unabhängigen Ansprüchen 1, 9 und 10 sowie ein elektronisches Modul gemäß dem unabhängigen Anspruch 6 angegeben. Vorteilhafte Weiterbildungen und Ausgestaltungen sind in den Unteransprüchen angegeben.Against this background, a component according to the independent claims 1, 9 and 10 and an electronic module according to the independent claim 6 are given. Advantageous developments and refinements are specified in the subclaims.
Gemäß einer Ausgestaltung umfasst ein Bauelement einen ersten Träger mit einem ein erstes Außenkontaktelement bildenden ersten Fortsatz, einen auf den ersten Träger aufgebrachten ersten Halbleiterchip, einen zweiten Träger mit einem ein zweites Außenkontaktelement bildenden zweiten Fortsatz und einen auf den zweiten Träger aufgebrachten zweiten Halbleiterchip. Der erste Halbleiterchip umfasst ein erstes Kontaktelement auf einer ersten Hauptoberfläche, die dem ersten Träger zugewandt ist. Das erste Kontaktelement des ersten Halbleiterchips ist mit dem ersten Träger elektrisch verbunden. Der erste Halbleiterchip umfasst ferner ein zweites Kontaktelement auf einer zweiten Hauptoberfläche. Das zweite Kontaktelement des ersten Halbleiterchips ist mit einem dritten Außenkontaktelement verbunden. Der erste Halbleiterchip umfasst ferner ein drittes Kontaktelement auf seiner zweiten Hauptoberfläche. Das dritte Kontaktelement des ersten Halbleiterchips ist mit einem vierten Außenkontaktelement verbunden. Das erste Außenkontaktelement und das vierte Außenkontaktelement sind auf einer ersten Außenseite des Bauelements und das zweite Außenkontaktelement und das dritte Außenkontaktelement sind auf einer zweiten Außenseite des Bauelements angeordnet.According to one embodiment, a component comprises a first carrier having a first extension forming a first outer contact element, a first semiconductor chip applied to the first carrier, a second carrier having a second extension forming a second outer contact element and a second semiconductor chip applied to the second carrier. The first semiconductor chip comprises a first contact element on a first main surface, which faces the first carrier. The first contact element of the first semiconductor chip is electrically connected to the first carrier. The first semiconductor chip further comprises a second contact element on a second main surface. The second contact element of the first semiconductor chip is connected to a third external contact element. The first semiconductor chip further comprises a third contact element on its second main surface. The third contact element of the first semiconductor chip is connected to a fourth external contact element. The first outer contact element and the fourth outer contact element are on a first outer side of the component and the second outer contact element and the third outer contact element are arranged on a second outer side of the component.
Gemäß einer weiteren Ausgestaltung umfasst ein Bauelement in mindestens zwei Reihen angeordnete Außenkontaktelemente, wobei die Reihen auf verschiedenen Außenseiten des Bauelements angeordnet sind, einen Leistungstransistor, dessen Drain-Anschluss mit einem Ersten der Außenkontaktelemente verbunden ist, und eine Leistungsdiode, deren Anoden-Anschluss mit einem Zweiten der Außenkontaktelemente verbunden ist. Das erste und das zweite Außenkontaktelement sind in der gleichen, ersten Reihe angeordnet. Ein Gate-Anschluss des Leistungstransistors ist mit einem Dritten der Außenkontaktelemente verbunden und das dritte Außenkontaktelement ist in einer zweiten Reihe angeordnet.According to a further embodiment, a component comprises outer contact elements arranged in at least two rows, the rows being arranged on different outer sides of the component, a power transistor whose drain terminal is connected to a first of the outer contact elements, and a power diode whose anode terminal is connected to a Second of the external contact elements is connected. The first and second outer contact elements are arranged in the same, first row. A gate terminal of the power transistor is connected to a third of the outer contact elements, and the third outer contact element is arranged in a second row.
Gemäß einer weiteren Ausgestaltung umfasst ein Bauelement in einer Reihe angeordnete Außenkontaktelemente, einen ersten Leistungstransistor, dessen Drain-Anschluss mit einem Ersten der Außenkontaktelemente und dessen Source-Anschluss mit einem Zweiten der Außenkontaktelemente verbunden ist, und einen zweiten Leistungstransistor, dessen Source-Anschluss mit einem Dritten der Außenkontaktelemente und dessen Drain-Anschluss mit einem Vierten der Außenkontaktelemente verbunden ist. Das erste und das dritte Außenkontaktelement sind benachbart zueinander angeordnet.According to a further embodiment, a component comprises outer contact elements arranged in a row, a first power transistor whose drain terminal is connected to a first of the outer contact elements and whose source terminal is connected to a second of the outer contact elements, and a second power transistor whose source terminal is connected to a Third of the outer contact elements and its drain terminal is connected to a fourth of the outer contact elements. The first and third outer contact elements are arranged adjacent to each other.
Die Erfindung wird nachfolgend in beispielhafter Weise unter Bezugnahme auf die Zeichnungen näher erläutert. In diesen zeigen:The invention will be explained in more detail below by way of example with reference to the drawings. In these show:
Im Folgenden werden Bauelemente, die Halbleiterchips enthalten, beschrieben. Dabei kommt es nicht auf die spezielle Ausführung der Halbleiterchips an. Die Halbleiterchips können beispielsweise integrierte Schaltungen beliebiger Form, Leistungstransistoren, Leistungsdioden, Mikroprozessoren oder mikroelektromechanische Bauelemente sein. Es kann sich insbesondere um Halbleiterchips mit einer vertikalen Struktur handeln, d. h. die Halbleiterchips können so gefertigt sein, dass elektrische Ströme in einer Richtung senkrecht zu den Hauptoberflächen des Halbleiterchips fließen können. Ein Halbleiterchip mit einer vertikalen Struktur kann insbesondere auf seinen beiden Hauptoberflächen, d. h. auf seiner Ober- und Unterseite, Kontaktelemente aufweisen. Insbesondere Leistungstransistoren und Leistungsdioden können eine vertikale Struktur besitzen. Beispielsweise können sich der Source- und Gate-Anschluss eines Leistungstransistors bzw. der Anoden-Anschluss einer Leistungsdiode auf einer Hauptoberfläche befinden, während der Drain-Anschluss des Leistungstransistors bzw. der Kathoden-Anschluss der Leistungsdiode auf der anderen Hauptoberfläche angeordnet sind. Eine Leistungsdiode kann insbesondere als Schottky-Diode ausgeführt sein. Die Halbleiterchips müssen aus keinem speziellen Halbleitermaterial gefertigt sein, sie können zudem auch nicht-leitende anorganische und/oder organische Materialien enthalten. Die Halbleiterchips können gehäust oder ungehäust sein. In the following, components containing semiconductor chips will be described. It does not depend on the special design of the semiconductor chips. The semiconductor chips may be, for example, integrated circuits of any shape, power transistors, power diodes, microprocessors or microelectromechanical components. In particular, these may be semiconductor chips having a vertical structure, ie the semiconductor chips may be manufactured such that electrical currents can flow in a direction perpendicular to the main surfaces of the semiconductor chip. A semiconductor chip with a vertical structure may have contact elements, in particular on its two main surfaces, ie on its top and bottom sides. In particular, power transistors and power diodes may have a vertical structure. For example, the source and gate terminal of one power transistor and the anode terminal of a power diode can be located on one main surface, while the drain terminal of the power transistor and the cathode terminal of the power diode are arranged on the other main surface. A power diode may be designed in particular as a Schottky diode. The semiconductor chips need not be made of any special semiconductor material, they may also contain non-conductive inorganic and / or organic materials. The semiconductor chips can be housed or unhoused.
Die Halbleiterchips können Kontaktelemente aufweisen, die eine elektrische Kontaktierung der Halbleiterchips ermöglichen. Die Kontaktelemente können aus einem beliebigen leitfähigen Material bestehen, beispielsweise aus einem Metall, wie z. B. Aluminium, Gold oder Kupfer, einer Metalllegierung oder einem leitfähigen organischen Material.The semiconductor chips may have contact elements which enable electrical contacting of the semiconductor chips. The contact elements may be made of any conductive material, for example of a metal such. As aluminum, gold or copper, a metal alloy or a conductive organic material.
Die Halbleiterchips können auf Trägern angeordnet sein. Die Träger können unter anderem als Wärmesenke zum Abführen der von den Halbleiterchips erzeugten Wärme dienen. Die Träger können aus elektrisch leitenden Materialien, wie z. B. Kupfer oder Eisen-Nickel-Legierungen, bestehen. Die Träger können jeweils mit einem Kontaktelement des Halbleiterchips, mit welchem der Halbleiterchip auf dem Träger sitzt, elektrisch verbunden sein. Die elektrischen Verbindungen können z. B. durch Reflow-Löten, Vakuumlöten, Diffusionslöten oder Verkleben mittels eines leitfähigen Klebstoffs erzeugt werden.The semiconductor chips may be arranged on carriers. Among other things, the carriers can serve as a heat sink for dissipating the heat generated by the semiconductor chips. The carrier may be made of electrically conductive materials, such. As copper or iron-nickel alloys, exist. The carriers can each be electrically connected to a contact element of the semiconductor chip, with which the semiconductor chip sits on the carrier. The electrical connections can z. B. by reflow soldering, vacuum brazing, diffusion soldering or bonding by means of a conductive adhesive.
Falls Diffusionslöten als Verbindungstechnik zwischen Träger und Halbleiterchip eingesetzt wird, können Lotmaterialien verwendet werden, die nach Beendigung des Lötvorgangs an der Grenzfläche zwischen Träger und Halbleiterchip aufgrund von Grenzflächendiffusionsprozessen zu intermetallischen Phasen führen. Hierbei ist für Kupfer- oder Eisen-Nickel-Träger beispielsweise die Verwendung von AuSn-, AgSn-, CuSn, AgIn-, AuIn- oder CuIn-Loten denkbar.If diffusion soldering is used as the bonding technique between the substrate and the semiconductor chip, solder materials may be used which lead to intermetallic phases after termination of the soldering process at the interface between substrate and semiconductor chip due to interfacial diffusion processes. In this case, for example, the use of AuSn, AgSn, CuSn, AgIn, AuIn or CuIn solders is conceivable for copper or iron-nickel supports.
Sofern die Träger mit den Halbleiterchips verklebt werden, können leitfähige Klebstoffe verwendet werden. Die Klebstoffe können z. B. auf Epoxidharzen basieren und zur Erzeugung der elektrischen Leitfähigkeit mit Gold, Silber, Nickel oder Kupfer angereichert sein.If the carriers are bonded to the semiconductor chips, conductive adhesives can be used. The adhesives may, for. B. based on epoxy resins and be enriched to produce the electrical conductivity with gold, silver, nickel or copper.
Die Träger können Fortsätze aufweisen. Ein Fortsatz eines Trägers kann beispielsweise eine Verjüngung des Trägers in einer bestimmten Richtung sein. Insbesondere kann der Fortsatz einstückig mit dem Träger verbunden sein. Jeweils zwei Träger können Fortsätze aufweisen, die in unterschiedliche Richtungen zeigen. Demnach können die beiden Fortsätze mit der Ausnahme, dass sie in die gleiche Richtung zeigen, beliebige Winkel miteinander einschließen. Insbesondere können die Fortsätze in entgegengesetzte Richtungen zeigen. Die unterschiedlichen Richtungen der beiden Fortsätze können dadurch verwirklicht sein, dass die zugehörigen Träger gegeneinander verdreht sind. Die auf die Träger aufgebrachten Halbleiterchips können ebenfalls gegeneinander verdreht sein, sie können aber auch gleich ausgerichtet sein. Ferner können die Halbleiterchips mit anderen Winkeln als die zugehörigen Träger gegeneinander verdreht sein.The carriers may have extensions. An extension of a carrier may for example be a taper of the carrier in a certain direction. In particular, the extension can be integrally connected to the carrier. In each case two carriers can have extensions which point in different directions. Thus, the two extensions, with the exception that they point in the same direction, include any angle with each other. In particular, the extensions can point in opposite directions. The different directions of the two extensions can be realized in that the associated carrier are rotated against each other. The semiconductor chips applied to the carriers can likewise be rotated relative to one another, but they can also be aligned identically. Further, the semiconductor chips may be twisted at angles other than the associated carriers.
Die Kontaktelemente der Halbleiterchips können eine Diffusionsbarriere aufweisen. Die Diffusionsbarriere verhindert beim Diffusionslöten, dass Lotmaterial von dem Träger in den Halbleiterchip diffundiert. Eine dünne Titanschicht auf einem Kontaktelement bewirkt beispielsweise eine solche Diffusionsbarriere.The contact elements of the semiconductor chips may have a diffusion barrier. During diffusion soldering, the diffusion barrier prevents solder material from diffusing from the carrier into the semiconductor chip. For example, a thin titanium layer on a contact element causes such a diffusion barrier.
In
Das „in unterschiedliche Richtung zeigen” des ersten und des zweiten Fortsatzes bezieht sich im Wesentlichen auf die Richtung, welche die Trägerfortsätze in der Draufsicht zeigen, d. h. in einer Ebene parallel zu der Chip-Ebene. In den beiliegenden Figuren entspricht das jeweils der Papierebene.The "pointing in different directions" of the first and second appendages essentially refers to the direction which the carrier appendages show in plan view, ie. H. in a plane parallel to the chip plane. In the accompanying figures, this corresponds to the paper plane.
Alternativ kann der zweite Halbleiterchip
In
Alternativ kann der Halbleiterchip
Die Außenkontaktelemente
Die Kontaktelemente
Je größer die Anzahl der Bonddrähte bzw. je größer der Durchmesser der einzelnen Bonddrähte ist, desto geringer ist der elektrische Widerstand zwischen dem jeweiligen Kontaktelement und dem zugehörigen Außenkontaktelement. Dies ist insbesondere bei den Source-Anschlüssen
Bei dem Bauelement
In
Die Bauelemente
Während des Betriebs des Abwärtswandlers
In
Die beiden Schalter S1 und S2 sind in dem Modul
Ein Vorteil des Bauelements
Die Bauelemente
In den
In einem ersten Verfahrensschritt (vgl.
Im nächsten Verfahrensschritt (vgl.
Im nächsten Verfahrensschritt wird die Anordnung mit einem Gehäuse
Im letzten Verfahrensschritt werden die Kontaktzungen
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Citations (5)
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US4862344A (en) * | 1987-02-23 | 1989-08-29 | Kabushiki Kaisha Toshiba | 3-phase bridge converting circuit module |
US6794742B2 (en) * | 2001-07-03 | 2004-09-21 | Mitsubishi Denki Kabushiki Kaisha | Inverter module having a plurality of terminals at a predetermined pitch |
US6818971B2 (en) * | 2002-01-28 | 2004-11-16 | Fuji Electric Co., Ltd. | Lead frame for resin-molded semiconductor device |
US7173333B2 (en) * | 2003-12-03 | 2007-02-06 | Renesas Technology Corp. | Semiconductor device |
JP2007073581A (en) * | 2005-09-05 | 2007-03-22 | Renesas Technology Corp | Semiconductor device |
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2007
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US4862344A (en) * | 1987-02-23 | 1989-08-29 | Kabushiki Kaisha Toshiba | 3-phase bridge converting circuit module |
US6794742B2 (en) * | 2001-07-03 | 2004-09-21 | Mitsubishi Denki Kabushiki Kaisha | Inverter module having a plurality of terminals at a predetermined pitch |
US6818971B2 (en) * | 2002-01-28 | 2004-11-16 | Fuji Electric Co., Ltd. | Lead frame for resin-molded semiconductor device |
US7173333B2 (en) * | 2003-12-03 | 2007-02-06 | Renesas Technology Corp. | Semiconductor device |
JP2007073581A (en) * | 2005-09-05 | 2007-03-22 | Renesas Technology Corp | Semiconductor device |
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