DE102006039302B4 - Method of making an integrated BiCMOS circuit - Google Patents
Method of making an integrated BiCMOS circuit Download PDFInfo
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- DE102006039302B4 DE102006039302B4 DE200610039302 DE102006039302A DE102006039302B4 DE 102006039302 B4 DE102006039302 B4 DE 102006039302B4 DE 200610039302 DE200610039302 DE 200610039302 DE 102006039302 A DE102006039302 A DE 102006039302A DE 102006039302 B4 DE102006039302 B4 DE 102006039302B4
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- structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8228—Complementary devices, e.g. complementary transistors
- H01L21/82285—Complementary vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Abstract
Verfahren zur Herstellung eines integrierten BiCMOS-Schaltkreises, der bipolare Transistoren und CMOS-Transistoren auf einem Substrat enthält, umfassend die folgenden Schritte:
die Bildung von Strukturen für die CMOS-Transistoren, einschließlich eines Schritts der Implantation von Strukturen,
die Bildung von Strukturen für einen bipolaren Transistor eines ersten Leistungstyps und für einen bipolaren Transistor eines zweiten Leistungstyps, einschließlich eines Schritts der selektiven Implantation von Kollektorstrukturen unter für den ersten Leistungstyp optimierten Implantationsbedingungen,
wobei der Schritt der Implantation von Strukturen für die CMOS-Transistoren die Erhöhung der Dotierstoffkonzentration durch Implantation in dem Kollektor des bipolaren Transistors des zweiten Leistungstyps beinhaltet.A method of fabricating a BiCMOS integrated circuit including bipolar transistors and CMOS transistors on a substrate, comprising the steps of:
the formation of structures for the CMOS transistors, including a step of implanting structures,
forming structures for a bipolar transistor of a first power type and a bipolar transistor of a second power type, including a step of selectively implanting collector structures under implant conditions optimized for the first power type;
wherein the step of implanting structures for the CMOS transistors includes increasing the dopant concentration by implantation in the collector of the second power type bipolar transistor.
Description
Die Erfindung betrifft ein Verfahren zur Herstellung eines integrierten BiCMOS-Schaltkreises, der bipolare und CMOS-Transistoren enthält.The The invention relates to a method for producing an integrated BiCMOS circuit containing bipolar and CMOS transistors.
In dem Stand der Technik ist es bekannt, bipolare Bauelemente mit FET-Bauelementen zu integrieren, wenn höhere Ansteuerungsströme benötigt werden. Außerdem können bipolare Transistoren für hohe Durchbruchspannungen ausgelegt werden. Die Bildung so genannter BiCMOS-Schaltkreise erfordert einen komplizierten Herstellungsprozess mit vielen Schritten, da sich die Herstellungsschritte zur Bildung der Basis, des Emitters und des Kollektors eines bipolaren Transistors von den Herstellungsschritten zur Bildung der Source, des Drains und des Gates von FET-Bauelementen unterscheiden.In In the prior art, it is known to integrate bipolar devices with FET devices, if higher drive currents needed. Furthermore can bipolar transistors for high Breakthrough voltages are designed. The formation of so-called BiCMOS logic requires a complicated manufacturing process with many steps, because the manufacturing steps to form the base, the emitter and the collector of a bipolar transistor from the manufacturing steps to Formation of the source, drain and gate of FET devices differ.
Für die Bildung des Kollektors eines bipolaren Transistors mit Halbleiterübergang (BJT) wird gemeinhin das Verfahren der selektiven Implantation des Kollektors (SIC) angewendet. Durch Auswahl der SIC-Implantationsbedingungen können die Leistungsparameter des bipolaren Transistors, d. h. Durchbruchspannung und Geschwindigkeit, einfach angepasst werden. Typischerweise bietet ein Kollektor mit einer hohen Dotierstoffkonzentration eine hohe Geschwindigkeit, bringt aber eine verringerte Durchbruchspannung mit sich. Andererseits stellt ein Kollektor mit einer niedrigen Dotierstoffkonzentration eine hohe Durchbruchspannung bereit, schließt aber den Nachteil einer niedrigen Geschwindigkeit mit ein. Wenn die Anforderungen an die Geschwindigkeit relativ gering sind, kann die Dotierstoffkonzentration in dem Kollektor angepasst werden, um die Anforderungen für den bipolaren Transistor mit der höchsten Anforderung an die Durchbruchspannung in dem Schaltkreis zu erfüllen. Dies ist eine annehmbare Art der Herstellung leistungsschwächerer Schaltkreise.For education of the collector of a bipolar transistor with semiconductor junction (BJT) is commonly called the selective implantation procedure of the Collector (SIC). By selecting the SIC implantation conditions can the performance parameters of the bipolar transistor, d. H. Breakdown voltage and speed, easy to be customized. Typically offers a collector with a high dopant concentration a high Speed, but brings a reduced breakdown voltage with himself. On the other hand, presents a collector with a low Dopant concentration ready a high breakdown voltage, but closes the Disadvantage of a low speed with one. If the requirements At the speed are relatively low, the dopant concentration be adjusted in the collector to meet the requirements for the bipolar Transistor with the highest requirement to meet the breakdown voltage in the circuit. This is an acceptable way of producing less powerful circuits.
Andererseits erfordern Hochleistungsschaltkreise eine höhere Geschwindigkeit, während die hohe Durchbruchspannung nicht für alle bipolaren Transistoren in dem Schaltkreis benötigt wird. Deshalb wurde vorgeschlagen, innerhalb des Schaltkreises einen zweiten Typ bipolaren Transistors mit einer höheren Dotierstoffkonzentration in dem Kollektor für Teile des Schaltkreises, in denen eine verringerte Durchbruchspannung annehmbar ist, zu bilden. Der zweite Typ bipolaren Transistors liefert eine verbesserte Geschwindigkeit.on the other hand High performance circuits require a higher speed while the high Breakdown voltage not for all bipolar transistors in the circuit is needed. Therefore, it has been suggested within the circuit a second Type bipolar transistor with a higher dopant concentration in the collector for parts of the circuit in which a reduced breakdown voltage is acceptable to form. The second type of bipolar transistor delivers an improved speed.
Es wurde vorgeschlagen, zwei Typen bipolarer Transistoren herzustellen, den Hochspannungstyp (HV-BJT) und den Typ mit niedriger Durchbruchspannung und hoher Geschwindigkeit (HP-BJT), indem die Kollektoren für die beiden Typen von Transistoren in separaten Schritten selektiv implantiert und somit die Implantationsbedingungen separat angepasst werden.It it has been proposed to produce two types of bipolar transistors, the high voltage type (HV-BJT) and the low breakdown voltage type and high speed (HP-BJT), adding the collectors for the two Types of transistors selectively implanted in separate steps and thus the implantation conditions are adjusted separately.
Ein zusätzlicher Implantationsschritt beinhaltet einen separaten Maskierungsschritt, einen Säuberungsschritt usw. und ist zeit- und energieaufwändig. Die Einbringung eines zusätzlichen SIC-Implantationsschritts erhöht die Kosten des Schaltkreises.One additional Implantation step involves a separate masking step, a cleaning step etc. and is time and energy consuming. The introduction of a additional SIC implantation step increased the cost of the circuit.
Aus
der
Aus
der
Es gibt einen Bedarf für ein Verfahren zur Herstellung eines integrierten BiCMOS-Schaltkreises, der bipolare Transistoren mit Kollektoren mit unterschiedlichen Dotierstoffkonzentrationen enthält, ohne die Erfordernis eines zusätzlichen Prozessschritts.It there is a need for a method of making an integrated BiCMOS circuit, the bipolar transistors with collectors with different Dopant concentrations contains, without the requirement of an additional Process step.
In einem ersten Aspekt der Erfindung wird ein Verfahren zur Herstellung eines integrierten BiCMOS-Schaltkreises gemäß Anspruch 1 bereitgestellt. Ein erster Typ bipolaren Transistors mit einem Kollektor mit einer ersten Dotierstoffkonzentration wird durch selektive Implantation des Kollektors gebildet. Ein zweiter Typ bipolaren Transistors mit einem Kollektor mit einer zweiten Dotierstoffkonzentration wird gebildet, indem die Konzentration in dem Kollektor während einem Implantationsschritt für die CMOS-Strukturen des Schaltkreises erhöht wird. Dieser Implantationsschritt ist bereits Teil des BiCMOS-Prozesses; deshalb muss kein zusätzlicher Prozessschritt eingebracht werden, um den zweiten Typ bipolaren Transistors zu erhalten. Es muss lediglich einer bereits existierenden Maske eine Anordnung für die Kollektorstrukturen dieses zweiten Typs bipolaren Transistors hinzugefügt werden. Ohne die Erfordernis, einen zusätzlichen SIC-Implantationsschritt einzubringen, verbessert das Verfahren gemäß der Erfindung die Leistungsfähigkeit des Schaltkreises, ohne die Komplexität und die Kosten für den Endwafer zu erhöhen.In A first aspect of the invention is a method for the production An integrated BiCMOS circuit according to claim 1 is provided. One first type bipolar transistor with a collector with a first Dopant concentration is achieved by selective implantation of the collector educated. A second type of bipolar transistor with a collector with a second dopant concentration is formed by the concentration in the collector during an implantation step for the CMOS structures of the circuit increases becomes. This implantation step is already part of the BiCMOS process; therefore, no additional process step can be introduced to the second type bipolar transistor receive. It just has to be an already existing mask Arrangement for the collector structures of this second type bipolar transistor added become. Without the need for an additional SIC implantation step to introduce the method according to the invention improves the performance of the circuit, without the complexity and cost of the final wafer to increase.
In einer bevorzugten Ausführungsform wird der Schritt der n-WANNEN- bzw. p-WANNEN-Implantation dazu verwendet, die Dotierstoffkonzentration in dem Kollektor des HP-BJT zu erhöhen. Der Wannenimplantationsschritt kann entweder vor oder nach einem Schritt der selektiven Implantation von Kollektorstrukturen durchgeführt werden.In a preferred embodiment the step of n-well or p-well implantation is used to increase the dopant concentration in the collector of the HP-BJT. The tub implantation step can be either before or after a step of selective implantation performed by collector structures become.
Weitere Vorteile und Merkmale der Erfindung werden aus der folgenden ausführlichen Beschreibung unter Bezugnahme auf die beigefügten Zeichnungen ersichtlich. Es zeigen:Further Advantages and features of the invention will become apparent from the following detailed Description with reference to the accompanying drawings. Show it:
Zunächst wird
der Prozess zur Herstellung von Strukturen für bipolare Transistoren in
einem herkömmlichen
Prozess beschrieben.
Als
nächstes
wird die Bildung von Strukturen für CMOS-Transistoren unter Bezugnahme
auf
Claims (6)
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DE200610039302 DE102006039302B4 (en) | 2006-08-22 | 2006-08-22 | Method of making an integrated BiCMOS circuit |
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DE200610039302 DE102006039302B4 (en) | 2006-08-22 | 2006-08-22 | Method of making an integrated BiCMOS circuit |
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DE102006039302A1 DE102006039302A1 (en) | 2008-03-20 |
DE102006039302B4 true DE102006039302B4 (en) | 2010-01-14 |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5164326A (en) * | 1992-03-30 | 1992-11-17 | Motorola, Inc. | Complementary bipolar and CMOS on SOI |
DE69328758T2 (en) * | 1992-10-05 | 2000-11-30 | Motorola Inc | Process for the production of SOI bipolar and MOS transistors |
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2006
- 2006-08-22 DE DE200610039302 patent/DE102006039302B4/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5164326A (en) * | 1992-03-30 | 1992-11-17 | Motorola, Inc. | Complementary bipolar and CMOS on SOI |
DE69328758T2 (en) * | 1992-10-05 | 2000-11-30 | Motorola Inc | Process for the production of SOI bipolar and MOS transistors |
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