DE102005053739A1 - Getaktete invertierende Logischaltung - Google Patents
Getaktete invertierende Logischaltung Download PDFInfo
- Publication number
- DE102005053739A1 DE102005053739A1 DE200510053739 DE102005053739A DE102005053739A1 DE 102005053739 A1 DE102005053739 A1 DE 102005053739A1 DE 200510053739 DE200510053739 DE 200510053739 DE 102005053739 A DE102005053739 A DE 102005053739A DE 102005053739 A1 DE102005053739 A1 DE 102005053739A1
- Authority
- DE
- Germany
- Prior art keywords
- switching units
- switching
- opened
- closed
- switching unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
Abstract
Die getaktete invertierende Logik besteht aus mehreren Schaltelementen, die durch eine Vielzahl von Schaltungsvarianten realisiert werden kann und dadurch in Bezug auf Schaltungskomplexität oder Schaltgeschwindigkeit optimiert werden kann.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200510053739 DE102005053739A1 (de) | 2005-11-10 | 2005-11-10 | Getaktete invertierende Logischaltung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200510053739 DE102005053739A1 (de) | 2005-11-10 | 2005-11-10 | Getaktete invertierende Logischaltung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE102005053739A1 true DE102005053739A1 (de) | 2007-05-16 |
Family
ID=37982596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE200510053739 Withdrawn DE102005053739A1 (de) | 2005-11-10 | 2005-11-10 | Getaktete invertierende Logischaltung |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE102005053739A1 (de) |
-
2005
- 2005-11-10 DE DE200510053739 patent/DE102005053739A1/de not_active Withdrawn
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8122 | Nonbinding interest in granting licenses declared | ||
8139 | Disposal/non-payment of the annual fee |