DE102004015307A1 - Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface - Google Patents

Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface Download PDF

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Publication number
DE102004015307A1
DE102004015307A1 DE102004015307A DE102004015307A DE102004015307A1 DE 102004015307 A1 DE102004015307 A1 DE 102004015307A1 DE 102004015307 A DE102004015307 A DE 102004015307A DE 102004015307 A DE102004015307 A DE 102004015307A DE 102004015307 A1 DE102004015307 A1 DE 102004015307A1
Authority
DE
Germany
Prior art keywords
temperature jump
preparing
carbon
semiconductor body
subsequent treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE102004015307A
Other languages
German (de)
Inventor
Ignaz Eisele
Joerg Schulze
Alexandra Ludsteck
Tanja Stimpel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE102004015307A priority Critical patent/DE102004015307A1/en
Publication of DE102004015307A1 publication Critical patent/DE102004015307A1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28238—Making the insulator with sacrificial oxide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Abstract

Preparing the surface (3) of a semiconductor body (1) for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface. Preferred Features: The specific atmosphere contains oxygen, preferably atomic oxygen, ozone or a gas which releases atomic oxygen or ozone. The temperature jump is carried out at 400-500 [deg] C. The surface is cleaned before the temperature jump.
DE102004015307A 2004-03-29 2004-03-29 Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface Ceased DE102004015307A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE102004015307A DE102004015307A1 (en) 2004-03-29 2004-03-29 Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102004015307A DE102004015307A1 (en) 2004-03-29 2004-03-29 Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface

Publications (1)

Publication Number Publication Date
DE102004015307A1 true DE102004015307A1 (en) 2005-10-20

Family

ID=35033944

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004015307A Ceased DE102004015307A1 (en) 2004-03-29 2004-03-29 Preparing the surface of a semiconductor body for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface

Country Status (1)

Country Link
DE (1) DE102004015307A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028560A (en) * 1988-06-21 1991-07-02 Mitsubishi Denki Kabushiki Kaisha Method for forming a thin layer on a semiconductor substrate
US5849102A (en) * 1996-02-28 1998-12-15 Nec Corporation Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere
US6451713B1 (en) * 2000-04-17 2002-09-17 Mattson Technology, Inc. UV pretreatment process for ultra-thin oxynitride formation
US6589877B1 (en) * 1998-02-02 2003-07-08 Micron Technology, Inc. Method of providing an oxide
EP1427003A2 (en) * 2002-12-02 2004-06-09 OHMI, Tadahiro Semiconductor device and method of manufacturing the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028560A (en) * 1988-06-21 1991-07-02 Mitsubishi Denki Kabushiki Kaisha Method for forming a thin layer on a semiconductor substrate
US5849102A (en) * 1996-02-28 1998-12-15 Nec Corporation Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere
US6589877B1 (en) * 1998-02-02 2003-07-08 Micron Technology, Inc. Method of providing an oxide
US6451713B1 (en) * 2000-04-17 2002-09-17 Mattson Technology, Inc. UV pretreatment process for ultra-thin oxynitride formation
EP1427003A2 (en) * 2002-12-02 2004-06-09 OHMI, Tadahiro Semiconductor device and method of manufacturing the same

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8131 Rejection