DE102004012856A1 - Semiconductor structure, produced by forming an oxygen diffusion layer on a substrate, followed by a dielectric layer which is thermally oxidised - Google Patents

Semiconductor structure, produced by forming an oxygen diffusion layer on a substrate, followed by a dielectric layer which is thermally oxidised Download PDF

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DE102004012856A1
DE102004012856A1 DE102004012856A DE102004012856A DE102004012856A1 DE 102004012856 A1 DE102004012856 A1 DE 102004012856A1 DE 102004012856 A DE102004012856 A DE 102004012856A DE 102004012856 A DE102004012856 A DE 102004012856A DE 102004012856 A1 DE102004012856 A1 DE 102004012856A1
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dielectric layer
semiconductor substrate
oxygen
layer
liner layer
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Henry Bernhardt
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Infineon Technologies AG
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/405—Oxides of refractory metals or yttrium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
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    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour

Abstract

A process for producing a semiconductor structure comprises preparing a semiconductor substrate (1), forming an oxygen diffusion prevention liner layer (5) on top, and forming a dielectric layer (10) on the liner. The dielectric layer contains oxygen and is formed using atomic layer chemical vapour deposition. The dielectric layer is thermally oxidised in an oxygen atmosphere. The diffusion prevention liner prevents oxidation of the substrate below.

Description

Die vorliegende Erfindung betrifft ein Herstellungsverfahren für eine Halbleiterstruktur und eine entsprechende Halbleiterstruktur.The The present invention relates to a manufacturing method for a semiconductor structure and a corresponding semiconductor structure.

Obwohl prinzipiell auf beliebige integrierte Schaltungen anwendbar, werden die vorliegende Erfindung sowie die ihr zugrundeliegende Problematik in bezug auf integrierte Speicherschaltungen in Silizium-Technologie erläutert.Even though in principle be applicable to any integrated circuits the present invention and its underlying problem in relating to integrated memory circuits in silicon technology explained.

In jüngerer Zeit bedient man sich bei der Herstellung von Dielektrikumschichten in integrierten Speicherschaltungen in zunehmendem Maße des sogenannten ALCVD-Verfahrens (Atomic Layer Chemical Vapour Deposition). Dabei wird eine Dielektrikumschicht beispielsweise aus zwei oder mehr verschiedenen Prekursoren atomlagenweise aufgebaut.In younger Time is used in the production of dielectric layers in integrated memory circuits increasingly the so-called ALCVD process (Atomic Layer Chemical Vapor Deposition). there For example, one dielectric layer will be two or more various precursors built up atomic.

Der besondere Vorteil dieser Technik liegt an der gut kontrollierbaren Dicke der Dielektrikumschicht sowie der Tatsache, dass auch sehr dünne Schichten herstellbar sind. Ein Beispiel für derartige Dielektrikumschichten ist eine Al2O3-Dielektrikumschicht, welche unter Verwendung von Trimethyl-Aluminium als organischem Prekursor hergestellt wird.The particular advantage of this technique is the good controllable thickness of the dielectric layer and the fact that even very thin layers can be produced. An example of such dielectric layers is an Al 2 O 3 dielectric layer made using trimethylaluminum as an organic precursor.

Als nachteilhaft bei derartigen durch ein ALCVD-Verfahren hergestellten Dielektrikumschichten hat sich die Tatsache herausgestellt, dass das Leckstromverhalten und die Zuverlässigkeit der Dielektrikumschichten nicht besonders gut sind. Zurückgeführt wird dieses instabile Verhalten auf C- bzw. H-Reste innerhalb der Dielektrikumschicht, welche von den organischen Prekursoren herrühren. Diese C- bzw. H-Reste bilden Fehlstellen, insbesondere Traps, und sorgen für eine vorzeitige Degradierung der Dielektrikumschicht.When disadvantageous in such produced by an ALCVD process Dielectric layers has turned out to be the fact that the leakage current behavior and the reliability of the dielectric layers not very good. Is returned this unstable behavior on C or H residues within the dielectric layer, which originate from the organic precursors. These C or H residues form defects, especially traps, and ensure a premature Degradation of the dielectric layer.

Um die Schichteigenschaften zu verbessern, kann eine zusätzliche Wärmebehandlung der Dielektrikumschicht nach der ALCVD-Abscheidung oberhalb der Kristallisationstemperatur vorgesehen werden. Jedoch auch eine derartige Wärmebehandlung führt nicht zu vollständig zufriedenstellenden Ergebnissen.Around To improve the layer properties, can be an additional heat treatment the dielectric layer after ALCVD deposition above the crystallization temperature be provided. However, even such a heat treatment does not result too complete satisfactory results.

Daher ist es Aufgabe der vorliegenden Erfindung, ein verbessertes Herstellungsverfahren für eine Halbleiterstruktur mit einer sauerstoffhaltigen Dielektrikumschicht, die durch ein ALCVD-Verfahren hergestellt wird, zu schaffen.Therefore It is the object of the present invention to provide an improved production process for one Semiconductor structure with an oxygen-containing dielectric layer, created by an ALCVD process.

Erfindungsgemäß wird dieses Problem durch das in Anspruch 1 angegebene Herstellungsverfahren und durch die in Anspruch 6 angegebene Halbleiterstruktur gelöst.According to the invention this Problem by the manufacturing method specified in claim 1 and solved by the specified in claim 6 semiconductor structure.

Die der Erfindung zugrunde liegende Idee besteht darin, die sauerstoffhaltige Dielektrikumschicht einem zusätzlichen thermischen Oxidationsprozess in Sauerstoffatmosphäre zu unterwerfen, um die besagten Fehlstellen zu beseitigen. Um einen Angriff des Sauerstoffs auf das darunterliegende Halbleitersubstrat zu vermeiden, wird zwischen der sauerstoffhaltigen Dielektrikumschicht und dem Halbleitersubstrat eine sauerstoffundurchlässige Linerschicht vorgesehen, welche vorzugsweise eine sehr geringe Dicke von typischerweise 1 bis 2 nm aufweist.The The idea underlying the invention is that the oxygen-containing Dielectric layer an additional subject thermal oxidation process in oxygen atmosphere, to eliminate the said defects. To attack the Oxygen on the underlying semiconductor substrate to avoid is between the oxygen-containing dielectric layer and the Semiconductor substrate provided an oxygen-impermeable liner layer, which preferably has a very small thickness of typically 1 to 2 nm.

Ein besonderer Vorteil der Erfindung liegt in der Verringerung der Leckströme in der Dielektrikumschicht, beispielsweise für Grabenkondensatoren in integrierten Speicherschaltungen, sowie der Verbesserung der Zuverlässigkeit.One particular advantage of the invention lies in the reduction of leakage currents in the Dielectric layer, for example, for trench capacitors in integrated Memory circuits, as well as the improvement of reliability.

In den Unteransprüchen finden sich vorteilhafte Weiterbildungen und Verbesserungen des jeweiligen Gegenstandes der Erfindung.In the dependent claims find advantageous developments and improvements of respective subject of the invention.

Gemäss einer bevorzugten Weiterbildung wird das Nachoxidieren im Temperaturbereich 300–1050 °C durchgeführt.According to one preferred refinement, the post-oxidation in the temperature range 300-1050 ° C is performed.

Gemäss einer weiteren bevorzugten Weiterbildung stammt die Dielektrikumschicht aus folgender Gruppe: Aluminiumoxid, Hafniumoxid, Tantaloxid, Praseodymoxid.According to one Another preferred development is the dielectric layer from the following group: alumina, hafnium oxide, tantalum oxide, praseodymium oxide.

Gemäss einer weiteren bevorzugten Weiterbildung ist das Halbleitersubstrat aus Silizium und die Linerschicht aus Siliziumnitrid oder Siliziumoxinitrid.According to one Another preferred development is the semiconductor substrate Silicon and the liner layer of silicon nitride or silicon oxynitride.

Gemäss einer weiteren bevorzugten Weiterbildung wird die Linerschicht beim Nachoxidieren in einem an die Dielektrikumschicht angrenzenden ersten Bereich oxidiert und bleibt in einem an das Halbleitersubstrat angrenzenden zweiten Bereich erhalten.According to one Another preferred development is the liner layer during the post-oxidation in a first region adjacent to the dielectric layer oxidized and remains in a contiguous to the semiconductor substrate second area received.

Ein Ausführungsbeispiel der Erfindung ist in den Zeichnungen dargestellt und in der nachfolgenden Beschreibung näher erläutert.One embodiment The invention is illustrated in the drawings and in the following Description closer explained.

1a-c zeigen schematische Darstellungen aufeinanderfolgender Verfahrensstadien eines Herstellungsverfahrens einer Halbleiterstruktur als Ausführungsform der vorliegenden Erfindung. 1a -c show schematic representations of successive process stages of a manufacturing method of a semiconductor structure as an embodiment of the present invention.

In den Figuren bezeichnen gleiche Bezugszeichen gleiche oder funktionsgleiche Bestandteile.In the same reference numerals designate the same or functionally identical Ingredients.

In 1 bezeichnet Bezugszeichen 1 ein Silizium-Halbleitersubstrat, auf dem durch Nitridierung in NH3 eine 1 bis 2 nm dicke Linerschicht aus Si3N4 vorgesehen ist, welche einer Sauerstoffdiffusion an der Oberseite des Halbleitersubstrats 1 entgegenwirkt. Diese Nitridierung findet typischerweise bei 650°C bis 950 °C statt.In 1 denotes reference numeral 1 a si Silicon semiconductor substrate on which by nitriding in NH 3, a 1 to 2 nm thick liner layer of Si 3 N 4 is provided, which oxygen diffusion at the top of the semiconductor substrate 1 counteracts. This nitridation typically takes place at 650 ° C to 950 ° C.

Mit Bezug auf 1b wird auf der Linerschicht 5 eine sauerstoffhaltige Dielektrikumschicht 10 mittels eines ALCVD-Prozesses unter Verwendung von organischen Prekursoren hergestellt, welche im vorliegenden Beispiel aus Al2O3 besteht und welche typischerweise eine Dicke von 2 bis 5 nm aufweist.Regarding 1b is on the liner layer 5 an oxygen-containing dielectric layer 10 produced by an ALCVD process using organic precursors, which in the present example consists of Al 2 O 3 and which typically has a thickness of 2 to 5 nm.

In einem folgenden Prozeßschritt, der in 1c erläutert ist, findet zuerst eine Kristallisierungstemperung in Inertgasatmosphäre und danach eine Nachoxidation in sauerstoffhaltiger Atmosphäre bei 900°C statt, in der die Dielektrikumschicht 10 nachoxidiert wird. Die Reoxidation kann entweder in trockener oder nasser Atmosphäre durchgeführt werden.In a following process step, which is in 1c is explained, takes place first a crystallization annealing in an inert gas atmosphere and then a post-oxidation in an oxygen-containing atmosphere at 900 ° C, in which the dielectric layer 10 is oxidized. The reoxidation can be carried out either in a dry or wet atmosphere.

Auch ein Teilbereich 5a der Linerschicht 5 wird bei dieser Nachoxidation reoxidiert. Allerdings verbleibt ein Teilbereich 5b der Linerschicht intakt und verhindert somit, dass Sauerstoff bis an die Oberfläche des Halbleitersubstrats 1 gelangen kann.Also a subarea 5a the liner layer 5 is reoxidized in this post-oxidation. However, a subarea remains 5b the liner layer intact, thus preventing oxygen from reaching the surface of the semiconductor substrate 1 can get.

Besonders zweckmäßig ist es, diese Sequenz thermischer Prozessschritte in situ in einer einzigen Anlage laufen zu lassen, um eine Zeit- und Kostenersparnis zu bewirken.Especially is appropriate it, this sequence of thermal process steps in situ in a single Plant to save time and money.

Obwohl die vorliegende Erfindung vorstehend anhand eines bevorzugten Ausführungsbeispiels beschrieben wurde, ist sie darauf nicht beschränkt, sondern auf vielfältige Art und Weise modifizierbar.Even though the present invention above based on a preferred embodiment It is not limited to this, but in many ways and modifiable.

Insbesondere ist die Auswahl der Schichtmaterialien nur beispielhaft und kann in vielerlei Art variiert werden.Especially the choice of the layer materials is only exemplary and can be varied in many ways.

Obwohl beim obigen Beispiel die Linerschicht aus Siliziumnitrid bestand, welches durch eine thermische Nitridierung von Silizium in NH3 bei erhöhten Temperaturen erreicht wird, ist es ebenfalls möglich, eine abgeschiedene Linerschicht aus Siliziumnitrid oder Siliziumoxinitrid zu verwenden.Although in the above example, the liner layer was made of silicon nitride obtained by thermal nitriding silicon in NH 3 at elevated temperatures, it is also possible to use a deposited liner layer of silicon nitride or silicon oxynitride.

Die Oxidation kann eine Trockenoxidation mit O2, Nassoxidation mit H2O, Oxidation mit 03, oder Radikaloxidation sein. Dabei muss ein jeweils günstiger Temperaturbereich gewählt werden.The oxidation may be dry oxidation with O 2 , wet oxidation with H 2 O, oxidation with O 3 , or radical oxidation. In this case, a favorable temperature range must be selected.

Auch kann als sauerstoffhaltige Dielektrikumschicht, welche mittels des ALCVD-Verfahrens aufgetragen wird, nicht nur Al2O3 verwendet werden, sondern beispielsweise auch HfO2, Ta2O5, Pr2O3, o. ä.Also, not only can be used Al 2 O 3, but also for example HfO 2, Ta 2 O 5, Pr 2 O 3, o. Ä as the oxygen-containing dielectric layer, which is applied by means of the ALCVD process.

11
HalbleitersubstratSemiconductor substrate
5, 5b5, 5b
Siliziumnitrid-LinerschichtSilicon nitride liner layer
5a5a
reoxidierte Siliziumnitrid-Linerschichtreoxidized Silicon nitride liner layer
1010
Al2O3-DielektrikumschichtAl 2 O 3 dielectric layer
10'10 '
nachoxidierte Al2O3-Dielektrikumschichtpostoxidized Al 2 O 3 dielectric layer

Claims (6)

Herstellungsverfahren für eine Halbleiterstruktur mit den Schritten: Bereitstellen eines Halbleitersubstrats (1); Vorsehen einer Sauerstoffdiffusion-hemmenden Linerschicht (5) auf dem Halbleitersubstrat (1); Vorsehen einer sauerstoffhaltigen Dielektrikumschicht (10) auf der Linerschicht (5) mittels eines ALCVD-Prozesses unter Verwendung organischer Precursoren; und thermisches Nachoxidieren der Dielektrikumschicht (10) in einer sauerstoffhaltigen Atmosphäre, wobei die Sauerstoffdiffusion-hemmende Linerschicht (5) eine Oxidation des darunterliegenden Halbleitersubstrats verhindert.A semiconductor structure manufacturing method comprising the steps of: providing a semiconductor substrate ( 1 ); Providing an oxygen diffusion-inhibiting liner layer ( 5 ) on the semiconductor substrate ( 1 ); Provision of an oxygen-containing dielectric layer ( 10 ) on the liner layer ( 5 ) by means of an ALCVD process using organic precursors; and thermal post-oxidation of the dielectric layer ( 10 ) in an oxygen-containing atmosphere, wherein the oxygen diffusion-inhibiting liner layer ( 5 ) prevents oxidation of the underlying semiconductor substrate. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass das Nachoxidieren im Temperaturbereich 300–1050 °C durchgeführt wird.Method according to claim 1, characterized in that that the post-oxidation in the temperature range 300-1050 ° C is performed. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Dielektrikumschicht (10) aus folgender Gruppe stammt: Aluminiumoxid, Hafniumoxid, Tantaloxid, Praseodymoxid.Method according to claim 1 or 2, characterized in that the dielectric layer ( 10 ) from the following group: alumina, hafnium oxide, tantalum oxide, praseodymium oxide. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das Halbleitersubstrat (1) aus Silizium ist und die Linerschicht (5) aus Siliziumnitrid oder Siliziumoxinitrid ist.Method according to one of the preceding claims, characterized in that the semiconductor substrate ( 1 ) is made of silicon and the liner layer ( 5 ) is of silicon nitride or silicon oxynitride. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die Linerschicht (5) beim Nachoxidieren in einem an die Dielektrikumschicht (10) angrenzenden ersten Bereich (5a) oxidiert wird und in einem an das Halbleitersubstrat (1) angrenzenden zweiten Bereich (5b) erhalten bleibt.Method according to one of the preceding claims, characterized in that the liner layer ( 5 ) during post-oxidation in one to the dielectric layer ( 10 ) adjacent first area ( 5a ) is oxidized and in a to the semiconductor substrate ( 1 ) adjacent second area ( 5b ) preserved. Halbleiterstruktur, hergestellt nach einem Verfahren gemäss mindestens einem der Ansprüche 1 bis 5, mit: einem Halbleitersubstrat (1); einer Sauerstoffdiffusion-hemmenden Linerschicht (5) auf dem Halbleitersubstrat (1); und einer nachoxidierten sauerstoffhaltigen Dielektrikumschicht (10) auf der Linerschicht (5).A semiconductor structure produced by a method according to any one of claims 1 to 5, comprising: a semiconductor substrate ( 1 ); an oxygen diffusion-inhibiting liner layer ( 5 ) on the semiconductor substrate ( 1 ); and a post-oxidized oxygen-containing dielectric layer ( 10 ) on the liner layer ( 5 ).
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1096042A1 (en) * 1999-10-25 2001-05-02 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6465828B2 (en) * 1999-07-30 2002-10-15 Micron Technology, Inc. Semiconductor container structure with diffusion barrier
US20030052376A1 (en) * 2001-09-14 2003-03-20 Hynix Semiconductor Inc. Semiconductor device with high-k dielectric layer and method for manufacturing the same
DE10156932A1 (en) * 2001-11-20 2003-05-28 Infineon Technologies Ag Production of thin praseodymium oxide film as dielectric in electronic element of semiconductor device, e.g. deep trench capacitor or FET gate dielectric, involves depositing reactive praseodymium and oxygen compounds from gas phase
US20040043151A1 (en) * 2002-08-28 2004-03-04 Micron Technology, Inc. Systems and methods for forming tantalum silicide layers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6465828B2 (en) * 1999-07-30 2002-10-15 Micron Technology, Inc. Semiconductor container structure with diffusion barrier
EP1096042A1 (en) * 1999-10-25 2001-05-02 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US20030052376A1 (en) * 2001-09-14 2003-03-20 Hynix Semiconductor Inc. Semiconductor device with high-k dielectric layer and method for manufacturing the same
DE10156932A1 (en) * 2001-11-20 2003-05-28 Infineon Technologies Ag Production of thin praseodymium oxide film as dielectric in electronic element of semiconductor device, e.g. deep trench capacitor or FET gate dielectric, involves depositing reactive praseodymium and oxygen compounds from gas phase
US20040043151A1 (en) * 2002-08-28 2004-03-04 Micron Technology, Inc. Systems and methods for forming tantalum silicide layers

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