DE10162566A1 - Noise reducing sigma-delta-converter e.g. for RF communications equipment, has main path connected in circuit with parallel path - Google Patents

Abstract

A sigma-delta-converter for converting digital input signals (x(k)) into analog output signals (y(k)) with noise reduction comprises a main path, in which the main path comprises at least one sigma-delta-modulator (SD1) and a digital-analog converter (D/A1). Each path parallel to the main path is designed in such a way that the input signal of the sigma-delta-modulator (SD2) of the parallel path is the difference signal filtered at least for the noise components outside the useful band, from the digital output signal of the sigma-delta-modulator (SD1) and from the spectrally formed input signal (x(k)) corresponding to the transmission function of the sigma-delta-modulator (SD1) of the main path. An Independent claim is given for the use of a sigma-delta-converter.

Description

The invention relates to a sigma-delta converter for conversion of a digital input signal into an analog one Output signal, according to the preamble of claim 1.

In digital-to-analog converters, such as those used in digital radio communication receiving devices, a digital input signal with 2 ^N signal states and a fixed sampling frequency f _a is usually converted into an analog signal that is in the frequency range -f _a / 2 to + f _a / 2 should match the digital signal as well as possible.

In particular with high bit widths N, the number of signal states to be realized by analog circuit technology is a major problem, since the 2 ^N signal states are increasingly difficult to discriminate from the quantization noise as the number increases. For this reason, the digital signal is interpolated by digital filters and so-called sigma-delta modulators are used, which significantly reduce the bit width of the digital signal at an increased sampling frequency and thereby transform the increased quantization noise into previously unused frequency ranges. Structures of sigma-delta modulators which shape the noise signal as by IIR filters (Infinite Impulse Response Filters) are particularly efficient. Achieve order. The sigma-delta modulators are followed by digital-to-analog converters, which convert the digital output signal of the sigma-delta modulators into an analog signal. Sigma-delta modulators and digital-to-analog converters together result in the so-called sigma-delta converter.

There are two approaches to achieving noise shaping in sigma-delta modulators:
According to a first approach, feedback loops of a higher order are used, which allow the number of stages to be reduced to up to two signal states. The disadvantage is that the noise shaping from order 3 leads to possible instabilities with high input signals.

A second approach involves cascading structures first and / or second order used, which are multi-stage and thereby demonstrate stable operating behavior.

A detailed description of the structure and the Mode of action of sigma-delta modulators is S. R. Norswothy, R. Schreier, G. Temes: "Delta-Sigma Converters, Theory, Design and simulation ", IEEE Press 1997, ISBN 0-7803-1045-4.

A special cascaded structure of a Sigma-delta modulator is described in DE 199 37 246. Through this cascaded structure becomes the number of signal states reduced and on the other hand also remains Higher order sigma-delta modulators largely guarantee stability.

Sigma-delta converter, the number of signal states up to two was reduced, offer for the realization of the digital to analog converter significant advantages. Variations in the Signal amplitude or a possible DC voltage component in the signal affect the linearity of the analog Output signal not. However, the necessary one is disadvantageous high oversampling factor (ratio of usable bandwidth to Sampling rate of the sigma-delta converter) to which the baseband signal is based must be interpolated so that a specific signal-to- Noise ratio in the usable band can be guaranteed.

Instead of two-stage multi-stage sigma-delta converters used, can theoretically be significantly smaller Oversampling factors are used. Typically are for it many levels of quantization required, all identical have to be high for the quantization noise to be optimized is. As in, for example, "Delta Sigma Data Converters, Theory, Design and Simulation ", 1996 by S. R. Norswothy, R. Schreier and G. Temes, this problem is solved by which is a multitude of two-stage digital-to-analog converters be used. Through a special Scrambling algorithm after the actual sigma-delta converter ensures that the data stream of each individual sigma Delta converter is noise-formed and few in the useful signal band Causes interference (noise shaped element usage). The The stability of the algorithm is not second order ensured. Its effort is because of the one used here Vector quantizer relatively high. Furthermore, the structure of this Scrambling algorithm is not linear and feedback what stands in the way of direct parallelization.

The present invention is therefore based on the object for a sigma-delta converter to find a structure that given a low oversampling factor with high signal-to- Noise ratio (SNR) only a few two-stage sigma-delta Converter requires, the structure of the sigma-delta converter should be parallelizable.

This task is accomplished with a sigma-delta converter Features solved according to claim 1. Configurations and Developments of the invention are the subject of the dependent claims.

According to the invention, each parallel path is designed that the input signal of the sigma-delta modulator of the Parallel path at least around the noise components outside of the useful band filtered difference signal from the digital Output signal of the sigma-delta modulator of the main path and from which according to the transfer function of the sigma Delta modulator of the main path through a spectral filter shaped input signal x (k).

Due to the spectral shaping of the input signal x (k) according to the transfer function of the sigma-delta modulator Main path and the subsequent difference formation with the digital output signal of the sigma-delta modulator essentially the quantization errors of the sigma-delta Main path modulator isolated. By the subsequent Filtering then the noise components outside the Useful band, which is the essential part of the noise power represent, subdued. Through this structure of a sigma-delta The signal components of the main and parallel Paths constructively superimposed while the noise components overlay both paths destructively. This can do that Quantization noise of the sigma-delta converter at least partially compensated. This parallel connection comes without feedback paths.

In a development of the invention, the at least one Parallel path designed such that means for reinforcing the digital signal immediately before the sigma-delta modulator are provided. Are the essential parts of the Suppressed noise power, so the amplitude of the signal can be raised without overdriving the sigma-delta modulator becomes.

In a further development of the invention, at least one parallel Path formed such that means for damping the converted signal according to the mean Digital-to-analog conversion of the modulated signal and before the formation of the Sum signal are provided. The attenuation of the analog signal is based on the previous digital amplification. Noise signal components in the analog output signal of the Digital-to-analog converters of the main path are thus compensated. Instead of an explicit attenuation of the analog signal can alternatively be a digital-to-analog converter with lower Output power can be used.

In a further development of the invention, at least one parallel Path designed such that means for temporal Delay of the input signal x (k) to compensate for There are runtime differences to the main path. Runtime differences can be caused in particular by different Processing times of digital components such as filters, sigma-delta Modulators or the like occur. Through the Delays are the terms in each Cascade levels compensated.

In a further development of the invention, the main path is such trained that after the junction to the parallel path and before the means for digital-to-analog conversion means for Compensation filtering are provided. By means of Compensation filtering in the main path can reduce the runtimes and the frequency responses of the parallel path, which filters, Includes amplifier and sigma-delta converter, compensated become. Through this additional filter, error components can of the parallel path can be compensated.

The sigma-delta converter of the main path is advantageous as a multi-stage sigma-delta converter is formed. In multi-stage sigma-delta converters can use the principle of Passing the quantization noise can be exploited, so that the quantization noise of the individual stages destructively superimposed, which means that the noise component of the entire sigma-delta converter is not directly proportional to the number of stages of the multi-stage sigma-delta converter increases, but less than proportional. Furthermore, it is possible by using multi-stage sigma-delta Transducers different properties in different To combine stages.

Is the multi-stage sigma-delta converter of the main path through the main path and at least one cascade level trained, each cascade level being a parallel path, the quantization noise can be particularly advantageous of the individual cascade levels can be compensated.

In a development of the invention is for n> 1 cascade levels each cascade level i with 2 ≤ i ≤ n, the cascade level i-1 is connected in parallel such that the cascade stage i-1 for the cascade level i takes over the function of the main path, the input signal of the sigma-delta modulator each Cascade level in addition to the main path Time delay adapted input signal x (k) added is, the input signal of the sigma-delta modulator Cascade level i also the noise-filtered signal Cascade level i-1 is added, the digital Output signal for difference formation of the multi-stage sigma Delta modulator the sum signal of the output signals of all Sigma-Delta modulators of the multi-stage Sigma-Delta Modulator is. Due to this structure of a multi-stage Sigma-delta converters compensate for the in-band Noise signal components of all sigma-delta modulators except for the last cascade level. Only that remains in the useful band Quantization noise of the last sigma-delta modulator Cockatoo stage and the constructively superimposed sum signal of all signal components.

The multi-stage sigma-delta modulator advantageously has the Main path sigma-delta modulators with linear phase Frequency responses with absolute frequency response one. Usually can thereby on a spectral noise shaping of the useful signal be dispensed with, as this is the case with linear-phase Frequency responses with absolute frequency response one (i.e. none Amplification or damping) is usually already band-limited.

The multi-stage sigma-delta converter is in further training formed such that a number n> 1 sigma-delta Transducers are cascaded in parallel, the Input signal of the sigma-delta modulator of cascade level n the difference signal from the input signal x (k) and the noise-filtered sum signal standardized to n Output signals of the sigma-delta modulators of the main path and the cascade level i with 1 <i <n-1, which is for Difference formation used digital output signal of the multi-stage sigma-delta modulator of the main path that Sum signal of all output signals of the n Sigma-delta modulators of the multi-stage sigma-delta modulator. Next the possibility of the input signal of the Sigma-delta modulator of cascade level n as such for difference formation a preferred option is that the input signal of the sigma-delta modulator Cascade level n is multiplied by the number n of cascade levels.

The sigma-delta converters are advantageous as 1-bit sigma Delta converter designed, the 1-bit sigma-delta Converter and thus the 1-bit analog-to-digital converter may have unequal output powers. With regard the noise shaping of the generated multi-bit sigma-delta This configuration initially appears as an output signal Disadvantage because the sigma-delta modulators on the Stability limits and dynamic range of a 1-bit sigma-delta Modulators are instructed. Taking into account unequal output powers (mismatch) of the individual 1-bit However, digital-to-analog converters reverse this assessment into an advantage: the in-band noise now includes the noise of the generated Multibit sigma-delta output signal also noise components that the 1-bit data streams spectrally shaped and corresponding to the Output signal power differences of the individual digital-to-analog converters into the in-band noise. You now need with the structure presented has no algorithm which generates several 1-bit data streams from the multibit signal and because of the restriction, a multi-bit signal play for each of these individual data streams only achieved sub-optimal noise shaping. Every single 1 bit Data signal is optimally spectrally shaped and guaranteed at high mismatches, low in-band noise. By the principle of noise suppression described above can now the main disadvantage of the sigma-delta modulator - The reduced in-band noise signal shaping - significantly above through a multi-bit sigma-delta Analog-to-analog converter achievable measure improved become.

In a further development of the invention, the noise signals are Sigma-Delta modulators of the multi-stage Sigma-Delta Modulator uncorrelated. In addition, the Input signals of the sigma-delta modulators of the multi-stage sigma Delta modulator uncorrelated stochastic signals be added up. This allows certain signals in the Interference lines occurring in which the Noise power of the surrounding area concentrated, compensated become. To largely suppress this effect, Sigma delta modulators added "dither" ("dither" is one with the input signal of the sigma-delta converter uncorrelated stochastic signal) that is either on the Input signal of the sigma-delta modulator is added or the Input on the decision of the sigma-delta modulator directly finds. Usually the "dither" reduces that Interference lines at the expense of the achievable signal-to-noise ratio of the modulator and therefore becomes strong in amplitude limited.

With regard to an inexpensive and technically flexible The sigma-delta converter can be manufactured using CMOS technology (Complementary Metal Oxide Silicone).

The sigma-delta converter according to the invention is suitable excellent for use in a radio communication system and there especially in Radio communication receivers.

The invention is described below with the aid of Embodiments explained in more detail.

Here show:

FIG. 1 illustrates the basic principle of a sigma-delta converter of the invention with noise reduction,

Fig. 2 shows a Sigma-Delta converter with Rasch signal suppression with a mehrstufugen sigma-delta converter in the principal path (three cascaded sigma-delta modulators) according to an embodiment of the invention,

Fig. 3 shows a Sigma-Delta converter with noise suppression with sigma-delta modulators with linear-phase filter frequency range according to another embodiment of the invention,

Fig. 4 is a sigma-delta converter with noise suppression according to a further embodiment of the invention, wherein the input signals of the main and parallel paths and uncorrelated stochastic signals are added up.

In Fig. 1 the basic principle of a sigma-delta converter is represented with noise suppression. A first sigma-delta modulator SD1 in the main path generates a digital output signal with a bit width restricted to n bits from a digital input signal x (k). Due to this limited bit width, a quantization error arises which is transformed by the sigma-delta algorithm in accordance with its noise transfer function outside the useful band. Particularly with a low oversampling factor, however, significant noise signal components also fall into the useful band. In order to suppress this, the digital input signal x (k) is spectrally shaped according to the signal transmission function of the first sigma-delta converter SD1 by means of a filter H2. The output signal of the first sigma-delta converter is then subtracted from the filtered input signal, so that the noise signal generated by the quantization error of the sigma-delta modulator SD1 is determined. The noise signal components outside the useful band are damped by a further filter H2 '. Since these contain the essential part of the noise power, the output signal of the filter H2 'can be increased in amplitude VS without the subsequent sigma-delta modulator SD2 being overdriven. The amplitude of the additional noise introduced by the sigma-delta modulator SD2 with the limitation to m-bits is thus lower than the amplified noise signal of the sigma-delta modulator SD1. After the digital-to-analog conversion D / A2, the analog noise signal is attenuated analogously according to its previously digital amplification D and then compensates for the noise signal component in the analog output signal of the digital-to-analog converter D / A1. Instead of an explicit damping, a digital-to-converter with low output power can be used instead.

The basic principle shown in FIG. 1 of passing on the quantization noise to a further sigma-delta modulator can also be used for the construction of multi-stage sigma-delta converters. As an application example, the sigma-delta modulator SD1 from FIG. 1 in FIG. 2 is implemented by three low-level sigma-delta modulators SD1a, SD1b, SD1c. The in-band quantization noise of the sigma-delta modulator SD1a is calculated and added negatively to the digital input signal of the sigma-delta modulator SD1b. The common noise signal of these two sigma-delta modulators is then calculated and then added to the input signal of the sigma-delta modulator SD1c. Delay elements t1, t2, t3, t4, t5 are used to compensate for the running time of the sigma-delta modulators or filters. This procedure can be expanded to any number of sigma-delta modulators and is only limited to three modulators in FIG. 2 as an example.

Add all three output signals to the Sigma-Delta modulators together, so the in-band compensate each other Noise signal components of the first two sigma-delta modulators with the corresponding input signal components of the second and third sigma-delta modulator. It only remains in the useful band the quantization noise of the third Sigma-delta modulator, whereas all three signal components x (k) constructively overlay.

With regard to the noise shaping of the generated multibit This procedure proves to be a sigma-delta output signal initially as a disadvantage; one is with the sigma-delta modulator on the stability limits and the dynamic range for example, a 1-bit sigma-delta modulator.

Taking into account the unequal output power of the single 1-bit digital-to-analog converter (mismatch) however, this assessment is reversed: the in-band noise now contains, in addition to the noise of the generated multibit sigma Delta output signal also noise components that like the 1- bit data streams are spectrally shaped and accordingly the output signal power differences of each Digital-to-analog converters are included in the in-band noise.

You now need according to the invention with the presented Structure no downstream algorithm that from the Multibit signal generates several 1-bit data streams and due to that the restriction, a given multibit signal play back only one for each of these individual data streams sub-optimal noise shaping achieved. Every single 1-bit Data signal is optimally spectrally shaped and guaranteed at high Mismatch a low in-band noise.

Due to the principle of noise signal suppression described above, the main disadvantage of the sigma-delta modulator - the reduced in-band noise signal shaping - can be improved considerably beyond what can be achieved with a previously used multibit sigma-delta D / A converter. as shown in the embodiment of FIG. 2.

The type of transmission of the sigma-delta noise in the D / A modulator illustrated in Fig. 2 is only a special case. For example, instead of the illustrated in Fig. 2 handover of the negated noise of a sigma-delta modulator to the input of next, the negated noise of a sigma-delta modulator can also be divided into several sigma-delta modulators, as shown in FIG. 3. The advantage of this procedure is the reduction of the noise power with the least favorable combination option. If, for example, the noise of the sigam-delta modulator SD1a is referred to as R1a, the noise of the individual sigma-delta modulators from FIG. 2 is in the useful signal band:
Noise ratio from SD1a to D / A1a: R1a
Noise ratio from SD1b to D / A1b: R1b-R1c
Noise ratio from SD1c to D / A1c: R1c-R1b
Noise ratio from SD2 to D / A2: R2-R1c.

Assuming that the individual digital-to-analog converters D / A1a, D / A1b, D / A1c, D / A2 fluctuate in amplitude by the amount 1 +/- d, in the worst case the sign of d positive for D / A1a, negative for D / A1b, positive for D / A1c and again negative for D / A2, so that for the multi-bit sigma-delta modulator with noise compensation, the entire output signal noise

(1 + d) .R1a + (1 - d). (R1b - R1a) + (1 + d). (R1c - R1b) + ( 1 - d). (R1c + R2) = = R2 + 2.d . (R1a - R1b + R1c)

receives. The first term R2 corresponds to the desired noise shaping and is greatly reduced in amplitude in accordance with the selected amplification. Since the noise signals of the individual sigma-delta modulators are independent of one another, their powers add up linearly. With the same noise power of the modulators, the total in-band noise power E {R2.R2} + 12.E {R1a.R1a} is obtained, where E denotes the expected value. This noise power is approx. 6 dB above the noise power of three independently working sigma-delta modulators.

Make alternatives
Noise ratio from SD1a to D / A1a: R1a
Noise ratio of SD1b to D / A1b: R1b-0.5.R1a
Noise ratio from SD1c to D / A1c: R1c-0.5.R1a-R1b
Noise ratio from SD2 to D / A2: R2-R1c
with a total noise power of

E {R2.R2}. (1 + d) + 9.E {R1a.R1a}

and
Noise ratio from SD1a to D / A1a: R1a
Noise ratio from SD1b to D / A1b: R1b
Noise ratio from SD1c to D / A1c: R1c-0.5.R1a-0.5.R1b
Noise ratio from SD2 to D / A2: R2-0.5.R1a-0.5.R1b-R1c
with a total noise power of

E {R2.R2}. (1 + d) + 8.E {R1a.R1a}.

The latter variation is shown in Fig. 3. It is also clarified here that in the case of a linear-phase filter frequency response with absolute frequency response 1 in the pass band, filtering of the useful signal can generally be dispensed with, since this is normally already band-limited. The disadvantage of this version, however, is that the input level of the SD2 increases and so, in order to avoid overdriving the sigma-delta modulator, the gain in noise compensation without mismatch is lower.

The structure of a sigma-delta modulator offers another another advantage. The power of the interfering signal that so far was usually referred to as sigma-delta noise not spectrally shaped and even over the Frequency range distributed. Certain signals occur in the Frequency range interference lines on which the noise power the surrounding area. To this effect largely suppress, sigma-delta modulators SD1a, SD1b, SD1c "Dither" DI1a, DI1b, DI1c added ("Dither" is a stochastic signal) that is either on the Input signal of the sigma-delta modulator is added or the Input on the decision of the sigma-delta modulator directly finds. Usually the "dither" reduces that Interference lines at the expense of the achievable signal-to-noise ratio of the modulator and therefore becomes strong in amplitude limited.

Due to the several coupled modulators of the compensating sigma-delta modulator, the interference of the "dither" can now be mutually compensated for. This is shown in FIG. 4 using the special case from FIG. 3 as an example. Different "dither" signals are added to the three sigma-delta modulators SD1a, SD1b and SD1c for the respective input signal. It is now essential that the sum of all "dither" signals is canceled, ie that no signal components of the "dither" are present in the multibit signal to be generated.

An application example for "dither" is

DI1b (k) = -0.5.DI1a (k), DI1c (k) = 0.

The special filter arrangement compensates for the SD1b Half of the dither DI1c from SD1a, the rest is through SD1c compensated. However, behavior is problematic if the individual digital-to-analog converters are mismatched. in the worst case (deviation + d, -d, -d) is the Interference of the performance of the "dither" (16/9) higher than that of three uncorrelated "dither" signals.

• 1. Es werden drei voneinander statistisch unabhängige Zufallssignale generiert DI1a(k), DI1b(k), DI1c(k).
• 2. Die einzelnen Signale werden derart aufgeteilt, dass jeder Sigma-Delta-Modulator als "Dither" die Summe von jeweils eines Zufallssignals positiven und zwei negativen, mit dem Faktor 0.5 multiplizierten Zufallszahlen erhält.

The generation of such "dither" signals can be achieved as follows:

• 1. Three statistically independent random signals are generated DI1a (k), DI1b (k), DI1c (k).
• 2. The individual signals are divided in such a way that each sigma-delta modulator receives as "dither" the sum of one random signal positive and two negative random numbers multiplied by a factor of 0.5.

This means due to the special structure shown in FIG. 4

DI1a (k) = z1 (k) - 0.5.z2 (k) - 0.5.z3 (k)

DI1b (k) = -0.5.z1 (k) + z2 (k) - 0.5.z3 (k)

DI1c (k) = 0.

Claims (17)

1. sigma-delta converter for converting a digital input signal x (k) into an analog output signal y (t) with noise suppression within a useful band,
the sigma-delta converter comprising a main path,
the main path comprising at least one sigma-delta modulator (SD1) characterized by a transfer function and a digital-to-analog converter (D / A1),
where at least one parallel path is connected in parallel to the main path,
each parallel path comprising at least one sigma-delta modulator (SD2) and one digital-to-analog converter (D / A2),
wherein the analog output signal y (t) of the sigma-delta converter is the sum signal of the analog output signals of the main and each parallel path,
characterized by
that each parallel path is designed such that the input signal of the sigma-delta modulator (SD2) of the parallel path contains the differential signal, filtered at least by the noise components outside the useful band, from the digital output signal of the sigma-delta modulator (SD1) of the main -Path and from which according to the transfer function of the sigma-delta modulator (SD1) of the main path through a filter (H2) spectrally shaped input signal x (k). 2. Sigma-delta converter according to claim 1, characterized in that
that at least one parallel path is designed such
that means for amplifying (VS) the difference signal are provided immediately before the sigma-delta modulator (SD2). 3. Sigma-delta converter according to claim 1 or 2, characterized in that
that at least one parallel path is designed such
that means for attenuation (D) of the converted signal are provided after the means for digital-to-analog conversion (SD2) of the modulated signal and before the formation of the sum signal. 4. Sigma-delta converter according to one of claims 1 to 3, characterized in
that at least one parallel path is designed such
that means for the time delay (t1, t3, t5) of the input signal x (k) are present to compensate for differences in transit time to the main path. 5. Sigma-delta converter according to one of claims 1 to 4, characterized, that the main path is designed such that after the Branch to the parallel path and in front of the medium to Digital-to-analog conversion means for Compensation filtering (H3 ') are provided. 6. Sigma-delta converter according to one of claims 1 to 5, characterized in that the sigma-delta converter of the main path is designed as a multi-stage sigma-delta converter (SD _M ). 7. Sigma-delta converter according to claim 6, characterized in that the multi-stage sigma-delta converter of the main path (SD _M ) is formed by the main path and at least one cascade level, each cascade level being a parallel path , 8. Sigma-delta converter according to claim 7, characterized in that for n> 1 cascade stages, each cascade stage i with 2 ≤ i £ n, the cascade stage i-1 is connected in parallel,
so that cascade level i-1 takes on the function of the main path for cascade level i,
the input signal of the sigma-delta modulator (SD1b, SD1c) of each cascade stage is additionally added with an input signal x (k) adapted to the main path by time delay, (t2, t4),
the noise-filtered (H1b ', H1c') signal of the cascade level i-1 is additionally added to the input signal of the sigma-delta modulator of the cascade level i,
wherein the digital output signal for difference formation of the multi-stage sigma-delta modulator is the sum signal of the output signals of all sigma-delta modulators (SD1a, SD1b, SD1c) of the multi-stage sigma-delta modulator. 9. Sigma-delta converter according to one of claims 7 or 8, characterized in that
that the multi-stage sigma-delta converter of the main path (SD _M ) comprises sigma-delta modulators (SD1; SD1a, SD1b, SD1c) with linear-phase frequency responses with absolute frequency response one. 10. Sigma-delta converter according to claim 9, characterized in that
that the multi-stage sigma-delta converter (SD _M ) is designed such that a number n> 1 sigma-delta converter (SD1a, SD1b, SD1c) are connected in parallel in a cascade-like manner,
wherein the input signal of the sigma-delta modulator (SD1c) of the cascade stage n is the difference signal from the input signal x (k) and the noise-filtered (H1c ') and with normalized sum signal of the output signals of the sigma-delta modulators of the main path (SD1a) and the cascade level i (SD1b) with 1 <i <n-1,
wherein the digital output signal of the multistage sigma-delta modulator of the main path used for difference formation is the sum signal of all output signals of the n sigma-delta modulators (SD1a, SD1b, SD1c) of the multistage sigma-delta modulator (SD _M ). 11. Sigma-delta converter according to claim 10, characterized, that the input signal of the sigma-delta modulator (SD1c) the cascade level n with the number n of the cascade levels is multiplied. 12. Sigma-delta converter according to one of claims 1 to 11, characterized, that the sigma-delta converter as a 1-bit sigma-delta converter is trained. 13. Sigma-delta converter according to claim 12, characterized, that the 1-bit sigma-delta converter and thus the 1-bit Analog-to-digital converter (D / A1a, D / A1b, D / A1c, D / A2) have unequal output powers. 14. Sigma-delta converter according to one of claims 1 to 13, characterized, the noise signals of the sigma-delta modulators of the multi-stage sigma-delta modulator (SD1a, SD1b, SD1c) are uncorrelated. 15. Sigma-delta converter according to one of claims 1 to 14, characterized, that the input signals of the sigma-delta modulators (SD1a, SD1b, SD1c) of the multi-stage sigma-delta modulator uncorrelated stochastic signals (DI1a (k), DI1b (k), DI1c (k)) can be added. 16. Sigma-delta converter according to one of claims 1 to 15, characterized, that the sigma-delta converter is manufactured using CMOS technology is. 17. Use of a sigma-delta converter according to one of the preceding claims in a radio communication system, especially in radio communication receiving devices.