DE10124180A1 - Method and device for error correction of data blocks - Google Patents

Abstract

The invention relates to a method for the error correction of a data signal transmitted by means of a channel 6-6'), comprising data blocks with provided error check information (1), whereby the data signal is firstly decoded by computation with softbit information. In a subsequent step the error check information is evaluated with reference to the data block. When a single bit error in a message bit occurs on evaluation of the error check information, a correction of the single bit error (13) will only be carried out when a condition, dependent on the softbit information (SB) is met.

Description

The invention relates to a method and an apparatus for Error correction of a data transmitted over a channel gnals consisting of data blocks with assigned errors check information.

A general objective when transferring data across there is a channel, in particular a mobile radio channel in, the highest possible data rate if possible few transmission errors. Übertragungsfeh ler can by both in the transmitter and in the receiver electronics used as well as distortions the transmission of the signal over the radio channel become.

The data bits in the transmitter run through the type of data th adapted so-called logical channel, which usual channel coding (is often also called Error protection coding), a nesting, a Structuring the encoded and nested data in Frame, as well as by the modulation method used is true. The transmission of data over the radio link is on the other hand be through the so-called physical channel wrote, which is time-variant in the case of the mobile radio channel and is subject to multipath propagation.

Various measures are known to make a logical one Design the channel for a transmission with as few errors as possible. A particularly effective measure for error reduction exists in converting the signal to be transmitted to a convolutional coding undergo. The receiver-side decoding convolutional coding ter data signals takes place with a Viterbi decoder, which the coded bits de provided by the equalizer  coded. A disadvantage of the convolutional coding is that in added a lot of redundancy to the transmitted data stream becomes. Another error protection measure that ei ner blockwise data transmission is used in providing error checking information to the message bits with which the recipient verifies the accuracy of the detec checked data. This measure is in the Re gel is less effective than convolutional coding, but it has compared to this the advantage that mostly less redundancy than is required for convolutional coding.

It is also already known that these two measures (Fal coding and adding error checking information) combine.

Furthermore, it is already known that the error checking information interpret that with her not only the correctness of the emp caught data bits can be checked, but that with you can also correct a bit error. In this case results in a suitable receiver calculation on the Ba sis the error checking information clearly which of the transmitted data bit is incorrect. This bit error is then resolved by Inversion of bit identified as wrong fixed. The Eliminating all single bit errors means in many cases one noticeable improvement in sensitivity. In addition, egg ne high data rate possible because incorrectly transmitted data blocks can be recognized and "repaired" so that a retransmission of these data blocks can be avoided can.

As was recognized in the context of the present invention, however, there is a problem in single bit error correction exist that through them the probability of the up occur from undetected errors (i.e. data blocks, which pass the error check, although they are bit errors in Have message bits) is significantly increased.

The invention has for its object a method for Single bit error correction of one transmitted over a channel Specify signals based on error checking information, which the Probability for the occurrence of undetected errors keeps low. The invention further aims to provide a front Direction for single bit error correction with this property to accomplish.

The task is defined by the features of claims 1 and 7 solved.

First, it is explained qualitatively why the truth probability of the occurrence of undetected errors of a Message bits by making a single bit error correction increased. A quantitative estimate for a be correct coding method (CS-4) follows later.

The occurrence of undetected bit errors in the message part of a data block can have two causes: With a very low probability P _u , it can happen that a transmitted data block has one or more bit errors in message bits, but nevertheless in the receiver-side error check using the data block associated error check information is identified as error-free. A further contribution to the probability of the occurrence of undetected errors in message bits is made by the single bit error correction itself. The reason for this is that the algorithm used for the detection of a single bit error is never ideal, ie there is a certain probability of an incorrect single bit error correction. Since the block with the incorrectly corrected single-bit error is regarded as a "repaired" and thus error-free block, an incorrect single-bit error correction causes an undetected error.

If P _wc (wc: wrong correction) denotes the probability of performing an incorrect single-bit error correction of a message bit, provided that a single bit error is always corrected, the overall probability P ' _u for the occurrence of a is obtained undetected error the value P ' _u = P _u + P _wc .

In the context of the invention, it has now been recognized that the contribution P _wc caused by the implementation of an incorrect single-bit error correction can be significantly larger than the contribution P _u caused by the reception-side "overlooking" of a single-bit error. In other words, if the single-bit error correction known as such in the prior art is carried out, the probability of the occurrence of undetected errors in the message part of the data block can increase drastically.

According to the method according to the invention, a soft bit information mation to the bits of a data block. Usually this is done as part of the equalization of the data signal, ge if necessary also with a channel decoding. In a next The first step becomes the error check information for the data block evaluated. If the error checker formation indicates that a single bit error of a message bits is present, the correction of this single bit error is only then carried out when a condition is met which depending on the assigned to the considered data block Is soft bit information.

In other words, if a single bit error is found to a message bit based on the soft bit information the bits of this data block decided whether a single bit Error correction should be done or not. The In contrast to conventional processes, de always one bit when a single bit error is detected error correction is carried out, according to the invention Execution of the single bit error correction depending on it makes a certain condition (which depends on the  considered soft bit information is) is fulfilled or not.

A first advantageous embodiment of the invention is characterized in that the correction of the single bit error is only carried out if a first size, which allows an assessment of whether more than one message bit of the data block is incorrect, a first threshold condition fulfilled. The condition to be examined exists here al so that the quality of the received data block represents it then checks how many message bits are high Have error probability. This is taken into account that a single bit error correction on a data block with a comparatively high probability of Occurrence of several bit errors is not useful, since there is a comparatively high risk of this approach, ei to produce a data block with an undetected error.

Another advantageous embodiment of the inventions Process according to the invention is characterized in that the Only then perform the correction of the single bit error is taken when a second size, which is a rating allows whether the message bit to be corrected is wrong, meets a second threshold condition. At this level The quality of the message bit, which for single bit error correction to be inverted, checked. Only if its probability of error is sufficient is sufficiently large, the single bit error correction is also done actually performed. In this way, too Probability of generating an undetected error reduced within the scope of the single bit error correction.

In a particularly preferred embodiment variant of the Er are the two measures explained above combined. This way, the likelihood of the occurrence of undetected errors by several orders of magnitude can be reduced.  

The method according to the invention is particularly advantageous for error correction of data blocks in GPRS (General Packet Radio Service) mobile radio systems are used. In GPRS mobile Radio systems become data packets via common packet channels transferred, among other things, a particular advantage in it there is that unlike the GSM (Global System for Mobile Telecommunications) system maintains permanent connections can be obtained.

With GPRS, the maximum data rate is determined by the coding rule CS-4 (Coding Scheme-4) achieved. Because at CS-4 at 428 the ins a total of 431 message bits of a data block on use convolutional coding is omitted, high CS-4 occur Bit error rates. The method according to the invention enables with CS-4 the execution of a single bit error correction rend conventional single-bit error correction methods with CS-4 cannot be used because of their high contribution PWM impermissibly high probabilities of occurrence of undetected bit errors.

The invention is illustrated below with the aid of an embodiment game described with reference to the drawing; in this shows:

Figure 1 is a schematic representation of the signal processing in a mobile radio transmitter and a mobile radio receiver in the form of a block diagram.

Figure 2 is a schematic representation of the structure of a block of transmitted data with error checking information. and

Fig. 3 is a diagram illustrating possible Fehleru pattern of data blocks grouped by the recipient on the basis of the error information calculated error imprints.

Fig. 1 shows the structure of a mobile radio system is a mobile radio transmitter and a mobile receiver S E.

The mobile radio transmitter S comprises a calculation unit 1 for error checking information, an optional channel encoder 2 , an interleaver 3 , a burst generator 4 , a modulator 5 and a transmission antenna 6 .

The computing unit 1 for error checking information is supplied with a digital, generally source-coded input signal. The bits of the input signal are called message bits. The calculation unit 1 for error checking information calculates error checking information from the sequence of message bits. More specifically, error checking information is calculated for a sequence of message bits, which consists of a predetermined number of bits, which also represents a predetermined sequence of bits, hereinafter referred to as error checking bits or parity bits. The calculated sequence of error check bits is appended to the sequence of message bits. The data structure constructed from the two sequences forms a data block.

In the example shown, the calculation unit 1 for error checking information has a channel encoder 2 connected in parallel. The channel encoder 2 carries out convolutional coding either with respect to all or only certain, particularly sensitive message bits. For example, in the coding method CS-4, only three of the 431 message bits of a message bit sequence are convolutionally coded, while the remaining 428 message bits are not subjected to convolutional coding.

The data blocks compiled in this way are fed to the interleaver 3 . The interleaver 3 interleaves. The purpose of the interleaving is to reduce the influence of errors occurring in groups (so-called bundle errors), which are typical for mobile radio transmission.

The data stream pretreated in this way is fed to the burst generator 4 . This embeds the data blocks provided with error checking information in a frame structure which is characteristic of the respective mobile radio system. For example, if a TDMA (Time Division Multiple Access) component is used, the bursts of a given duration are only z. B. forwarded once per frame duration to the modula tor 5 and radiated via the transmitting antenna 6 .

Modulation is the preferred method of modulation a higher order (for EDGE e.g. 8PSK (PSK: phase shift Keying) instead of GMSK (Gaussian Minimum Shift Keying)) puts.

The mobile radio receiver E comprises a receiving antenna 6 ', a receiving amplifier and receiving filter 7 , an analog-to-digital converter 8 , an equalizer 9 , a deinterleaver 10 , a unit for evaluating error checking information 11 and a unit for error correction 13 . The units 11, 13 for the evaluation of Fahlerprüfinformation and Correction rection a convolutional decoder can be optionally parallel ge 12 on.

The signal emitted by means of the transmission antenna 6 is received by the reception antenna 6 'and fed to the reception amplifier and reception filter 7 . The received signal is digitized in the signal path behind it by means of the analog-to-digital converter 8 .

The digitized signal is fed to the equalizer 9 . This can be implemented in a known manner as an adaptive coherent equalizer and can comprise a channel estimator (not shown) for this purpose.

The equalizer 9 outputs reliability information in the form of so-called soft bits for each detected data symbol. The reliability information, which is also referred to as soft bit information, specifies a value for each output (“different”) bit that is representative of the probability of a bit error. The soft bits usually represent an integer value which is large if the probability that the corresponding bit is incorrect is low.

By means of the deinterleaver 10 , the two bit streams (decided bits and associated soft bit information) are brought back into the correct order, ie the permutation of the bits made when the interleaver 3 is interleaved is reversed. Behind the deinterleaver 10 is therefore a stream EB of decided bits B _i-1 , B _i , B _{i + 1} , which is a reconstruction of the bit stream provided with the error checking information in front of the interleaver 3 , and there is a soft bit word S _{i -1} , S _i , S _{i + 1} constructed bit stream SB with the reliability information associated with the bits B _i-1 , B _i , B _{i + 1} .

The stream of decided bits EB and the soft bit stream SB is supplied to the unit 11 for evaluating error checking information. The unit 11 for evaluating error checking information uses the error checking information received for a block to determine whether a block has been transmitted without errors. If an error-free transmission is found, no further measures are necessary. If it is determined that the block was transmitted with two or more errors, it is impossible to correct the error, since the error check information does not permit the identification of the incorrectly transmitted bits in the case of two or more errors. However, if it is determined during the evaluation of the error check information that the data block received contains exactly one bit error, the error check information enables the identification of this presumably incorrect bit.

The evaluation of the error check information when using a cyclic code (n, k) is explained below. Fig. 2 shows the structure of a data block. With n the total number of bits of the data block is designated, k indicates the number of message bits. The data block contains nk error information bits (parity bits). Since this, as he already mentioned, is calculated from the k message bits on the transmitter side, there are 2 ^k permissible data blocks and 2 ⁿ possible data blocks including all conceivable bit errors.

The evaluation of the error information (parity bits) in the unit 11 is known in the prior art and can, for. B. can be carried out as follows:
The n contiguous bits are interpreted as coefficients of a polynomial which is divided by another polynomial stored in the receiver E. The residual polynomial created by the polynomial division provides information about whether the bits received are correct. If exactly one bit of the transmitted block is wrong, the residual polynomial clearly shows which bit is wrong. This identifies the (presumably) wrong bit.

Assume that the suspected wrong bit is a message bit. In this case it can be assumed that the received message is incorrect. This presumably incorrect message bit is now either inverted or not inverted in unit 13 according to the invention. According to the invention, whether an inversion is carried out or not is decided on the basis of a check of the soft bit information. The check can be based on various conditions.

A first possibility is to only carry out the inversion of the suspected faulty message bit if a size that is representative of the probability that more than one message bit of the data block is incorrect is not too large. For this purpose, the number of message bits B _0,. , ., B _k-1 , their associated soft bits S ₀ ,. , ., S _k-1 speak for a particularly high probability of error, are counted. The criterion for a particularly high probability of error is a threshold S _HFW1 . The number of message bits with a soft bit value less than the threshold S _HFW1 is _denoted by K _HFW .

A threshold K _{SB is also} defined, which is an integer. A block is considered a "good block" if K _HFW <K _SB , ie if the number of error-critical message bits is less than the predefined threshold K _SB . This condition is referred to as Condition 1 below.

Another possibility is to evaluate the probability of error of the message bit which was identified as presumably incorrect in the error information check. For this purpose, a second threshold S _{HFW2 is} defined, which does not have to be identical to S _HFW1 . A check is subsequently carried out to determine whether the soft bit value S _i <S _HFW2 assigned to the allegedly incorrect message bit, ie whether the bit identified as presumably incorrect actually has a high probability of error according to the soft bit information. This condition is referred to as Condition 2 below.

Similarly, more or others can be on the Defi conditions based softbit information provided be checked and checked. For example, the for first condition, the size calculated directly from the Softbit information calculated probability for that Presence of two or more bit errors in the message be part of the data block.  

In a first embodiment of the invention exactly as the message bit identified as presumably incorrect then and only corrected if condition 1 is fulfilled. According to a second embodiment of the invention the message bit identified as allegedly incorrect inverted if and only if condition 2 is fulfilled is. A particularly preferred third embodiment is characterized by the fact that the allegedly incorrect Message bit is inverted if and only if both condition 1 and condition 2 are met.

It is pointed out that the transmitter / receiver structure shown in FIG. 1 represents a special example which serves to explain the invention, but which can be modified in many ways. For example, the channel encoder 2 can also be arranged in the transmission signal path behind the calculation unit 1 for the error checking information, and consequently the channel decoder 12 can be located in the reception signal path in front of the units 11 , 13 . In this case, the soft bit information can also be output by the channel decoder 12 .

Based on an estimate for the coding method CS-4 now explains why in this coding method an in Conventionally, mandatory single bit error correction rectification is not possible and to what extent the invention procedures to reduce undetected errors in Data blocks is accessible.

For the coding method CS-4, n = 447 and k = 431 apply sequence contains a data block n - k = 16 parity bits.

Fig. 3 shows a schematic representation of all possible 2 ⁿ data blocks grouped by different receiver side calculated error information. Each calculated error bit information is assigned 2 ^k data blocks, which are also referred to below as error patterns. A class is formed by those 2 ^k error patterns which give the same error bit information. In the table shown in FIG. 3, the classes are assigned to the table rows and the error patterns to the table columns. The error pattern (data block) with the lowest weight (ie the number of bits with value 1) is entered in the first column. This is referred to as the class leadership pattern in each class. A cyclic code is usually formed in such a way that the class management patterns always have the lowest possible weight.

According to the figure, the 2 ⁿ error patterns can be classified as follows:

• 1. Class 0 with the class management pattern, which consists solely of zeros, contains the 2 ^k permissible error pattern, ie those data blocks which are found to be correct in accordance with error checking information.
• 2. The n subclasses 1 to n contain those error patterns which contain exactly one faulty bit. A distinction is made here:
  • 1. 2.1: Subclasses 1 to k contain those error patterns in which the single bit error is a message bit.
  • 2. 2.2: The subclasses k + 1 to n contain those error patterns in which the single bit error is a parity bit.
• 3. The remaining 2 ^nk - (n + 1) subclasses contain those error patterns with more than two bit errors. Their class leadership pattern has a weight <2.

As already explained, consider the present invention the correction of single bit errors in case 2.1.  

A binary symmetrical channel (BSC) with a bit inversion error probability p is considered. The probability P _w for a specific error pattern of the weight w is then

P _w = p ^w (1 - p) _nw (w = 0, 1, 2, _... ) (1)

The number of error patterns of weight w, which relate to the k message bits, is

Assuming that all of these error patterns are equally distributed over the 2 ^nk classes, the average number of error patterns of weight w in each class is:

Now the different probabilities for the occurrence of undetected errors can be calculated as follows:
In case 1 (ie for class 0), the probability is that a received data block, which is considered to be correct, has undetected message bit errors

In case 2 (ie for classes 1 to k), the probability that exactly one message bit is faulty is for a class

P _a = P ₁ (5)

The probability of having more than one message bit error in this case is then

If an error correction is always carried out upon detection of a message bit error, the probability is that an incorrect error correction will be carried out

An undetected error of a message bit occurs when either an incorrect message bit is not recognized or when an incorrect error correction is carried out. This gives the overall probability of an undetected message bit error occurring

P ' _u = P _u + P _wc (8)

For CS-4 the following values are obtained for p = 103 and p = 102:

p = 10 ^-3 : P _u ≈ 4.10 ^-7 , P ' _u ≈ P _wc = 6.47.10 ^-4 (9)

p = 10 ^-2 : P _u ≈ 10 ^-5 , P ' _u ≈ P _wc = 0.088 (10)

In other words, it can be seen that at p = 10 ^-3 one of 1546 error corrections and at p = 10 ^-2 one of 11 error corrections is incorrect (as already mentioned, this result applies to the case that when a single bit error is detected, it is always corrected is made). Thus P _{'u is} three to four orders of magnitude larger than P _u . The influence of incorrect corrections on the occurrence of undetected errors is therefore significantly greater than the influence of errors that exist a priori and are not recognized as such. The increase in the probability of the occurrence of undetected errors by approximately three orders of magnitude is the reason why a correction of single-bit errors which is imperative according to the prior art is not acceptable with CS-4.

Within the scope of the invention, simulations for CS-4 with the values S _HFW1 = S _HFW2 = 4 and K _SB = 16 were carried out using a method according to the third exemplary embodiment of the invention. In all simulations with up to 10 ⁵ blocks, no undetected errors occurred. It follows from this that the probability of the occurrence of undetected errors in this method is several orders of magnitude smaller than in the case of a mandatory single-bit error correction without a soft-bit check.

Claims (12)

1. A method for error correction of a data signal transmitted over a channel consisting of data blocks with assigned error checking information, with the steps:

• Computing soft bit information on the message bits of a data block;
• - Evaluation of the error check information regarding the data block;
• - If it is found in the evaluation of the error check information that a single bit error of a message bit is present, carry out the correction of the single bit error only if a condition which is dependent on the soft bit information associated with the data block being considered is fulfilled.

2. The method according to claim 1, characterized by the step:

• - Carrying out the correction of the single bit error, provided that a first variable which allows an evaluation of whether more than one message bit of the data block is incorrect fulfills a first threshold value condition.

3. The method according to claim 1, characterized by the step:

• - Performing the correction of the single bit error, provided that a second variable, which allows an assessment of whether the message bit to be corrected is incorrect, meets a second threshold value condition.

4. The method according to claim 1, characterized by the step:

• Performing the correction of the single bit error,

if a first variable, which allows an assessment of whether more than one message bit of the data block is incorrect, fulfills a first threshold value condition, and
if a second variable, which allows an evaluation of whether the message bit to be corrected is incorrect, fulfills a second threshold value condition. 5. The method according to any one of the preceding claims, characterized, that the method for error correction of data blocks in GPRS mobile radio systems is used. 6. The method according to claim 5, characterized, that the method for error correction of data blocks is used, which according to the coding regulation CS-4 protection coding. 7. Device for error correction of a data signal transmitted over a channel consisting of data blocks with assigned error check information, with

• a means ( 9 ) for calculating soft bit information on the bits of a data block,
• - A means ( 11 ) for evaluating the error checking information regarding the data block, and
• - A means ( 13 ) for error correction, which, if it emerges from the evaluation of the error checking information that a single bit error of a message bit is present, is designed to carry out error correction only if a condition which depends on the soft bit assigned to the data block under consideration -Information is, is fulfilled.

8. The device according to claim 7, characterized by a means ( 13 ) for error correction, which is designed to carry out a correction of the single bit error, provided that a first variable, which allows an assessment of whether more than one message bit of the data block is incorrect, a first threshold value condition Fulfills. 9. The device according to claim 7, characterized by a means ( 13 ) for error correction, which is designed to carry out a correction of the single bit error, provided that a second variable, which allows an assessment of whether the message bit to be corrected, meets a second threshold value condition. 10. The device according to claim 7, characterized by
a means ( 13 ) for error correction, which is designed to carry out a correction of the single bit error, if
a first variable, which allows an assessment of whether more than one message bit of the data block is incorrect, fulfills a first threshold value condition, and
a second variable, which allows an assessment of whether the message bit to be corrected is incorrect, fulfills a second threshold value condition. 11. The device according to one of claims 7 to 10, characterized, that the device for error correction of data blocks is designed in GPRS mobile radio systems. 12. The device according to one of claims 7 to 11, characterized, that the device for error correction of data blocks is designed, which according to the coding regulation CS-4 protection coding.