DE10109338A1 - Radio transmission of bit sequence using UMTS third generation mode, groups bits into b-bit data symbols which are encoded systematically, with added redundancy - Google Patents

Abstract

At the transmitter, the bit sequence to be sent is grouped into b-bit data symbols (di). The data symbols (di) are encoded systematically, producing a code word with at most 2b-1 data symbols (di). Each data symbol is associated with one or more redundant symbols (Rij) in the long b-bit.

Description

1. State of the art

The current version designated as Release 99 (as of 06/2000) The UMTS standard has two radio transmission technologies on the subject: the FDD mode and the 3.84 Mcps TDD mode. For the next version of the UMTS standard, referred to as Re lease 2000, the 1.28 Mcps TDD mode is currently the third Radio transmission technology specified. The 1.28 Mcps TDD Fashion is the Chinese mobile radio system TD- SCDMA, which is the same as the 3.84 Mcps TDD mode of the TDMA and the CDMA combined. In 1.28 Mcps TDD mode he the data transfer between uplink and downlink follows on egg ner frequency per time division.

In 1.28 Mcps TDD mode, the data is transmitted within a time slot in a fixed structure, the so-called bursts, via the mobile radio channel. Fig. 1 shows the burst structure of a normal time slot. The burst consists of two data blocks, one for channel estimation, the midamble part and a protection time, the so-called Guard Period (GP). The burst comprises a total of 864 chips, the two data blocks each containing 352 chips, the midamble part 144 chips and the GP 16 chips. At a chip frequency of 1.28 Mcps (corresponding to a chip duration of T _c = 781.25 ns) the burst has a length of 675 µs. Depending on the spread factor selected, different amounts of data can be transmitted per burst.

The data blocks to be transferred point next to the actual ones Chen user data also so-called TFCI bits, which are very important  Contain information regarding the composition of the user data As a rule, the data (user data and TFCI) are stored in the Transmitter previously coded to even in the radio transmission Bit errors occurring in the receiver with the help of a de be able to recognize and correct the coding process. Because of The special importance of the TFCI bits comes at Enco This type of data is particularly safe for error protection drive to use because of an incorrect reception of these bits u. U. lead to an incorrect reconstruction of the user data would.

There are currently two digital processes in 1.28 Mcps TDD mode to modulate the normal time in the data blocks slot included data defined: QPSK for data rates up to 384 kbps and 8PSK for a data rate of 2 Mbps. With Modu lation here is the change in the high-frequency carrier gnals depending on the data to be transmitted. With QPSK, 2 coded data bits each become one data symbol summarized. These then modulate the carrier signal with the phase 0 °, 90 °, 180 ° or 270 °. Form at the 8PSK 3 coded data bits each a data symbol, which then the carrier signal with the phase 22.5 °, 67.5 °, 112.5 °, 157.5 °, 202.5 °, 247.5 °, 292.5 ° or 337.5 ° modulated.

The channel coding of the TFCI bits is already specified in the case of QPSK modulation in 1.28 Mcps TDD mode, and is still open in the case of 8PSK modulation technology. When using the 8PSK modulation technology, the methods according to Sam for channel coding of the TFCI bits are currently implemented. Depending on the number of TFCI bits, different Reed-Muller Codes (RM) are used. The so-called "(64,10) sub-code of the second order Reed-Muller code" is used for TFCI with a length of 6-10 bits, followed by "puncturing" (deletion) of 16 bits. After coding, TFCI code words with a length of 48 bits are obtained. This coding scheme is shown in FIG. 2.

For TFCI with a length of 3-5 bits, the so-called "(32.5) bi-orthogonal (or first order Reed-Muller) code" is used, followed by "puncturing" (deletion) of 8 bits, so that the TFCI Code words have a length of 24 bits (see FIG. 3).

Reed-Muller codes are capable of randomly distributed ones Correct any errors in the data symbols. With the over However, the data is not transmitted via the mobile radio channel only disturbed in the form of individual errors. Rather kick very often also so-called bundle or symbol errors, their correction problems using Reed-Muller Codes.

2. Object and advantages of the invention

The aim of the invention is to provide a method for Submit a bit pattern subject to interference NEN radio channel, especially mobile radio channel, with which so probably single errors as well as bundle or symbol errors recognized and corrected. A procedure with the in Features specified claim 1 has this own shaft. It can be used especially for channel coding and transmission TFCI bits in mobile communication systems of the 3rd Generation, for example the UMTS 1.28 Mcps TDD mode be set. The dependent claims relate to partial further developments and refinements of the method according to claim 1.

Compared to the RM codes previously used for channel coding, the method based on a b-adjacent code according to the invention has the following advantages, among others:

• - Easier to implement in hardware and software.
• - Better error correctability.  
• - Better error detection.
• - Faster and easier decodability.

This is achieved through

• - The special selection and construction of the b-adjacent Codes for the encoding of user data (TFCI), the b-bit are grouped wisely and are modulated b-bit wise,
• - a special grouping of the encoded data bits in multiple code with different capabilities Sub-frames and
• - a special decoding protocol for error correction.

3. Drawings

The invention is explained below with reference to drawings tert. Show it:

. Figure 1 shows the burst structure of the normal time slot in UMTS TDD 1.28 Mcps mode;

Fig. 2, the previous coding of the TFCI bits 6-10 (8PSK);

Fig. 3, the previous coding of the TFCI bits 3-5 (8PSK);

Fig. 4 codeword the structure of a yawing means of a 1-Symbolfehlerkorri b-Adjacent code generated;

Fig. 5 embodiment of a Encodierers for a multiple-3 Adjacent code,

Fig. 6 embodiment of a decoder for a simple 3-adjacent code;

Fig. 7 is the scheme of the 24-bit coding of TFCI data of length 3 to 5 bits;

Fig. 8 shows the decoding algorithm for a codeword length of 24 bits;

Fig. 9 is the scheme of the 48-bit coding of TFCI data length of 6 to 10 bits;

FIG. 10 is the decoding algorithm for a codeword length of 48 bits;

FIG. 11 is channel-optimized 3-Adjacent code C1 / C2 for a tensymbol Since or two data symbols;

FIG. 12 is the generator matrix for the code P1 C1 (encoding of a data symbol);

FIG. 13 is the generator matrix for the code P2 C2 (encoding two data symbols);

Fig. 14 channel-optimized encoding of a stationary be from 3-5 bit TFCI data block (b = 3),

FIG. 15 is channel-optimized encoding of a bit stationary be from 6-10 TFCI data block (b = 3);

Fig. 16 assignment and generation of the redundancy symbols to or from the data symbols of a TFCI data block of length 3-5 bits;

Fig. 17 assignment and generation of the redundancy symbols to or from the data symbols of a TFCI data of the block length 6-10 bits;

Fig. 18 embodiment of a Encodieres for the channel-optimized 3-Adjacent code;

Fig. 19 embodiment of a decoder for the channel-optimized 3-adjacent code;

Fig. 20 embodiment of a device for generating a syndrome from a data symbol and two redundancy symbols;

Fig. 21 embodiment of a device for generating a syndrome of two data symbols and two redundancy symbols;

FIG. 22 is a first error syndrome allocation table;

Figure 23 shows a second syndrome error mapping table.

4. Description of the invention using several embodiments games

The method according to the invention makes use of the special properties of the b-adjacent codes, in which the to be transmitted Bits combined in groups of length b-bit (symbols) and are encoded symbol by symbol [1, 2]. This makes it possible the modulation / demodulation in the channel coding considered or the channel coding and the selected mod to coordinate the type of lations. With the QPSK or 8PSK Modulation, as already mentioned at the beginning, is about Data bits in groups of 2 (QPSK) or 3 bits (8PSK) summarized and abge in the corresponding data symbols forms. This type of coding that takes modulation into account tion is particularly effective when used in mobile radio systems are advantageous because b-adjacent codes allow data symbols of length b-bit, regardless of the number and type correct the bit error in the individual symbols. The The method proposed here can be used in any mobile radio system are used in which the transmission of the data b- happens bit by bit. Below is the use of the b-Adja cent coding method for the value b = 3 and a 8PSK modulation of the high-frequency carrier signal in advance puts. However, this limits the corresponding application for other b-values are not.

The code word shown in FIG. 4 was generated by means of a 1-symbol error-correcting b-adjacent code. It consists of a maximum of N = (2 ^b - 1) data symbols and two redundancy symbols. In contrast to a Reed-Muller code, this code is systematic, ie the data bits appear unchanged in the code word. With the 1-symbol error-correcting 3-Adja cent code, the code word thus comprises a maximum of 7 data symbols and two redundancy symbols R1 and R2, both the data and the redundancy symbols each having a length of 3 bits. This systematic code is able to recognize and correct a faulty symbol that occurs anywhere in the code word.

FIG. 5 shows a possible hardware architecture for the encoder of a 1-symbol error-correcting 3-adjacent code (cf. FIG. 3 from [1]). With the aid of the encoder consisting of four adders, three shift registers with the word width 1-bit and a feedback shift register with the word width 3-bit, the two 3-bit long redundancy symbols R1 and R2 are converted from the data symbols d0 at the input of the encoder , d1, d2,. , , generated with d0: = (d0 ₁ , d0 ₂ , d0 ₃ ) etc. The primary polynomial for R2 is the primary polynomial g (x): = 1 + x + x ³ . The encoder contains only the hardware components already mentioned, whose function and interaction are already known from [1]. The encoder can be clocked at a very high speed. The schematic structure of the assigned decoder (see also Fig. 3 from [1]). FIG. 6 shows the two syndromes S1 and S2 from the data and redundancy symbols R1 / R2,. , , The design of the switching mechanism generating d2, d1, d0 corresponds to the encoder shown in FIG. 6.

The error correction is done in the shortest possible time with the help of a only combinatorial, also described in [1] Network M1, the error by evaluating the two syn drome S1 and S2 localized. The syndrome represents S1 here the error pattern. If one of the two syndromes is zero, the error must lie in the redundancy symbols The error position is determined depending on S1 and S2 means and only refers to the data symbols. This means tet that always generates an error detection message if the determined error position is larger than that  Number of data symbols available. A description of how the network M1 the fault position from the two syndromes determined, can be found in [1, 2].

The function of the A shown in Fig. 5 and Fig. 6 units (encoder or decoder) to again below of an example be illustrated by hand. For the sake of simplicity, only 3 data symbols with d2: = (1,0,1); d1: = (0,1,0) and d0: = (0,0,0) exist to reduce the number of arithmetic steps.

With
(MSB... LSB)

d2 = 101 ≅ 1 + x ²

d1 = 010 ≅ x

d0 = 000 ≅ 0

the two redundancy symbols R1 and R2 can be calculated as follows:

(XOR combination of symbols)

mod g (x) with g (x): = 1 + x + x ³

Inserting the corresponding bit values in the second formula provides:

The bit patterns R1 = 111 result for R1 and R2 or R2 = 111, so that the code word to be transmitted CW = (d0) (d1) (d2) (R1) (R2) reads: CW: = 000 010 101 111 111.

The decoder decision is based on the determination of the two syndromes S1 and S2, which can be determined as follows:

In the event of an error-free transmission, the Syndromes for S1 = 000 and S2 = 000.

If, for example, the symbol d1 = 010 is received as d1 * = 011 (middle and right bit falsified), i.e. there is an error pattern e = 011, the syndromes S1 and S2 are calculated in this case:
S1 = 011 ≅ the error pattern e = 011 ≅ 1 + x or
S2 = x ³ (1 + x) mod (1 + x + x ³ ) = 1 + x ² ≅ 101

The combination of S1 and S2 according to that described in [3] Arithmetic gives L = 001 as the error location (i.e. error in d1). The result is shown as a table (with 6 inputs and 5 outputs) are stored in network M1.

4.1 24-bit coding of a TFCI frame with a length of 3 to 5 bits 4.1.1 The code format

In the case of TFCI data with a length of 3-5 bits, a code word with a length of 24 bits is generated from the block of the useful data, so a total of 19 further redundancy bits serving for data backup are added to the data bits. An analysis of the behavior of the mobile radio channel led to the result that the channel errors show a stochastic behavior, but more and more bundle-like errors can also be observed. In order to take advantage of the special properties of the b-adjacent code, if possible no more than two symbol errors should occur in a code word. This condition can be met at least approximately by reducing the number of symbols per code word. The following code division has proven to be particularly advantageous for the mobile radio channel:
The 24-bit code word is, as shown in Fig. 7, divided into three code subframes, where d1 and d2 denote the data symbols. The useful data representing the TFCI are in d1 and the first two bits of d2 (the third bit in d2 is set to zero).

The first code sub-frame SF1 consists of the data symbol d1 and the b-Adjacent Code redundancy symbols generated from d1 R11 and R12.

The second code sub-frame SF2 consists of the data symbol d2 and the b-Adjacent Code redundancy symbols generated from d2 R21 and R22 (LSB from d2 is used in the encoding and decoding procedures set to zero).

The third code sub-frame SF3 consists of the b-adjacent code Redundancy symbols R31 and R32, which consist of the data symbols d1 and d2 are generated.

All redundancy symbols are generated with the aid of the encoder shown in FIG. 5.

4.1.2 The decoding protocol

The received and possibly corrupted, 24-bit long code word is divided into subframes SF1, SF2 and SF3 and these are fed to the input of a decoder shown in FIG. 6, the decoding and error correction taking place according to the algorithm shown in FIG. 8. In this flowchart, the letter "K" denotes the message "Error correction successfully carried out"

The flow chart is briefly explained below:

protocol sequence

• 1. Decode subframe SF1:
• 2. Decode subframe SF2:

The respective decoder generates a message for each of the subframes (error correction successfully carried out Y / N). Depending on the type of message, proceed as follows:

• 1. IF SF1 = K and SF2 = K: replace the data symbols d1 and d2 in SF3 by the data symbols d1 from SF1 and d2 SF2. Go to LABEL1 (LABEL1: Decode SF3).
• 2. ELSE IF SF1 = K: Replace the data symbol d1 in the subframe SF3 through the data symbol d1 from subframe SF1. Go to LABEL1.
• 3. ELSE IF SF2 = K: Replace the data symbol d2 in the subframe SF3 through the data symbol d2 from subframe SF1. Go to LABEL1.
• 4. IF SF3 = K: The code word is correct  
• 5. ELSE (SF3 = D): The code word is faulty

With this method, up to two symbol errors can be made correct or up to 6 bits.

1.1. 48-bit coding of a TFCI frame with a length of 6 to 10 bit 4.2.1 The code format

If the TFCI data consists of 6-10 bits, a code word with a length of 48 bits is generated from the block of the useful data, thus adding a total of 38 further redundancy bits for data backup. The following code division has proven to be advantageous:
The code word is divided into 5 subframes SF1-SF5 (see FIG. 9), d1, d2, d3 and d4 again denoting the data symbols.

• - The first code sub-frame SF1 consists of the data symbol d1 and the b-adjacent code redundancy symbols R11 and R12.
• - The second code sub-frame SF2 consists of the data symbol d2 and the b-adjacent code redundancy symbols R21 and R22.
• - The third code sub-frame SF3 consists of the data symbols len d1 and d2 as well as the b-adjacent code redundancy symbols R31 and R32.

SF1, SF2 and SF3 are used in accordance with the 24-bit coding method generated.

• - The fourth code sub-frame SF4 consists of the data symbol d3 and the redundancy symbols R41, R42, R43, R44 and R45.
  All symbols of this subframe form a repeat code of the form R41 = R42 = R43 = R44 = R45 = d3. The data symbol bol d3 is therefore repeated a total of 6 times in SF4.
• - The fifth code sub-frame SF5 consists of the data symbol d4 and the redundancy symbol R51. Here too R51 = d4 set so that the 10th TFCI bit is in this subframe repeated a total of 6 times.

4.2.2 The decoding protocol

The received and possibly falsified code word with a length of 48 bits is divided into five subframes SF1, SF2, SF3, SF4 and SF5, whereby the decoding of the 3-adjacent code subframes SF1, SF2 and SF3 is again carried out using one in Fig may perform decoder shown. 6,.

The decoding protocol (see Fig. 10) for the 48 TFCI bits basically consists of two parts. The part of the protocol relating to the data symbols d1 and d2 corresponds to the flowchart for decoding the 24 TFCI bits described in section 4.1.2. The second part of the protocol relating to the decoding of the data symbols d3 and d4 is based on the principle of majority decision (see below). The decoding takes place as follows:

Protocol part 1

• 1. Decode subframe SF1:
• 2. Decode subframe SF2:

The respective decoder generates a message for each of the subframes (error correction successfully carried out Y / N). Depending on the type of message, proceed as follows:

• 1. IF SF1 = K and SF2 = K: replace the data symbols d1 and d2 in SF3 by the data symbols d1 from SF1 and d2 SF2. Go to LABEL1 (LABEL1: Decode SF3).
• 2. ELSE IF SF1 = K: Replace the data symbol d1 in the subframe SF3 through the data symbol d1 from subframe SF1. Go to LABEL1.
• 3. ELSE IF SF2 = K: Replace the data symbol d2 in the subframe SF3 through the data symbol d2 from subframe SF1. Go to LABEL1.
• 4. IF SF3 = K: The code word is correct
• 5. ELSE (SF3 = D): The code word is faulty

Protocol part 2

• 1st step: SF4 decodes the symbol d3 according to the principle of Majority decision.
• 2nd step: SF5 decodes the symbol d4 according to the principle of Majority decision (only the first bit of d4 is to be evaluated as a user data bit).

If protocol part 1 and protocol part 2 abge successfully are closed, the overall frame d1, d2, d3 and d4 is shown as kor right rated.

This procedure allows up to a total of four symbols correct errors or, under certain circumstances, allow all  10 data bits to correct, provided the errors are exclusive occur in the data bits.

Explanation of the principle of majority voting

This principle is based on a repetition of the data bits. In the present case, the three bits of the data symbol d3 and the 10th TFCI bit in d4 are repeated 5 times, so that a code word with a total length of 6 bits results from a data bit. Among other things, the data is transmitted uncoded in this case. On the receiving end, the number of ones in the code word is counted. The following decoding options are available for an even number of bits:

• 1. A correction decision, provided the number of ones and zeros are different.
• 2. In addition, an error detection if the number is equal Ones and zeros.

To illustrate this, the following examples are mentioned: On the transmitter side:
The data bit is 0 ⇒ the resulting code word = 000000
The data bit is 1 ⇒ the resulting code word = 111111

On the receiving end

Case 1: The code word received is: 111100 ⇒ The decoder decides in favor of the bit value "1".

Case 2: The code word received is: 111000 ⇒ The decoder generates an error message.

4.2 Channel-optimized b (= 3) adjacent codes

In contrast to the 3-adjacent codes mentioned above, the channel-optimized codes C1 and C2 described below use special generator matrices P1 and P2 to generate the redundancy symbols assigned to a data symbol d _i (i = 1, 2) or two data symbols d1 / d2 R _i and R _ij . In Fig. 11 the principle of the mobile channel optimized 3-Adjacent code Darge is provides, said code C1 representing (6 × 3) genes ratormatrix P1 in FIG shape and 12 illustrated the code C2 representing (6 × 6). - Generator matrix P2 have the shape shown in FIG. 13. The generator matrices P1 and P2 are selected in such a way that the code C1 predominantly corrects individual b-symbol errors in the data symbols and the code C2 corrects a maximum number of residual double errors in the redundancy symbols Rij (subframe 3, see below) derived from two data symbols can.

A TFCI data block containing 3-5 bits is also mapped here like that in a code word with a length of 24 bits (see FIG. 14). Here, the code C1 generates both the subframe SF1 consisting of the data symbol d1 and the redundancy symbols R11 and R22 and the subframe SF2 consisting of the data symbol d2 and the redundancy symbols R21 and R22, while the code C2 assigns the two to the subframe SF3 Redund Danzsymbole R31 and R32 generated from the two data symbols d1 and d2. The same procedure is used to map a TFCI data block consisting of 6-10 bits into a code word with a length of 48 bits (see FIG. 15). The subframes SF4 and SF5 are the repetition code described above, ie d3 = R41 =. , , = R45 and d4 = R51 set. FIGS . 16 and 17 once again illustrate the assignment and generation of the redundancy symbols Rij to and from the data symbols di for a TFCI data block with a length of 24 bits and for a TFCI data block with a length of 48 bits.

4.2.1 Encoder and decoder architecture

In Fig. 18, one possible hardware architecture for the implementation of the Encodierers for TFCI data block length is illustrated 3-5 bits. It consists essentially of the individual data symbols d1 and the redundancy symbols Rij, each storing 3 bits and correspondingly designated units, the P1 and P2 designated XOR gate circuits representing the corresponding generator matrices and one connected to the gate circuit P1 from the output side Selection circuit (demultiplexer). The decoder shown schematically in FIG. 19 also has a comparatively simple structure. It consists of a total of three sub-units (strings) assigned to the individual subframes SF1 / SF2 / SF3, each of which has one of the decoders DEC1 and DEC2 shown in FIGS . 20 and 21, a 6 × 1 syndrome memory S1, S2 and S3 and a 64 × 4 or 64 × 8 memory matrix loaded with the syndrome error tables 1 and 2 shown in FIGS . 22 and 23. The encoders or decoders for a TFCI data block with a length of 6-10 bits are constructed accordingly, except for the five-fold repeat code for the data symbols d3 and d4. The decoding protocols for TFCI data blocks with a length of 3-5 or 6-10 bits are identical to those already described above (see sections 4.1.2 and 4.2.2).

5. State of the art

[1] W. Adi, HG Kolloge, Double error miscorrection evaluation for a byte error correction scheme, ntz-Ar chiv. Vol. 5 (1983) H. 11, pp. 305-311
[2] Hodges et al. Method and apparatus for generating error locating and parity check bytes, European Patent Appl. 79101717.1, 1979, pp. 1-38 (: = US 4,185,269)

6. Abbreviations used

CDMA Code Division Multiple Access
FDD Frequency Division Duplex
GP Guard Period
kbps Kilo bits per second
Mbps Mega bits per second
Mcps mega chips per second
PSK phase shift keying
QPSK Quarternary PSK
RM Reed-Muller
TDD Time Division Duplex
TDMA Time Division Multiple Access
TD-SCDMA Time Division Synchronous CDMA
TFCI Transport Format Combination Indicator
UMTS Universal Mobile Telecommunications System

Claims (10)

1. Method for transmitting a bit sequence over a radio channel by performing the following steps:

• a) transmitter-side grouping of the bit sequence to be transmitted into data symbols (d _i ) each b-bit long,
• b) encoding of the data symbols (d _i ) by means of a systematic code, the generated code word containing a maximum of 2 ^b - 1 data symbols (d _i ) and each of the data symbols (d _i ) at least one redundancy symbol (R _ij ) of length b- Bit is assigned
• c) d-bit modulation of a carrier signal with the code word and
• d) Reconstruction of the data on the receiver side by demodulation of the carrier signal and decoding of the received code word.

2. The method according to claim 1, characterized in that some or all of the data symbols (d _i ) respectively assigned redundancy symbols (R _ij ) are generated by means of a b-adjacent code. 3. The method according to claim 1 or 2, characterized in that the carrier signal is subjected to a digit 2 ^b times phase modulation. 4. The method according to any one of claims 1 to 3, characterized in that one of at least two symbols (d _i ) existing group of data symbols is assigned to the bit pattern and that the data symbols (d _i ) one of the data symbols (d _i ) and at least three groups of redundancy symbols (R _ij ) existing code word is assigned, a first group of redundancy symbols (R11), R12) being generated from a first subset of data symbols (d1) by means of a first systematic code (C1), a second Group of redundancy symbols (R21, R22) is generated from a second subset of data symbols (d2) by means of the first systematic code (C1) and a third group of redundancy symbols (R31, R32) from the data symbols (d1, d2) of the first and second Generate under quantity using a second systematic code (C2). 5. The method according to claim 4, characterized, that the bit pattern be one of at least four symbols (d1) standing group of data symbols is assigned and that the Codeword a fourth and fifth group of redundancy symbols , the fourth group of redundancy symbols (R41, , , , R45) from a third subset of data symbols (d3) by means of a first repeat code and the fifth group of redundancy symbols (R45) from a fourth subset of Data symbols (d4) using a second repeat code is produced. 6. The method according to claim 4 or 5, characterized, that the subsets of the data symbols are foreign to the element and each contain only one data symbol. 7. The method according to any one of claims 1 to 6, characterized in that the code word is separated into sub-groups at the receiver end, the sub-groups of the received code word each consisting of at least one data symbol (d _i ) and the redundancy symbols respectively assigned to the received data symbol. 8. The method according to claim 7, characterized,  that the subgroups of the received code word se ready to be decoded. 9. The method according to claim 4, characterized, that the bit pattern contains 3-5 bits and the code word consists of two Data symbols and six redundancy symbols, the Data and redundancy symbols each have a length of three bits exhibit. 10. The method according to claim 4 or 5, characterized, that the bit pattern contains 6-10 bits and the code word consists of four Data symbols and twelve redundancy symbols, the Data and redundancy symbols each have a length of 3 bits point.