DE10065752A1 - Computer program execution with instructions reordered to speed execution, relating particularly to multi-processor systems, in which certain instructions are prevented from being run out of sequence to preserve data integrity - Google Patents

Abstract

Method for controlling a computer system (1) in which a number of instructions (2) are loaded into a computer unit (3) from a program memory (4). The instructions are not necessarily loaded in sequence. A single instruction (6) that makes a particular write access to a data memory (8) limits the reordering (9) of instructions in a predetermined manner. Independent claims are included for (1) a corresponding computer system (2) a computer program that runs on such a computer.

Description

The present application relates to a method for taxation tion of a computer system, a computer system with an off management unit and a computer program product, which is stored on a computer-compatible medium.

Computer systems with conventional processors stand out characterized in that the processor (arithmetic unit) instructions loads from a command memory and this in order processes how they are stored in the command memory. This always ensures that a memory write Command that is in order in the command memory before ei NEM memory read command is arranged, also before the Spei cher read command is executed so that the data is already in the data memory are stored and the memory read Command the actual current data from the memory holds.

For example, more modern processors have several parallel ones Arithmetic units so that commands in their processing rows sequence can be interchanged to in a parallel re unit to be executed, thereby reducing the overall processing performance of the processor increases.

The problem here is that commands are in their order are exchanged, which can result in data inconsistencies NEN. This is the case, for example, if in a first Processor a result is calculated and the correct loading the result is subsequently calculated in a signal field will be shown. Only then does a second processor take action the result calculated by the first processor if that Signal field indicates that the result is correct and complete was calculated. Now the order of execution in  swapped the first processor, the signal field can Show supposedly valid calculated result, although the first processor has not yet calculated this result. As a result, incorrect data becomes white in the second processor further processed. This problem can be caused by this, for example be solved that in the modern processor the parallel Processing or swapping the order of processing is generally suppressed. However, this leads to a we considerably reduced computing power of the computer system.

It is the object of the invention to provide a control method to specify a computer system that becomes more efficient Operation of the computer system leads to a corresponding Specify computer system with an execution environment and to specify a corresponding computer program product.

According to the invention, the object is achieved by a method to control a computer system in which a variety instructions from an arithmetic unit from a command memory is loaded, which is different from their order are executed in the command memory by the computing unit, and an instruction that provides predetermined access to egg includes a predetermined data storage, a resort which restricts instructions in a predetermined manner.

An advantage of the solution according to the invention is that the instructions in the instruction memory mostly in ih order are interchangeable, which makes the high lei Ability of modern processors with parallel processing parallel units and exchange of instructions tion can be exhausted. In addition, the Instructions in the instruction memory, for example for data integrity is crucial, the resorting of Instructions restricted in a predetermined manner.

An embodiment of the method according to the invention provides before declaring the type of data storage  the type of restriction of the relocation is predetermined instructions. This has the advantage that the Restriction of the resorting coupled to a data type that can be specified in a data type declaration. This enables, for example, that a compiler, a Interpreter or the processor itself when accessing the declared data store automatically the restriction reordering instructions. This has the Advantage that it can be excluded that individual access fe overlooked.

Another advantageous embodiment of the invention The method provides that the predetermined manner of one restrictive resorting that includes the instruction that the predetermined access to the predetermined data memory involves forming a boundary, with all instructions that before the boundary-forming instruction in the program memory are arranged and comprise a memory write access are carried out before the boundary-forming instruction is executed is. This advantageously enables al Complete instructions before the boundary instruction dig are processed before the boundary instruction is performed. Is it the border-forming In structure, for example, to access a signal field, for example, the signal field can be used for this purpose to make sure everyone in the program is accessing instructions arranged from the signal field with certainty are worked before the signal field has a signal value holds.

Another advantageous embodiment of the invention The method provides that the predetermined manner of the Restricted resorting includes the instruction that the predetermined access to the predetermined data memory contains a boundary, with no instruction that after the boundary-forming instruction in the program memory is arranged, is executed before the boundary-forming instruction  is executed. This is si in an advantageous manner made sure that none of the instructions on the boundary following instructions are carried out before the Grenzbil end instruction is executed. This enables a Processing process waits until a signal value is actually displayed.

Another method variant of the method according to the invention ren provides that the predetermined manner of restricted Resorting includes that the instruction that the predetermined includes access to the predetermined data storage, forms a boundary that no other processes can cross sensors or processes visible swapping in the order the instructions are processed. This is si made a visible exchange of instruction excluded beyond the boundary-forming instruction is so that program parts can be strictly separated. A visible swapping includes, for example, the confusion order processing of instructions or for example, the exchange of the shot of the execution an instruction for other processors or processes becomes visible.

Furthermore, the method according to the invention provides that it the predetermined access to the predetermined Da memory is a read operation that one in the Reads out data stored in the data memory. So that is the restriction of the exchange especially for a reading ope ration definable. The following is swapped too the visibility of the swap for other processors or Processes understood.

Another embodiment of the method according to the invention provides that the predetermined access to the predetermined data storage is a write operation, which writes information into the data memory. In order to is the restriction of the exchange especially for one  Write operation set. It is also possible that for Write operations and for read operations on a data store different interchangeable restrictions instructions.

With regard to the computer system, the task is solved by a computer system with an execution environment in which a Variety of instructions in an instruction memory for ver work are stored in a computing unit, the Computing unit has means for swapping the Bear Processing order of the instructions in the computing unit are suitable and have means which the resorting which restricts instructions in a predetermined manner.

The computer system according to the invention enables stowage research and parallel processing of instructions in an instruction memory are stored. This leads to a accelerated execution of the stored in the command memory instructions, being safe by additional means is that the reordering of the instructions in one predetermined manner is restricted. This enables light that a data inconsistency during the processing of the Instructions are avoided.

An embodiment of the computer system provides that the Means for restricting the reordering of instructions are designed so that the order is reversed processing is not carried out across a border, whereby the limit by predetermined access to one agreed data storage is formed.

With regard to the computer program product, the task is ge solves by a computer program product that is directly in the tegrated memory of a digital computer can and has sections of software code with which the Steps according to one of claims 1-7 are carried out, when the product is running on a computer.  

Furthermore, the object is achieved by a computer program product which is stored on a computer-suitable medium and comprises the following:
Computer-readable program means that cause a computer to load instructions from a command memory into a computing unit and to execute them differently from their order in the command memory by the computing unit, an instruction that includes a predetermined access to a predetermined data memory, a rearrangement of the Restrictions in structures in a predetermined manner.

An advantageous computer program product has its own shaft that the instruction that a predetermined Zu access to a predetermined data storage includes a Border forms over which there is no confusion in the row the instructions are processed.

Advantageous embodiments of the invention are the subject of the respective subclaims.

The invention is described below with reference to exemplary embodiments len and figures explained in more detail.

The figures show:

Fig. 1, a computer system with a computer unit and ei nem program memory and a data memory and a second processor with a second Be fail memory;

FIG. 2 shows the instruction memory from FIG. 1;

Fig. 3 shows the flow of a process:

In Fig. 1, a computer system 1 is shown. The computer system 1 comprises a computing unit 3 which is connected to a command memory 4 and a data memory 19 . Furthermore, a second computing unit 15 is arranged, which is connected to a second instruction memory 16 and also to the data memory 19 . A large number of instructions 2 are stored in the command memory 4 of the first arithmetic unit 3 . The instructions stored in the instruction memory 4 have an order 5 . The order 5 provides that after an instruction C1, the instruction C2, subsequently the instructions C3, CN, the instruction 20 , the instruction 6 and the instruction 21 are arranged. The instructions 2 from the command memory 4 are transmitted in sequence 5 to the computing unit 3 . In this case, instruction C1 arrives in arithmetic unit 3 before instruction C2. The intention of the program stored in the command memory 4 - consisting of the command sequence C1-CN, command 20 , command 6 and command 21 - includes that part of a first result ses SPX is calculated in the first calculation step C1. In the second calculation step C2, a further partial result is calculated for the first result SPX. A further partial result for the first result SPX is subsequently determined in the calculation step C3. After executing further instructions, an nth calculation step CN is carried out to calculate the first result SPX. It is then provided that the first result SPX is stored by means of a memory command 20 in the data memory 19 to the memory cell 17 associated with the first result SPX. After the storage process of the first result SPX, the instruction 6 stores a signal field SP1 from the computing unit 3 in the data memory 19 at a predetermined data memory 8 . In the program sequence, the signal field SP1 is suitable for storing a signal in the data memory 19 at the predetermined data storage location 8 , which indicates that the calculation of the first result SPX has been completed with certainty. The computing unit 3 subsequently receives the calculation command 21 , which is used to calculate a second result SPY. The first result SPX is now first stored in the data memory 19 in the memory cell of the first calculation result 17 . Subsequently, the signal field SP1 was stored at the predetermined data storage location 8 , which indicates that the calculation of the first result SPX has been completed.

A check command 22 , a read command 23 and a use command 24 are stored in the second command memory 16 . The second arithmetic unit 15 first receives the check command 22 , which is used to check whether the signal field SP1 is set in the predetermined data memory 8 . If this is the case, with the read command 23 the first result SPX calculated by the first arithmetic unit 3 is read from the memory cell of the first calculation result 17 of the data memory 19 . In a subsequent use calculation step 24 , the first result SPX is used in the second arithmetic unit for further calculation 3 . The instructions in the second instruction memory 16 are arranged in a second order 25 . In order for the proper execution of the program to be ensured, it must be ensured, on the one hand, that the first result SPX is already stored by computing unit 3 when signal field SP1 is stored in data memory 19 . On the other hand, it must be ensured in the second arithmetic unit 15 that the checking step 22 is first carried out until the first signal field SP1 is stored in the predetermined data memory 8 . Only then can the correct data of the first result SPX be read from the memory cell 17 of the first calculation result.

Modern computing units now allow that the commands stored in the command memory 4 or the commands stored in the second command memory 16 are loaded into the computing unit 3 or the second computing unit 15 and executed there in a modified order, be completed or for on whose processors or processes become visible. This could result in the error that the instruction 6 , which writes the signal field SP1, is interchanged with the store command 20 , so that the data stored in the data store 19 , which are stored in the memory cell 17 , are already declared valid before the actually valid value is stored there. It also applies to the second arithmetic unit 15 that interchanging the check command 22 and the read command 23 can lead to an invalid calculation of the first result SPX being read from the memory cell 17 of the data memory 19 , since the check with the check command 22 only subsequent one takes place.

For example, the signal field SP1 and thus the predetermined data memory 8 can be assigned a property which restricts a re-sorting 9 of instructions 2 in a predetermined manner. In the instruction memory 4, the restriction is at the pitch sense that all constructive tion before in 6 arranged instructions to be executed Müs sen before the instruction is executed. 6 This would make it possible, for example, for the calculation command 21 to calculate the second result SPY to be executed before the instruction 6 . A more stringent restriction of the re-sorting can provide that this mix-up is also excluded. This would mean that all arranged in front of the instruction 6 instructions are these is processed before the instruction is executed 6 and that the instruction following 6 instructions are tet abgearbei only after completed execution of the instruction. 6

Concerning arranged in the second command storage 16 instructions provides a predetermined manner of restricting the reordering of instructions that none of the arranged after the monitoring command 22 instructions will be executed before the inspection command is executed 22nd This does not exclude that instructions which have not yet been executed are arranged in the second instruction memory 16 before the check instruction 22 .

By attributing the predetermined data memory 8 , it is now possible to use each use of the predetermined data memory 8 in the first command memory 4 or the second command memory 16 as a predetermined restriction on the reordering of instructions.

In Fig. 2, the command memory 4 is shown. The instruction memory 4 comprises the plurality of instructions 2 . In the instruction memory 4 , the storage instruction 20 and subsequently the instruction 6 is arranged. A boundary 12 is formed between the memory 20 and the instruction 6 . Before the border 12 is a variety of instructions 13 and after the border 12 is a plurality of instructions 14 is arranged. Furthermore, a rearrangement 9 of the storage command 20 and the instruction 6 is shown, which according to the invention is limited by the limit 12 in a predetermined manner. A swapping of the first calculation step C1 for calculating the first result SPX with the second calculation step C2 could be carried out by the computing unit 3 , provided the data consistency is maintained. It is only important to ensure that the second calculation step C2 can be carried out independently of the first calculation step C1. The exchange takes place within the computing unit 3 , so that the computing unit 3 itself can check the maintenance of data consistency.

In Fig. 3 is a program flow is illustrated. In a first program step S1, the program is started with a corresponding initialization. In a second program step S2, declarations are made, a predetermined data memory 8 being identified — stating the type of restriction of the exchange. The program flow takes place in a third program step S3. In a fourth program step S4, the predetermined data memory 8 is used, the rearrangement 9 of instructions 2 being restricted in the predetermined manner. In a fifth program step S5, a further program sequence is carried out and the program is finally ended.

LIST OF REFERENCE NUMBERS

1

computer system

2

Variety of instructions

3

computer unit

4

instruction memory

5

Order in the command memory

6

instruction

7

Predefined access

8th

Predefined data storage

9

resorting

10

Predefined restrictive way

11

declaration

12

border

13

Instruction before the border

14

Instruction on the border

15

Second arithmetic unit

16

Second instruction memory

17

Memory cell of a first calculation result

18

Memory cell of a second calculation result

19

data storage

20

store instruction

21

calculation command

22

Checking command

23

read command

24

use

25

Order in the second instruction memory
C1 First calculation step
C2 Second calculation step
C3 third calculation step
CN nth calculation step
SPX first result
SPY second result
SP1 signal field
S1 First program step
S2 Second program step
S3 Third program step
S4 Fourth program step
S5 Fifth program step

Claims (12)

1. Method for controlling a computer system ( 1 ), in which a large number of instructions ( 2 ) are loaded by a computing unit ( 3 ) from a command memory ( 4 ), which differ from their sequence ( 5 ) in the command memory ( 4 ) are executed by the computing unit ( 3 ) and an instruction ( 6 ), which includes a predetermined access ( 7 ) to a predetermined data memory ( 8 ), restrorts ( 9 ) the instructions ( 2 ) in a predetermined manner. 2. The method according to claim 1, characterized in that in a declaration ( 11 ) of the type of data memory ( 8 ) is predetermined, what type of restriction ( 10 ) of the order ( 9 ) of the instructions ( 2 ). 3. The method according to any one of claims 1 or 2, characterized in that the predetermined manner ( 10 ) of the restricted re-sorting ( 9 ) comprises that the instruction ( 6 ), the predetermined access ( 7 ) to the predetermined data memory ( 8 ) includes forming a boundary ( 12 ), wherein all instructions ( 13 ) which are arranged in front of the boundary-forming instruction ( 6 ) in the instruction memory ( 4 ) and comprise a memory write access are executed before the boundary-forming instruction ( 6 ) is executed. 4. The method according to any one of claims 1 to 3, characterized in that the predetermined manner ( 10 ) of the restricted re-sorting ( 9 ) comprises that the instruction ( 6 ), the predetermined access ( 7 ) to the predetermined data memory ( 8 ) includes forming a boundary ( 12 ), wherein no instruction ( 14 ), which is arranged after the boundary-forming instruction ( 6 ) in the instruction memory ( 4 ), is executed before the boundary-forming instruction ( 6 ) is executed. 5. The method according to any one of claims 1 to 4, characterized in that the predetermined manner ( 10 ) of the restricted re-sorting ( 9 ) comprises that the instruction ( 6 ), the predetermined access ( 7 ) to the predetermined data memory ( 8 ) includes, forms a boundary ( 12 ) beyond which there is no exchange, visible to other processors or processes, in the order in which the instructions ( 2 ) are processed. 6. The method according to any one of claims 1 to 5, characterized in that the predetermined access ( 7 ) to the predetermined data memory ( 8 ) is a read operation which reads information stored in the data memory ( 8 ). 7. The method according to any one of claims 1 to 6, characterized in that the predetermined access ( 7 ) to the predetermined data memory ( 8 ) is a write operation which writes information into the data memory ( 8 ). 8. Computer system with an execution environment in which a plurality of instructions ( 2 ) are stored in a command memory ( 4 ) for processing in a computing unit ( 3 ), the computing unit ( 3 ) having means for exchanging the processing order of the instructions ( 2 ) are suitable in the computing unit and have means which restrict the re-sorting of the instructions ( 2 ) in a predetermined manner ( 10 ). 9. Computer system according to claim 8, characterized in that the means for restricting the re-sorting of instructions ( 2 ) are designed such that the processing sequence is not interchanged over a boundary ( 12 ), the boundary ( 12 ) by a predetermined access ( 7 ) to a predetermined data memory ( 8 ) is formed. 10. Computer program product that directly into the internal Memory of a digital computer can be loaded and Has software code sections with which the steps ge according to any one of claims 1-7 if the Product is running on a computer. 11. Computer program product, which is stored on a computer-suitable medium and comprises the following: Computer-readable program means which cause a computer to load instructions ( 2 ) from a command memory ( 4 ) into a computing unit ( 3 ) and deviate from their sequence in the instruction memory ( 4 ) to be executed by the computing unit ( 3 ), where for an instruction ( 6 ) which contains a predetermined access ( 7 ) to a predetermined data memory ( 8 ), a re-sorting ( 9 ) of the instructions ( 2 ) in one predetermined manner. 12. Computer program product according to claim 11, characterized in that the instruction ( 6 ), which includes a predetermined access ( 7 ) to a predetermined data memory ( 8 ), forms a boundary ( 12 ) over which there is no confusion in the order of Instructions ( 2 ) are processed.