DD230977A1 - Transmission method, in particular for recording and reproducing color signal signals - Google Patents

Abstract

The aim and the object of the invention are to provide a method for transmission, in particular for recording and reproducing color television signals, in such a way that, with reduced circuit complexity, time shifts between the individual signal components after the transmission are largely avoided. According to the invention, the object is achieved in that, before the transmission, the luminance signal is time-compressed together with the horizontal synchronization pulse and the front and rear black shoulders.

Description

Field of application of the invention

The invention is based on a method for the transmission of color television signal in analog form, wherein a luminance signal and a contrast narrowband chrominance signal are transmitted and the chrominance signal of a Zeilenpenode during part of the Zeilenpenode in time-compressed form instead of the luminance signal and the chrominance signal associated with this chrominance signal during the Part of the Zeilenpenode not occupied by zeitkompnmierter chrominance signal is transmitted and in the reproduction of the chrominance signal is expanded together with luminance signal, so that they coincide in time for the image reproduction

Characteristic of the known technical solutions

Such a method is known for example from DE-PS 2056684. Later still another with the title "Timeplex - a serial color coding method for home video recorder, in the journal" television and cinema technology "34 year, no 12/80 page 451-458 was described in which the chrominance signals for BY and RV are time-compressed by a factor of 5 between sync pulses and luminance signal in the blanking gap

The Timeplex method is becoming more and more important after the recording of video signals with ever smaller tape speeds and smaller widths of the recording medium is made The usually longitudinal sound track is no longer possible because of the low magnetic tape width and because of the low tape speed at 8mm magnetic tapes Sound on a separate carrier recorded in the track for the video signal Here, however, adversely affecting the sound carrier on the different carrier frequencies of the image signals, and there were Cross-color interference The previously known Timeplex method were using analog These circuits have the disadvantage that they require a delay line, and that there are phase fluctuations, and that an offset of the luminance signal can occur, if the separated aufg These problems can be solved with more or less effort in the analog circuits, however, it turns out that this cost can only be reduced if the analog circuit groups are replaced by digital components and the processing is digital in that also the luminance signal and synchronous signal processing must be digitized

Such methods with sequential transmission of line-compressed signals require a relatively high circuit complexity. In addition, during the playback, temporal shifts between the individual signals, B, the line sync pulses and the luminance signal can occur

Object of the invention

The aim of the invention is to avoid the aforementioned disadvantages of the prior art

Explanation of the essence of the invention

The invention has the object of providing a method of the type described in such a way that with reduced circuit complexity time shifts between the individual Signaianteilen be largely avoided after the transfer.

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The luminance signal is compressed in such a way that it is alternately read slowly and read out faster after being digitized into two shift registers. The chrominance signals are recorded in the frame in the first embodiment Time-compressed way that they are read after digitization from line to line alternately in another shift register and read out faster and the signals are then converted back into analog signals, wherein the signals are re-expanded using the said shift registers in a corresponding manner during playback only provided PLL circuit generates a basic clock frequency, from which with the help of frequency divider stages, the various clock pulses to control the digital-to-analog converter and the shift registers are obtained The Fr Frequency divisors are reset in rotation to the synchronizing pulses at defined times in order to obtain at even multiples of the output frequency of the divider stages mutually simultaneously occurring edges of the clock pulses and thus same read-in and readout times in conversion and reverse conversion of the time-compressed signal

Double use is made of the digital modules for time compression and expansion The timer and control circuits as well as the shift registers and the analog-to-digital converter as well as the digital-to-analog converters are on an N-MOS IC, and the analog-to-digital converter and the digital-to-analog converter and the PLL circuit with the frequency dividers are each arranged on a bipolar IC

The fact that the luminance signal is time-compressed together with the line sync pulses and the front and back porch in the same circuit and possibly time-expanded, the Schaltungsaufward is kept low because only one circuit is required for the treatment of these signal components Since the signal components in their treatment is not separated If the combined signal of luminance signal, line sync pulses and front and back porch shoulder suffers a time shift, the temporal association between the line sync pulses and the luminance signal, which is important for proper image reproduction, is advantageously maintained Da the time compression of the luminance signal amounts to only about 20%, that is compressed to about 80% of its original duration, a sufficiently wide line synchronizing pulse remains, so that be The black level and the synchronous level are recovered practically in the original way. The half-line frequency identification for the sequentially transmitted chrominance signals can be generated together with the unpainted level. In addition, a drop-out compensation can be achieved by means of a memory controller the external circuitry can be kept low. Another advantage is that the simultaneous compression of the luminance signal and the line synchronizing pulses makes the method independent of the respective television standard since the transmitted signal is originally converted back

exemplary

The invention is explained in more detail below with reference to the drawing using the example of a recording and playback Darin show

2 shows the time course of the analogue and digital signals occurring in FIG. 1. The method according to the invention can be used advantageously not only for recording and reproduction, but generally for the transmission of color television signals, B in the case of satellite broadcasting. Broadcasting according to the so-called C-Mac system, in which a sequential transmission with time compression also takes place. The method is equally applicable to transmission of color television signals over cable links or other transmission channels, especially those having a limited bandwidth and signal foreshortenings such as time shifts Initially, the recording of a FarDvideosignals be described on a magnetic tape For this purpose, the luminance signal Y is applied via the contact R to the input of an analog-to-digital converter 1, which from the analog luminance signal a 7 This shift register is alternately written clock-controlled and read out while ζ B the shift register 2 is read, the information contained in the shift register 3 is read out and to the input of a switch 4 Time synchronization is performed by reading in at a clock of 16 MHz and reading it out with a clock of 20 MHz. This means that the luminance signal is compressed by 20% so that it occupies only about 80% of its original duration Clock and control pulses for the digital-to-analog and analog-to-digital converters and for shift registers are taken from a control unit 5. The clock frequencies are taken from a generator in PLL technology. The basic frequency of 80 MHz obtained from a single generator for controlling the entire circuit is determined by means of frequency dividers The chrominance signals RY and BY are alternately applied via a half cell frequency H / 2 actuated switch 9 to an analog-DigitJwandler 10, which converts the signal into a 6 This information is applied to the input P2 of an electronic switch 11, to whose output 01 a shift register 12 is connected, which is controlled by a clock Ci supplied by the control unit 5. This clock has a frequency of 4 MHz for reading in The information taken from the shift register 12 is read out to the switching stage 4, which generates a digital 7-bit signal in response to a control signal K from the control unit 5, which signal from the luminance signal the chrominance signals and a fixed level The digital signal is then fed via a digital-to-analog converter 13 via the contact R to an FM module or 14 and fed to the recording device 16 via the recording amplifier 15

To reproduce the signal thus recorded, it is switched via a reproduction amplifier 17, a drop-out detector 18 and via an FM demodulator 19 via the contact P to the input of the analog-to-digital converter 1. Now, in reverse order from the Zeitkompnmierten signal, the original Signal recovered Again the two shift registers 2 and 3 are alternately switched on and off. The read out signals are applied to the input of the switch 4, which in this case remains in the position for switching on the Lummanzsignals by the K signal After a Digital Anaiogumwandlung in Transducer 13 reaches the luminance signal via the contact P the output for further processing in the connected playback device The synchronization signal Sy reaches the control unit 5 and is there

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The time-compressed chrominance signals pass via the input P1 of the electronic switch 11 to its output 01 and from there to the input of the shift register 12, the output of which is connected directly to the input P3 of a half-cell frequency H / 2 switchable electronic cross-switch 20 Shift register 12 is also connected to the input of another shift register 21, whose output leads to a second input P4 of the cross switch 20 by the alternate concerns of RY and BY or BY and RY signals at the inputs P3 and P4 and the synchronous switching of the cross switch 20th arise at its output 02, the RY 6-bit signal and at its output 03 da0s B-Y6-bit signal, which after conversion into the digital-to-analog converter 22 and 23 as RY and BY chrominance signals are available through this Measure arises an averaging of the color information with the previous similar color information In advantage Alternatively, the dropout compensation can be digital in that a digital control signal obtained from the dropout detector activates via a line 26 the control unit 5, which then supplies the shift registers 2 and the luminance signal and 12 and 21 the chrominance signals with the preceding one Information Reload Information The entire system is controlled by clock frequencies derived from a frequency generated by a single PLL loop 24

For example, the different clock frequencies in MHz in the various modes are listed in the table below

Clock 1 and Clock 2 Read in clock 3 select Clock 4 Clock 5 read out 2 Rec 20 and read ѵопЗ 16 4 20 16 20 read in from 2 16 and read out ѵопЗ 20 4 20 16 20 read out 2 P! ay16 and read ѵопЗ 20 20 4 20 16 reading in 2 20 read out ѵопЗ 16 20 4 20 16

2 shows the analogue luminance signal Y, FIG. 2 b shows the analog color signals RY and BY, FIG. 2 c shows the control clock Azurn reading in the shift register 2, FIG. 2d shows the control clock B for reading in FIG. 2f shows the control clock D for reading out the shift register 2, FIG. 2g shows the control clock E for reading out the shift register 3, FIG. 2h shows the control clock F for reading the shift register 3 Shift register 12, FIG. 2i shows the colorless level G which is added to the signal to be recorded during the blanking gap by a circuit 25,

Fig. 2 k shows the control voltage K for the switch 4, Fig. 21 shows the generated recording signal (timeplex signal). The signals 2a to 21 are for reproduction and have the following frequencies in MHz

ABCDEFG

16 16 4 20 20 20 20 MHz

2 m shows the control clock A for reading in the shift register 2, FIG. 2 shows the control clock B for reading the shift register 3, FIG. 2 shows the control clock C for reading in the shift register 12, Ftg 2 shows 2 r shows the decompressed luminance signal Y. FIG. 2t shows the decompressed chrominance signals BY and RY, the frequencies of the control clocks A .sub.1 show the decoding of the shift register until F have the following values in MHz

ABCDEF

20 20 20 16 16 4 MHz

A circuit for carrying out the above-described method is particularly well suited for a construction in integrated circuit technology. In order to make the circuit very flexible and cost-effective, it is proposed to divide it into several groups, the timer and control circuit 5 and the shift registers 2, 3, 12 and 21 and the analog-to-digital converter 10 and the digital-to-analog converters 22 and 23 on an N-MOS IC and the analog-to-digital converter 1 together with the digital-to-analog converter 13 and the PLL circuit 24 are arranged with the frequency dividers 6, 7 and 8, each on a bipolar IC.

Claims (6)

1 method for transmitting, in particular for recording and reproducing, of color television signal in which e'n luminance signal ( ^v ) and a contrast narrowband chrominance signal (RY, BY) in each time-compressed form transmitted sequentially in time during the Zeilenpenode and again so time-expanded during playback Be coincident in time for the image reproduction, characterized in that prior to the transmission, the luminance signal (Y) is time-compressed together with the horizontal sync pulse and the front and back Schwarzschulter -1- 259 953 5 Invention claim: 2 Method according to item 1, characterized in that the luminance signal (Y) is compressed in such a way that after digitization in two shift registers (2, 3) alternately read slowly and read out faster, and the chrominance signals (RY, BY) in the time-optimized manner that they are alternately read after digitization from line to line in another shift register (12) and read out faster and the signals are then converted back to analog signals, wherein the signals are reproduced using said shift register (2 , 3, 12) are correspondingly time-expanded again 3 Method according to item 2, characterized in that a single PLL circuit (24) is provided which generates a basic clock frequency from which, with the aid of frequency divider stages (6, 7, 8), the various clock pulses for controlling the Digita'-Anaiog Converter and the shift register are obtained 4 method according to item 2, characterized in that the frequency divider (6, 7 8) in relation to the sync pulses at defined times are reset to sine and even at equal multiples of the output frequency of the divider stages simultaneously occurring edges of the clock pulses and thus the same egg Readout times in conversion and reverse conversion of the time-compressed signal to obtain 5 method according to item 2, characterized in that the digital modules for the time compression and the time expansion are used twice 6 circuit arrangement for carrying out the method according to one or more of the items 1 to 5, characterized in that the timer and control circuit (5) and the shift registers (2,3,12, 21) and the analog-to-digital converter (10) and the digital-to-analog converters (22, 23) on an N-MOS IC and the analog-to-digital converter (1) and the digital-to-analog converter (13) and the PLL circuit (24) with the frequency dividers (6, 7, 8) are each arranged on a bipolar IC For this 2 pages drawings