DD154043A1 - METHOD AND CIRCUIT ARRANGEMENT FOR DIGITAL ADHERENCE CAPACITY MEASUREMENT - Google Patents

Abstract

The digital core capacitance measuring device is used in the cable industry for the digital acquisition and evaluation of capacitance changes of extruded cores. To reduce computational time and to increase the accuracy of measurement, a linear relationship between the measured capacitance C low X and the delivered pulse sum is produced by the use of a relaxation oscillator, which is connected to the measuring probe and samples a fixed frequency oscillator, in conjunction with a setpoint value in the setpoint register downstream Rückzaertszaehler and Vorwaertszaehler as Veindifferenzkapazitaet in the display unit is displayed and evaluated.

Description

Title of the invention

Method and circuit arrangement for digital vein capacitance measurement

Field of application of the invention

The invention finds application in the cable industry for the digital detection of the wire capacity extruded wires or their signed deviation from a likewise digitally predetermined setpoint value on the basis of the linear Zählζeit control

Characteristic of the known technical solutions

Circuit arrangements are known in which the digital value of the capacitance to be measured is determined by suitably evaluating the difference frequency of two oscillators, one of which is influenced by the measuring capacitance and the other has a repetition frequency.

It is also known to avoid the high circuit complexity that arises in the arithmetic difference frequency formation, characterized in that analog mixtures are made and the resulting signal voltage is passed through a low pass »All known circuits of this type work with sinewave oscillators, in which no linear relationship between Frequency change and capacity change exists. Thus, there is also a nonlinear relationship between difference frequency and capacitance change. This fact either limits the measuring range given a maximum linearity error or forces auni computer-aided evaluation, the computational time is so great that, for example

the determination of the vertex eccentricity in conjunction with a vein diameter measurement must be called into question as a subroutine sequence. , ,

Object of the invention

It is an object of the invention to achieve a linear relationship between counting frequency and measuring capacity while reducing the circuit complexity and release of process computing time.

presentation; the essence of the invention

The invention has for its object to ' experience ' to '. in which capacitive counting frequency conversion with linear characteristics forms the basis for the digital vein capacitance representation, which moreover provides the advantages of being able to apply the known methods of software setpoint setpoint for vein capacitance by presetting backward counters without additional circuitry. ,

According to the invention, this object is achieved by generating an EC relaxation oscillator, which is equipped with the wire capacitance to be measured, a cycle time linearly linked thereto by internal constant current transfer of the measuring capacitance and this cycle time to a second oscillator operating at the fixed frequency , is given as measuring time «*

It is also part of the invention to use the relaxation oscillator for clock control of the entire measurement and evaluation system, the clock time of the system is formed of integer multiples of the basic clock time of the relaxation oscillator.

The invention further includes that the associated with the probe relaxation oscillator is connected to both a backward counter, an up-counter and a display unit as well as with a fixed-frequency oscillator, which is also coupled to the down counter, and the

Reverse counter is connected to a setpoint register, which is assigned a setpoint input. . · .- .; ·· '

Exemplary embodiment

Enclosed drawing shows an example of the block diagram of the invention.

The relaxation oscillator 1 supplies with connected capacitive probe Cy 2 a the characteristic capacitance proportional clock time j which is fed to a fixed-frequency oscillator 3, which is connected to a presettable down counter 6 and this provides pulses over the entire cycle time, whose sum is equal to the capacitance to be measured Gy · After completion of a measuring cycle of the down counter 6 is either decremented or transfer pulses have been passed to the downstream up counter 7, which like the down counter 6 is connected to a display unit 9 or.es is a residual sum in the down counter 6 » The counter contents, either in Reverse counter 6 or in the forward counter 7, corresponding to the wire capacity deviation from the input set value, the negative counter 6 is associated with the down counter and the positive sign 7, which is displayed in the display 8. The setpoint input 5 can be done for example via coded switches by hand or directly from computer-controlled systems. The target value register 4 is connected to the down counter 6 in combination, wherein it is loaded before the start of a count period with the register contents of the set value register _e The relaxation oscillator 1 is außadem connected to the down counter 6, the forward counter 7 and the display unit 8, 9, since it simultaneously fulfills the function of the system clock central ·

Claims (3)

223 689 claim of the invention 1, method for digital Vein capacitance measurement, characterized by an RC-ReIaxationsoszillator (1), which is equipped with the measured A.der capacity by the capacitive measuring probe (2), generates a cycle time, which linearly connected by internal constant current transfer of the measuring capacitance with this is and this cycle time a second oscillator (3)> working on a pest frequency, is given as the measured value. 2.0 method according to item 1, characterized in that the relaxation oscillator (1) is used for clock control of the entire measurement and evaluation system, wherein-the cycle time of the system is formed of integer multiples of the basic clock time of the relaxation oscillator, 3 'circuit arrangement for carrying out the measuring method according to item 1 and 2, characterized in that the relaxation oscillator (1) connected to the capacitive measuring probe (2) both with a backward counter (6), an up counter (7) and a display unit (8, 9 ) as well as with a pest frequency oscillator (3) which is likewise coupled to the downwards counter (6), is in communication and the downwards counter (6) is connected to a desired value generator (5) to which a desired value specification (5) is assigned, Hlerzti AS®it & Drawing-