CS215889B1 - Method of raising the operative speed of passive diodotransformer memory - Google Patents

Description

The invention relates to a method of increasing the operating speed of a passive diodotransformer memory for storing fixed program parts and constants in automatic computers or other digital devices.

Previously known circuits use among others diodotransformer memories. In this method, the information is stored in the memory such that the reader wire either passes or bypasses the windows of the individual transformers. Some wiring uses two-window transformers to which the logical meaning is assigned, the reading wires are connected in the diode matrix. The secondary winding represents the memory output. The stored information is crushed by applying a read pulse to the selected read wire. The read out information will then appear in the parallel code output. Thus, one memory word, for example one instruction or constant, is stored on one read wire. The memory capacity is given by the product of the number of read conductors and the number of transformers. p,

Where N is the memory capacity in bits, n is the number of transformers, p is the number of read wires. The number of read wires is usually limited by the size of the transformer window. Therefore, often an increase in memory capacity is achieved by increasing the number of transformers arranged in groups. Two or more memory words are then stored on one reader wire. The selection of the reader is performed by additional gating of the response amplifiers connected to the secondary windings of the transformers by means of signals from the decoded address circuits. Thus, information is always taken from a single group of transformers. However, increasing the number of transformers leads to an increase in the inductance of the reading conductor and thus to a decrease in the working speed.

These disadvantages are alleviated by the method of increasing the operating speed of the passive diodotransformer memory of the present invention, which is based on the fact that the short-circuit winding of the group of transformers from which the information is taken remains disconnected, .

In this way, the inductance of the reading conductor is reduced, the operation of the switches being controlled by signals from the address decoding circuits as well as the gating of the response amplifiers. The short-circuit winding may be separate for each transformer or common to each group of transformers.

An advantage of the described method of increasing the operating speed of the passive diodotransformer memory according to the invention is that the inductance of the reader conductor is substantially reduced and thus the memory capacity can be increased without reducing the read rate.

An example of a method of increasing the working speed of a passive diodotransformer memory is schematically illustrated in the accompanying drawing.

The transformers T ^ - T _Q are divided into groups in which the number of transformers need not be the same. Groups A ^ - A ^ are groups from which information is not taken. Only the only group A selected is

The Ts are equipped with a shorting afiS of the Ag group open.

the group from which the information is taken. Transformers T ^ by winding and ZV switch. which is in groups A ^ - Asepnut, u

Claims (1)

SUBJECT OF THE INVENTION Method of increasing the working speed of a passive diodotransformer memory, characterized in that the short-circuit winding of the transformer group (Ag) from which the information is taken remains disconnected, while the transformer groups (A ^ - A ^) from which the information is not taken are short-circuited .