CS215719B1 - Wiring for realization of a sequence of polarization pulses and control pulses for pulse voltammetric measurement - Google Patents

Abstract

The invention relates to a circuit for implementing a sequence of polarization and control pulses for pulse voltammetric measurements, using recording of a Sas pulse sequence in a digital memory of the PROM type (ROM, EPROM). The essence of the invention lies in the fact that the clock pulse generator (18) is connected via a binary counter (8) to a digital memory (7), to the first output of which a first analog memory (10) is connected via a first switching element (9), a second analog memory (12) is connected via a second switching element (11) to the second output of the digital memory (7), a third analog counter (14) is connected via a third switching element (13), a converter (15) is connected to the fourth output of the digital memory (7), the fifth output of the digital memory (7) is connected via a power amplifier (16) to a mechanical droplet separator (17) and finally the sixth output of the digital memory (7) is connected to the reset input of the binary counter (8). The circuit according to the invention is usable in electrochemical detectors, polarographs and similar devices.

Description

Connection for realization of sequence of polarization pulses and control pulses for pulse voltammetric measurement

The invention relates to a circuit for realizing a sequence of polarizing and control pulses for pulse voltammetric measurement, utilizing the recording of the Saxon pulse sequence in a PROM (ROM, EPROM) digital memory.

SUMMARY OF THE INVENTION The clock pulse generator (18) is connected via a binary counter (8) to a digital memory (7), the first output of which is connected via a first switching element (9) to a first analog memory (10), to a second a digital memory output (7) is connected via a second switching element (11) a second analog memory (12), to a third digital memory output (7) is connected via a third switching element (13) a third analogue psi (14), to a fourth digital output A converter (15) is connected to the memory (7), the fifth output of the digital memory (7) is connected via a power amplifier (16) to the mechanical drop-off device (17) and finally the sixth output of the digital memory (7) is connected to 8).

The circuitry of the invention is useful in electrochemical detectors, polarographs and similar devices.

215 719

The invention relates to circuitry for realizing a sequence of polarizing and control pulses for pulse voltammetric measurements using the recording of a time sequence of pulses in a digital memory of the PROM and ROM type EPROM, respectively.

The known circuitry solves the problem of generating the desired pulse train by combining the flip-flop circuits controlled by clock pulses with a frequency suitably adjusted by in-line dividers. These circuits, apart from the relative complexity, do not allow the pulse train to be adjusted without reconstructing the entire circuit.

The disadvantages of the solutions used are eliminated by the circuit according to the invention, which is based on the fact that the clock pulse generator is connected to a digital memory via a binary counter. A first analogue memory 6 is connected to a first digital memory output via a first switching element, a second analogue memory 6 is connected via a second switching element, a third analogue memory is connected via a third switching element, a third analogue memory is connected via a third switching element converter is connected to the digital memory, the fifth output of the digital memory is connected via a power amplifier to the mechanical drop-off device, the sixth output of the digital memory is connected to the reset input of the binary counter »

The advantage of this circuit is that by simply replacing the programmed digital memory, it is possible to achieve any combination of the Pulse Sequence sequence and thus meet the special requirements of the pulse voltammetric method.

The attached drawings show an example of pulse train and wiring for its realization.

Fig. 1 shows an example of a pulse train for the classical differential pulse polarography method, where time is plotted on the horizontal axis, voltage is plotted on the vertical axis.

Na cbr. 2 is an example of a circuit where the 18-hour pulse generator is connected via a binary counter 8 to a digital memory 7, the first output of which is connected via the first switching element 2 to the first analog memory 10; a second analog memory 12, a third analog memory 14 is connected to a third output of digital memory 7, a third analog memory 14 is connected via a third switching element 13, a converter 15 is connected to a fourth output of digital memory 7, and finally the sixth output of the digital memory 7 is connected to the reset input of the binary counter 8.

The polarization pulse 1 is adjustable in amplitude, pulse 2 switches the first analogue memory 10. pulse 3 switches the second analogue memory 12, pulse 4 switches the third analogue memory 14, pulse 2 switches the mechanical dropper 17 after amplification, pulse 6 resets binary counter, counter 8. First resp. the second analog memory captures the value of the current sample in the pulse interval of 2 and 3, respectively. 3. The third analog memory captures the difference in values in the first and second analog memories.

The circuitry of the invention is useful in electrochemical detectors, polarographs and similar devices.

Claims (1)

SUBJECT OF THE INVENTION Circuit for realizing a sequence of polarizing pulses and control pulses for pulse voltammetric measurements, characterized in that the clock generator (18) is connected via a binary counter (8) to a digital memory (7), the first output of which is connected via a first switching element (9) a first analog memory (10), to a second output of digital memory (7) connected via a second switching element (11) a second analog memory (12), to a third output of digital memory (7) connected via a third switching element (13) a third analog memory (14), a converter (15) is connected to a fourth output of digital memory (7), a fifth output of digital memory (7) is connected via a power amplifier (16) to a mechanical dropper (17), the memory (7) is connected to the reset input of the binary counter (8)