CS215416B1 - Wiring for non-contact static static power factor compensator control - Google Patents

Abstract

Circuit for contactless control of a static step-up power factor compensator. The invention falls within the field of heavy-current electrical engineering and its purpose is to eliminate uneven loading of compensation capacitors and switches and thus prematurely eliminate some of them. The purpose was achieved by a circuit containing a preferential element determining the order of occupation of the compensation stages. The invention is intended for control of a static step-up power factor compensator in heavy-current electrical engineering. The use of a preferential element PR and its connection to the memory PÍ to Pn and the gate H1 best characterize the invention.

Description

The invention is in the field of heavy-current electrical engineering and its purpose is to eliminate the uneven loading of compensating capacitors and switches and thereby prematurely eliminate some of them. The purpose was achieved by engaging with a preferential article defining the order of filling the compensation stages. The invention is intended for the control of a static step power factor compensator in heavy-current electrical engineering.

The use of the PR preference article and its engagement in memory P1 to Pn and the gate H1 best characterize the invention. 21S 416

215416 3

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for contactless control of a static step power factor compensator with a parallel-coupled, three-position controller-controlled compensation stage for each phase, generated by serial connection of a serial resonant circuit and a controlled contactless synchronous semiconductor switch.

Power factor compensation circuits are known, comprising contactless switching of parallel-connected compensating capacitors connected in series with a limiting choke in each phase forming a serial resonant circuit by means of contactless synchronous switches. The switch control is derived from a three-position controller evaluating reactive power in a compensated power grid based on phase voltages and current ratios. If it is necessary to increase the capacitive power, it is on the voltage pulse of one output of the three-position controller and if the capacitive power is to be reduced, the voltage pulse is on the second output. If the power is not to be changed, no pulse is generated. Switching and tripping causes uneven loading of compensating capacitors and switches, causing some wear and therefore malfunctioning while others are underutilized. Thus, the reliability of the device is substantially reduced. In the aforementioned disadvantage, the contactless control circuitry eliminates the static step comparator of the power factor according to the invention, the principle being that gate links are connected to the outputs of the three-position controller; the output of each of them is connected to a dual-output memory cell, each of which is connected in parallel with a preferential cell and with the exception of the last memory cell, the input of the next gate cell, the two outputs of the preferential cell being connected to the input ports of the first gate and the first of both outputs a control electrode of the contactless synchronous semiconductor switch is connected to the memory cells. An example of wiring for non-contact static power factor comparator control is below

Claims (2)

OBJECT 1. A wiring for a non-contact static step power factor compensator with parallel-coupled, three-position controller-controlled compensation stages for each phase, formed by serial connection of a serial resonant circuit and a controlled contactless synchronous semiconductor switch, characterized in that Gate Cells (H1 to Hn) are connected, and a memory cell (P1 to Pn) with two outputs is connected to the output of each of them, and a PR is connected in parallel, with the exception of the last 215416 described and explained with a drawing. on which H1, H2 to Hn are gate cells, connected to outputs sludge of a three-position controller (not shown) and their number corresponds to the number of switched compensation stages of each phase. Two-output memory cells P1, P2-Pn are preferably connected to the outputs of the gate members H1, H2 to Hn, preferably with delay members. The two outputs of the memory cells P1, P2 to Pn are connected to both the preferential cell PR and, in addition to the last memory cell Pn, to the further inputs of the next gate cell H2 to Hn. The first outputs of the memory cells Pl, j P2 and Pn are always connected to inputs 1, 2 to! n control electrodes of non-contacting synchronous switches (not shown) with which they are in series; compensation power LC circuits not shown. The two outputs of the PR preferential link are connected to the shift inputs of the first gate member H1. The control pulse generating logic for controlling the synchronous switches is fixed by the electronic circuit to which the triple position controller gives an instruction to operate. The synchronous switches according to the invention are controlled by a circle, i. that the pulse at the output of the three-position regulator for pinning the compensation stage is activated by the output of that memory cell P1, P2 to Pn, which is closest to the last activated memory cell. Similarly, on the pulse at output 1 of the three-position controller to disconnect the compensation stage, the output of the memory cell that follows the last switched-off memory cell is blocked. PR preferential article decides on activation; the output of the first memory cell H1 for igniting the control electrode 1 of the synchronous switch when all the switches are still off. Conversely, when all switches are on, the preferential cell decides PR and locks the output from the first gate member H1. The delay at the outputs of the memory cells P1, P3 to Pn prevents unwanted activation of several cells at the same time. OF THE INVENTION of the memory cell (Pn) at the same time the input of the next gate cell (H2 to Hn), wherein the two outputs of the preferential cell (PR) are connected to the shift inputs of the first gate cell (H1) and the control electrode (1 to n) of the contactless synchronous semiconductor switch is connected. 2. Connection for contactless control of a static step power factor compensator according to claim 1, characterized in that the two outputs of the memory cells (P1 to Pn) are provided with delay members. 1 drawing 215 416 -O